1 // SPDX-License-Identifier: GPL-2.0-only 2 /************************************************************************** 3 * Copyright (c) 2007-2011, Intel Corporation. 4 * All Rights Reserved. 5 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA. 6 * All Rights Reserved. 7 * 8 **************************************************************************/ 9 10 #include <linux/cpu.h> 11 #include <linux/module.h> 12 #include <linux/notifier.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/spinlock.h> 15 16 #include <asm/set_memory.h> 17 18 #include <acpi/video.h> 19 20 #include <drm/drm.h> 21 #include <drm/drm_drv.h> 22 #include <drm/drm_fb_helper.h> 23 #include <drm/drm_file.h> 24 #include <drm/drm_ioctl.h> 25 #include <drm/drm_irq.h> 26 #include <drm/drm_pciids.h> 27 #include <drm/drm_vblank.h> 28 29 #include "framebuffer.h" 30 #include "intel_bios.h" 31 #include "mid_bios.h" 32 #include "power.h" 33 #include "psb_drv.h" 34 #include "psb_intel_reg.h" 35 #include "psb_reg.h" 36 37 static const struct drm_driver driver; 38 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent); 39 40 /* 41 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID 42 * to the different groups of PowerVR 5-series chip designs 43 * 44 * 0x8086 = Intel Corporation 45 * 46 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx 47 * PowerVR SGX535 - Moorestown - Intel GMA 600 48 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx 49 * PowerVR SGX540 - Medfield - Intel Atom Z2460 50 * PowerVR SGX544MP2 - Medfield - 51 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600 52 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700, 53 * N2800 54 */ 55 static const struct pci_device_id pciidlist[] = { 56 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 57 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 58 #if defined(CONFIG_DRM_GMA600) 59 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 60 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 61 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 62 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 63 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 64 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 65 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 66 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 67 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 68 #endif 69 #if defined(CONFIG_DRM_MEDFIELD) 70 { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 71 { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 72 { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 73 { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 74 { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 75 { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 76 { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 77 { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 78 #endif 79 #if defined(CONFIG_DRM_GMA3600) 80 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 81 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 82 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 83 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 84 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 85 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 86 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 87 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 88 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 89 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 90 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 91 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 92 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 93 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 94 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 95 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 96 #endif 97 { 0, } 98 }; 99 MODULE_DEVICE_TABLE(pci, pciidlist); 100 101 /* 102 * Standard IOCTLs. 103 */ 104 static const struct drm_ioctl_desc psb_ioctls[] = { 105 }; 106 107 static int psb_do_init(struct drm_device *dev) 108 { 109 struct drm_psb_private *dev_priv = dev->dev_private; 110 struct psb_gtt *pg = &dev_priv->gtt; 111 112 uint32_t stolen_gtt; 113 114 if (pg->mmu_gatt_start & 0x0FFFFFFF) { 115 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n"); 116 return -EINVAL; 117 } 118 119 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4; 120 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT; 121 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages; 122 123 dev_priv->gatt_free_offset = pg->mmu_gatt_start + 124 (stolen_gtt << PAGE_SHIFT) * 1024; 125 126 spin_lock_init(&dev_priv->irqmask_lock); 127 128 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0); 129 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1); 130 PSB_RSGX32(PSB_CR_BIF_BANK1); 131 132 /* Do not bypass any MMU access, let them pagefault instead */ 133 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK), 134 PSB_CR_BIF_CTRL); 135 PSB_RSGX32(PSB_CR_BIF_CTRL); 136 137 psb_spank(dev_priv); 138 139 /* mmu_gatt ?? */ 140 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); 141 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */ 142 143 return 0; 144 } 145 146 static void psb_driver_unload(struct drm_device *dev) 147 { 148 struct drm_psb_private *dev_priv = dev->dev_private; 149 150 /* TODO: Kill vblank etc here */ 151 152 if (dev_priv) { 153 if (dev_priv->backlight_device) 154 gma_backlight_exit(dev); 155 psb_modeset_cleanup(dev); 156 157 if (dev_priv->ops->chip_teardown) 158 dev_priv->ops->chip_teardown(dev); 159 160 psb_intel_opregion_fini(dev); 161 162 if (dev_priv->pf_pd) { 163 psb_mmu_free_pagedir(dev_priv->pf_pd); 164 dev_priv->pf_pd = NULL; 165 } 166 if (dev_priv->mmu) { 167 struct psb_gtt *pg = &dev_priv->gtt; 168 169 down_read(&pg->sem); 170 psb_mmu_remove_pfn_sequence( 171 psb_mmu_get_default_pd 172 (dev_priv->mmu), 173 pg->mmu_gatt_start, 174 dev_priv->vram_stolen_size >> PAGE_SHIFT); 175 up_read(&pg->sem); 176 psb_mmu_driver_takedown(dev_priv->mmu); 177 dev_priv->mmu = NULL; 178 } 179 psb_gtt_takedown(dev); 180 if (dev_priv->scratch_page) { 181 set_pages_wb(dev_priv->scratch_page, 1); 182 __free_page(dev_priv->scratch_page); 183 dev_priv->scratch_page = NULL; 184 } 185 if (dev_priv->vdc_reg) { 186 iounmap(dev_priv->vdc_reg); 187 dev_priv->vdc_reg = NULL; 188 } 189 if (dev_priv->sgx_reg) { 190 iounmap(dev_priv->sgx_reg); 191 dev_priv->sgx_reg = NULL; 192 } 193 if (dev_priv->aux_reg) { 194 iounmap(dev_priv->aux_reg); 195 dev_priv->aux_reg = NULL; 196 } 197 pci_dev_put(dev_priv->aux_pdev); 198 pci_dev_put(dev_priv->lpc_pdev); 199 200 /* Destroy VBT data */ 201 psb_intel_destroy_bios(dev); 202 203 kfree(dev_priv); 204 dev->dev_private = NULL; 205 } 206 gma_power_uninit(dev); 207 } 208 209 static int psb_driver_load(struct drm_device *dev, unsigned long flags) 210 { 211 struct pci_dev *pdev = to_pci_dev(dev->dev); 212 struct drm_psb_private *dev_priv; 213 unsigned long resource_start, resource_len; 214 unsigned long irqflags; 215 int ret = -ENOMEM; 216 struct drm_connector *connector; 217 struct gma_encoder *gma_encoder; 218 struct psb_gtt *pg; 219 220 /* allocating and initializing driver private data */ 221 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL); 222 if (dev_priv == NULL) 223 return -ENOMEM; 224 225 dev_priv->ops = (struct psb_ops *)flags; 226 dev_priv->dev = dev; 227 dev->dev_private = (void *) dev_priv; 228 229 pg = &dev_priv->gtt; 230 231 pci_set_master(pdev); 232 233 dev_priv->num_pipe = dev_priv->ops->pipes; 234 235 resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE); 236 237 dev_priv->vdc_reg = 238 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE); 239 if (!dev_priv->vdc_reg) 240 goto out_err; 241 242 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset, 243 PSB_SGX_SIZE); 244 if (!dev_priv->sgx_reg) 245 goto out_err; 246 247 if (IS_MRST(dev)) { 248 int domain = pci_domain_nr(pdev->bus); 249 250 dev_priv->aux_pdev = 251 pci_get_domain_bus_and_slot(domain, 0, 252 PCI_DEVFN(3, 0)); 253 254 if (dev_priv->aux_pdev) { 255 resource_start = pci_resource_start(dev_priv->aux_pdev, 256 PSB_AUX_RESOURCE); 257 resource_len = pci_resource_len(dev_priv->aux_pdev, 258 PSB_AUX_RESOURCE); 259 dev_priv->aux_reg = ioremap(resource_start, 260 resource_len); 261 if (!dev_priv->aux_reg) 262 goto out_err; 263 264 DRM_DEBUG_KMS("Found aux vdc"); 265 } else { 266 /* Couldn't find the aux vdc so map to primary vdc */ 267 dev_priv->aux_reg = dev_priv->vdc_reg; 268 DRM_DEBUG_KMS("Couldn't find aux pci device"); 269 } 270 dev_priv->gmbus_reg = dev_priv->aux_reg; 271 272 dev_priv->lpc_pdev = 273 pci_get_domain_bus_and_slot(domain, 0, 274 PCI_DEVFN(31, 0)); 275 if (dev_priv->lpc_pdev) { 276 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 277 &dev_priv->lpc_gpio_base); 278 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA, 279 (u32)dev_priv->lpc_gpio_base | (1L<<31)); 280 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 281 &dev_priv->lpc_gpio_base); 282 dev_priv->lpc_gpio_base &= 0xffc0; 283 if (dev_priv->lpc_gpio_base) 284 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n", 285 dev_priv->lpc_gpio_base); 286 else { 287 pci_dev_put(dev_priv->lpc_pdev); 288 dev_priv->lpc_pdev = NULL; 289 } 290 } 291 } else { 292 dev_priv->gmbus_reg = dev_priv->vdc_reg; 293 } 294 295 psb_intel_opregion_setup(dev); 296 297 ret = dev_priv->ops->chip_setup(dev); 298 if (ret) 299 goto out_err; 300 301 /* Init OSPM support */ 302 gma_power_init(dev); 303 304 ret = -ENOMEM; 305 306 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO); 307 if (!dev_priv->scratch_page) 308 goto out_err; 309 310 set_pages_uc(dev_priv->scratch_page, 1); 311 312 ret = psb_gtt_init(dev, 0); 313 if (ret) 314 goto out_err; 315 316 ret = -ENOMEM; 317 318 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0); 319 if (!dev_priv->mmu) 320 goto out_err; 321 322 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0); 323 if (!dev_priv->pf_pd) 324 goto out_err; 325 326 ret = psb_do_init(dev); 327 if (ret) 328 return ret; 329 330 /* Add stolen memory to SGX MMU */ 331 down_read(&pg->sem); 332 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu), 333 dev_priv->stolen_base >> PAGE_SHIFT, 334 pg->gatt_start, 335 pg->stolen_size >> PAGE_SHIFT, 0); 336 up_read(&pg->sem); 337 338 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0); 339 psb_mmu_set_pd_context(dev_priv->pf_pd, 1); 340 341 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE); 342 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE); 343 344 acpi_video_register(); 345 346 /* Setup vertical blanking handling */ 347 ret = drm_vblank_init(dev, dev_priv->num_pipe); 348 if (ret) 349 goto out_err; 350 351 /* 352 * Install interrupt handlers prior to powering off SGX or else we will 353 * crash. 354 */ 355 dev_priv->vdc_irq_mask = 0; 356 dev_priv->pipestat[0] = 0; 357 dev_priv->pipestat[1] = 0; 358 dev_priv->pipestat[2] = 0; 359 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags); 360 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); 361 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R); 362 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R); 363 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags); 364 365 drm_irq_install(dev, pdev->irq); 366 367 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ 368 369 psb_modeset_init(dev); 370 psb_fbdev_init(dev); 371 drm_kms_helper_poll_init(dev); 372 373 /* Only add backlight support if we have LVDS output */ 374 list_for_each_entry(connector, &dev->mode_config.connector_list, 375 head) { 376 gma_encoder = gma_attached_encoder(connector); 377 378 switch (gma_encoder->type) { 379 case INTEL_OUTPUT_LVDS: 380 case INTEL_OUTPUT_MIPI: 381 ret = gma_backlight_init(dev); 382 break; 383 } 384 } 385 386 if (ret) 387 return ret; 388 psb_intel_opregion_enable_asle(dev); 389 #if 0 390 /* Enable runtime pm at last */ 391 pm_runtime_enable(dev->dev); 392 pm_runtime_set_active(dev->dev); 393 #endif 394 /* Intel drm driver load is done, continue doing pvr load */ 395 return 0; 396 out_err: 397 psb_driver_unload(dev); 398 return ret; 399 } 400 401 static inline void get_brightness(struct backlight_device *bd) 402 { 403 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE 404 if (bd) { 405 bd->props.brightness = bd->ops->get_brightness(bd); 406 backlight_update_status(bd); 407 } 408 #endif 409 } 410 411 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd, 412 unsigned long arg) 413 { 414 struct drm_file *file_priv = filp->private_data; 415 struct drm_device *dev = file_priv->minor->dev; 416 struct drm_psb_private *dev_priv = dev->dev_private; 417 static unsigned int runtime_allowed; 418 419 if (runtime_allowed == 1 && dev_priv->is_lvds_on) { 420 runtime_allowed++; 421 pm_runtime_allow(dev->dev); 422 dev_priv->rpm_enabled = 1; 423 } 424 return drm_ioctl(filp, cmd, arg); 425 /* FIXME: do we need to wrap the other side of this */ 426 } 427 428 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 429 { 430 struct drm_device *dev; 431 int ret; 432 433 ret = pci_enable_device(pdev); 434 if (ret) 435 return ret; 436 437 dev = drm_dev_alloc(&driver, &pdev->dev); 438 if (IS_ERR(dev)) { 439 ret = PTR_ERR(dev); 440 goto err_pci_disable_device; 441 } 442 443 pci_set_drvdata(pdev, dev); 444 445 ret = psb_driver_load(dev, ent->driver_data); 446 if (ret) 447 goto err_drm_dev_put; 448 449 ret = drm_dev_register(dev, ent->driver_data); 450 if (ret) 451 goto err_psb_driver_unload; 452 453 return 0; 454 455 err_psb_driver_unload: 456 psb_driver_unload(dev); 457 err_drm_dev_put: 458 drm_dev_put(dev); 459 err_pci_disable_device: 460 pci_disable_device(pdev); 461 return ret; 462 } 463 464 static void psb_pci_remove(struct pci_dev *pdev) 465 { 466 struct drm_device *dev = pci_get_drvdata(pdev); 467 468 drm_dev_unregister(dev); 469 psb_driver_unload(dev); 470 drm_dev_put(dev); 471 } 472 473 static const struct dev_pm_ops psb_pm_ops = { 474 .resume = gma_power_resume, 475 .suspend = gma_power_suspend, 476 .thaw = gma_power_thaw, 477 .freeze = gma_power_freeze, 478 .restore = gma_power_restore, 479 .runtime_suspend = psb_runtime_suspend, 480 .runtime_resume = psb_runtime_resume, 481 .runtime_idle = psb_runtime_idle, 482 }; 483 484 static const struct file_operations psb_gem_fops = { 485 .owner = THIS_MODULE, 486 .open = drm_open, 487 .release = drm_release, 488 .unlocked_ioctl = psb_unlocked_ioctl, 489 .compat_ioctl = drm_compat_ioctl, 490 .mmap = drm_gem_mmap, 491 .poll = drm_poll, 492 .read = drm_read, 493 }; 494 495 static const struct drm_driver driver = { 496 .driver_features = DRIVER_MODESET | DRIVER_GEM, 497 .lastclose = drm_fb_helper_lastclose, 498 499 .num_ioctls = ARRAY_SIZE(psb_ioctls), 500 .irq_preinstall = psb_irq_preinstall, 501 .irq_postinstall = psb_irq_postinstall, 502 .irq_uninstall = psb_irq_uninstall, 503 .irq_handler = psb_irq_handler, 504 505 .dumb_create = psb_gem_dumb_create, 506 .ioctls = psb_ioctls, 507 .fops = &psb_gem_fops, 508 .name = DRIVER_NAME, 509 .desc = DRIVER_DESC, 510 .date = DRIVER_DATE, 511 .major = DRIVER_MAJOR, 512 .minor = DRIVER_MINOR, 513 .patchlevel = DRIVER_PATCHLEVEL 514 }; 515 516 static struct pci_driver psb_pci_driver = { 517 .name = DRIVER_NAME, 518 .id_table = pciidlist, 519 .probe = psb_pci_probe, 520 .remove = psb_pci_remove, 521 .driver.pm = &psb_pm_ops, 522 }; 523 524 static int __init psb_init(void) 525 { 526 return pci_register_driver(&psb_pci_driver); 527 } 528 529 static void __exit psb_exit(void) 530 { 531 pci_unregister_driver(&psb_pci_driver); 532 } 533 534 late_initcall(psb_init); 535 module_exit(psb_exit); 536 537 MODULE_AUTHOR(DRIVER_AUTHOR); 538 MODULE_DESCRIPTION(DRIVER_DESC); 539 MODULE_LICENSE("GPL"); 540