1 /* 2 * Copyright © 2006-2009 Intel Corporation 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program; if not, write to the Free Software Foundation, Inc., 15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 16 * 17 * Authors: 18 * Eric Anholt <eric@anholt.net> 19 * Dave Airlie <airlied@linux.ie> 20 * Jesse Barnes <jesse.barnes@intel.com> 21 */ 22 23 #include <linux/i2c.h> 24 #include <drm/drmP.h> 25 #include <asm/mrst.h> 26 27 #include "intel_bios.h" 28 #include "psb_drv.h" 29 #include "psb_intel_drv.h" 30 #include "psb_intel_reg.h" 31 #include "power.h" 32 #include <linux/pm_runtime.h> 33 34 /* The max/min PWM frequency in BPCR[31:17] - */ 35 /* The smallest number is 1 (not 0) that can fit in the 36 * 15-bit field of the and then*/ 37 /* shifts to the left by one bit to get the actual 16-bit 38 * value that the 15-bits correspond to.*/ 39 #define MRST_BLC_MAX_PWM_REG_FREQ 0xFFFF 40 #define BRIGHTNESS_MAX_LEVEL 100 41 42 /** 43 * Sets the power state for the panel. 44 */ 45 static void oaktrail_lvds_set_power(struct drm_device *dev, 46 struct gma_encoder *gma_encoder, 47 bool on) 48 { 49 u32 pp_status; 50 struct drm_psb_private *dev_priv = dev->dev_private; 51 52 if (!gma_power_begin(dev, true)) 53 return; 54 55 if (on) { 56 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | 57 POWER_TARGET_ON); 58 do { 59 pp_status = REG_READ(PP_STATUS); 60 } while ((pp_status & (PP_ON | PP_READY)) == PP_READY); 61 dev_priv->is_lvds_on = true; 62 if (dev_priv->ops->lvds_bl_power) 63 dev_priv->ops->lvds_bl_power(dev, true); 64 } else { 65 if (dev_priv->ops->lvds_bl_power) 66 dev_priv->ops->lvds_bl_power(dev, false); 67 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & 68 ~POWER_TARGET_ON); 69 do { 70 pp_status = REG_READ(PP_STATUS); 71 } while (pp_status & PP_ON); 72 dev_priv->is_lvds_on = false; 73 pm_request_idle(&dev->pdev->dev); 74 } 75 gma_power_end(dev); 76 } 77 78 static void oaktrail_lvds_dpms(struct drm_encoder *encoder, int mode) 79 { 80 struct drm_device *dev = encoder->dev; 81 struct gma_encoder *gma_encoder = to_gma_encoder(encoder); 82 83 if (mode == DRM_MODE_DPMS_ON) 84 oaktrail_lvds_set_power(dev, gma_encoder, true); 85 else 86 oaktrail_lvds_set_power(dev, gma_encoder, false); 87 88 /* XXX: We never power down the LVDS pairs. */ 89 } 90 91 static void oaktrail_lvds_mode_set(struct drm_encoder *encoder, 92 struct drm_display_mode *mode, 93 struct drm_display_mode *adjusted_mode) 94 { 95 struct drm_device *dev = encoder->dev; 96 struct drm_psb_private *dev_priv = dev->dev_private; 97 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; 98 struct drm_mode_config *mode_config = &dev->mode_config; 99 struct drm_connector *connector = NULL; 100 struct drm_crtc *crtc = encoder->crtc; 101 u32 lvds_port; 102 uint64_t v = DRM_MODE_SCALE_FULLSCREEN; 103 104 if (!gma_power_begin(dev, true)) 105 return; 106 107 /* 108 * The LVDS pin pair will already have been turned on in the 109 * psb_intel_crtc_mode_set since it has a large impact on the DPLL 110 * settings. 111 */ 112 lvds_port = (REG_READ(LVDS) & 113 (~LVDS_PIPEB_SELECT)) | 114 LVDS_PORT_EN | 115 LVDS_BORDER_EN; 116 117 /* If the firmware says dither on Moorestown, or the BIOS does 118 on Oaktrail then enable dithering */ 119 if (mode_dev->panel_wants_dither || dev_priv->lvds_dither) 120 lvds_port |= MRST_PANEL_8TO6_DITHER_ENABLE; 121 122 REG_WRITE(LVDS, lvds_port); 123 124 /* Find the connector we're trying to set up */ 125 list_for_each_entry(connector, &mode_config->connector_list, head) { 126 if (!connector->encoder || connector->encoder->crtc != crtc) 127 continue; 128 } 129 130 if (!connector) { 131 DRM_ERROR("Couldn't find connector when setting mode"); 132 return; 133 } 134 135 drm_object_property_get_value( 136 &connector->base, 137 dev->mode_config.scaling_mode_property, 138 &v); 139 140 if (v == DRM_MODE_SCALE_NO_SCALE) 141 REG_WRITE(PFIT_CONTROL, 0); 142 else if (v == DRM_MODE_SCALE_ASPECT) { 143 if ((mode->vdisplay != adjusted_mode->crtc_vdisplay) || 144 (mode->hdisplay != adjusted_mode->crtc_hdisplay)) { 145 if ((adjusted_mode->crtc_hdisplay * mode->vdisplay) == 146 (mode->hdisplay * adjusted_mode->crtc_vdisplay)) 147 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); 148 else if ((adjusted_mode->crtc_hdisplay * 149 mode->vdisplay) > (mode->hdisplay * 150 adjusted_mode->crtc_vdisplay)) 151 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | 152 PFIT_SCALING_MODE_PILLARBOX); 153 else 154 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | 155 PFIT_SCALING_MODE_LETTERBOX); 156 } else 157 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); 158 } else /*(v == DRM_MODE_SCALE_FULLSCREEN)*/ 159 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); 160 161 gma_power_end(dev); 162 } 163 164 static void oaktrail_lvds_prepare(struct drm_encoder *encoder) 165 { 166 struct drm_device *dev = encoder->dev; 167 struct drm_psb_private *dev_priv = dev->dev_private; 168 struct gma_encoder *gma_encoder = to_gma_encoder(encoder); 169 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; 170 171 if (!gma_power_begin(dev, true)) 172 return; 173 174 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); 175 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL & 176 BACKLIGHT_DUTY_CYCLE_MASK); 177 oaktrail_lvds_set_power(dev, gma_encoder, false); 178 gma_power_end(dev); 179 } 180 181 static u32 oaktrail_lvds_get_max_backlight(struct drm_device *dev) 182 { 183 struct drm_psb_private *dev_priv = dev->dev_private; 184 u32 ret; 185 186 if (gma_power_begin(dev, false)) { 187 ret = ((REG_READ(BLC_PWM_CTL) & 188 BACKLIGHT_MODULATION_FREQ_MASK) >> 189 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; 190 191 gma_power_end(dev); 192 } else 193 ret = ((dev_priv->regs.saveBLC_PWM_CTL & 194 BACKLIGHT_MODULATION_FREQ_MASK) >> 195 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; 196 197 return ret; 198 } 199 200 static void oaktrail_lvds_commit(struct drm_encoder *encoder) 201 { 202 struct drm_device *dev = encoder->dev; 203 struct drm_psb_private *dev_priv = dev->dev_private; 204 struct gma_encoder *gma_encoder = to_gma_encoder(encoder); 205 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; 206 207 if (mode_dev->backlight_duty_cycle == 0) 208 mode_dev->backlight_duty_cycle = 209 oaktrail_lvds_get_max_backlight(dev); 210 oaktrail_lvds_set_power(dev, gma_encoder, true); 211 } 212 213 static const struct drm_encoder_helper_funcs oaktrail_lvds_helper_funcs = { 214 .dpms = oaktrail_lvds_dpms, 215 .mode_fixup = psb_intel_lvds_mode_fixup, 216 .prepare = oaktrail_lvds_prepare, 217 .mode_set = oaktrail_lvds_mode_set, 218 .commit = oaktrail_lvds_commit, 219 }; 220 221 static struct drm_display_mode lvds_configuration_modes[] = { 222 /* hard coded fixed mode for TPO LTPS LPJ040K001A */ 223 { DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER, 33264, 800, 836, 224 846, 1056, 0, 480, 489, 491, 525, 0, 0) }, 225 /* hard coded fixed mode for LVDS 800x480 */ 226 { DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER, 30994, 800, 801, 227 802, 1024, 0, 480, 481, 482, 525, 0, 0) }, 228 /* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600@75 */ 229 { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1072, 230 1104, 1184, 0, 600, 603, 604, 608, 0, 0) }, 231 /* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600@75 */ 232 { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1104, 233 1136, 1184, 0, 600, 603, 604, 608, 0, 0) }, 234 /* hard coded fixed mode for Sharp wsvga LVDS 1024x600 */ 235 { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 48885, 1024, 1124, 236 1204, 1312, 0, 600, 607, 610, 621, 0, 0) }, 237 /* hard coded fixed mode for LVDS 1024x768 */ 238 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 239 1184, 1344, 0, 768, 771, 777, 806, 0, 0) }, 240 /* hard coded fixed mode for LVDS 1366x768 */ 241 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 77500, 1366, 1430, 242 1558, 1664, 0, 768, 769, 770, 776, 0, 0) }, 243 }; 244 245 /* Returns the panel fixed mode from configuration. */ 246 247 static void oaktrail_lvds_get_configuration_mode(struct drm_device *dev, 248 struct psb_intel_mode_device *mode_dev) 249 { 250 struct drm_display_mode *mode = NULL; 251 struct drm_psb_private *dev_priv = dev->dev_private; 252 struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD; 253 254 mode_dev->panel_fixed_mode = NULL; 255 256 /* Use the firmware provided data on Moorestown */ 257 if (dev_priv->has_gct) { 258 mode = kzalloc(sizeof(*mode), GFP_KERNEL); 259 if (!mode) 260 return; 261 262 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; 263 mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo; 264 mode->hsync_start = mode->hdisplay + \ 265 ((ti->hsync_offset_hi << 8) | \ 266 ti->hsync_offset_lo); 267 mode->hsync_end = mode->hsync_start + \ 268 ((ti->hsync_pulse_width_hi << 8) | \ 269 ti->hsync_pulse_width_lo); 270 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \ 271 ti->hblank_lo); 272 mode->vsync_start = \ 273 mode->vdisplay + ((ti->vsync_offset_hi << 4) | \ 274 ti->vsync_offset_lo); 275 mode->vsync_end = \ 276 mode->vsync_start + ((ti->vsync_pulse_width_hi << 4) | \ 277 ti->vsync_pulse_width_lo); 278 mode->vtotal = mode->vdisplay + \ 279 ((ti->vblank_hi << 8) | ti->vblank_lo); 280 mode->clock = ti->pixel_clock * 10; 281 #if 0 282 printk(KERN_INFO "hdisplay is %d\n", mode->hdisplay); 283 printk(KERN_INFO "vdisplay is %d\n", mode->vdisplay); 284 printk(KERN_INFO "HSS is %d\n", mode->hsync_start); 285 printk(KERN_INFO "HSE is %d\n", mode->hsync_end); 286 printk(KERN_INFO "htotal is %d\n", mode->htotal); 287 printk(KERN_INFO "VSS is %d\n", mode->vsync_start); 288 printk(KERN_INFO "VSE is %d\n", mode->vsync_end); 289 printk(KERN_INFO "vtotal is %d\n", mode->vtotal); 290 printk(KERN_INFO "clock is %d\n", mode->clock); 291 #endif 292 mode_dev->panel_fixed_mode = mode; 293 } 294 295 /* Use the BIOS VBT mode if available */ 296 if (mode_dev->panel_fixed_mode == NULL && mode_dev->vbt_mode) 297 mode_dev->panel_fixed_mode = drm_mode_duplicate(dev, 298 mode_dev->vbt_mode); 299 300 /* Then try the LVDS VBT mode */ 301 if (mode_dev->panel_fixed_mode == NULL) 302 if (dev_priv->lfp_lvds_vbt_mode) 303 mode_dev->panel_fixed_mode = 304 drm_mode_duplicate(dev, 305 dev_priv->lfp_lvds_vbt_mode); 306 /* Then guess */ 307 if (mode_dev->panel_fixed_mode == NULL) 308 mode_dev->panel_fixed_mode 309 = drm_mode_duplicate(dev, &lvds_configuration_modes[2]); 310 311 drm_mode_set_name(mode_dev->panel_fixed_mode); 312 drm_mode_set_crtcinfo(mode_dev->panel_fixed_mode, 0); 313 } 314 315 /** 316 * oaktrail_lvds_init - setup LVDS connectors on this device 317 * @dev: drm device 318 * 319 * Create the connector, register the LVDS DDC bus, and try to figure out what 320 * modes we can display on the LVDS panel (if present). 321 */ 322 void oaktrail_lvds_init(struct drm_device *dev, 323 struct psb_intel_mode_device *mode_dev) 324 { 325 struct gma_encoder *gma_encoder; 326 struct gma_connector *gma_connector; 327 struct drm_connector *connector; 328 struct drm_encoder *encoder; 329 struct drm_psb_private *dev_priv = dev->dev_private; 330 struct edid *edid; 331 struct i2c_adapter *i2c_adap; 332 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 333 334 gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL); 335 if (!gma_encoder) 336 return; 337 338 gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL); 339 if (!gma_connector) 340 goto failed_connector; 341 342 connector = &gma_connector->base; 343 encoder = &gma_encoder->base; 344 dev_priv->is_lvds_on = true; 345 drm_connector_init(dev, connector, 346 &psb_intel_lvds_connector_funcs, 347 DRM_MODE_CONNECTOR_LVDS); 348 349 drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs, 350 DRM_MODE_ENCODER_LVDS); 351 352 gma_connector_attach_encoder(gma_connector, gma_encoder); 353 gma_encoder->type = INTEL_OUTPUT_LVDS; 354 355 drm_encoder_helper_add(encoder, &oaktrail_lvds_helper_funcs); 356 drm_connector_helper_add(connector, 357 &psb_intel_lvds_connector_helper_funcs); 358 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 359 connector->interlace_allowed = false; 360 connector->doublescan_allowed = false; 361 362 drm_object_attach_property(&connector->base, 363 dev->mode_config.scaling_mode_property, 364 DRM_MODE_SCALE_FULLSCREEN); 365 drm_object_attach_property(&connector->base, 366 dev_priv->backlight_property, 367 BRIGHTNESS_MAX_LEVEL); 368 369 mode_dev->panel_wants_dither = false; 370 if (dev_priv->has_gct) 371 mode_dev->panel_wants_dither = (dev_priv->gct_data. 372 Panel_Port_Control & MRST_PANEL_8TO6_DITHER_ENABLE); 373 if (dev_priv->lvds_dither) 374 mode_dev->panel_wants_dither = 1; 375 376 /* 377 * LVDS discovery: 378 * 1) check for EDID on DDC 379 * 2) check for VBT data 380 * 3) check to see if LVDS is already on 381 * if none of the above, no panel 382 * 4) make sure lid is open 383 * if closed, act like it's not there for now 384 */ 385 386 i2c_adap = i2c_get_adapter(dev_priv->ops->i2c_bus); 387 if (i2c_adap == NULL) 388 dev_err(dev->dev, "No ddc adapter available!\n"); 389 /* 390 * Attempt to get the fixed panel mode from DDC. Assume that the 391 * preferred mode is the right one. 392 */ 393 if (i2c_adap) { 394 edid = drm_get_edid(connector, i2c_adap); 395 if (edid) { 396 drm_mode_connector_update_edid_property(connector, 397 edid); 398 drm_add_edid_modes(connector, edid); 399 kfree(edid); 400 } 401 402 list_for_each_entry(scan, &connector->probed_modes, head) { 403 if (scan->type & DRM_MODE_TYPE_PREFERRED) { 404 mode_dev->panel_fixed_mode = 405 drm_mode_duplicate(dev, scan); 406 goto out; /* FIXME: check for quirks */ 407 } 408 } 409 } 410 /* 411 * If we didn't get EDID, try geting panel timing 412 * from configuration data 413 */ 414 oaktrail_lvds_get_configuration_mode(dev, mode_dev); 415 416 if (mode_dev->panel_fixed_mode) { 417 mode_dev->panel_fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 418 goto out; /* FIXME: check for quirks */ 419 } 420 421 /* If we still don't have a mode after all that, give up. */ 422 if (!mode_dev->panel_fixed_mode) { 423 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n"); 424 goto failed_find; 425 } 426 427 out: 428 drm_sysfs_connector_add(connector); 429 return; 430 431 failed_find: 432 dev_dbg(dev->dev, "No LVDS modes found, disabling.\n"); 433 if (gma_encoder->ddc_bus) 434 psb_intel_i2c_destroy(gma_encoder->ddc_bus); 435 436 /* failed_ddc: */ 437 438 drm_encoder_cleanup(encoder); 439 drm_connector_cleanup(connector); 440 kfree(gma_connector); 441 failed_connector: 442 kfree(gma_encoder); 443 } 444 445