1 /*
2  * Copyright © 2006-2011 Intel Corporation
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License along with
14  * this program; if not, write to the Free Software Foundation, Inc.,
15  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16  *
17  * Authors:
18  *	Eric Anholt <eric@anholt.net>
19  *	Dave Airlie <airlied@linux.ie>
20  *	Jesse Barnes <jesse.barnes@intel.com>
21  */
22 
23 #include <linux/i2c.h>
24 #include <linux/dmi.h>
25 #include <drm/drmP.h>
26 
27 #include "intel_bios.h"
28 #include "psb_drv.h"
29 #include "psb_intel_drv.h"
30 #include "psb_intel_reg.h"
31 #include "power.h"
32 #include <linux/pm_runtime.h>
33 #include "cdv_device.h"
34 
35 /**
36  * LVDS I2C backlight control macros
37  */
38 #define BRIGHTNESS_MAX_LEVEL 100
39 #define BRIGHTNESS_MASK 0xFF
40 #define BLC_I2C_TYPE	0x01
41 #define BLC_PWM_TYPT	0x02
42 
43 #define BLC_POLARITY_NORMAL 0
44 #define BLC_POLARITY_INVERSE 1
45 
46 #define PSB_BLC_MAX_PWM_REG_FREQ       (0xFFFE)
47 #define PSB_BLC_MIN_PWM_REG_FREQ	(0x2)
48 #define PSB_BLC_PWM_PRECISION_FACTOR	(10)
49 #define PSB_BACKLIGHT_PWM_CTL_SHIFT	(16)
50 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
51 
52 struct cdv_intel_lvds_priv {
53 	/**
54 	 * Saved LVDO output states
55 	 */
56 	uint32_t savePP_ON;
57 	uint32_t savePP_OFF;
58 	uint32_t saveLVDS;
59 	uint32_t savePP_CONTROL;
60 	uint32_t savePP_CYCLE;
61 	uint32_t savePFIT_CONTROL;
62 	uint32_t savePFIT_PGM_RATIOS;
63 	uint32_t saveBLC_PWM_CTL;
64 };
65 
66 /*
67  * Returns the maximum level of the backlight duty cycle field.
68  */
69 static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
70 {
71 	struct drm_psb_private *dev_priv = dev->dev_private;
72 	u32 retval;
73 
74 	if (gma_power_begin(dev, false)) {
75 		retval = ((REG_READ(BLC_PWM_CTL) &
76 			  BACKLIGHT_MODULATION_FREQ_MASK) >>
77 			  BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
78 
79 		gma_power_end(dev);
80 	} else
81 		retval = ((dev_priv->regs.saveBLC_PWM_CTL &
82 			  BACKLIGHT_MODULATION_FREQ_MASK) >>
83 			  BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
84 
85 	return retval;
86 }
87 
88 #if 0
89 /*
90  * Set LVDS backlight level by I2C command
91  */
92 static int cdv_lvds_i2c_set_brightness(struct drm_device *dev,
93 					unsigned int level)
94 {
95 	struct drm_psb_private *dev_priv = dev->dev_private;
96 	struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
97 	u8 out_buf[2];
98 	unsigned int blc_i2c_brightness;
99 
100 	struct i2c_msg msgs[] = {
101 		{
102 			.addr = lvds_i2c_bus->slave_addr,
103 			.flags = 0,
104 			.len = 2,
105 			.buf = out_buf,
106 		}
107 	};
108 
109 	blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
110 			     BRIGHTNESS_MASK /
111 			     BRIGHTNESS_MAX_LEVEL);
112 
113 	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
114 		blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
115 
116 	out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
117 	out_buf[1] = (u8)blc_i2c_brightness;
118 
119 	if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1)
120 		return 0;
121 
122 	DRM_ERROR("I2C transfer error\n");
123 	return -1;
124 }
125 
126 
127 static int cdv_lvds_pwm_set_brightness(struct drm_device *dev, int level)
128 {
129 	struct drm_psb_private *dev_priv = dev->dev_private;
130 
131 	u32 max_pwm_blc;
132 	u32 blc_pwm_duty_cycle;
133 
134 	max_pwm_blc = cdv_intel_lvds_get_max_backlight(dev);
135 
136 	/*BLC_PWM_CTL Should be initiated while backlight device init*/
137 	BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
138 
139 	blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
140 
141 	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
142 		blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
143 
144 	blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
145 	REG_WRITE(BLC_PWM_CTL,
146 		  (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
147 		  (blc_pwm_duty_cycle));
148 
149 	return 0;
150 }
151 
152 /*
153  * Set LVDS backlight level either by I2C or PWM
154  */
155 void cdv_intel_lvds_set_brightness(struct drm_device *dev, int level)
156 {
157 	struct drm_psb_private *dev_priv = dev->dev_private;
158 
159 	if (!dev_priv->lvds_bl) {
160 		DRM_ERROR("NO LVDS Backlight Info\n");
161 		return;
162 	}
163 
164 	if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
165 		cdv_lvds_i2c_set_brightness(dev, level);
166 	else
167 		cdv_lvds_pwm_set_brightness(dev, level);
168 }
169 #endif
170 
171 /**
172  * Sets the backlight level.
173  *
174  * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
175  */
176 static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
177 {
178 	struct drm_psb_private *dev_priv = dev->dev_private;
179 	u32 blc_pwm_ctl;
180 
181 	if (gma_power_begin(dev, false)) {
182 		blc_pwm_ctl =
183 			REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
184 		REG_WRITE(BLC_PWM_CTL,
185 				(blc_pwm_ctl |
186 				(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
187 		gma_power_end(dev);
188 	} else {
189 		blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
190 				~BACKLIGHT_DUTY_CYCLE_MASK;
191 		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
192 					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
193 	}
194 }
195 
196 /**
197  * Sets the power state for the panel.
198  */
199 static void cdv_intel_lvds_set_power(struct drm_device *dev,
200 				     struct drm_encoder *encoder, bool on)
201 {
202 	struct drm_psb_private *dev_priv = dev->dev_private;
203 	u32 pp_status;
204 
205 	if (!gma_power_begin(dev, true))
206 		return;
207 
208 	if (on) {
209 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
210 			  POWER_TARGET_ON);
211 		do {
212 			pp_status = REG_READ(PP_STATUS);
213 		} while ((pp_status & PP_ON) == 0);
214 
215 		cdv_intel_lvds_set_backlight(dev,
216 				dev_priv->mode_dev.backlight_duty_cycle);
217 	} else {
218 		cdv_intel_lvds_set_backlight(dev, 0);
219 
220 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
221 			  ~POWER_TARGET_ON);
222 		do {
223 			pp_status = REG_READ(PP_STATUS);
224 		} while (pp_status & PP_ON);
225 	}
226 	gma_power_end(dev);
227 }
228 
229 static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
230 {
231 	struct drm_device *dev = encoder->dev;
232 	if (mode == DRM_MODE_DPMS_ON)
233 		cdv_intel_lvds_set_power(dev, encoder, true);
234 	else
235 		cdv_intel_lvds_set_power(dev, encoder, false);
236 	/* XXX: We never power down the LVDS pairs. */
237 }
238 
239 static void cdv_intel_lvds_save(struct drm_connector *connector)
240 {
241 }
242 
243 static void cdv_intel_lvds_restore(struct drm_connector *connector)
244 {
245 }
246 
247 static int cdv_intel_lvds_mode_valid(struct drm_connector *connector,
248 			      struct drm_display_mode *mode)
249 {
250 	struct drm_device *dev = connector->dev;
251 	struct drm_psb_private *dev_priv = dev->dev_private;
252 	struct drm_display_mode *fixed_mode =
253 					dev_priv->mode_dev.panel_fixed_mode;
254 
255 	/* just in case */
256 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
257 		return MODE_NO_DBLESCAN;
258 
259 	/* just in case */
260 	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
261 		return MODE_NO_INTERLACE;
262 
263 	if (fixed_mode) {
264 		if (mode->hdisplay > fixed_mode->hdisplay)
265 			return MODE_PANEL;
266 		if (mode->vdisplay > fixed_mode->vdisplay)
267 			return MODE_PANEL;
268 	}
269 	return MODE_OK;
270 }
271 
272 static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
273 				  const struct drm_display_mode *mode,
274 				  struct drm_display_mode *adjusted_mode)
275 {
276 	struct drm_device *dev = encoder->dev;
277 	struct drm_psb_private *dev_priv = dev->dev_private;
278 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
279 	struct drm_encoder *tmp_encoder;
280 	struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
281 
282 	/* Should never happen!! */
283 	list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
284 			    head) {
285 		if (tmp_encoder != encoder
286 		    && tmp_encoder->crtc == encoder->crtc) {
287 			pr_err("Can't enable LVDS and another encoder on the same pipe\n");
288 			return false;
289 		}
290 	}
291 
292 	/*
293 	 * If we have timings from the BIOS for the panel, put them in
294 	 * to the adjusted mode.  The CRTC will be set up for this mode,
295 	 * with the panel scaling set up to source from the H/VDisplay
296 	 * of the original mode.
297 	 */
298 	if (panel_fixed_mode != NULL) {
299 		adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
300 		adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
301 		adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
302 		adjusted_mode->htotal = panel_fixed_mode->htotal;
303 		adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
304 		adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
305 		adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
306 		adjusted_mode->vtotal = panel_fixed_mode->vtotal;
307 		adjusted_mode->clock = panel_fixed_mode->clock;
308 		drm_mode_set_crtcinfo(adjusted_mode,
309 				      CRTC_INTERLACE_HALVE_V);
310 	}
311 
312 	/*
313 	 * XXX: It would be nice to support lower refresh rates on the
314 	 * panels to reduce power consumption, and perhaps match the
315 	 * user's requested refresh rate.
316 	 */
317 
318 	return true;
319 }
320 
321 static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
322 {
323 	struct drm_device *dev = encoder->dev;
324 	struct drm_psb_private *dev_priv = dev->dev_private;
325 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
326 
327 	if (!gma_power_begin(dev, true))
328 		return;
329 
330 	mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
331 	mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
332 					  BACKLIGHT_DUTY_CYCLE_MASK);
333 
334 	cdv_intel_lvds_set_power(dev, encoder, false);
335 
336 	gma_power_end(dev);
337 }
338 
339 static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
340 {
341 	struct drm_device *dev = encoder->dev;
342 	struct drm_psb_private *dev_priv = dev->dev_private;
343 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
344 
345 	if (mode_dev->backlight_duty_cycle == 0)
346 		mode_dev->backlight_duty_cycle =
347 		    cdv_intel_lvds_get_max_backlight(dev);
348 
349 	cdv_intel_lvds_set_power(dev, encoder, true);
350 }
351 
352 static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
353 				struct drm_display_mode *mode,
354 				struct drm_display_mode *adjusted_mode)
355 {
356 	struct drm_device *dev = encoder->dev;
357 	struct drm_psb_private *dev_priv = dev->dev_private;
358 	struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
359 	u32 pfit_control;
360 
361 	/*
362 	 * The LVDS pin pair will already have been turned on in the
363 	 * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
364 	 * settings.
365 	 */
366 
367 	/*
368 	 * Enable automatic panel scaling so that non-native modes fill the
369 	 * screen.  Should be enabled before the pipe is enabled, according to
370 	 * register description and PRM.
371 	 */
372 	if (mode->hdisplay != adjusted_mode->hdisplay ||
373 	    mode->vdisplay != adjusted_mode->vdisplay)
374 		pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
375 				HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
376 				HORIZ_INTERP_BILINEAR);
377 	else
378 		pfit_control = 0;
379 
380 	pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
381 
382 	if (dev_priv->lvds_dither)
383 		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
384 
385 	REG_WRITE(PFIT_CONTROL, pfit_control);
386 }
387 
388 /**
389  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
390  */
391 static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
392 {
393 	struct drm_device *dev = connector->dev;
394 	struct drm_psb_private *dev_priv = dev->dev_private;
395 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
396 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
397 	int ret;
398 
399 	ret = psb_intel_ddc_get_modes(connector, &gma_encoder->i2c_bus->adapter);
400 
401 	if (ret)
402 		return ret;
403 
404 	if (mode_dev->panel_fixed_mode != NULL) {
405 		struct drm_display_mode *mode =
406 		    drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
407 		drm_mode_probed_add(connector, mode);
408 		return 1;
409 	}
410 
411 	return 0;
412 }
413 
414 /**
415  * cdv_intel_lvds_destroy - unregister and free LVDS structures
416  * @connector: connector to free
417  *
418  * Unregister the DDC bus for this connector then free the driver private
419  * structure.
420  */
421 static void cdv_intel_lvds_destroy(struct drm_connector *connector)
422 {
423 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
424 
425 	psb_intel_i2c_destroy(gma_encoder->i2c_bus);
426 	drm_connector_unregister(connector);
427 	drm_connector_cleanup(connector);
428 	kfree(connector);
429 }
430 
431 static int cdv_intel_lvds_set_property(struct drm_connector *connector,
432 				       struct drm_property *property,
433 				       uint64_t value)
434 {
435 	struct drm_encoder *encoder = connector->encoder;
436 
437 	if (!strcmp(property->name, "scaling mode") && encoder) {
438 		struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
439 		uint64_t curValue;
440 
441 		if (!crtc)
442 			return -1;
443 
444 		switch (value) {
445 		case DRM_MODE_SCALE_FULLSCREEN:
446 			break;
447 		case DRM_MODE_SCALE_NO_SCALE:
448 			break;
449 		case DRM_MODE_SCALE_ASPECT:
450 			break;
451 		default:
452 			return -1;
453 		}
454 
455 		if (drm_object_property_get_value(&connector->base,
456 						     property,
457 						     &curValue))
458 			return -1;
459 
460 		if (curValue == value)
461 			return 0;
462 
463 		if (drm_object_property_set_value(&connector->base,
464 							property,
465 							value))
466 			return -1;
467 
468 		if (crtc->saved_mode.hdisplay != 0 &&
469 		    crtc->saved_mode.vdisplay != 0) {
470 			if (!drm_crtc_helper_set_mode(encoder->crtc,
471 						      &crtc->saved_mode,
472 						      encoder->crtc->x,
473 						      encoder->crtc->y,
474 						      encoder->crtc->primary->fb))
475 				return -1;
476 		}
477 	} else if (!strcmp(property->name, "backlight") && encoder) {
478 		if (drm_object_property_set_value(&connector->base,
479 							property,
480 							value))
481 			return -1;
482 		else
483                         gma_backlight_set(encoder->dev, value);
484 	} else if (!strcmp(property->name, "DPMS") && encoder) {
485 		const struct drm_encoder_helper_funcs *helpers =
486 					encoder->helper_private;
487 		helpers->dpms(encoder, value);
488 	}
489 	return 0;
490 }
491 
492 static const struct drm_encoder_helper_funcs
493 					cdv_intel_lvds_helper_funcs = {
494 	.dpms = cdv_intel_lvds_encoder_dpms,
495 	.mode_fixup = cdv_intel_lvds_mode_fixup,
496 	.prepare = cdv_intel_lvds_prepare,
497 	.mode_set = cdv_intel_lvds_mode_set,
498 	.commit = cdv_intel_lvds_commit,
499 };
500 
501 static const struct drm_connector_helper_funcs
502 				cdv_intel_lvds_connector_helper_funcs = {
503 	.get_modes = cdv_intel_lvds_get_modes,
504 	.mode_valid = cdv_intel_lvds_mode_valid,
505 	.best_encoder = gma_best_encoder,
506 };
507 
508 static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
509 	.dpms = drm_helper_connector_dpms,
510 	.fill_modes = drm_helper_probe_single_connector_modes,
511 	.set_property = cdv_intel_lvds_set_property,
512 	.destroy = cdv_intel_lvds_destroy,
513 };
514 
515 
516 static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder)
517 {
518 	drm_encoder_cleanup(encoder);
519 }
520 
521 static const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {
522 	.destroy = cdv_intel_lvds_enc_destroy,
523 };
524 
525 /*
526  * Enumerate the child dev array parsed from VBT to check whether
527  * the LVDS is present.
528  * If it is present, return 1.
529  * If it is not present, return false.
530  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
531  */
532 static bool lvds_is_present_in_vbt(struct drm_device *dev,
533 				   u8 *i2c_pin)
534 {
535 	struct drm_psb_private *dev_priv = dev->dev_private;
536 	int i;
537 
538 	if (!dev_priv->child_dev_num)
539 		return true;
540 
541 	for (i = 0; i < dev_priv->child_dev_num; i++) {
542 		struct child_device_config *child = dev_priv->child_dev + i;
543 
544 		/* If the device type is not LFP, continue.
545 		 * We have to check both the new identifiers as well as the
546 		 * old for compatibility with some BIOSes.
547 		 */
548 		if (child->device_type != DEVICE_TYPE_INT_LFP &&
549 		    child->device_type != DEVICE_TYPE_LFP)
550 			continue;
551 
552 		if (child->i2c_pin)
553 		    *i2c_pin = child->i2c_pin;
554 
555 		/* However, we cannot trust the BIOS writers to populate
556 		 * the VBT correctly.  Since LVDS requires additional
557 		 * information from AIM blocks, a non-zero addin offset is
558 		 * a good indicator that the LVDS is actually present.
559 		 */
560 		if (child->addin_offset)
561 			return true;
562 
563 		/* But even then some BIOS writers perform some black magic
564 		 * and instantiate the device without reference to any
565 		 * additional data.  Trust that if the VBT was written into
566 		 * the OpRegion then they have validated the LVDS's existence.
567 		 */
568 		if (dev_priv->opregion.vbt)
569 			return true;
570 	}
571 
572 	return false;
573 }
574 
575 /**
576  * cdv_intel_lvds_init - setup LVDS connectors on this device
577  * @dev: drm device
578  *
579  * Create the connector, register the LVDS DDC bus, and try to figure out what
580  * modes we can display on the LVDS panel (if present).
581  */
582 void cdv_intel_lvds_init(struct drm_device *dev,
583 		     struct psb_intel_mode_device *mode_dev)
584 {
585 	struct gma_encoder *gma_encoder;
586 	struct gma_connector *gma_connector;
587 	struct cdv_intel_lvds_priv *lvds_priv;
588 	struct drm_connector *connector;
589 	struct drm_encoder *encoder;
590 	struct drm_display_mode *scan;
591 	struct drm_crtc *crtc;
592 	struct drm_psb_private *dev_priv = dev->dev_private;
593 	u32 lvds;
594 	int pipe;
595 	u8 pin;
596 
597 	pin = GMBUS_PORT_PANEL;
598 	if (!lvds_is_present_in_vbt(dev, &pin)) {
599 		DRM_DEBUG_KMS("LVDS is not present in VBT\n");
600 		return;
601 	}
602 
603 	gma_encoder = kzalloc(sizeof(struct gma_encoder),
604 				    GFP_KERNEL);
605 	if (!gma_encoder)
606 		return;
607 
608 	gma_connector = kzalloc(sizeof(struct gma_connector),
609 				      GFP_KERNEL);
610 	if (!gma_connector)
611 		goto failed_connector;
612 
613 	lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
614 	if (!lvds_priv)
615 		goto failed_lvds_priv;
616 
617 	gma_encoder->dev_priv = lvds_priv;
618 
619 	connector = &gma_connector->base;
620 	gma_connector->save = cdv_intel_lvds_save;
621 	gma_connector->restore = cdv_intel_lvds_restore;
622 	encoder = &gma_encoder->base;
623 
624 
625 	drm_connector_init(dev, connector,
626 			   &cdv_intel_lvds_connector_funcs,
627 			   DRM_MODE_CONNECTOR_LVDS);
628 
629 	drm_encoder_init(dev, encoder,
630 			 &cdv_intel_lvds_enc_funcs,
631 			 DRM_MODE_ENCODER_LVDS, NULL);
632 
633 
634 	gma_connector_attach_encoder(gma_connector, gma_encoder);
635 	gma_encoder->type = INTEL_OUTPUT_LVDS;
636 
637 	drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
638 	drm_connector_helper_add(connector,
639 				 &cdv_intel_lvds_connector_helper_funcs);
640 	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
641 	connector->interlace_allowed = false;
642 	connector->doublescan_allowed = false;
643 
644 	/*Attach connector properties*/
645 	drm_object_attach_property(&connector->base,
646 				      dev->mode_config.scaling_mode_property,
647 				      DRM_MODE_SCALE_FULLSCREEN);
648 	drm_object_attach_property(&connector->base,
649 				      dev_priv->backlight_property,
650 				      BRIGHTNESS_MAX_LEVEL);
651 
652 	/**
653 	 * Set up I2C bus
654 	 * FIXME: distroy i2c_bus when exit
655 	 */
656 	gma_encoder->i2c_bus = psb_intel_i2c_create(dev,
657 							 GPIOB,
658 							 "LVDSBLC_B");
659 	if (!gma_encoder->i2c_bus) {
660 		dev_printk(KERN_ERR,
661 			&dev->pdev->dev, "I2C bus registration failed.\n");
662 		goto failed_blc_i2c;
663 	}
664 	gma_encoder->i2c_bus->slave_addr = 0x2C;
665 	dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
666 
667 	/*
668 	 * LVDS discovery:
669 	 * 1) check for EDID on DDC
670 	 * 2) check for VBT data
671 	 * 3) check to see if LVDS is already on
672 	 *    if none of the above, no panel
673 	 * 4) make sure lid is open
674 	 *    if closed, act like it's not there for now
675 	 */
676 
677 	/* Set up the DDC bus. */
678 	gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
679 							 GPIOC,
680 							 "LVDSDDC_C");
681 	if (!gma_encoder->ddc_bus) {
682 		dev_printk(KERN_ERR, &dev->pdev->dev,
683 			   "DDC bus registration " "failed.\n");
684 		goto failed_ddc;
685 	}
686 
687 	/*
688 	 * Attempt to get the fixed panel mode from DDC.  Assume that the
689 	 * preferred mode is the right one.
690 	 */
691 	mutex_lock(&dev->mode_config.mutex);
692 	psb_intel_ddc_get_modes(connector,
693 				&gma_encoder->ddc_bus->adapter);
694 	list_for_each_entry(scan, &connector->probed_modes, head) {
695 		if (scan->type & DRM_MODE_TYPE_PREFERRED) {
696 			mode_dev->panel_fixed_mode =
697 			    drm_mode_duplicate(dev, scan);
698 			goto out;	/* FIXME: check for quirks */
699 		}
700 	}
701 
702 	/* Failed to get EDID, what about VBT? do we need this?*/
703 	if (dev_priv->lfp_lvds_vbt_mode) {
704 		mode_dev->panel_fixed_mode =
705 			drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
706 		if (mode_dev->panel_fixed_mode) {
707 			mode_dev->panel_fixed_mode->type |=
708 				DRM_MODE_TYPE_PREFERRED;
709 			goto out;	/* FIXME: check for quirks */
710 		}
711 	}
712 	/*
713 	 * If we didn't get EDID, try checking if the panel is already turned
714 	 * on.	If so, assume that whatever is currently programmed is the
715 	 * correct mode.
716 	 */
717 	lvds = REG_READ(LVDS);
718 	pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
719 	crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
720 
721 	if (crtc && (lvds & LVDS_PORT_EN)) {
722 		mode_dev->panel_fixed_mode =
723 		    cdv_intel_crtc_mode_get(dev, crtc);
724 		if (mode_dev->panel_fixed_mode) {
725 			mode_dev->panel_fixed_mode->type |=
726 			    DRM_MODE_TYPE_PREFERRED;
727 			goto out;	/* FIXME: check for quirks */
728 		}
729 	}
730 
731 	/* If we still don't have a mode after all that, give up. */
732 	if (!mode_dev->panel_fixed_mode) {
733 		DRM_DEBUG
734 			("Found no modes on the lvds, ignoring the LVDS\n");
735 		goto failed_find;
736 	}
737 
738 	/* setup PWM */
739 	{
740 		u32 pwm;
741 
742 		pwm = REG_READ(BLC_PWM_CTL2);
743 		if (pipe == 1)
744 			pwm |= PWM_PIPE_B;
745 		else
746 			pwm &= ~PWM_PIPE_B;
747 		pwm |= PWM_ENABLE;
748 		REG_WRITE(BLC_PWM_CTL2, pwm);
749 	}
750 
751 out:
752 	mutex_unlock(&dev->mode_config.mutex);
753 	drm_connector_register(connector);
754 	return;
755 
756 failed_find:
757 	mutex_unlock(&dev->mode_config.mutex);
758 	pr_err("Failed find\n");
759 	psb_intel_i2c_destroy(gma_encoder->ddc_bus);
760 failed_ddc:
761 	pr_err("Failed DDC\n");
762 	psb_intel_i2c_destroy(gma_encoder->i2c_bus);
763 failed_blc_i2c:
764 	pr_err("Failed BLC\n");
765 	drm_encoder_cleanup(encoder);
766 	drm_connector_cleanup(connector);
767 	kfree(lvds_priv);
768 failed_lvds_priv:
769 	kfree(gma_connector);
770 failed_connector:
771 	kfree(gma_encoder);
772 }
773