1 /*
2  * Copyright © 2006-2011 Intel Corporation
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License along with
14  * this program; if not, write to the Free Software Foundation, Inc.,
15  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16  *
17  * Authors:
18  *	Eric Anholt <eric@anholt.net>
19  *	Dave Airlie <airlied@linux.ie>
20  *	Jesse Barnes <jesse.barnes@intel.com>
21  */
22 
23 #include <linux/dmi.h>
24 #include <linux/i2c.h>
25 #include <linux/pm_runtime.h>
26 
27 #include "cdv_device.h"
28 #include "intel_bios.h"
29 #include "power.h"
30 #include "psb_drv.h"
31 #include "psb_intel_drv.h"
32 #include "psb_intel_reg.h"
33 
34 /**
35  * LVDS I2C backlight control macros
36  */
37 #define BRIGHTNESS_MAX_LEVEL 100
38 #define BRIGHTNESS_MASK 0xFF
39 #define BLC_I2C_TYPE	0x01
40 #define BLC_PWM_TYPT	0x02
41 
42 #define BLC_POLARITY_NORMAL 0
43 #define BLC_POLARITY_INVERSE 1
44 
45 #define PSB_BLC_MAX_PWM_REG_FREQ       (0xFFFE)
46 #define PSB_BLC_MIN_PWM_REG_FREQ	(0x2)
47 #define PSB_BLC_PWM_PRECISION_FACTOR	(10)
48 #define PSB_BACKLIGHT_PWM_CTL_SHIFT	(16)
49 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
50 
51 struct cdv_intel_lvds_priv {
52 	/**
53 	 * Saved LVDO output states
54 	 */
55 	uint32_t savePP_ON;
56 	uint32_t savePP_OFF;
57 	uint32_t saveLVDS;
58 	uint32_t savePP_CONTROL;
59 	uint32_t savePP_CYCLE;
60 	uint32_t savePFIT_CONTROL;
61 	uint32_t savePFIT_PGM_RATIOS;
62 	uint32_t saveBLC_PWM_CTL;
63 };
64 
65 /*
66  * Returns the maximum level of the backlight duty cycle field.
67  */
68 static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
69 {
70 	struct drm_psb_private *dev_priv = dev->dev_private;
71 	u32 retval;
72 
73 	if (gma_power_begin(dev, false)) {
74 		retval = ((REG_READ(BLC_PWM_CTL) &
75 			  BACKLIGHT_MODULATION_FREQ_MASK) >>
76 			  BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
77 
78 		gma_power_end(dev);
79 	} else
80 		retval = ((dev_priv->regs.saveBLC_PWM_CTL &
81 			  BACKLIGHT_MODULATION_FREQ_MASK) >>
82 			  BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
83 
84 	return retval;
85 }
86 
87 #if 0
88 /*
89  * Set LVDS backlight level by I2C command
90  */
91 static int cdv_lvds_i2c_set_brightness(struct drm_device *dev,
92 					unsigned int level)
93 {
94 	struct drm_psb_private *dev_priv = dev->dev_private;
95 	struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
96 	u8 out_buf[2];
97 	unsigned int blc_i2c_brightness;
98 
99 	struct i2c_msg msgs[] = {
100 		{
101 			.addr = lvds_i2c_bus->slave_addr,
102 			.flags = 0,
103 			.len = 2,
104 			.buf = out_buf,
105 		}
106 	};
107 
108 	blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
109 			     BRIGHTNESS_MASK /
110 			     BRIGHTNESS_MAX_LEVEL);
111 
112 	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
113 		blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
114 
115 	out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
116 	out_buf[1] = (u8)blc_i2c_brightness;
117 
118 	if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1)
119 		return 0;
120 
121 	DRM_ERROR("I2C transfer error\n");
122 	return -1;
123 }
124 
125 
126 static int cdv_lvds_pwm_set_brightness(struct drm_device *dev, int level)
127 {
128 	struct drm_psb_private *dev_priv = dev->dev_private;
129 
130 	u32 max_pwm_blc;
131 	u32 blc_pwm_duty_cycle;
132 
133 	max_pwm_blc = cdv_intel_lvds_get_max_backlight(dev);
134 
135 	/*BLC_PWM_CTL Should be initiated while backlight device init*/
136 	BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
137 
138 	blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
139 
140 	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
141 		blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
142 
143 	blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
144 	REG_WRITE(BLC_PWM_CTL,
145 		  (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
146 		  (blc_pwm_duty_cycle));
147 
148 	return 0;
149 }
150 
151 /*
152  * Set LVDS backlight level either by I2C or PWM
153  */
154 void cdv_intel_lvds_set_brightness(struct drm_device *dev, int level)
155 {
156 	struct drm_psb_private *dev_priv = dev->dev_private;
157 
158 	if (!dev_priv->lvds_bl) {
159 		DRM_ERROR("NO LVDS Backlight Info\n");
160 		return;
161 	}
162 
163 	if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
164 		cdv_lvds_i2c_set_brightness(dev, level);
165 	else
166 		cdv_lvds_pwm_set_brightness(dev, level);
167 }
168 #endif
169 
170 /**
171  * Sets the backlight level.
172  *
173  * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
174  */
175 static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
176 {
177 	struct drm_psb_private *dev_priv = dev->dev_private;
178 	u32 blc_pwm_ctl;
179 
180 	if (gma_power_begin(dev, false)) {
181 		blc_pwm_ctl =
182 			REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
183 		REG_WRITE(BLC_PWM_CTL,
184 				(blc_pwm_ctl |
185 				(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
186 		gma_power_end(dev);
187 	} else {
188 		blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
189 				~BACKLIGHT_DUTY_CYCLE_MASK;
190 		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
191 					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
192 	}
193 }
194 
195 /**
196  * Sets the power state for the panel.
197  */
198 static void cdv_intel_lvds_set_power(struct drm_device *dev,
199 				     struct drm_encoder *encoder, bool on)
200 {
201 	struct drm_psb_private *dev_priv = dev->dev_private;
202 	u32 pp_status;
203 
204 	if (!gma_power_begin(dev, true))
205 		return;
206 
207 	if (on) {
208 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
209 			  POWER_TARGET_ON);
210 		do {
211 			pp_status = REG_READ(PP_STATUS);
212 		} while ((pp_status & PP_ON) == 0);
213 
214 		cdv_intel_lvds_set_backlight(dev,
215 				dev_priv->mode_dev.backlight_duty_cycle);
216 	} else {
217 		cdv_intel_lvds_set_backlight(dev, 0);
218 
219 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
220 			  ~POWER_TARGET_ON);
221 		do {
222 			pp_status = REG_READ(PP_STATUS);
223 		} while (pp_status & PP_ON);
224 	}
225 	gma_power_end(dev);
226 }
227 
228 static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
229 {
230 	struct drm_device *dev = encoder->dev;
231 	if (mode == DRM_MODE_DPMS_ON)
232 		cdv_intel_lvds_set_power(dev, encoder, true);
233 	else
234 		cdv_intel_lvds_set_power(dev, encoder, false);
235 	/* XXX: We never power down the LVDS pairs. */
236 }
237 
238 static void cdv_intel_lvds_save(struct drm_connector *connector)
239 {
240 }
241 
242 static void cdv_intel_lvds_restore(struct drm_connector *connector)
243 {
244 }
245 
246 static enum drm_mode_status cdv_intel_lvds_mode_valid(struct drm_connector *connector,
247 			      struct drm_display_mode *mode)
248 {
249 	struct drm_device *dev = connector->dev;
250 	struct drm_psb_private *dev_priv = dev->dev_private;
251 	struct drm_display_mode *fixed_mode =
252 					dev_priv->mode_dev.panel_fixed_mode;
253 
254 	/* just in case */
255 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
256 		return MODE_NO_DBLESCAN;
257 
258 	/* just in case */
259 	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
260 		return MODE_NO_INTERLACE;
261 
262 	if (fixed_mode) {
263 		if (mode->hdisplay > fixed_mode->hdisplay)
264 			return MODE_PANEL;
265 		if (mode->vdisplay > fixed_mode->vdisplay)
266 			return MODE_PANEL;
267 	}
268 	return MODE_OK;
269 }
270 
271 static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
272 				  const struct drm_display_mode *mode,
273 				  struct drm_display_mode *adjusted_mode)
274 {
275 	struct drm_device *dev = encoder->dev;
276 	struct drm_psb_private *dev_priv = dev->dev_private;
277 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
278 	struct drm_encoder *tmp_encoder;
279 	struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
280 
281 	/* Should never happen!! */
282 	list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
283 			    head) {
284 		if (tmp_encoder != encoder
285 		    && tmp_encoder->crtc == encoder->crtc) {
286 			pr_err("Can't enable LVDS and another encoder on the same pipe\n");
287 			return false;
288 		}
289 	}
290 
291 	/*
292 	 * If we have timings from the BIOS for the panel, put them in
293 	 * to the adjusted mode.  The CRTC will be set up for this mode,
294 	 * with the panel scaling set up to source from the H/VDisplay
295 	 * of the original mode.
296 	 */
297 	if (panel_fixed_mode != NULL) {
298 		adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
299 		adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
300 		adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
301 		adjusted_mode->htotal = panel_fixed_mode->htotal;
302 		adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
303 		adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
304 		adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
305 		adjusted_mode->vtotal = panel_fixed_mode->vtotal;
306 		adjusted_mode->clock = panel_fixed_mode->clock;
307 		drm_mode_set_crtcinfo(adjusted_mode,
308 				      CRTC_INTERLACE_HALVE_V);
309 	}
310 
311 	/*
312 	 * XXX: It would be nice to support lower refresh rates on the
313 	 * panels to reduce power consumption, and perhaps match the
314 	 * user's requested refresh rate.
315 	 */
316 
317 	return true;
318 }
319 
320 static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
321 {
322 	struct drm_device *dev = encoder->dev;
323 	struct drm_psb_private *dev_priv = dev->dev_private;
324 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
325 
326 	if (!gma_power_begin(dev, true))
327 		return;
328 
329 	mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
330 	mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
331 					  BACKLIGHT_DUTY_CYCLE_MASK);
332 
333 	cdv_intel_lvds_set_power(dev, encoder, false);
334 
335 	gma_power_end(dev);
336 }
337 
338 static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
339 {
340 	struct drm_device *dev = encoder->dev;
341 	struct drm_psb_private *dev_priv = dev->dev_private;
342 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
343 
344 	if (mode_dev->backlight_duty_cycle == 0)
345 		mode_dev->backlight_duty_cycle =
346 		    cdv_intel_lvds_get_max_backlight(dev);
347 
348 	cdv_intel_lvds_set_power(dev, encoder, true);
349 }
350 
351 static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
352 				struct drm_display_mode *mode,
353 				struct drm_display_mode *adjusted_mode)
354 {
355 	struct drm_device *dev = encoder->dev;
356 	struct drm_psb_private *dev_priv = dev->dev_private;
357 	struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
358 	u32 pfit_control;
359 
360 	/*
361 	 * The LVDS pin pair will already have been turned on in the
362 	 * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
363 	 * settings.
364 	 */
365 
366 	/*
367 	 * Enable automatic panel scaling so that non-native modes fill the
368 	 * screen.  Should be enabled before the pipe is enabled, according to
369 	 * register description and PRM.
370 	 */
371 	if (mode->hdisplay != adjusted_mode->hdisplay ||
372 	    mode->vdisplay != adjusted_mode->vdisplay)
373 		pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
374 				HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
375 				HORIZ_INTERP_BILINEAR);
376 	else
377 		pfit_control = 0;
378 
379 	pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
380 
381 	if (dev_priv->lvds_dither)
382 		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
383 
384 	REG_WRITE(PFIT_CONTROL, pfit_control);
385 }
386 
387 /**
388  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
389  */
390 static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
391 {
392 	struct drm_device *dev = connector->dev;
393 	struct drm_psb_private *dev_priv = dev->dev_private;
394 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
395 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
396 	int ret;
397 
398 	ret = psb_intel_ddc_get_modes(connector, &gma_encoder->i2c_bus->adapter);
399 
400 	if (ret)
401 		return ret;
402 
403 	if (mode_dev->panel_fixed_mode != NULL) {
404 		struct drm_display_mode *mode =
405 		    drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
406 		drm_mode_probed_add(connector, mode);
407 		return 1;
408 	}
409 
410 	return 0;
411 }
412 
413 /**
414  * cdv_intel_lvds_destroy - unregister and free LVDS structures
415  * @connector: connector to free
416  *
417  * Unregister the DDC bus for this connector then free the driver private
418  * structure.
419  */
420 static void cdv_intel_lvds_destroy(struct drm_connector *connector)
421 {
422 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
423 
424 	psb_intel_i2c_destroy(gma_encoder->i2c_bus);
425 	drm_connector_unregister(connector);
426 	drm_connector_cleanup(connector);
427 	kfree(connector);
428 }
429 
430 static int cdv_intel_lvds_set_property(struct drm_connector *connector,
431 				       struct drm_property *property,
432 				       uint64_t value)
433 {
434 	struct drm_encoder *encoder = connector->encoder;
435 
436 	if (!strcmp(property->name, "scaling mode") && encoder) {
437 		struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
438 		uint64_t curValue;
439 
440 		if (!crtc)
441 			return -1;
442 
443 		switch (value) {
444 		case DRM_MODE_SCALE_FULLSCREEN:
445 			break;
446 		case DRM_MODE_SCALE_NO_SCALE:
447 			break;
448 		case DRM_MODE_SCALE_ASPECT:
449 			break;
450 		default:
451 			return -1;
452 		}
453 
454 		if (drm_object_property_get_value(&connector->base,
455 						     property,
456 						     &curValue))
457 			return -1;
458 
459 		if (curValue == value)
460 			return 0;
461 
462 		if (drm_object_property_set_value(&connector->base,
463 							property,
464 							value))
465 			return -1;
466 
467 		if (crtc->saved_mode.hdisplay != 0 &&
468 		    crtc->saved_mode.vdisplay != 0) {
469 			if (!drm_crtc_helper_set_mode(encoder->crtc,
470 						      &crtc->saved_mode,
471 						      encoder->crtc->x,
472 						      encoder->crtc->y,
473 						      encoder->crtc->primary->fb))
474 				return -1;
475 		}
476 	} else if (!strcmp(property->name, "backlight") && encoder) {
477 		if (drm_object_property_set_value(&connector->base,
478 							property,
479 							value))
480 			return -1;
481 		else
482                         gma_backlight_set(encoder->dev, value);
483 	} else if (!strcmp(property->name, "DPMS") && encoder) {
484 		const struct drm_encoder_helper_funcs *helpers =
485 					encoder->helper_private;
486 		helpers->dpms(encoder, value);
487 	}
488 	return 0;
489 }
490 
491 static const struct drm_encoder_helper_funcs
492 					cdv_intel_lvds_helper_funcs = {
493 	.dpms = cdv_intel_lvds_encoder_dpms,
494 	.mode_fixup = cdv_intel_lvds_mode_fixup,
495 	.prepare = cdv_intel_lvds_prepare,
496 	.mode_set = cdv_intel_lvds_mode_set,
497 	.commit = cdv_intel_lvds_commit,
498 };
499 
500 static const struct drm_connector_helper_funcs
501 				cdv_intel_lvds_connector_helper_funcs = {
502 	.get_modes = cdv_intel_lvds_get_modes,
503 	.mode_valid = cdv_intel_lvds_mode_valid,
504 	.best_encoder = gma_best_encoder,
505 };
506 
507 static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
508 	.dpms = drm_helper_connector_dpms,
509 	.fill_modes = drm_helper_probe_single_connector_modes,
510 	.set_property = cdv_intel_lvds_set_property,
511 	.destroy = cdv_intel_lvds_destroy,
512 };
513 
514 
515 static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder)
516 {
517 	drm_encoder_cleanup(encoder);
518 }
519 
520 static const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {
521 	.destroy = cdv_intel_lvds_enc_destroy,
522 };
523 
524 /*
525  * Enumerate the child dev array parsed from VBT to check whether
526  * the LVDS is present.
527  * If it is present, return 1.
528  * If it is not present, return false.
529  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
530  */
531 static bool lvds_is_present_in_vbt(struct drm_device *dev,
532 				   u8 *i2c_pin)
533 {
534 	struct drm_psb_private *dev_priv = dev->dev_private;
535 	int i;
536 
537 	if (!dev_priv->child_dev_num)
538 		return true;
539 
540 	for (i = 0; i < dev_priv->child_dev_num; i++) {
541 		struct child_device_config *child = dev_priv->child_dev + i;
542 
543 		/* If the device type is not LFP, continue.
544 		 * We have to check both the new identifiers as well as the
545 		 * old for compatibility with some BIOSes.
546 		 */
547 		if (child->device_type != DEVICE_TYPE_INT_LFP &&
548 		    child->device_type != DEVICE_TYPE_LFP)
549 			continue;
550 
551 		if (child->i2c_pin)
552 		    *i2c_pin = child->i2c_pin;
553 
554 		/* However, we cannot trust the BIOS writers to populate
555 		 * the VBT correctly.  Since LVDS requires additional
556 		 * information from AIM blocks, a non-zero addin offset is
557 		 * a good indicator that the LVDS is actually present.
558 		 */
559 		if (child->addin_offset)
560 			return true;
561 
562 		/* But even then some BIOS writers perform some black magic
563 		 * and instantiate the device without reference to any
564 		 * additional data.  Trust that if the VBT was written into
565 		 * the OpRegion then they have validated the LVDS's existence.
566 		 */
567 		if (dev_priv->opregion.vbt)
568 			return true;
569 	}
570 
571 	return false;
572 }
573 
574 /**
575  * cdv_intel_lvds_init - setup LVDS connectors on this device
576  * @dev: drm device
577  *
578  * Create the connector, register the LVDS DDC bus, and try to figure out what
579  * modes we can display on the LVDS panel (if present).
580  */
581 void cdv_intel_lvds_init(struct drm_device *dev,
582 		     struct psb_intel_mode_device *mode_dev)
583 {
584 	struct gma_encoder *gma_encoder;
585 	struct gma_connector *gma_connector;
586 	struct cdv_intel_lvds_priv *lvds_priv;
587 	struct drm_connector *connector;
588 	struct drm_encoder *encoder;
589 	struct drm_display_mode *scan;
590 	struct drm_crtc *crtc;
591 	struct drm_psb_private *dev_priv = dev->dev_private;
592 	u32 lvds;
593 	int pipe;
594 	u8 pin;
595 
596 	if (!dev_priv->lvds_enabled_in_vbt)
597 		return;
598 
599 	pin = GMBUS_PORT_PANEL;
600 	if (!lvds_is_present_in_vbt(dev, &pin)) {
601 		DRM_DEBUG_KMS("LVDS is not present in VBT\n");
602 		return;
603 	}
604 
605 	gma_encoder = kzalloc(sizeof(struct gma_encoder),
606 				    GFP_KERNEL);
607 	if (!gma_encoder)
608 		return;
609 
610 	gma_connector = kzalloc(sizeof(struct gma_connector),
611 				      GFP_KERNEL);
612 	if (!gma_connector)
613 		goto failed_connector;
614 
615 	lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
616 	if (!lvds_priv)
617 		goto failed_lvds_priv;
618 
619 	gma_encoder->dev_priv = lvds_priv;
620 
621 	connector = &gma_connector->base;
622 	gma_connector->save = cdv_intel_lvds_save;
623 	gma_connector->restore = cdv_intel_lvds_restore;
624 	encoder = &gma_encoder->base;
625 
626 
627 	drm_connector_init(dev, connector,
628 			   &cdv_intel_lvds_connector_funcs,
629 			   DRM_MODE_CONNECTOR_LVDS);
630 
631 	drm_encoder_init(dev, encoder,
632 			 &cdv_intel_lvds_enc_funcs,
633 			 DRM_MODE_ENCODER_LVDS, NULL);
634 
635 
636 	gma_connector_attach_encoder(gma_connector, gma_encoder);
637 	gma_encoder->type = INTEL_OUTPUT_LVDS;
638 
639 	drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
640 	drm_connector_helper_add(connector,
641 				 &cdv_intel_lvds_connector_helper_funcs);
642 	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
643 	connector->interlace_allowed = false;
644 	connector->doublescan_allowed = false;
645 
646 	/*Attach connector properties*/
647 	drm_object_attach_property(&connector->base,
648 				      dev->mode_config.scaling_mode_property,
649 				      DRM_MODE_SCALE_FULLSCREEN);
650 	drm_object_attach_property(&connector->base,
651 				      dev_priv->backlight_property,
652 				      BRIGHTNESS_MAX_LEVEL);
653 
654 	/**
655 	 * Set up I2C bus
656 	 * FIXME: distroy i2c_bus when exit
657 	 */
658 	gma_encoder->i2c_bus = psb_intel_i2c_create(dev,
659 							 GPIOB,
660 							 "LVDSBLC_B");
661 	if (!gma_encoder->i2c_bus) {
662 		dev_printk(KERN_ERR,
663 			&dev->pdev->dev, "I2C bus registration failed.\n");
664 		goto failed_blc_i2c;
665 	}
666 	gma_encoder->i2c_bus->slave_addr = 0x2C;
667 	dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
668 
669 	/*
670 	 * LVDS discovery:
671 	 * 1) check for EDID on DDC
672 	 * 2) check for VBT data
673 	 * 3) check to see if LVDS is already on
674 	 *    if none of the above, no panel
675 	 * 4) make sure lid is open
676 	 *    if closed, act like it's not there for now
677 	 */
678 
679 	/* Set up the DDC bus. */
680 	gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
681 							 GPIOC,
682 							 "LVDSDDC_C");
683 	if (!gma_encoder->ddc_bus) {
684 		dev_printk(KERN_ERR, &dev->pdev->dev,
685 			   "DDC bus registration " "failed.\n");
686 		goto failed_ddc;
687 	}
688 
689 	/*
690 	 * Attempt to get the fixed panel mode from DDC.  Assume that the
691 	 * preferred mode is the right one.
692 	 */
693 	mutex_lock(&dev->mode_config.mutex);
694 	psb_intel_ddc_get_modes(connector,
695 				&gma_encoder->ddc_bus->adapter);
696 	list_for_each_entry(scan, &connector->probed_modes, head) {
697 		if (scan->type & DRM_MODE_TYPE_PREFERRED) {
698 			mode_dev->panel_fixed_mode =
699 			    drm_mode_duplicate(dev, scan);
700 			goto out;	/* FIXME: check for quirks */
701 		}
702 	}
703 
704 	/* Failed to get EDID, what about VBT? do we need this?*/
705 	if (dev_priv->lfp_lvds_vbt_mode) {
706 		mode_dev->panel_fixed_mode =
707 			drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
708 		if (mode_dev->panel_fixed_mode) {
709 			mode_dev->panel_fixed_mode->type |=
710 				DRM_MODE_TYPE_PREFERRED;
711 			goto out;	/* FIXME: check for quirks */
712 		}
713 	}
714 	/*
715 	 * If we didn't get EDID, try checking if the panel is already turned
716 	 * on.	If so, assume that whatever is currently programmed is the
717 	 * correct mode.
718 	 */
719 	lvds = REG_READ(LVDS);
720 	pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
721 	crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
722 
723 	if (crtc && (lvds & LVDS_PORT_EN)) {
724 		mode_dev->panel_fixed_mode =
725 		    cdv_intel_crtc_mode_get(dev, crtc);
726 		if (mode_dev->panel_fixed_mode) {
727 			mode_dev->panel_fixed_mode->type |=
728 			    DRM_MODE_TYPE_PREFERRED;
729 			goto out;	/* FIXME: check for quirks */
730 		}
731 	}
732 
733 	/* If we still don't have a mode after all that, give up. */
734 	if (!mode_dev->panel_fixed_mode) {
735 		DRM_DEBUG
736 			("Found no modes on the lvds, ignoring the LVDS\n");
737 		goto failed_find;
738 	}
739 
740 	/* setup PWM */
741 	{
742 		u32 pwm;
743 
744 		pwm = REG_READ(BLC_PWM_CTL2);
745 		if (pipe == 1)
746 			pwm |= PWM_PIPE_B;
747 		else
748 			pwm &= ~PWM_PIPE_B;
749 		pwm |= PWM_ENABLE;
750 		REG_WRITE(BLC_PWM_CTL2, pwm);
751 	}
752 
753 out:
754 	mutex_unlock(&dev->mode_config.mutex);
755 	drm_connector_register(connector);
756 	return;
757 
758 failed_find:
759 	mutex_unlock(&dev->mode_config.mutex);
760 	pr_err("Failed find\n");
761 	psb_intel_i2c_destroy(gma_encoder->ddc_bus);
762 failed_ddc:
763 	pr_err("Failed DDC\n");
764 	psb_intel_i2c_destroy(gma_encoder->i2c_bus);
765 failed_blc_i2c:
766 	pr_err("Failed BLC\n");
767 	drm_encoder_cleanup(encoder);
768 	drm_connector_cleanup(connector);
769 	kfree(lvds_priv);
770 failed_lvds_priv:
771 	kfree(gma_connector);
772 failed_connector:
773 	kfree(gma_encoder);
774 }
775