1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 */ 26 27 #include <linux/i2c.h> 28 #include <drm/drmP.h> 29 30 #include "intel_bios.h" 31 #include "psb_drv.h" 32 #include "psb_intel_drv.h" 33 #include "psb_intel_reg.h" 34 #include "power.h" 35 #include "cdv_device.h" 36 #include <linux/pm_runtime.h> 37 38 39 static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode) 40 { 41 struct drm_device *dev = encoder->dev; 42 u32 temp, reg; 43 reg = ADPA; 44 45 temp = REG_READ(reg); 46 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); 47 temp &= ~ADPA_DAC_ENABLE; 48 49 switch (mode) { 50 case DRM_MODE_DPMS_ON: 51 temp |= ADPA_DAC_ENABLE; 52 break; 53 case DRM_MODE_DPMS_STANDBY: 54 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; 55 break; 56 case DRM_MODE_DPMS_SUSPEND: 57 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; 58 break; 59 case DRM_MODE_DPMS_OFF: 60 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; 61 break; 62 } 63 64 REG_WRITE(reg, temp); 65 } 66 67 static int cdv_intel_crt_mode_valid(struct drm_connector *connector, 68 struct drm_display_mode *mode) 69 { 70 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 71 return MODE_NO_DBLESCAN; 72 73 /* The lowest clock for CDV is 20000KHz */ 74 if (mode->clock < 20000) 75 return MODE_CLOCK_LOW; 76 77 /* The max clock for CDV is 355 instead of 400 */ 78 if (mode->clock > 355000) 79 return MODE_CLOCK_HIGH; 80 81 return MODE_OK; 82 } 83 84 static bool cdv_intel_crt_mode_fixup(struct drm_encoder *encoder, 85 const struct drm_display_mode *mode, 86 struct drm_display_mode *adjusted_mode) 87 { 88 return true; 89 } 90 91 static void cdv_intel_crt_mode_set(struct drm_encoder *encoder, 92 struct drm_display_mode *mode, 93 struct drm_display_mode *adjusted_mode) 94 { 95 96 struct drm_device *dev = encoder->dev; 97 struct drm_crtc *crtc = encoder->crtc; 98 struct gma_crtc *gma_crtc = to_gma_crtc(crtc); 99 int dpll_md_reg; 100 u32 adpa, dpll_md; 101 u32 adpa_reg; 102 103 if (gma_crtc->pipe == 0) 104 dpll_md_reg = DPLL_A_MD; 105 else 106 dpll_md_reg = DPLL_B_MD; 107 108 adpa_reg = ADPA; 109 110 /* 111 * Disable separate mode multiplier used when cloning SDVO to CRT 112 * XXX this needs to be adjusted when we really are cloning 113 */ 114 { 115 dpll_md = REG_READ(dpll_md_reg); 116 REG_WRITE(dpll_md_reg, 117 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); 118 } 119 120 adpa = 0; 121 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 122 adpa |= ADPA_HSYNC_ACTIVE_HIGH; 123 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 124 adpa |= ADPA_VSYNC_ACTIVE_HIGH; 125 126 if (gma_crtc->pipe == 0) 127 adpa |= ADPA_PIPE_A_SELECT; 128 else 129 adpa |= ADPA_PIPE_B_SELECT; 130 131 REG_WRITE(adpa_reg, adpa); 132 } 133 134 135 /** 136 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. 137 * 138 * \return true if CRT is connected. 139 * \return false if CRT is disconnected. 140 */ 141 static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector, 142 bool force) 143 { 144 struct drm_device *dev = connector->dev; 145 u32 hotplug_en; 146 int i, tries = 0, ret = false; 147 u32 orig; 148 149 /* 150 * On a CDV thep, CRT detect sequence need to be done twice 151 * to get a reliable result. 152 */ 153 tries = 2; 154 155 orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN); 156 hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK); 157 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; 158 159 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64; 160 hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50; 161 162 for (i = 0; i < tries ; i++) { 163 unsigned long timeout; 164 /* turn on the FORCE_DETECT */ 165 REG_WRITE(PORT_HOTPLUG_EN, hotplug_en); 166 timeout = jiffies + msecs_to_jiffies(1000); 167 /* wait for FORCE_DETECT to go off */ 168 do { 169 if (!(REG_READ(PORT_HOTPLUG_EN) & 170 CRT_HOTPLUG_FORCE_DETECT)) 171 break; 172 msleep(1); 173 } while (time_after(timeout, jiffies)); 174 } 175 176 if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) != 177 CRT_HOTPLUG_MONITOR_NONE) 178 ret = true; 179 180 /* clear the interrupt we just generated, if any */ 181 REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); 182 183 /* and put the bits back */ 184 REG_WRITE(PORT_HOTPLUG_EN, orig); 185 return ret; 186 } 187 188 static enum drm_connector_status cdv_intel_crt_detect( 189 struct drm_connector *connector, bool force) 190 { 191 if (cdv_intel_crt_detect_hotplug(connector, force)) 192 return connector_status_connected; 193 else 194 return connector_status_disconnected; 195 } 196 197 static void cdv_intel_crt_destroy(struct drm_connector *connector) 198 { 199 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 200 201 psb_intel_i2c_destroy(gma_encoder->ddc_bus); 202 drm_sysfs_connector_remove(connector); 203 drm_connector_cleanup(connector); 204 kfree(connector); 205 } 206 207 static int cdv_intel_crt_get_modes(struct drm_connector *connector) 208 { 209 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 210 return psb_intel_ddc_get_modes(connector, 211 &gma_encoder->ddc_bus->adapter); 212 } 213 214 static int cdv_intel_crt_set_property(struct drm_connector *connector, 215 struct drm_property *property, 216 uint64_t value) 217 { 218 return 0; 219 } 220 221 /* 222 * Routines for controlling stuff on the analog port 223 */ 224 225 static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = { 226 .dpms = cdv_intel_crt_dpms, 227 .mode_fixup = cdv_intel_crt_mode_fixup, 228 .prepare = gma_encoder_prepare, 229 .commit = gma_encoder_commit, 230 .mode_set = cdv_intel_crt_mode_set, 231 }; 232 233 static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = { 234 .dpms = drm_helper_connector_dpms, 235 .detect = cdv_intel_crt_detect, 236 .fill_modes = drm_helper_probe_single_connector_modes, 237 .destroy = cdv_intel_crt_destroy, 238 .set_property = cdv_intel_crt_set_property, 239 }; 240 241 static const struct drm_connector_helper_funcs 242 cdv_intel_crt_connector_helper_funcs = { 243 .mode_valid = cdv_intel_crt_mode_valid, 244 .get_modes = cdv_intel_crt_get_modes, 245 .best_encoder = gma_best_encoder, 246 }; 247 248 static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder) 249 { 250 drm_encoder_cleanup(encoder); 251 } 252 253 static const struct drm_encoder_funcs cdv_intel_crt_enc_funcs = { 254 .destroy = cdv_intel_crt_enc_destroy, 255 }; 256 257 void cdv_intel_crt_init(struct drm_device *dev, 258 struct psb_intel_mode_device *mode_dev) 259 { 260 261 struct gma_connector *gma_connector; 262 struct gma_encoder *gma_encoder; 263 struct drm_connector *connector; 264 struct drm_encoder *encoder; 265 266 u32 i2c_reg; 267 268 gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL); 269 if (!gma_encoder) 270 return; 271 272 gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL); 273 if (!gma_connector) 274 goto failed_connector; 275 276 connector = &gma_connector->base; 277 connector->polled = DRM_CONNECTOR_POLL_HPD; 278 drm_connector_init(dev, connector, 279 &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); 280 281 encoder = &gma_encoder->base; 282 drm_encoder_init(dev, encoder, 283 &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC); 284 285 gma_connector_attach_encoder(gma_connector, gma_encoder); 286 287 /* Set up the DDC bus. */ 288 i2c_reg = GPIOA; 289 /* Remove the following code for CDV */ 290 /* 291 if (dev_priv->crt_ddc_bus != 0) 292 i2c_reg = dev_priv->crt_ddc_bus; 293 }*/ 294 gma_encoder->ddc_bus = psb_intel_i2c_create(dev, 295 i2c_reg, "CRTDDC_A"); 296 if (!gma_encoder->ddc_bus) { 297 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " 298 "failed.\n"); 299 goto failed_ddc; 300 } 301 302 gma_encoder->type = INTEL_OUTPUT_ANALOG; 303 /* 304 psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT); 305 psb_intel_output->crtc_mask = (1 << 0) | (1 << 1); 306 */ 307 connector->interlace_allowed = 0; 308 connector->doublescan_allowed = 0; 309 310 drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs); 311 drm_connector_helper_add(connector, 312 &cdv_intel_crt_connector_helper_funcs); 313 314 drm_sysfs_connector_add(connector); 315 316 return; 317 failed_ddc: 318 drm_encoder_cleanup(&gma_encoder->base); 319 drm_connector_cleanup(&gma_connector->base); 320 kfree(gma_connector); 321 failed_connector: 322 kfree(gma_encoder); 323 return; 324 } 325