1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 */ 26 27 #include <linux/i2c.h> 28 #include <drm/drmP.h> 29 30 #include "intel_bios.h" 31 #include "psb_drv.h" 32 #include "psb_intel_drv.h" 33 #include "psb_intel_reg.h" 34 #include "power.h" 35 #include "cdv_device.h" 36 #include <linux/pm_runtime.h> 37 38 39 static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode) 40 { 41 struct drm_device *dev = encoder->dev; 42 u32 temp, reg; 43 reg = ADPA; 44 45 temp = REG_READ(reg); 46 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); 47 temp &= ~ADPA_DAC_ENABLE; 48 49 switch (mode) { 50 case DRM_MODE_DPMS_ON: 51 temp |= ADPA_DAC_ENABLE; 52 break; 53 case DRM_MODE_DPMS_STANDBY: 54 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; 55 break; 56 case DRM_MODE_DPMS_SUSPEND: 57 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; 58 break; 59 case DRM_MODE_DPMS_OFF: 60 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; 61 break; 62 } 63 64 REG_WRITE(reg, temp); 65 } 66 67 static int cdv_intel_crt_mode_valid(struct drm_connector *connector, 68 struct drm_display_mode *mode) 69 { 70 struct drm_psb_private *dev_priv = connector->dev->dev_private; 71 int max_clock = 0; 72 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 73 return MODE_NO_DBLESCAN; 74 75 /* The lowest clock for CDV is 20000KHz */ 76 if (mode->clock < 20000) 77 return MODE_CLOCK_LOW; 78 79 /* The max clock for CDV is 355 instead of 400 */ 80 max_clock = 355000; 81 if (mode->clock > max_clock) 82 return MODE_CLOCK_HIGH; 83 84 if (mode->hdisplay > 1680 || mode->vdisplay > 1050) 85 return MODE_PANEL; 86 87 /* We assume worst case scenario of 32 bpp here, since we don't know */ 88 if ((ALIGN(mode->hdisplay * 4, 64) * mode->vdisplay) > 89 dev_priv->vram_stolen_size) 90 return MODE_MEM; 91 92 return MODE_OK; 93 } 94 95 static bool cdv_intel_crt_mode_fixup(struct drm_encoder *encoder, 96 struct drm_display_mode *mode, 97 struct drm_display_mode *adjusted_mode) 98 { 99 return true; 100 } 101 102 static void cdv_intel_crt_mode_set(struct drm_encoder *encoder, 103 struct drm_display_mode *mode, 104 struct drm_display_mode *adjusted_mode) 105 { 106 107 struct drm_device *dev = encoder->dev; 108 struct drm_crtc *crtc = encoder->crtc; 109 struct psb_intel_crtc *psb_intel_crtc = 110 to_psb_intel_crtc(crtc); 111 int dpll_md_reg; 112 u32 adpa, dpll_md; 113 u32 adpa_reg; 114 115 if (psb_intel_crtc->pipe == 0) 116 dpll_md_reg = DPLL_A_MD; 117 else 118 dpll_md_reg = DPLL_B_MD; 119 120 adpa_reg = ADPA; 121 122 /* 123 * Disable separate mode multiplier used when cloning SDVO to CRT 124 * XXX this needs to be adjusted when we really are cloning 125 */ 126 { 127 dpll_md = REG_READ(dpll_md_reg); 128 REG_WRITE(dpll_md_reg, 129 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); 130 } 131 132 adpa = 0; 133 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 134 adpa |= ADPA_HSYNC_ACTIVE_HIGH; 135 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 136 adpa |= ADPA_VSYNC_ACTIVE_HIGH; 137 138 if (psb_intel_crtc->pipe == 0) 139 adpa |= ADPA_PIPE_A_SELECT; 140 else 141 adpa |= ADPA_PIPE_B_SELECT; 142 143 REG_WRITE(adpa_reg, adpa); 144 } 145 146 147 /** 148 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. 149 * 150 * \return true if CRT is connected. 151 * \return false if CRT is disconnected. 152 */ 153 static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector, 154 bool force) 155 { 156 struct drm_device *dev = connector->dev; 157 u32 hotplug_en; 158 int i, tries = 0, ret = false; 159 u32 adpa_orig; 160 161 /* disable the DAC when doing the hotplug detection */ 162 163 adpa_orig = REG_READ(ADPA); 164 165 REG_WRITE(ADPA, adpa_orig & ~(ADPA_DAC_ENABLE)); 166 167 /* 168 * On a CDV thep, CRT detect sequence need to be done twice 169 * to get a reliable result. 170 */ 171 tries = 2; 172 173 hotplug_en = REG_READ(PORT_HOTPLUG_EN); 174 hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK); 175 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; 176 177 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64; 178 hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50; 179 180 for (i = 0; i < tries ; i++) { 181 unsigned long timeout; 182 /* turn on the FORCE_DETECT */ 183 REG_WRITE(PORT_HOTPLUG_EN, hotplug_en); 184 timeout = jiffies + msecs_to_jiffies(1000); 185 /* wait for FORCE_DETECT to go off */ 186 do { 187 if (!(REG_READ(PORT_HOTPLUG_EN) & 188 CRT_HOTPLUG_FORCE_DETECT)) 189 break; 190 msleep(1); 191 } while (time_after(timeout, jiffies)); 192 } 193 194 if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) != 195 CRT_HOTPLUG_MONITOR_NONE) 196 ret = true; 197 198 /* Restore the saved ADPA */ 199 REG_WRITE(ADPA, adpa_orig); 200 return ret; 201 } 202 203 static enum drm_connector_status cdv_intel_crt_detect( 204 struct drm_connector *connector, bool force) 205 { 206 if (cdv_intel_crt_detect_hotplug(connector, force)) 207 return connector_status_connected; 208 else 209 return connector_status_disconnected; 210 } 211 212 static void cdv_intel_crt_destroy(struct drm_connector *connector) 213 { 214 struct psb_intel_encoder *psb_intel_encoder = 215 psb_intel_attached_encoder(connector); 216 217 psb_intel_i2c_destroy(psb_intel_encoder->ddc_bus); 218 drm_sysfs_connector_remove(connector); 219 drm_connector_cleanup(connector); 220 kfree(connector); 221 } 222 223 static int cdv_intel_crt_get_modes(struct drm_connector *connector) 224 { 225 struct psb_intel_encoder *psb_intel_encoder = 226 psb_intel_attached_encoder(connector); 227 return psb_intel_ddc_get_modes(connector, &psb_intel_encoder->ddc_bus->adapter); 228 } 229 230 static int cdv_intel_crt_set_property(struct drm_connector *connector, 231 struct drm_property *property, 232 uint64_t value) 233 { 234 return 0; 235 } 236 237 /* 238 * Routines for controlling stuff on the analog port 239 */ 240 241 static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = { 242 .dpms = cdv_intel_crt_dpms, 243 .mode_fixup = cdv_intel_crt_mode_fixup, 244 .prepare = psb_intel_encoder_prepare, 245 .commit = psb_intel_encoder_commit, 246 .mode_set = cdv_intel_crt_mode_set, 247 }; 248 249 static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = { 250 .dpms = drm_helper_connector_dpms, 251 .detect = cdv_intel_crt_detect, 252 .fill_modes = drm_helper_probe_single_connector_modes, 253 .destroy = cdv_intel_crt_destroy, 254 .set_property = cdv_intel_crt_set_property, 255 }; 256 257 static const struct drm_connector_helper_funcs 258 cdv_intel_crt_connector_helper_funcs = { 259 .mode_valid = cdv_intel_crt_mode_valid, 260 .get_modes = cdv_intel_crt_get_modes, 261 .best_encoder = psb_intel_best_encoder, 262 }; 263 264 static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder) 265 { 266 drm_encoder_cleanup(encoder); 267 } 268 269 static const struct drm_encoder_funcs cdv_intel_crt_enc_funcs = { 270 .destroy = cdv_intel_crt_enc_destroy, 271 }; 272 273 void cdv_intel_crt_init(struct drm_device *dev, 274 struct psb_intel_mode_device *mode_dev) 275 { 276 277 struct psb_intel_connector *psb_intel_connector; 278 struct psb_intel_encoder *psb_intel_encoder; 279 struct drm_connector *connector; 280 struct drm_encoder *encoder; 281 282 u32 i2c_reg; 283 284 psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL); 285 if (!psb_intel_encoder) 286 return; 287 288 psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL); 289 if (!psb_intel_connector) 290 goto failed_connector; 291 292 connector = &psb_intel_connector->base; 293 drm_connector_init(dev, connector, 294 &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); 295 296 encoder = &psb_intel_encoder->base; 297 drm_encoder_init(dev, encoder, 298 &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC); 299 300 psb_intel_connector_attach_encoder(psb_intel_connector, 301 psb_intel_encoder); 302 303 /* Set up the DDC bus. */ 304 i2c_reg = GPIOA; 305 /* Remove the following code for CDV */ 306 /* 307 if (dev_priv->crt_ddc_bus != 0) 308 i2c_reg = dev_priv->crt_ddc_bus; 309 }*/ 310 psb_intel_encoder->ddc_bus = psb_intel_i2c_create(dev, 311 i2c_reg, "CRTDDC_A"); 312 if (!psb_intel_encoder->ddc_bus) { 313 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " 314 "failed.\n"); 315 goto failed_ddc; 316 } 317 318 psb_intel_encoder->type = INTEL_OUTPUT_ANALOG; 319 /* 320 psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT); 321 psb_intel_output->crtc_mask = (1 << 0) | (1 << 1); 322 */ 323 connector->interlace_allowed = 0; 324 connector->doublescan_allowed = 0; 325 326 drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs); 327 drm_connector_helper_add(connector, 328 &cdv_intel_crt_connector_helper_funcs); 329 330 drm_sysfs_connector_add(connector); 331 332 return; 333 failed_ddc: 334 drm_encoder_cleanup(&psb_intel_encoder->base); 335 drm_connector_cleanup(&psb_intel_connector->base); 336 kfree(psb_intel_connector); 337 failed_connector: 338 kfree(psb_intel_encoder); 339 return; 340 } 341