1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * Freescale DCU drm device driver 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/clk.h> 13 #include <linux/clk-provider.h> 14 #include <linux/console.h> 15 #include <linux/io.h> 16 #include <linux/mfd/syscon.h> 17 #include <linux/mm.h> 18 #include <linux/module.h> 19 #include <linux/of_platform.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regmap.h> 24 25 #include <drm/drmP.h> 26 #include <drm/drm_atomic_helper.h> 27 #include <drm/drm_fb_cma_helper.h> 28 #include <drm/drm_fb_helper.h> 29 #include <drm/drm_gem_cma_helper.h> 30 #include <drm/drm_modeset_helper.h> 31 #include <drm/drm_probe_helper.h> 32 33 #include "fsl_dcu_drm_crtc.h" 34 #include "fsl_dcu_drm_drv.h" 35 #include "fsl_tcon.h" 36 37 static int legacyfb_depth = 24; 38 module_param(legacyfb_depth, int, 0444); 39 40 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg) 41 { 42 if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE) 43 return true; 44 45 return false; 46 } 47 48 static const struct regmap_config fsl_dcu_regmap_config = { 49 .reg_bits = 32, 50 .reg_stride = 4, 51 .val_bits = 32, 52 53 .volatile_reg = fsl_dcu_drm_is_volatile_reg, 54 }; 55 56 static void fsl_dcu_irq_uninstall(struct drm_device *dev) 57 { 58 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 59 60 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0); 61 regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0); 62 } 63 64 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags) 65 { 66 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 67 int ret; 68 69 ret = fsl_dcu_drm_modeset_init(fsl_dev); 70 if (ret < 0) { 71 dev_err(dev->dev, "failed to initialize mode setting\n"); 72 return ret; 73 } 74 75 ret = drm_vblank_init(dev, dev->mode_config.num_crtc); 76 if (ret < 0) { 77 dev_err(dev->dev, "failed to initialize vblank\n"); 78 goto done; 79 } 80 81 ret = drm_irq_install(dev, fsl_dev->irq); 82 if (ret < 0) { 83 dev_err(dev->dev, "failed to install IRQ handler\n"); 84 goto done; 85 } 86 87 if (legacyfb_depth != 16 && legacyfb_depth != 24 && 88 legacyfb_depth != 32) { 89 dev_warn(dev->dev, 90 "Invalid legacyfb_depth. Defaulting to 24bpp\n"); 91 legacyfb_depth = 24; 92 } 93 94 return 0; 95 done: 96 drm_kms_helper_poll_fini(dev); 97 98 drm_mode_config_cleanup(dev); 99 drm_irq_uninstall(dev); 100 dev->dev_private = NULL; 101 102 return ret; 103 } 104 105 static void fsl_dcu_unload(struct drm_device *dev) 106 { 107 drm_atomic_helper_shutdown(dev); 108 drm_kms_helper_poll_fini(dev); 109 110 drm_mode_config_cleanup(dev); 111 drm_irq_uninstall(dev); 112 113 dev->dev_private = NULL; 114 } 115 116 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg) 117 { 118 struct drm_device *dev = arg; 119 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 120 unsigned int int_status; 121 int ret; 122 123 ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status); 124 if (ret) { 125 dev_err(dev->dev, "read DCU_INT_STATUS failed\n"); 126 return IRQ_NONE; 127 } 128 129 if (int_status & DCU_INT_STATUS_VBLANK) 130 drm_handle_vblank(dev, 0); 131 132 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status); 133 134 return IRQ_HANDLED; 135 } 136 137 DEFINE_DRM_GEM_CMA_FOPS(fsl_dcu_drm_fops); 138 139 static struct drm_driver fsl_dcu_drm_driver = { 140 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET 141 | DRIVER_PRIME | DRIVER_ATOMIC, 142 .load = fsl_dcu_load, 143 .unload = fsl_dcu_unload, 144 .irq_handler = fsl_dcu_drm_irq, 145 .irq_preinstall = fsl_dcu_irq_uninstall, 146 .irq_uninstall = fsl_dcu_irq_uninstall, 147 .gem_free_object_unlocked = drm_gem_cma_free_object, 148 .gem_vm_ops = &drm_gem_cma_vm_ops, 149 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 150 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 151 .gem_prime_import = drm_gem_prime_import, 152 .gem_prime_export = drm_gem_prime_export, 153 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 154 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 155 .gem_prime_vmap = drm_gem_cma_prime_vmap, 156 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 157 .gem_prime_mmap = drm_gem_cma_prime_mmap, 158 .dumb_create = drm_gem_cma_dumb_create, 159 .fops = &fsl_dcu_drm_fops, 160 .name = "fsl-dcu-drm", 161 .desc = "Freescale DCU DRM", 162 .date = "20160425", 163 .major = 1, 164 .minor = 1, 165 }; 166 167 #ifdef CONFIG_PM_SLEEP 168 static int fsl_dcu_drm_pm_suspend(struct device *dev) 169 { 170 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 171 int ret; 172 173 if (!fsl_dev) 174 return 0; 175 176 disable_irq(fsl_dev->irq); 177 178 ret = drm_mode_config_helper_suspend(fsl_dev->drm); 179 if (ret) { 180 enable_irq(fsl_dev->irq); 181 return ret; 182 } 183 184 clk_disable_unprepare(fsl_dev->clk); 185 186 return 0; 187 } 188 189 static int fsl_dcu_drm_pm_resume(struct device *dev) 190 { 191 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 192 int ret; 193 194 if (!fsl_dev) 195 return 0; 196 197 ret = clk_prepare_enable(fsl_dev->clk); 198 if (ret < 0) { 199 dev_err(dev, "failed to enable dcu clk\n"); 200 return ret; 201 } 202 203 if (fsl_dev->tcon) 204 fsl_tcon_bypass_enable(fsl_dev->tcon); 205 fsl_dcu_drm_init_planes(fsl_dev->drm); 206 enable_irq(fsl_dev->irq); 207 208 drm_mode_config_helper_resume(fsl_dev->drm); 209 210 return 0; 211 } 212 #endif 213 214 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = { 215 SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume) 216 }; 217 218 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = { 219 .name = "ls1021a", 220 .total_layer = 16, 221 .max_layer = 4, 222 .layer_regs = LS1021A_LAYER_REG_NUM, 223 }; 224 225 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = { 226 .name = "vf610", 227 .total_layer = 64, 228 .max_layer = 6, 229 .layer_regs = VF610_LAYER_REG_NUM, 230 }; 231 232 static const struct of_device_id fsl_dcu_of_match[] = { 233 { 234 .compatible = "fsl,ls1021a-dcu", 235 .data = &fsl_dcu_ls1021a_data, 236 }, { 237 .compatible = "fsl,vf610-dcu", 238 .data = &fsl_dcu_vf610_data, 239 }, { 240 }, 241 }; 242 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match); 243 244 static int fsl_dcu_drm_probe(struct platform_device *pdev) 245 { 246 struct fsl_dcu_drm_device *fsl_dev; 247 struct drm_device *drm; 248 struct device *dev = &pdev->dev; 249 struct resource *res; 250 void __iomem *base; 251 struct drm_driver *driver = &fsl_dcu_drm_driver; 252 struct clk *pix_clk_in; 253 char pix_clk_name[32]; 254 const char *pix_clk_in_name; 255 const struct of_device_id *id; 256 int ret; 257 u8 div_ratio_shift = 0; 258 259 fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL); 260 if (!fsl_dev) 261 return -ENOMEM; 262 263 id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node); 264 if (!id) 265 return -ENODEV; 266 fsl_dev->soc = id->data; 267 268 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 269 base = devm_ioremap_resource(dev, res); 270 if (IS_ERR(base)) { 271 ret = PTR_ERR(base); 272 return ret; 273 } 274 275 fsl_dev->irq = platform_get_irq(pdev, 0); 276 if (fsl_dev->irq < 0) { 277 dev_err(dev, "failed to get irq\n"); 278 return fsl_dev->irq; 279 } 280 281 fsl_dev->regmap = devm_regmap_init_mmio(dev, base, 282 &fsl_dcu_regmap_config); 283 if (IS_ERR(fsl_dev->regmap)) { 284 dev_err(dev, "regmap init failed\n"); 285 return PTR_ERR(fsl_dev->regmap); 286 } 287 288 fsl_dev->clk = devm_clk_get(dev, "dcu"); 289 if (IS_ERR(fsl_dev->clk)) { 290 dev_err(dev, "failed to get dcu clock\n"); 291 return PTR_ERR(fsl_dev->clk); 292 } 293 ret = clk_prepare_enable(fsl_dev->clk); 294 if (ret < 0) { 295 dev_err(dev, "failed to enable dcu clk\n"); 296 return ret; 297 } 298 299 pix_clk_in = devm_clk_get(dev, "pix"); 300 if (IS_ERR(pix_clk_in)) { 301 /* legancy binding, use dcu clock as pixel clock input */ 302 pix_clk_in = fsl_dev->clk; 303 } 304 305 if (of_property_read_bool(dev->of_node, "big-endian")) 306 div_ratio_shift = 24; 307 308 pix_clk_in_name = __clk_get_name(pix_clk_in); 309 snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name); 310 fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name, 311 pix_clk_in_name, 0, base + DCU_DIV_RATIO, 312 div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL); 313 if (IS_ERR(fsl_dev->pix_clk)) { 314 dev_err(dev, "failed to register pix clk\n"); 315 ret = PTR_ERR(fsl_dev->pix_clk); 316 goto disable_clk; 317 } 318 319 fsl_dev->tcon = fsl_tcon_init(dev); 320 321 drm = drm_dev_alloc(driver, dev); 322 if (IS_ERR(drm)) { 323 ret = PTR_ERR(drm); 324 goto unregister_pix_clk; 325 } 326 327 fsl_dev->dev = dev; 328 fsl_dev->drm = drm; 329 fsl_dev->np = dev->of_node; 330 drm->dev_private = fsl_dev; 331 dev_set_drvdata(dev, fsl_dev); 332 333 ret = drm_dev_register(drm, 0); 334 if (ret < 0) 335 goto put; 336 337 drm_fbdev_generic_setup(drm, legacyfb_depth); 338 339 return 0; 340 341 put: 342 drm_dev_put(drm); 343 unregister_pix_clk: 344 clk_unregister(fsl_dev->pix_clk); 345 disable_clk: 346 clk_disable_unprepare(fsl_dev->clk); 347 return ret; 348 } 349 350 static int fsl_dcu_drm_remove(struct platform_device *pdev) 351 { 352 struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev); 353 354 drm_dev_unregister(fsl_dev->drm); 355 drm_dev_put(fsl_dev->drm); 356 clk_disable_unprepare(fsl_dev->clk); 357 clk_unregister(fsl_dev->pix_clk); 358 359 return 0; 360 } 361 362 static struct platform_driver fsl_dcu_drm_platform_driver = { 363 .probe = fsl_dcu_drm_probe, 364 .remove = fsl_dcu_drm_remove, 365 .driver = { 366 .name = "fsl-dcu", 367 .pm = &fsl_dcu_drm_pm_ops, 368 .of_match_table = fsl_dcu_of_match, 369 }, 370 }; 371 372 module_platform_driver(fsl_dcu_drm_platform_driver); 373 374 MODULE_DESCRIPTION("Freescale DCU DRM Driver"); 375 MODULE_LICENSE("GPL"); 376