1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * Freescale DCU drm device driver 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/clk.h> 13 #include <linux/clk-provider.h> 14 #include <linux/console.h> 15 #include <linux/io.h> 16 #include <linux/mfd/syscon.h> 17 #include <linux/mm.h> 18 #include <linux/module.h> 19 #include <linux/of_platform.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regmap.h> 24 25 #include <drm/drmP.h> 26 #include <drm/drm_atomic_helper.h> 27 #include <drm/drm_crtc_helper.h> 28 #include <drm/drm_fb_cma_helper.h> 29 #include <drm/drm_gem_cma_helper.h> 30 31 #include "fsl_dcu_drm_crtc.h" 32 #include "fsl_dcu_drm_drv.h" 33 #include "fsl_tcon.h" 34 35 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg) 36 { 37 if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE) 38 return true; 39 40 return false; 41 } 42 43 static const struct regmap_config fsl_dcu_regmap_config = { 44 .reg_bits = 32, 45 .reg_stride = 4, 46 .val_bits = 32, 47 48 .volatile_reg = fsl_dcu_drm_is_volatile_reg, 49 }; 50 51 static int fsl_dcu_drm_irq_init(struct drm_device *dev) 52 { 53 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 54 int ret; 55 56 ret = drm_irq_install(dev, fsl_dev->irq); 57 if (ret < 0) 58 dev_err(dev->dev, "failed to install IRQ handler\n"); 59 60 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0); 61 regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0); 62 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, 63 DCU_UPDATE_MODE_READREG); 64 65 return ret; 66 } 67 68 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags) 69 { 70 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 71 int ret; 72 73 ret = fsl_dcu_drm_modeset_init(fsl_dev); 74 if (ret < 0) { 75 dev_err(dev->dev, "failed to initialize mode setting\n"); 76 return ret; 77 } 78 79 ret = drm_vblank_init(dev, dev->mode_config.num_crtc); 80 if (ret < 0) { 81 dev_err(dev->dev, "failed to initialize vblank\n"); 82 goto done; 83 } 84 85 ret = fsl_dcu_drm_irq_init(dev); 86 if (ret < 0) 87 goto done; 88 dev->irq_enabled = true; 89 90 fsl_dcu_fbdev_init(dev); 91 92 return 0; 93 done: 94 drm_kms_helper_poll_fini(dev); 95 96 if (fsl_dev->fbdev) 97 drm_fbdev_cma_fini(fsl_dev->fbdev); 98 99 drm_mode_config_cleanup(dev); 100 drm_vblank_cleanup(dev); 101 drm_irq_uninstall(dev); 102 dev->dev_private = NULL; 103 104 return ret; 105 } 106 107 static int fsl_dcu_unload(struct drm_device *dev) 108 { 109 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 110 111 drm_kms_helper_poll_fini(dev); 112 113 if (fsl_dev->fbdev) 114 drm_fbdev_cma_fini(fsl_dev->fbdev); 115 116 drm_mode_config_cleanup(dev); 117 drm_vblank_cleanup(dev); 118 drm_irq_uninstall(dev); 119 120 dev->dev_private = NULL; 121 122 return 0; 123 } 124 125 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg) 126 { 127 struct drm_device *dev = arg; 128 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 129 unsigned int int_status; 130 int ret; 131 132 ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status); 133 if (ret) { 134 dev_err(dev->dev, "read DCU_INT_STATUS failed\n"); 135 return IRQ_NONE; 136 } 137 138 if (int_status & DCU_INT_STATUS_VBLANK) 139 drm_handle_vblank(dev, 0); 140 141 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status); 142 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, 143 DCU_UPDATE_MODE_READREG); 144 145 return IRQ_HANDLED; 146 } 147 148 static int fsl_dcu_drm_enable_vblank(struct drm_device *dev, unsigned int pipe) 149 { 150 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 151 unsigned int value; 152 153 regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value); 154 value &= ~DCU_INT_MASK_VBLANK; 155 regmap_write(fsl_dev->regmap, DCU_INT_MASK, value); 156 157 return 0; 158 } 159 160 static void fsl_dcu_drm_disable_vblank(struct drm_device *dev, 161 unsigned int pipe) 162 { 163 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 164 unsigned int value; 165 166 regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value); 167 value |= DCU_INT_MASK_VBLANK; 168 regmap_write(fsl_dev->regmap, DCU_INT_MASK, value); 169 } 170 171 static void fsl_dcu_drm_lastclose(struct drm_device *dev) 172 { 173 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 174 175 drm_fbdev_cma_restore_mode(fsl_dev->fbdev); 176 } 177 178 static const struct file_operations fsl_dcu_drm_fops = { 179 .owner = THIS_MODULE, 180 .open = drm_open, 181 .release = drm_release, 182 .unlocked_ioctl = drm_ioctl, 183 .compat_ioctl = drm_compat_ioctl, 184 .poll = drm_poll, 185 .read = drm_read, 186 .llseek = no_llseek, 187 .mmap = drm_gem_cma_mmap, 188 }; 189 190 static struct drm_driver fsl_dcu_drm_driver = { 191 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET 192 | DRIVER_PRIME | DRIVER_ATOMIC, 193 .lastclose = fsl_dcu_drm_lastclose, 194 .load = fsl_dcu_load, 195 .unload = fsl_dcu_unload, 196 .irq_handler = fsl_dcu_drm_irq, 197 .get_vblank_counter = drm_vblank_no_hw_counter, 198 .enable_vblank = fsl_dcu_drm_enable_vblank, 199 .disable_vblank = fsl_dcu_drm_disable_vblank, 200 .gem_free_object_unlocked = drm_gem_cma_free_object, 201 .gem_vm_ops = &drm_gem_cma_vm_ops, 202 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 203 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 204 .gem_prime_import = drm_gem_prime_import, 205 .gem_prime_export = drm_gem_prime_export, 206 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 207 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 208 .gem_prime_vmap = drm_gem_cma_prime_vmap, 209 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 210 .gem_prime_mmap = drm_gem_cma_prime_mmap, 211 .dumb_create = drm_gem_cma_dumb_create, 212 .dumb_map_offset = drm_gem_cma_dumb_map_offset, 213 .dumb_destroy = drm_gem_dumb_destroy, 214 .fops = &fsl_dcu_drm_fops, 215 .name = "fsl-dcu-drm", 216 .desc = "Freescale DCU DRM", 217 .date = "20160425", 218 .major = 1, 219 .minor = 1, 220 }; 221 222 #ifdef CONFIG_PM_SLEEP 223 static int fsl_dcu_drm_pm_suspend(struct device *dev) 224 { 225 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 226 227 if (!fsl_dev) 228 return 0; 229 230 disable_irq(fsl_dev->irq); 231 drm_kms_helper_poll_disable(fsl_dev->drm); 232 233 console_lock(); 234 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 1); 235 console_unlock(); 236 237 fsl_dev->state = drm_atomic_helper_suspend(fsl_dev->drm); 238 if (IS_ERR(fsl_dev->state)) { 239 console_lock(); 240 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0); 241 console_unlock(); 242 243 drm_kms_helper_poll_enable(fsl_dev->drm); 244 enable_irq(fsl_dev->irq); 245 return PTR_ERR(fsl_dev->state); 246 } 247 248 clk_disable_unprepare(fsl_dev->pix_clk); 249 clk_disable_unprepare(fsl_dev->clk); 250 251 return 0; 252 } 253 254 static int fsl_dcu_drm_pm_resume(struct device *dev) 255 { 256 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 257 int ret; 258 259 if (!fsl_dev) 260 return 0; 261 262 ret = clk_prepare_enable(fsl_dev->clk); 263 if (ret < 0) { 264 dev_err(dev, "failed to enable dcu clk\n"); 265 return ret; 266 } 267 268 if (fsl_dev->tcon) 269 fsl_tcon_bypass_enable(fsl_dev->tcon); 270 fsl_dcu_drm_init_planes(fsl_dev->drm); 271 drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state); 272 273 console_lock(); 274 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0); 275 console_unlock(); 276 277 drm_kms_helper_poll_enable(fsl_dev->drm); 278 enable_irq(fsl_dev->irq); 279 280 return 0; 281 } 282 #endif 283 284 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = { 285 SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume) 286 }; 287 288 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = { 289 .name = "ls1021a", 290 .total_layer = 16, 291 .max_layer = 4, 292 .layer_regs = LS1021A_LAYER_REG_NUM, 293 }; 294 295 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = { 296 .name = "vf610", 297 .total_layer = 64, 298 .max_layer = 6, 299 .layer_regs = VF610_LAYER_REG_NUM, 300 }; 301 302 static const struct of_device_id fsl_dcu_of_match[] = { 303 { 304 .compatible = "fsl,ls1021a-dcu", 305 .data = &fsl_dcu_ls1021a_data, 306 }, { 307 .compatible = "fsl,vf610-dcu", 308 .data = &fsl_dcu_vf610_data, 309 }, { 310 }, 311 }; 312 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match); 313 314 static int fsl_dcu_drm_probe(struct platform_device *pdev) 315 { 316 struct fsl_dcu_drm_device *fsl_dev; 317 struct drm_device *drm; 318 struct device *dev = &pdev->dev; 319 struct resource *res; 320 void __iomem *base; 321 struct drm_driver *driver = &fsl_dcu_drm_driver; 322 struct clk *pix_clk_in; 323 char pix_clk_name[32]; 324 const char *pix_clk_in_name; 325 const struct of_device_id *id; 326 int ret; 327 u8 div_ratio_shift = 0; 328 329 fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL); 330 if (!fsl_dev) 331 return -ENOMEM; 332 333 id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node); 334 if (!id) 335 return -ENODEV; 336 fsl_dev->soc = id->data; 337 338 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 339 if (!res) { 340 dev_err(dev, "could not get memory IO resource\n"); 341 return -ENODEV; 342 } 343 344 base = devm_ioremap_resource(dev, res); 345 if (IS_ERR(base)) { 346 ret = PTR_ERR(base); 347 return ret; 348 } 349 350 fsl_dev->irq = platform_get_irq(pdev, 0); 351 if (fsl_dev->irq < 0) { 352 dev_err(dev, "failed to get irq\n"); 353 return -ENXIO; 354 } 355 356 fsl_dev->regmap = devm_regmap_init_mmio(dev, base, 357 &fsl_dcu_regmap_config); 358 if (IS_ERR(fsl_dev->regmap)) { 359 dev_err(dev, "regmap init failed\n"); 360 return PTR_ERR(fsl_dev->regmap); 361 } 362 363 fsl_dev->clk = devm_clk_get(dev, "dcu"); 364 if (IS_ERR(fsl_dev->clk)) { 365 dev_err(dev, "failed to get dcu clock\n"); 366 return PTR_ERR(fsl_dev->clk); 367 } 368 ret = clk_prepare_enable(fsl_dev->clk); 369 if (ret < 0) { 370 dev_err(dev, "failed to enable dcu clk\n"); 371 return ret; 372 } 373 374 pix_clk_in = devm_clk_get(dev, "pix"); 375 if (IS_ERR(pix_clk_in)) { 376 /* legancy binding, use dcu clock as pixel clock input */ 377 pix_clk_in = fsl_dev->clk; 378 } 379 380 if (of_property_read_bool(dev->of_node, "big-endian")) 381 div_ratio_shift = 24; 382 383 pix_clk_in_name = __clk_get_name(pix_clk_in); 384 snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name); 385 fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name, 386 pix_clk_in_name, 0, base + DCU_DIV_RATIO, 387 div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL); 388 if (IS_ERR(fsl_dev->pix_clk)) { 389 dev_err(dev, "failed to register pix clk\n"); 390 ret = PTR_ERR(fsl_dev->pix_clk); 391 goto disable_clk; 392 } 393 394 fsl_dev->tcon = fsl_tcon_init(dev); 395 396 drm = drm_dev_alloc(driver, dev); 397 if (IS_ERR(drm)) { 398 ret = PTR_ERR(drm); 399 goto unregister_pix_clk; 400 } 401 402 fsl_dev->dev = dev; 403 fsl_dev->drm = drm; 404 fsl_dev->np = dev->of_node; 405 drm->dev_private = fsl_dev; 406 dev_set_drvdata(dev, fsl_dev); 407 408 ret = drm_dev_register(drm, 0); 409 if (ret < 0) 410 goto unref; 411 412 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name, 413 driver->major, driver->minor, driver->patchlevel, 414 driver->date, drm->primary->index); 415 416 return 0; 417 418 unref: 419 drm_dev_unref(drm); 420 unregister_pix_clk: 421 clk_unregister(fsl_dev->pix_clk); 422 disable_clk: 423 clk_disable_unprepare(fsl_dev->clk); 424 return ret; 425 } 426 427 static int fsl_dcu_drm_remove(struct platform_device *pdev) 428 { 429 struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev); 430 431 clk_disable_unprepare(fsl_dev->clk); 432 clk_unregister(fsl_dev->pix_clk); 433 drm_put_dev(fsl_dev->drm); 434 435 return 0; 436 } 437 438 static struct platform_driver fsl_dcu_drm_platform_driver = { 439 .probe = fsl_dcu_drm_probe, 440 .remove = fsl_dcu_drm_remove, 441 .driver = { 442 .name = "fsl-dcu", 443 .pm = &fsl_dcu_drm_pm_ops, 444 .of_match_table = fsl_dcu_of_match, 445 }, 446 }; 447 448 module_platform_driver(fsl_dcu_drm_platform_driver); 449 450 MODULE_DESCRIPTION("Freescale DCU DRM Driver"); 451 MODULE_LICENSE("GPL"); 452