1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright 2015 Freescale Semiconductor, Inc. 4 * 5 * Freescale DCU drm device driver 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/clk-provider.h> 10 #include <linux/console.h> 11 #include <linux/io.h> 12 #include <linux/mfd/syscon.h> 13 #include <linux/mm.h> 14 #include <linux/module.h> 15 #include <linux/of_platform.h> 16 #include <linux/platform_device.h> 17 #include <linux/pm.h> 18 #include <linux/pm_runtime.h> 19 #include <linux/regmap.h> 20 21 #include <drm/drm_atomic_helper.h> 22 #include <drm/drm_drv.h> 23 #include <drm/drm_fbdev_dma.h> 24 #include <drm/drm_gem_dma_helper.h> 25 #include <drm/drm_modeset_helper.h> 26 #include <drm/drm_module.h> 27 #include <drm/drm_probe_helper.h> 28 #include <drm/drm_vblank.h> 29 30 #include "fsl_dcu_drm_crtc.h" 31 #include "fsl_dcu_drm_drv.h" 32 #include "fsl_tcon.h" 33 34 static int legacyfb_depth = 24; 35 module_param(legacyfb_depth, int, 0444); 36 37 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg) 38 { 39 if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE) 40 return true; 41 42 return false; 43 } 44 45 static const struct regmap_config fsl_dcu_regmap_config = { 46 .reg_bits = 32, 47 .reg_stride = 4, 48 .val_bits = 32, 49 50 .volatile_reg = fsl_dcu_drm_is_volatile_reg, 51 }; 52 53 static void fsl_dcu_irq_reset(struct drm_device *dev) 54 { 55 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 56 57 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0); 58 regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0); 59 } 60 61 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg) 62 { 63 struct drm_device *dev = arg; 64 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 65 unsigned int int_status; 66 int ret; 67 68 ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status); 69 if (ret) { 70 dev_err(dev->dev, "read DCU_INT_STATUS failed\n"); 71 return IRQ_NONE; 72 } 73 74 if (int_status & DCU_INT_STATUS_VBLANK) 75 drm_handle_vblank(dev, 0); 76 77 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status); 78 79 return IRQ_HANDLED; 80 } 81 82 static int fsl_dcu_irq_install(struct drm_device *dev, unsigned int irq) 83 { 84 if (irq == IRQ_NOTCONNECTED) 85 return -ENOTCONN; 86 87 fsl_dcu_irq_reset(dev); 88 89 return request_irq(irq, fsl_dcu_drm_irq, 0, dev->driver->name, dev); 90 } 91 92 static void fsl_dcu_irq_uninstall(struct drm_device *dev) 93 { 94 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 95 96 fsl_dcu_irq_reset(dev); 97 free_irq(fsl_dev->irq, dev); 98 } 99 100 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags) 101 { 102 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 103 struct regmap *scfg; 104 int ret; 105 106 ret = fsl_dcu_drm_modeset_init(fsl_dev); 107 if (ret < 0) { 108 dev_err(dev->dev, "failed to initialize mode setting\n"); 109 return ret; 110 } 111 112 scfg = syscon_regmap_lookup_by_compatible("fsl,ls1021a-scfg"); 113 if (PTR_ERR(scfg) != -ENODEV) { 114 /* 115 * For simplicity, enable the PIXCLK unconditionally, 116 * resulting in increased power consumption. Disabling 117 * the clock in PM or on unload could be implemented as 118 * a future improvement. 119 */ 120 ret = regmap_update_bits(scfg, SCFG_PIXCLKCR, SCFG_PIXCLKCR_PXCEN, 121 SCFG_PIXCLKCR_PXCEN); 122 if (ret < 0) 123 return dev_err_probe(dev->dev, ret, "failed to enable pixclk\n"); 124 } 125 126 ret = drm_vblank_init(dev, dev->mode_config.num_crtc); 127 if (ret < 0) { 128 dev_err(dev->dev, "failed to initialize vblank\n"); 129 goto done_vblank; 130 } 131 132 ret = fsl_dcu_irq_install(dev, fsl_dev->irq); 133 if (ret < 0) { 134 dev_err(dev->dev, "failed to install IRQ handler\n"); 135 goto done_irq; 136 } 137 138 if (legacyfb_depth != 16 && legacyfb_depth != 24 && 139 legacyfb_depth != 32) { 140 dev_warn(dev->dev, 141 "Invalid legacyfb_depth. Defaulting to 24bpp\n"); 142 legacyfb_depth = 24; 143 } 144 145 return 0; 146 done_irq: 147 drm_kms_helper_poll_fini(dev); 148 149 drm_mode_config_cleanup(dev); 150 done_vblank: 151 dev->dev_private = NULL; 152 153 return ret; 154 } 155 156 static void fsl_dcu_unload(struct drm_device *dev) 157 { 158 drm_atomic_helper_shutdown(dev); 159 drm_kms_helper_poll_fini(dev); 160 161 drm_mode_config_cleanup(dev); 162 fsl_dcu_irq_uninstall(dev); 163 164 dev->dev_private = NULL; 165 } 166 167 DEFINE_DRM_GEM_DMA_FOPS(fsl_dcu_drm_fops); 168 169 static const struct drm_driver fsl_dcu_drm_driver = { 170 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 171 .load = fsl_dcu_load, 172 .unload = fsl_dcu_unload, 173 DRM_GEM_DMA_DRIVER_OPS, 174 .fops = &fsl_dcu_drm_fops, 175 .name = "fsl-dcu-drm", 176 .desc = "Freescale DCU DRM", 177 .date = "20160425", 178 .major = 1, 179 .minor = 1, 180 }; 181 182 #ifdef CONFIG_PM_SLEEP 183 static int fsl_dcu_drm_pm_suspend(struct device *dev) 184 { 185 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 186 int ret; 187 188 if (!fsl_dev) 189 return 0; 190 191 disable_irq(fsl_dev->irq); 192 193 ret = drm_mode_config_helper_suspend(fsl_dev->drm); 194 if (ret) { 195 enable_irq(fsl_dev->irq); 196 return ret; 197 } 198 199 clk_disable_unprepare(fsl_dev->clk); 200 201 return 0; 202 } 203 204 static int fsl_dcu_drm_pm_resume(struct device *dev) 205 { 206 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 207 int ret; 208 209 if (!fsl_dev) 210 return 0; 211 212 ret = clk_prepare_enable(fsl_dev->clk); 213 if (ret < 0) { 214 dev_err(dev, "failed to enable dcu clk\n"); 215 return ret; 216 } 217 218 if (fsl_dev->tcon) 219 fsl_tcon_bypass_enable(fsl_dev->tcon); 220 fsl_dcu_drm_init_planes(fsl_dev->drm); 221 enable_irq(fsl_dev->irq); 222 223 drm_mode_config_helper_resume(fsl_dev->drm); 224 225 return 0; 226 } 227 #endif 228 229 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = { 230 SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume) 231 }; 232 233 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = { 234 .name = "ls1021a", 235 .total_layer = 16, 236 .max_layer = 4, 237 .layer_regs = LS1021A_LAYER_REG_NUM, 238 }; 239 240 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = { 241 .name = "vf610", 242 .total_layer = 64, 243 .max_layer = 6, 244 .layer_regs = VF610_LAYER_REG_NUM, 245 }; 246 247 static const struct of_device_id fsl_dcu_of_match[] = { 248 { 249 .compatible = "fsl,ls1021a-dcu", 250 .data = &fsl_dcu_ls1021a_data, 251 }, { 252 .compatible = "fsl,vf610-dcu", 253 .data = &fsl_dcu_vf610_data, 254 }, { 255 }, 256 }; 257 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match); 258 259 static int fsl_dcu_drm_probe(struct platform_device *pdev) 260 { 261 struct fsl_dcu_drm_device *fsl_dev; 262 struct drm_device *drm; 263 struct device *dev = &pdev->dev; 264 struct resource *res; 265 void __iomem *base; 266 struct clk *pix_clk_in; 267 char pix_clk_name[32]; 268 const char *pix_clk_in_name; 269 const struct of_device_id *id; 270 int ret; 271 u8 div_ratio_shift = 0; 272 273 fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL); 274 if (!fsl_dev) 275 return -ENOMEM; 276 277 id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node); 278 if (!id) 279 return -ENODEV; 280 fsl_dev->soc = id->data; 281 282 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 283 base = devm_ioremap_resource(dev, res); 284 if (IS_ERR(base)) { 285 ret = PTR_ERR(base); 286 return ret; 287 } 288 289 fsl_dev->irq = platform_get_irq(pdev, 0); 290 if (fsl_dev->irq < 0) { 291 dev_err(dev, "failed to get irq\n"); 292 return fsl_dev->irq; 293 } 294 295 fsl_dev->regmap = devm_regmap_init_mmio(dev, base, 296 &fsl_dcu_regmap_config); 297 if (IS_ERR(fsl_dev->regmap)) { 298 dev_err(dev, "regmap init failed\n"); 299 return PTR_ERR(fsl_dev->regmap); 300 } 301 302 fsl_dev->clk = devm_clk_get(dev, "dcu"); 303 if (IS_ERR(fsl_dev->clk)) { 304 dev_err(dev, "failed to get dcu clock\n"); 305 return PTR_ERR(fsl_dev->clk); 306 } 307 ret = clk_prepare_enable(fsl_dev->clk); 308 if (ret < 0) { 309 dev_err(dev, "failed to enable dcu clk\n"); 310 return ret; 311 } 312 313 pix_clk_in = devm_clk_get(dev, "pix"); 314 if (IS_ERR(pix_clk_in)) { 315 /* legancy binding, use dcu clock as pixel clock input */ 316 pix_clk_in = fsl_dev->clk; 317 } 318 319 if (of_property_read_bool(dev->of_node, "big-endian")) 320 div_ratio_shift = 24; 321 322 pix_clk_in_name = __clk_get_name(pix_clk_in); 323 snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name); 324 fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name, 325 pix_clk_in_name, 0, base + DCU_DIV_RATIO, 326 div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL); 327 if (IS_ERR(fsl_dev->pix_clk)) { 328 dev_err(dev, "failed to register pix clk\n"); 329 ret = PTR_ERR(fsl_dev->pix_clk); 330 goto disable_clk; 331 } 332 333 fsl_dev->tcon = fsl_tcon_init(dev); 334 335 drm = drm_dev_alloc(&fsl_dcu_drm_driver, dev); 336 if (IS_ERR(drm)) { 337 ret = PTR_ERR(drm); 338 goto unregister_pix_clk; 339 } 340 341 fsl_dev->dev = dev; 342 fsl_dev->drm = drm; 343 fsl_dev->np = dev->of_node; 344 drm->dev_private = fsl_dev; 345 dev_set_drvdata(dev, fsl_dev); 346 347 ret = drm_dev_register(drm, 0); 348 if (ret < 0) 349 goto put; 350 351 drm_fbdev_dma_setup(drm, legacyfb_depth); 352 353 return 0; 354 355 put: 356 drm_dev_put(drm); 357 unregister_pix_clk: 358 clk_unregister(fsl_dev->pix_clk); 359 disable_clk: 360 clk_disable_unprepare(fsl_dev->clk); 361 return ret; 362 } 363 364 static void fsl_dcu_drm_remove(struct platform_device *pdev) 365 { 366 struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev); 367 368 drm_dev_unregister(fsl_dev->drm); 369 drm_dev_put(fsl_dev->drm); 370 clk_disable_unprepare(fsl_dev->clk); 371 clk_unregister(fsl_dev->pix_clk); 372 } 373 374 static struct platform_driver fsl_dcu_drm_platform_driver = { 375 .probe = fsl_dcu_drm_probe, 376 .remove_new = fsl_dcu_drm_remove, 377 .driver = { 378 .name = "fsl-dcu", 379 .pm = &fsl_dcu_drm_pm_ops, 380 .of_match_table = fsl_dcu_of_match, 381 }, 382 }; 383 384 drm_module_platform_driver(fsl_dcu_drm_platform_driver); 385 386 MODULE_DESCRIPTION("Freescale DCU DRM Driver"); 387 MODULE_LICENSE("GPL"); 388