1 /*
2  * Copyright 2015 Freescale Semiconductor, Inc.
3  *
4  * Freescale DCU drm device driver
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11 
12 #include <linux/clk.h>
13 #include <linux/clk-provider.h>
14 #include <linux/io.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/mm.h>
17 #include <linux/module.h>
18 #include <linux/of_platform.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/regmap.h>
23 
24 #include <drm/drmP.h>
25 #include <drm/drm_crtc_helper.h>
26 #include <drm/drm_fb_cma_helper.h>
27 #include <drm/drm_gem_cma_helper.h>
28 
29 #include "fsl_dcu_drm_crtc.h"
30 #include "fsl_dcu_drm_drv.h"
31 #include "fsl_tcon.h"
32 
33 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
34 {
35 	if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
36 		return true;
37 
38 	return false;
39 }
40 
41 static const struct regmap_config fsl_dcu_regmap_config = {
42 	.reg_bits = 32,
43 	.reg_stride = 4,
44 	.val_bits = 32,
45 	.cache_type = REGCACHE_RBTREE,
46 
47 	.volatile_reg = fsl_dcu_drm_is_volatile_reg,
48 };
49 
50 static int fsl_dcu_drm_irq_init(struct drm_device *dev)
51 {
52 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
53 	int ret;
54 
55 	ret = drm_irq_install(dev, fsl_dev->irq);
56 	if (ret < 0)
57 		dev_err(dev->dev, "failed to install IRQ handler\n");
58 
59 	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0);
60 	regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
61 	regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
62 		     DCU_UPDATE_MODE_READREG);
63 
64 	return ret;
65 }
66 
67 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
68 {
69 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
70 	int ret;
71 
72 	ret = fsl_dcu_drm_modeset_init(fsl_dev);
73 	if (ret < 0) {
74 		dev_err(dev->dev, "failed to initialize mode setting\n");
75 		return ret;
76 	}
77 
78 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
79 	if (ret < 0) {
80 		dev_err(dev->dev, "failed to initialize vblank\n");
81 		goto done;
82 	}
83 
84 	ret = fsl_dcu_drm_irq_init(dev);
85 	if (ret < 0)
86 		goto done;
87 	dev->irq_enabled = true;
88 
89 	fsl_dcu_fbdev_init(dev);
90 
91 	return 0;
92 done:
93 	drm_kms_helper_poll_fini(dev);
94 
95 	if (fsl_dev->fbdev)
96 		drm_fbdev_cma_fini(fsl_dev->fbdev);
97 
98 	drm_mode_config_cleanup(dev);
99 	drm_vblank_cleanup(dev);
100 	drm_irq_uninstall(dev);
101 	dev->dev_private = NULL;
102 
103 	return ret;
104 }
105 
106 static int fsl_dcu_unload(struct drm_device *dev)
107 {
108 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
109 
110 	drm_kms_helper_poll_fini(dev);
111 
112 	if (fsl_dev->fbdev)
113 		drm_fbdev_cma_fini(fsl_dev->fbdev);
114 
115 	drm_mode_config_cleanup(dev);
116 	drm_vblank_cleanup(dev);
117 	drm_irq_uninstall(dev);
118 
119 	dev->dev_private = NULL;
120 
121 	return 0;
122 }
123 
124 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
125 {
126 	struct drm_device *dev = arg;
127 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
128 	unsigned int int_status;
129 	int ret;
130 
131 	ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
132 	if (ret) {
133 		dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
134 		return IRQ_NONE;
135 	}
136 
137 	if (int_status & DCU_INT_STATUS_VBLANK)
138 		drm_handle_vblank(dev, 0);
139 
140 	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
141 	regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
142 		     DCU_UPDATE_MODE_READREG);
143 
144 	return IRQ_HANDLED;
145 }
146 
147 static int fsl_dcu_drm_enable_vblank(struct drm_device *dev, unsigned int pipe)
148 {
149 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
150 	unsigned int value;
151 
152 	regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
153 	value &= ~DCU_INT_MASK_VBLANK;
154 	regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
155 
156 	return 0;
157 }
158 
159 static void fsl_dcu_drm_disable_vblank(struct drm_device *dev,
160 				       unsigned int pipe)
161 {
162 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
163 	unsigned int value;
164 
165 	regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
166 	value |= DCU_INT_MASK_VBLANK;
167 	regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
168 }
169 
170 static void fsl_dcu_drm_lastclose(struct drm_device *dev)
171 {
172 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
173 
174 	drm_fbdev_cma_restore_mode(fsl_dev->fbdev);
175 }
176 
177 static const struct file_operations fsl_dcu_drm_fops = {
178 	.owner		= THIS_MODULE,
179 	.open		= drm_open,
180 	.release	= drm_release,
181 	.unlocked_ioctl	= drm_ioctl,
182 #ifdef CONFIG_COMPAT
183 	.compat_ioctl	= drm_compat_ioctl,
184 #endif
185 	.poll		= drm_poll,
186 	.read		= drm_read,
187 	.llseek		= no_llseek,
188 	.mmap		= drm_gem_cma_mmap,
189 };
190 
191 static struct drm_driver fsl_dcu_drm_driver = {
192 	.driver_features	= DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET
193 				| DRIVER_PRIME | DRIVER_ATOMIC,
194 	.lastclose		= fsl_dcu_drm_lastclose,
195 	.load			= fsl_dcu_load,
196 	.unload			= fsl_dcu_unload,
197 	.irq_handler		= fsl_dcu_drm_irq,
198 	.get_vblank_counter	= drm_vblank_no_hw_counter,
199 	.enable_vblank		= fsl_dcu_drm_enable_vblank,
200 	.disable_vblank		= fsl_dcu_drm_disable_vblank,
201 	.gem_free_object	= drm_gem_cma_free_object,
202 	.gem_vm_ops		= &drm_gem_cma_vm_ops,
203 	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
204 	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
205 	.gem_prime_import	= drm_gem_prime_import,
206 	.gem_prime_export	= drm_gem_prime_export,
207 	.gem_prime_get_sg_table	= drm_gem_cma_prime_get_sg_table,
208 	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
209 	.gem_prime_vmap		= drm_gem_cma_prime_vmap,
210 	.gem_prime_vunmap	= drm_gem_cma_prime_vunmap,
211 	.gem_prime_mmap		= drm_gem_cma_prime_mmap,
212 	.dumb_create		= drm_gem_cma_dumb_create,
213 	.dumb_map_offset	= drm_gem_cma_dumb_map_offset,
214 	.dumb_destroy		= drm_gem_dumb_destroy,
215 	.fops			= &fsl_dcu_drm_fops,
216 	.name			= "fsl-dcu-drm",
217 	.desc			= "Freescale DCU DRM",
218 	.date			= "20160425",
219 	.major			= 1,
220 	.minor			= 1,
221 };
222 
223 #ifdef CONFIG_PM_SLEEP
224 static int fsl_dcu_drm_pm_suspend(struct device *dev)
225 {
226 	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
227 
228 	if (!fsl_dev)
229 		return 0;
230 
231 	drm_kms_helper_poll_disable(fsl_dev->drm);
232 	regcache_cache_only(fsl_dev->regmap, true);
233 	regcache_mark_dirty(fsl_dev->regmap);
234 	clk_disable(fsl_dev->clk);
235 	clk_unprepare(fsl_dev->clk);
236 
237 	return 0;
238 }
239 
240 static int fsl_dcu_drm_pm_resume(struct device *dev)
241 {
242 	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
243 	int ret;
244 
245 	if (!fsl_dev)
246 		return 0;
247 
248 	ret = clk_enable(fsl_dev->clk);
249 	if (ret < 0) {
250 		dev_err(dev, "failed to enable dcu clk\n");
251 		clk_unprepare(fsl_dev->clk);
252 		return ret;
253 	}
254 	ret = clk_prepare(fsl_dev->clk);
255 	if (ret < 0) {
256 		dev_err(dev, "failed to prepare dcu clk\n");
257 		return ret;
258 	}
259 
260 	drm_kms_helper_poll_enable(fsl_dev->drm);
261 	regcache_cache_only(fsl_dev->regmap, false);
262 	regcache_sync(fsl_dev->regmap);
263 
264 	return 0;
265 }
266 #endif
267 
268 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
269 	SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
270 };
271 
272 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
273 	.name = "ls1021a",
274 	.total_layer = 16,
275 	.max_layer = 4,
276 };
277 
278 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
279 	.name = "vf610",
280 	.total_layer = 64,
281 	.max_layer = 6,
282 };
283 
284 static const struct of_device_id fsl_dcu_of_match[] = {
285 	{
286 		.compatible = "fsl,ls1021a-dcu",
287 		.data = &fsl_dcu_ls1021a_data,
288 	}, {
289 		.compatible = "fsl,vf610-dcu",
290 		.data = &fsl_dcu_vf610_data,
291 	}, {
292 	},
293 };
294 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
295 
296 static int fsl_dcu_drm_probe(struct platform_device *pdev)
297 {
298 	struct fsl_dcu_drm_device *fsl_dev;
299 	struct drm_device *drm;
300 	struct device *dev = &pdev->dev;
301 	struct resource *res;
302 	void __iomem *base;
303 	struct drm_driver *driver = &fsl_dcu_drm_driver;
304 	struct clk *pix_clk_in;
305 	char pix_clk_name[32];
306 	const char *pix_clk_in_name;
307 	const struct of_device_id *id;
308 	int ret;
309 
310 	fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
311 	if (!fsl_dev)
312 		return -ENOMEM;
313 
314 	id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
315 	if (!id)
316 		return -ENODEV;
317 	fsl_dev->soc = id->data;
318 
319 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
320 	if (!res) {
321 		dev_err(dev, "could not get memory IO resource\n");
322 		return -ENODEV;
323 	}
324 
325 	base = devm_ioremap_resource(dev, res);
326 	if (IS_ERR(base)) {
327 		ret = PTR_ERR(base);
328 		return ret;
329 	}
330 
331 	fsl_dev->irq = platform_get_irq(pdev, 0);
332 	if (fsl_dev->irq < 0) {
333 		dev_err(dev, "failed to get irq\n");
334 		return -ENXIO;
335 	}
336 
337 	fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
338 			&fsl_dcu_regmap_config);
339 	if (IS_ERR(fsl_dev->regmap)) {
340 		dev_err(dev, "regmap init failed\n");
341 		return PTR_ERR(fsl_dev->regmap);
342 	}
343 
344 	fsl_dev->clk = devm_clk_get(dev, "dcu");
345 	if (IS_ERR(fsl_dev->clk)) {
346 		dev_err(dev, "failed to get dcu clock\n");
347 		return PTR_ERR(fsl_dev->clk);
348 	}
349 	ret = clk_prepare_enable(fsl_dev->clk);
350 	if (ret < 0) {
351 		dev_err(dev, "failed to enable dcu clk\n");
352 		return ret;
353 	}
354 
355 	pix_clk_in = devm_clk_get(dev, "pix");
356 	if (IS_ERR(pix_clk_in)) {
357 		/* legancy binding, use dcu clock as pixel clock input */
358 		pix_clk_in = fsl_dev->clk;
359 	}
360 
361 	pix_clk_in_name = __clk_get_name(pix_clk_in);
362 	snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
363 	fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
364 			pix_clk_in_name, 0, base + DCU_DIV_RATIO,
365 			0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
366 	if (IS_ERR(fsl_dev->pix_clk)) {
367 		dev_err(dev, "failed to register pix clk\n");
368 		ret = PTR_ERR(fsl_dev->pix_clk);
369 		goto disable_clk;
370 	}
371 
372 	ret = clk_prepare_enable(fsl_dev->pix_clk);
373 	if (ret < 0) {
374 		dev_err(dev, "failed to enable pix clk\n");
375 		goto unregister_pix_clk;
376 	}
377 
378 	fsl_dev->tcon = fsl_tcon_init(dev);
379 
380 	drm = drm_dev_alloc(driver, dev);
381 	if (!drm) {
382 		ret = -ENOMEM;
383 		goto disable_pix_clk;
384 	}
385 
386 	fsl_dev->dev = dev;
387 	fsl_dev->drm = drm;
388 	fsl_dev->np = dev->of_node;
389 	drm->dev_private = fsl_dev;
390 	dev_set_drvdata(dev, fsl_dev);
391 
392 	ret = drm_dev_register(drm, 0);
393 	if (ret < 0)
394 		goto unref;
395 
396 	DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
397 		 driver->major, driver->minor, driver->patchlevel,
398 		 driver->date, drm->primary->index);
399 
400 	return 0;
401 
402 unref:
403 	drm_dev_unref(drm);
404 disable_pix_clk:
405 	clk_disable_unprepare(fsl_dev->pix_clk);
406 unregister_pix_clk:
407 	clk_unregister(fsl_dev->pix_clk);
408 disable_clk:
409 	clk_disable_unprepare(fsl_dev->clk);
410 	return ret;
411 }
412 
413 static int fsl_dcu_drm_remove(struct platform_device *pdev)
414 {
415 	struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
416 
417 	clk_disable_unprepare(fsl_dev->clk);
418 	clk_disable_unprepare(fsl_dev->pix_clk);
419 	clk_unregister(fsl_dev->pix_clk);
420 	drm_put_dev(fsl_dev->drm);
421 
422 	return 0;
423 }
424 
425 static struct platform_driver fsl_dcu_drm_platform_driver = {
426 	.probe		= fsl_dcu_drm_probe,
427 	.remove		= fsl_dcu_drm_remove,
428 	.driver		= {
429 		.name	= "fsl-dcu",
430 		.pm	= &fsl_dcu_drm_pm_ops,
431 		.of_match_table = fsl_dcu_of_match,
432 	},
433 };
434 
435 module_platform_driver(fsl_dcu_drm_platform_driver);
436 
437 MODULE_DESCRIPTION("Freescale DCU DRM Driver");
438 MODULE_LICENSE("GPL");
439