1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * Freescale DCU drm device driver 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/clk.h> 13 #include <linux/clk-provider.h> 14 #include <linux/console.h> 15 #include <linux/io.h> 16 #include <linux/mfd/syscon.h> 17 #include <linux/mm.h> 18 #include <linux/module.h> 19 #include <linux/of_platform.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regmap.h> 24 25 #include <drm/drmP.h> 26 #include <drm/drm_atomic_helper.h> 27 #include <drm/drm_crtc_helper.h> 28 #include <drm/drm_fb_cma_helper.h> 29 #include <drm/drm_gem_cma_helper.h> 30 31 #include "fsl_dcu_drm_crtc.h" 32 #include "fsl_dcu_drm_drv.h" 33 #include "fsl_tcon.h" 34 35 static int legacyfb_depth = 24; 36 module_param(legacyfb_depth, int, 0444); 37 38 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg) 39 { 40 if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE) 41 return true; 42 43 return false; 44 } 45 46 static const struct regmap_config fsl_dcu_regmap_config = { 47 .reg_bits = 32, 48 .reg_stride = 4, 49 .val_bits = 32, 50 51 .volatile_reg = fsl_dcu_drm_is_volatile_reg, 52 }; 53 54 static int fsl_dcu_drm_irq_init(struct drm_device *dev) 55 { 56 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 57 int ret; 58 59 ret = drm_irq_install(dev, fsl_dev->irq); 60 if (ret < 0) 61 dev_err(dev->dev, "failed to install IRQ handler\n"); 62 63 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0); 64 regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0); 65 66 return ret; 67 } 68 69 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags) 70 { 71 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 72 int ret; 73 74 ret = fsl_dcu_drm_modeset_init(fsl_dev); 75 if (ret < 0) { 76 dev_err(dev->dev, "failed to initialize mode setting\n"); 77 return ret; 78 } 79 80 ret = drm_vblank_init(dev, dev->mode_config.num_crtc); 81 if (ret < 0) { 82 dev_err(dev->dev, "failed to initialize vblank\n"); 83 goto done; 84 } 85 86 ret = fsl_dcu_drm_irq_init(dev); 87 if (ret < 0) 88 goto done; 89 dev->irq_enabled = true; 90 91 if (legacyfb_depth != 16 && legacyfb_depth != 24 && 92 legacyfb_depth != 32) { 93 dev_warn(dev->dev, 94 "Invalid legacyfb_depth. Defaulting to 24bpp\n"); 95 legacyfb_depth = 24; 96 } 97 fsl_dev->fbdev = drm_fbdev_cma_init(dev, legacyfb_depth, 1, 1); 98 if (IS_ERR(fsl_dev->fbdev)) { 99 ret = PTR_ERR(fsl_dev->fbdev); 100 fsl_dev->fbdev = NULL; 101 goto done; 102 } 103 104 return 0; 105 done: 106 drm_kms_helper_poll_fini(dev); 107 108 if (fsl_dev->fbdev) 109 drm_fbdev_cma_fini(fsl_dev->fbdev); 110 111 drm_mode_config_cleanup(dev); 112 drm_vblank_cleanup(dev); 113 drm_irq_uninstall(dev); 114 dev->dev_private = NULL; 115 116 return ret; 117 } 118 119 static int fsl_dcu_unload(struct drm_device *dev) 120 { 121 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 122 123 drm_crtc_force_disable_all(dev); 124 drm_kms_helper_poll_fini(dev); 125 126 if (fsl_dev->fbdev) 127 drm_fbdev_cma_fini(fsl_dev->fbdev); 128 129 drm_mode_config_cleanup(dev); 130 drm_vblank_cleanup(dev); 131 drm_irq_uninstall(dev); 132 133 dev->dev_private = NULL; 134 135 return 0; 136 } 137 138 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg) 139 { 140 struct drm_device *dev = arg; 141 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 142 unsigned int int_status; 143 int ret; 144 145 ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status); 146 if (ret) { 147 dev_err(dev->dev, "read DCU_INT_STATUS failed\n"); 148 return IRQ_NONE; 149 } 150 151 if (int_status & DCU_INT_STATUS_VBLANK) 152 drm_handle_vblank(dev, 0); 153 154 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status); 155 156 return IRQ_HANDLED; 157 } 158 159 static int fsl_dcu_drm_enable_vblank(struct drm_device *dev, unsigned int pipe) 160 { 161 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 162 unsigned int value; 163 164 regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value); 165 value &= ~DCU_INT_MASK_VBLANK; 166 regmap_write(fsl_dev->regmap, DCU_INT_MASK, value); 167 168 return 0; 169 } 170 171 static void fsl_dcu_drm_disable_vblank(struct drm_device *dev, 172 unsigned int pipe) 173 { 174 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 175 unsigned int value; 176 177 regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value); 178 value |= DCU_INT_MASK_VBLANK; 179 regmap_write(fsl_dev->regmap, DCU_INT_MASK, value); 180 } 181 182 static void fsl_dcu_drm_lastclose(struct drm_device *dev) 183 { 184 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 185 186 drm_fbdev_cma_restore_mode(fsl_dev->fbdev); 187 } 188 189 static const struct file_operations fsl_dcu_drm_fops = { 190 .owner = THIS_MODULE, 191 .open = drm_open, 192 .release = drm_release, 193 .unlocked_ioctl = drm_ioctl, 194 .compat_ioctl = drm_compat_ioctl, 195 .poll = drm_poll, 196 .read = drm_read, 197 .llseek = no_llseek, 198 .mmap = drm_gem_cma_mmap, 199 }; 200 201 static struct drm_driver fsl_dcu_drm_driver = { 202 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET 203 | DRIVER_PRIME | DRIVER_ATOMIC, 204 .lastclose = fsl_dcu_drm_lastclose, 205 .load = fsl_dcu_load, 206 .unload = fsl_dcu_unload, 207 .irq_handler = fsl_dcu_drm_irq, 208 .get_vblank_counter = drm_vblank_no_hw_counter, 209 .enable_vblank = fsl_dcu_drm_enable_vblank, 210 .disable_vblank = fsl_dcu_drm_disable_vblank, 211 .gem_free_object_unlocked = drm_gem_cma_free_object, 212 .gem_vm_ops = &drm_gem_cma_vm_ops, 213 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 214 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 215 .gem_prime_import = drm_gem_prime_import, 216 .gem_prime_export = drm_gem_prime_export, 217 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 218 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 219 .gem_prime_vmap = drm_gem_cma_prime_vmap, 220 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 221 .gem_prime_mmap = drm_gem_cma_prime_mmap, 222 .dumb_create = drm_gem_cma_dumb_create, 223 .dumb_map_offset = drm_gem_cma_dumb_map_offset, 224 .dumb_destroy = drm_gem_dumb_destroy, 225 .fops = &fsl_dcu_drm_fops, 226 .name = "fsl-dcu-drm", 227 .desc = "Freescale DCU DRM", 228 .date = "20160425", 229 .major = 1, 230 .minor = 1, 231 }; 232 233 #ifdef CONFIG_PM_SLEEP 234 static int fsl_dcu_drm_pm_suspend(struct device *dev) 235 { 236 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 237 238 if (!fsl_dev) 239 return 0; 240 241 disable_irq(fsl_dev->irq); 242 drm_kms_helper_poll_disable(fsl_dev->drm); 243 244 console_lock(); 245 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 1); 246 console_unlock(); 247 248 fsl_dev->state = drm_atomic_helper_suspend(fsl_dev->drm); 249 if (IS_ERR(fsl_dev->state)) { 250 console_lock(); 251 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0); 252 console_unlock(); 253 254 drm_kms_helper_poll_enable(fsl_dev->drm); 255 enable_irq(fsl_dev->irq); 256 return PTR_ERR(fsl_dev->state); 257 } 258 259 clk_disable_unprepare(fsl_dev->pix_clk); 260 clk_disable_unprepare(fsl_dev->clk); 261 262 return 0; 263 } 264 265 static int fsl_dcu_drm_pm_resume(struct device *dev) 266 { 267 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 268 int ret; 269 270 if (!fsl_dev) 271 return 0; 272 273 ret = clk_prepare_enable(fsl_dev->clk); 274 if (ret < 0) { 275 dev_err(dev, "failed to enable dcu clk\n"); 276 return ret; 277 } 278 279 if (fsl_dev->tcon) 280 fsl_tcon_bypass_enable(fsl_dev->tcon); 281 fsl_dcu_drm_init_planes(fsl_dev->drm); 282 drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state); 283 284 console_lock(); 285 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0); 286 console_unlock(); 287 288 drm_kms_helper_poll_enable(fsl_dev->drm); 289 enable_irq(fsl_dev->irq); 290 291 return 0; 292 } 293 #endif 294 295 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = { 296 SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume) 297 }; 298 299 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = { 300 .name = "ls1021a", 301 .total_layer = 16, 302 .max_layer = 4, 303 .layer_regs = LS1021A_LAYER_REG_NUM, 304 }; 305 306 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = { 307 .name = "vf610", 308 .total_layer = 64, 309 .max_layer = 6, 310 .layer_regs = VF610_LAYER_REG_NUM, 311 }; 312 313 static const struct of_device_id fsl_dcu_of_match[] = { 314 { 315 .compatible = "fsl,ls1021a-dcu", 316 .data = &fsl_dcu_ls1021a_data, 317 }, { 318 .compatible = "fsl,vf610-dcu", 319 .data = &fsl_dcu_vf610_data, 320 }, { 321 }, 322 }; 323 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match); 324 325 static int fsl_dcu_drm_probe(struct platform_device *pdev) 326 { 327 struct fsl_dcu_drm_device *fsl_dev; 328 struct drm_device *drm; 329 struct device *dev = &pdev->dev; 330 struct resource *res; 331 void __iomem *base; 332 struct drm_driver *driver = &fsl_dcu_drm_driver; 333 struct clk *pix_clk_in; 334 char pix_clk_name[32]; 335 const char *pix_clk_in_name; 336 const struct of_device_id *id; 337 int ret; 338 u8 div_ratio_shift = 0; 339 340 fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL); 341 if (!fsl_dev) 342 return -ENOMEM; 343 344 id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node); 345 if (!id) 346 return -ENODEV; 347 fsl_dev->soc = id->data; 348 349 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 350 base = devm_ioremap_resource(dev, res); 351 if (IS_ERR(base)) { 352 ret = PTR_ERR(base); 353 return ret; 354 } 355 356 fsl_dev->irq = platform_get_irq(pdev, 0); 357 if (fsl_dev->irq < 0) { 358 dev_err(dev, "failed to get irq\n"); 359 return fsl_dev->irq; 360 } 361 362 fsl_dev->regmap = devm_regmap_init_mmio(dev, base, 363 &fsl_dcu_regmap_config); 364 if (IS_ERR(fsl_dev->regmap)) { 365 dev_err(dev, "regmap init failed\n"); 366 return PTR_ERR(fsl_dev->regmap); 367 } 368 369 fsl_dev->clk = devm_clk_get(dev, "dcu"); 370 if (IS_ERR(fsl_dev->clk)) { 371 dev_err(dev, "failed to get dcu clock\n"); 372 return PTR_ERR(fsl_dev->clk); 373 } 374 ret = clk_prepare_enable(fsl_dev->clk); 375 if (ret < 0) { 376 dev_err(dev, "failed to enable dcu clk\n"); 377 return ret; 378 } 379 380 pix_clk_in = devm_clk_get(dev, "pix"); 381 if (IS_ERR(pix_clk_in)) { 382 /* legancy binding, use dcu clock as pixel clock input */ 383 pix_clk_in = fsl_dev->clk; 384 } 385 386 if (of_property_read_bool(dev->of_node, "big-endian")) 387 div_ratio_shift = 24; 388 389 pix_clk_in_name = __clk_get_name(pix_clk_in); 390 snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name); 391 fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name, 392 pix_clk_in_name, 0, base + DCU_DIV_RATIO, 393 div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL); 394 if (IS_ERR(fsl_dev->pix_clk)) { 395 dev_err(dev, "failed to register pix clk\n"); 396 ret = PTR_ERR(fsl_dev->pix_clk); 397 goto disable_clk; 398 } 399 400 fsl_dev->tcon = fsl_tcon_init(dev); 401 402 drm = drm_dev_alloc(driver, dev); 403 if (IS_ERR(drm)) { 404 ret = PTR_ERR(drm); 405 goto unregister_pix_clk; 406 } 407 408 fsl_dev->dev = dev; 409 fsl_dev->drm = drm; 410 fsl_dev->np = dev->of_node; 411 drm->dev_private = fsl_dev; 412 dev_set_drvdata(dev, fsl_dev); 413 414 ret = drm_dev_register(drm, 0); 415 if (ret < 0) 416 goto unref; 417 418 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name, 419 driver->major, driver->minor, driver->patchlevel, 420 driver->date, drm->primary->index); 421 422 return 0; 423 424 unref: 425 drm_dev_unref(drm); 426 unregister_pix_clk: 427 clk_unregister(fsl_dev->pix_clk); 428 disable_clk: 429 clk_disable_unprepare(fsl_dev->clk); 430 return ret; 431 } 432 433 static int fsl_dcu_drm_remove(struct platform_device *pdev) 434 { 435 struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev); 436 437 drm_put_dev(fsl_dev->drm); 438 clk_disable_unprepare(fsl_dev->clk); 439 clk_unregister(fsl_dev->pix_clk); 440 441 return 0; 442 } 443 444 static struct platform_driver fsl_dcu_drm_platform_driver = { 445 .probe = fsl_dcu_drm_probe, 446 .remove = fsl_dcu_drm_remove, 447 .driver = { 448 .name = "fsl-dcu", 449 .pm = &fsl_dcu_drm_pm_ops, 450 .of_match_table = fsl_dcu_of_match, 451 }, 452 }; 453 454 module_platform_driver(fsl_dcu_drm_platform_driver); 455 456 MODULE_DESCRIPTION("Freescale DCU DRM Driver"); 457 MODULE_LICENSE("GPL"); 458