1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * Freescale DCU drm device driver 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/clk.h> 13 #include <linux/clk-provider.h> 14 #include <linux/console.h> 15 #include <linux/io.h> 16 #include <linux/mfd/syscon.h> 17 #include <linux/mm.h> 18 #include <linux/module.h> 19 #include <linux/of_platform.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regmap.h> 24 25 #include <drm/drmP.h> 26 #include <drm/drm_atomic_helper.h> 27 #include <drm/drm_crtc_helper.h> 28 #include <drm/drm_fb_cma_helper.h> 29 #include <drm/drm_gem_cma_helper.h> 30 31 #include "fsl_dcu_drm_crtc.h" 32 #include "fsl_dcu_drm_drv.h" 33 #include "fsl_tcon.h" 34 35 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg) 36 { 37 if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE) 38 return true; 39 40 return false; 41 } 42 43 static const struct regmap_config fsl_dcu_regmap_config = { 44 .reg_bits = 32, 45 .reg_stride = 4, 46 .val_bits = 32, 47 48 .volatile_reg = fsl_dcu_drm_is_volatile_reg, 49 }; 50 51 static int fsl_dcu_drm_irq_init(struct drm_device *dev) 52 { 53 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 54 int ret; 55 56 ret = drm_irq_install(dev, fsl_dev->irq); 57 if (ret < 0) 58 dev_err(dev->dev, "failed to install IRQ handler\n"); 59 60 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0); 61 regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0); 62 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, 63 DCU_UPDATE_MODE_READREG); 64 65 return ret; 66 } 67 68 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags) 69 { 70 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 71 int ret; 72 73 ret = fsl_dcu_drm_modeset_init(fsl_dev); 74 if (ret < 0) { 75 dev_err(dev->dev, "failed to initialize mode setting\n"); 76 return ret; 77 } 78 79 ret = drm_vblank_init(dev, dev->mode_config.num_crtc); 80 if (ret < 0) { 81 dev_err(dev->dev, "failed to initialize vblank\n"); 82 goto done; 83 } 84 85 ret = fsl_dcu_drm_irq_init(dev); 86 if (ret < 0) 87 goto done; 88 dev->irq_enabled = true; 89 90 fsl_dcu_fbdev_init(dev); 91 92 return 0; 93 done: 94 drm_kms_helper_poll_fini(dev); 95 96 if (fsl_dev->fbdev) 97 drm_fbdev_cma_fini(fsl_dev->fbdev); 98 99 drm_mode_config_cleanup(dev); 100 drm_vblank_cleanup(dev); 101 drm_irq_uninstall(dev); 102 dev->dev_private = NULL; 103 104 return ret; 105 } 106 107 static int fsl_dcu_unload(struct drm_device *dev) 108 { 109 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 110 111 drm_kms_helper_poll_fini(dev); 112 113 if (fsl_dev->fbdev) 114 drm_fbdev_cma_fini(fsl_dev->fbdev); 115 116 drm_mode_config_cleanup(dev); 117 drm_vblank_cleanup(dev); 118 drm_irq_uninstall(dev); 119 120 dev->dev_private = NULL; 121 122 return 0; 123 } 124 125 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg) 126 { 127 struct drm_device *dev = arg; 128 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 129 unsigned int int_status; 130 int ret; 131 132 ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status); 133 if (ret) { 134 dev_err(dev->dev, "read DCU_INT_STATUS failed\n"); 135 return IRQ_NONE; 136 } 137 138 if (int_status & DCU_INT_STATUS_VBLANK) 139 drm_handle_vblank(dev, 0); 140 141 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status); 142 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, 143 DCU_UPDATE_MODE_READREG); 144 145 return IRQ_HANDLED; 146 } 147 148 static int fsl_dcu_drm_enable_vblank(struct drm_device *dev, unsigned int pipe) 149 { 150 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 151 unsigned int value; 152 153 regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value); 154 value &= ~DCU_INT_MASK_VBLANK; 155 regmap_write(fsl_dev->regmap, DCU_INT_MASK, value); 156 157 return 0; 158 } 159 160 static void fsl_dcu_drm_disable_vblank(struct drm_device *dev, 161 unsigned int pipe) 162 { 163 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 164 unsigned int value; 165 166 regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value); 167 value |= DCU_INT_MASK_VBLANK; 168 regmap_write(fsl_dev->regmap, DCU_INT_MASK, value); 169 } 170 171 static void fsl_dcu_drm_lastclose(struct drm_device *dev) 172 { 173 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 174 175 drm_fbdev_cma_restore_mode(fsl_dev->fbdev); 176 } 177 178 static const struct file_operations fsl_dcu_drm_fops = { 179 .owner = THIS_MODULE, 180 .open = drm_open, 181 .release = drm_release, 182 .unlocked_ioctl = drm_ioctl, 183 #ifdef CONFIG_COMPAT 184 .compat_ioctl = drm_compat_ioctl, 185 #endif 186 .poll = drm_poll, 187 .read = drm_read, 188 .llseek = no_llseek, 189 .mmap = drm_gem_cma_mmap, 190 }; 191 192 static struct drm_driver fsl_dcu_drm_driver = { 193 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET 194 | DRIVER_PRIME | DRIVER_ATOMIC, 195 .lastclose = fsl_dcu_drm_lastclose, 196 .load = fsl_dcu_load, 197 .unload = fsl_dcu_unload, 198 .irq_handler = fsl_dcu_drm_irq, 199 .get_vblank_counter = drm_vblank_no_hw_counter, 200 .enable_vblank = fsl_dcu_drm_enable_vblank, 201 .disable_vblank = fsl_dcu_drm_disable_vblank, 202 .gem_free_object_unlocked = drm_gem_cma_free_object, 203 .gem_vm_ops = &drm_gem_cma_vm_ops, 204 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 205 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 206 .gem_prime_import = drm_gem_prime_import, 207 .gem_prime_export = drm_gem_prime_export, 208 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 209 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 210 .gem_prime_vmap = drm_gem_cma_prime_vmap, 211 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 212 .gem_prime_mmap = drm_gem_cma_prime_mmap, 213 .dumb_create = drm_gem_cma_dumb_create, 214 .dumb_map_offset = drm_gem_cma_dumb_map_offset, 215 .dumb_destroy = drm_gem_dumb_destroy, 216 .fops = &fsl_dcu_drm_fops, 217 .name = "fsl-dcu-drm", 218 .desc = "Freescale DCU DRM", 219 .date = "20160425", 220 .major = 1, 221 .minor = 1, 222 }; 223 224 #ifdef CONFIG_PM_SLEEP 225 static int fsl_dcu_drm_pm_suspend(struct device *dev) 226 { 227 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 228 229 if (!fsl_dev) 230 return 0; 231 232 disable_irq(fsl_dev->irq); 233 drm_kms_helper_poll_disable(fsl_dev->drm); 234 235 console_lock(); 236 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 1); 237 console_unlock(); 238 239 fsl_dev->state = drm_atomic_helper_suspend(fsl_dev->drm); 240 if (IS_ERR(fsl_dev->state)) { 241 console_lock(); 242 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0); 243 console_unlock(); 244 245 drm_kms_helper_poll_enable(fsl_dev->drm); 246 enable_irq(fsl_dev->irq); 247 return PTR_ERR(fsl_dev->state); 248 } 249 250 clk_disable_unprepare(fsl_dev->pix_clk); 251 clk_disable_unprepare(fsl_dev->clk); 252 253 return 0; 254 } 255 256 static int fsl_dcu_drm_pm_resume(struct device *dev) 257 { 258 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev); 259 int ret; 260 261 if (!fsl_dev) 262 return 0; 263 264 ret = clk_prepare_enable(fsl_dev->clk); 265 if (ret < 0) { 266 dev_err(dev, "failed to enable dcu clk\n"); 267 return ret; 268 } 269 270 ret = clk_prepare_enable(fsl_dev->pix_clk); 271 if (ret < 0) { 272 dev_err(dev, "failed to enable pix clk\n"); 273 return ret; 274 } 275 276 fsl_dcu_drm_init_planes(fsl_dev->drm); 277 drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state); 278 279 console_lock(); 280 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0); 281 console_unlock(); 282 283 drm_kms_helper_poll_enable(fsl_dev->drm); 284 enable_irq(fsl_dev->irq); 285 286 return 0; 287 } 288 #endif 289 290 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = { 291 SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume) 292 }; 293 294 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = { 295 .name = "ls1021a", 296 .total_layer = 16, 297 .max_layer = 4, 298 .layer_regs = LS1021A_LAYER_REG_NUM, 299 }; 300 301 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = { 302 .name = "vf610", 303 .total_layer = 64, 304 .max_layer = 6, 305 .layer_regs = VF610_LAYER_REG_NUM, 306 }; 307 308 static const struct of_device_id fsl_dcu_of_match[] = { 309 { 310 .compatible = "fsl,ls1021a-dcu", 311 .data = &fsl_dcu_ls1021a_data, 312 }, { 313 .compatible = "fsl,vf610-dcu", 314 .data = &fsl_dcu_vf610_data, 315 }, { 316 }, 317 }; 318 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match); 319 320 static int fsl_dcu_drm_probe(struct platform_device *pdev) 321 { 322 struct fsl_dcu_drm_device *fsl_dev; 323 struct drm_device *drm; 324 struct device *dev = &pdev->dev; 325 struct resource *res; 326 void __iomem *base; 327 struct drm_driver *driver = &fsl_dcu_drm_driver; 328 struct clk *pix_clk_in; 329 char pix_clk_name[32]; 330 const char *pix_clk_in_name; 331 const struct of_device_id *id; 332 int ret; 333 334 fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL); 335 if (!fsl_dev) 336 return -ENOMEM; 337 338 id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node); 339 if (!id) 340 return -ENODEV; 341 fsl_dev->soc = id->data; 342 343 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 344 if (!res) { 345 dev_err(dev, "could not get memory IO resource\n"); 346 return -ENODEV; 347 } 348 349 base = devm_ioremap_resource(dev, res); 350 if (IS_ERR(base)) { 351 ret = PTR_ERR(base); 352 return ret; 353 } 354 355 fsl_dev->irq = platform_get_irq(pdev, 0); 356 if (fsl_dev->irq < 0) { 357 dev_err(dev, "failed to get irq\n"); 358 return -ENXIO; 359 } 360 361 fsl_dev->regmap = devm_regmap_init_mmio(dev, base, 362 &fsl_dcu_regmap_config); 363 if (IS_ERR(fsl_dev->regmap)) { 364 dev_err(dev, "regmap init failed\n"); 365 return PTR_ERR(fsl_dev->regmap); 366 } 367 368 fsl_dev->clk = devm_clk_get(dev, "dcu"); 369 if (IS_ERR(fsl_dev->clk)) { 370 dev_err(dev, "failed to get dcu clock\n"); 371 return PTR_ERR(fsl_dev->clk); 372 } 373 ret = clk_prepare_enable(fsl_dev->clk); 374 if (ret < 0) { 375 dev_err(dev, "failed to enable dcu clk\n"); 376 return ret; 377 } 378 379 pix_clk_in = devm_clk_get(dev, "pix"); 380 if (IS_ERR(pix_clk_in)) { 381 /* legancy binding, use dcu clock as pixel clock input */ 382 pix_clk_in = fsl_dev->clk; 383 } 384 385 pix_clk_in_name = __clk_get_name(pix_clk_in); 386 snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name); 387 fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name, 388 pix_clk_in_name, 0, base + DCU_DIV_RATIO, 389 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL); 390 if (IS_ERR(fsl_dev->pix_clk)) { 391 dev_err(dev, "failed to register pix clk\n"); 392 ret = PTR_ERR(fsl_dev->pix_clk); 393 goto disable_clk; 394 } 395 396 ret = clk_prepare_enable(fsl_dev->pix_clk); 397 if (ret < 0) { 398 dev_err(dev, "failed to enable pix clk\n"); 399 goto unregister_pix_clk; 400 } 401 402 fsl_dev->tcon = fsl_tcon_init(dev); 403 404 drm = drm_dev_alloc(driver, dev); 405 if (!drm) { 406 ret = -ENOMEM; 407 goto disable_pix_clk; 408 } 409 410 fsl_dev->dev = dev; 411 fsl_dev->drm = drm; 412 fsl_dev->np = dev->of_node; 413 drm->dev_private = fsl_dev; 414 dev_set_drvdata(dev, fsl_dev); 415 416 ret = drm_dev_register(drm, 0); 417 if (ret < 0) 418 goto unref; 419 420 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name, 421 driver->major, driver->minor, driver->patchlevel, 422 driver->date, drm->primary->index); 423 424 return 0; 425 426 unref: 427 drm_dev_unref(drm); 428 disable_pix_clk: 429 clk_disable_unprepare(fsl_dev->pix_clk); 430 unregister_pix_clk: 431 clk_unregister(fsl_dev->pix_clk); 432 disable_clk: 433 clk_disable_unprepare(fsl_dev->clk); 434 return ret; 435 } 436 437 static int fsl_dcu_drm_remove(struct platform_device *pdev) 438 { 439 struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev); 440 441 clk_disable_unprepare(fsl_dev->clk); 442 clk_disable_unprepare(fsl_dev->pix_clk); 443 clk_unregister(fsl_dev->pix_clk); 444 drm_put_dev(fsl_dev->drm); 445 446 return 0; 447 } 448 449 static struct platform_driver fsl_dcu_drm_platform_driver = { 450 .probe = fsl_dcu_drm_probe, 451 .remove = fsl_dcu_drm_remove, 452 .driver = { 453 .name = "fsl-dcu", 454 .pm = &fsl_dcu_drm_pm_ops, 455 .of_match_table = fsl_dcu_of_match, 456 }, 457 }; 458 459 module_platform_driver(fsl_dcu_drm_platform_driver); 460 461 MODULE_DESCRIPTION("Freescale DCU DRM Driver"); 462 MODULE_LICENSE("GPL"); 463