1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * Freescale DCU drm device driver 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/clk.h> 13 #include <linux/regmap.h> 14 15 #include <drm/drmP.h> 16 #include <drm/drm_atomic.h> 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_crtc.h> 19 #include <drm/drm_crtc_helper.h> 20 21 #include "fsl_dcu_drm_crtc.h" 22 #include "fsl_dcu_drm_drv.h" 23 #include "fsl_dcu_drm_plane.h" 24 25 static void fsl_dcu_drm_crtc_atomic_flush(struct drm_crtc *crtc, 26 struct drm_crtc_state *old_crtc_state) 27 { 28 struct drm_pending_vblank_event *event = crtc->state->event; 29 30 if (event) { 31 crtc->state->event = NULL; 32 33 spin_lock_irq(&crtc->dev->event_lock); 34 if (drm_crtc_vblank_get(crtc) == 0) 35 drm_crtc_arm_vblank_event(crtc, event); 36 else 37 drm_crtc_send_vblank_event(crtc, event); 38 spin_unlock_irq(&crtc->dev->event_lock); 39 } 40 } 41 42 static void fsl_dcu_drm_disable_crtc(struct drm_crtc *crtc) 43 { 44 struct drm_device *dev = crtc->dev; 45 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 46 47 drm_crtc_vblank_off(crtc); 48 49 regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE, 50 DCU_MODE_DCU_MODE_MASK, 51 DCU_MODE_DCU_MODE(DCU_MODE_OFF)); 52 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, 53 DCU_UPDATE_MODE_READREG); 54 clk_disable_unprepare(fsl_dev->pix_clk); 55 } 56 57 static void fsl_dcu_drm_crtc_enable(struct drm_crtc *crtc) 58 { 59 struct drm_device *dev = crtc->dev; 60 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 61 62 clk_prepare_enable(fsl_dev->pix_clk); 63 regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE, 64 DCU_MODE_DCU_MODE_MASK, 65 DCU_MODE_DCU_MODE(DCU_MODE_NORMAL)); 66 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, 67 DCU_UPDATE_MODE_READREG); 68 69 drm_crtc_vblank_on(crtc); 70 } 71 72 static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) 73 { 74 struct drm_device *dev = crtc->dev; 75 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 76 struct drm_connector *con = &fsl_dev->connector.base; 77 struct drm_display_mode *mode = &crtc->state->mode; 78 unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0; 79 80 index = drm_crtc_index(crtc); 81 clk_set_rate(fsl_dev->pix_clk, mode->clock * 1000); 82 83 /* Configure timings: */ 84 hbp = mode->htotal - mode->hsync_end; 85 hfp = mode->hsync_start - mode->hdisplay; 86 hsw = mode->hsync_end - mode->hsync_start; 87 vbp = mode->vtotal - mode->vsync_end; 88 vfp = mode->vsync_start - mode->vdisplay; 89 vsw = mode->vsync_end - mode->vsync_start; 90 91 /* INV_PXCK as default (most display sample data on rising edge) */ 92 if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) 93 pol |= DCU_SYN_POL_INV_PXCK; 94 95 if (mode->flags & DRM_MODE_FLAG_NHSYNC) 96 pol |= DCU_SYN_POL_INV_HS_LOW; 97 98 if (mode->flags & DRM_MODE_FLAG_NVSYNC) 99 pol |= DCU_SYN_POL_INV_VS_LOW; 100 101 regmap_write(fsl_dev->regmap, DCU_HSYN_PARA, 102 DCU_HSYN_PARA_BP(hbp) | 103 DCU_HSYN_PARA_PW(hsw) | 104 DCU_HSYN_PARA_FP(hfp)); 105 regmap_write(fsl_dev->regmap, DCU_VSYN_PARA, 106 DCU_VSYN_PARA_BP(vbp) | 107 DCU_VSYN_PARA_PW(vsw) | 108 DCU_VSYN_PARA_FP(vfp)); 109 regmap_write(fsl_dev->regmap, DCU_DISP_SIZE, 110 DCU_DISP_SIZE_DELTA_Y(mode->vdisplay) | 111 DCU_DISP_SIZE_DELTA_X(mode->hdisplay)); 112 regmap_write(fsl_dev->regmap, DCU_SYN_POL, pol); 113 regmap_write(fsl_dev->regmap, DCU_BGND, DCU_BGND_R(0) | 114 DCU_BGND_G(0) | DCU_BGND_B(0)); 115 regmap_write(fsl_dev->regmap, DCU_DCU_MODE, 116 DCU_MODE_BLEND_ITER(1) | DCU_MODE_RASTER_EN); 117 regmap_write(fsl_dev->regmap, DCU_THRESHOLD, 118 DCU_THRESHOLD_LS_BF_VS(BF_VS_VAL) | 119 DCU_THRESHOLD_OUT_BUF_HIGH(BUF_MAX_VAL) | 120 DCU_THRESHOLD_OUT_BUF_LOW(BUF_MIN_VAL)); 121 return; 122 } 123 124 static const struct drm_crtc_helper_funcs fsl_dcu_drm_crtc_helper_funcs = { 125 .atomic_flush = fsl_dcu_drm_crtc_atomic_flush, 126 .disable = fsl_dcu_drm_disable_crtc, 127 .enable = fsl_dcu_drm_crtc_enable, 128 .mode_set_nofb = fsl_dcu_drm_crtc_mode_set_nofb, 129 }; 130 131 static const struct drm_crtc_funcs fsl_dcu_drm_crtc_funcs = { 132 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 133 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 134 .destroy = drm_crtc_cleanup, 135 .page_flip = drm_atomic_helper_page_flip, 136 .reset = drm_atomic_helper_crtc_reset, 137 .set_config = drm_atomic_helper_set_config, 138 }; 139 140 int fsl_dcu_drm_crtc_create(struct fsl_dcu_drm_device *fsl_dev) 141 { 142 struct drm_plane *primary; 143 struct drm_crtc *crtc = &fsl_dev->crtc; 144 int ret; 145 146 fsl_dcu_drm_init_planes(fsl_dev->drm); 147 148 primary = fsl_dcu_drm_primary_create_plane(fsl_dev->drm); 149 if (!primary) 150 return -ENOMEM; 151 152 ret = drm_crtc_init_with_planes(fsl_dev->drm, crtc, primary, NULL, 153 &fsl_dcu_drm_crtc_funcs, NULL); 154 if (ret) { 155 primary->funcs->destroy(primary); 156 return ret; 157 } 158 159 drm_crtc_helper_add(crtc, &fsl_dcu_drm_crtc_helper_funcs); 160 161 return 0; 162 } 163