1 /* 2 * Copyright (C) 2011 Samsung Electronics Co.Ltd 3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 * 10 */ 11 12 #include "drmP.h" 13 14 #include "exynos_drm.h" 15 #include "exynos_drm_drv.h" 16 #include "exynos_drm_encoder.h" 17 #include "exynos_drm_fb.h" 18 #include "exynos_drm_gem.h" 19 20 #define to_exynos_plane(x) container_of(x, struct exynos_plane, base) 21 22 struct exynos_plane { 23 struct drm_plane base; 24 struct exynos_drm_overlay overlay; 25 bool enabled; 26 }; 27 28 static const uint32_t formats[] = { 29 DRM_FORMAT_XRGB8888, 30 DRM_FORMAT_ARGB8888, 31 DRM_FORMAT_NV12, 32 DRM_FORMAT_NV12M, 33 DRM_FORMAT_NV12MT, 34 }; 35 36 int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, 37 struct drm_framebuffer *fb, int crtc_x, int crtc_y, 38 unsigned int crtc_w, unsigned int crtc_h, 39 uint32_t src_x, uint32_t src_y, 40 uint32_t src_w, uint32_t src_h) 41 { 42 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 43 struct exynos_drm_overlay *overlay = &exynos_plane->overlay; 44 unsigned int actual_w; 45 unsigned int actual_h; 46 int nr; 47 int i; 48 49 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 50 51 nr = exynos_drm_format_num_buffers(fb->pixel_format); 52 for (i = 0; i < nr; i++) { 53 struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i); 54 55 if (!buffer) { 56 DRM_LOG_KMS("buffer is null\n"); 57 return -EFAULT; 58 } 59 60 overlay->dma_addr[i] = buffer->dma_addr; 61 overlay->vaddr[i] = buffer->kvaddr; 62 63 DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n", 64 i, (unsigned long)overlay->vaddr[i], 65 (unsigned long)overlay->dma_addr[i]); 66 } 67 68 actual_w = min((unsigned)(crtc->mode.hdisplay - crtc_x), crtc_w); 69 actual_h = min((unsigned)(crtc->mode.vdisplay - crtc_y), crtc_h); 70 71 /* set drm framebuffer data. */ 72 overlay->fb_x = src_x; 73 overlay->fb_y = src_y; 74 overlay->fb_width = fb->width; 75 overlay->fb_height = fb->height; 76 overlay->src_width = src_w; 77 overlay->src_height = src_h; 78 overlay->bpp = fb->bits_per_pixel; 79 overlay->pitch = fb->pitches[0]; 80 overlay->pixel_format = fb->pixel_format; 81 82 /* set overlay range to be displayed. */ 83 overlay->crtc_x = crtc_x; 84 overlay->crtc_y = crtc_y; 85 overlay->crtc_width = actual_w; 86 overlay->crtc_height = actual_h; 87 88 /* set drm mode data. */ 89 overlay->mode_width = crtc->mode.hdisplay; 90 overlay->mode_height = crtc->mode.vdisplay; 91 overlay->refresh = crtc->mode.vrefresh; 92 overlay->scan_flag = crtc->mode.flags; 93 94 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)", 95 overlay->crtc_x, overlay->crtc_y, 96 overlay->crtc_width, overlay->crtc_height); 97 98 exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set); 99 100 return 0; 101 } 102 103 void exynos_plane_commit(struct drm_plane *plane) 104 { 105 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 106 struct exynos_drm_overlay *overlay = &exynos_plane->overlay; 107 108 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos, 109 exynos_drm_encoder_plane_commit); 110 } 111 112 void exynos_plane_dpms(struct drm_plane *plane, int mode) 113 { 114 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 115 struct exynos_drm_overlay *overlay = &exynos_plane->overlay; 116 117 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 118 119 if (mode == DRM_MODE_DPMS_ON) { 120 if (exynos_plane->enabled) 121 return; 122 123 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos, 124 exynos_drm_encoder_plane_enable); 125 126 exynos_plane->enabled = true; 127 } else { 128 if (!exynos_plane->enabled) 129 return; 130 131 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos, 132 exynos_drm_encoder_plane_disable); 133 134 exynos_plane->enabled = false; 135 } 136 } 137 138 static int 139 exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, 140 struct drm_framebuffer *fb, int crtc_x, int crtc_y, 141 unsigned int crtc_w, unsigned int crtc_h, 142 uint32_t src_x, uint32_t src_y, 143 uint32_t src_w, uint32_t src_h) 144 { 145 int ret; 146 147 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 148 149 ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y, 150 crtc_w, crtc_h, src_x >> 16, src_y >> 16, 151 src_w >> 16, src_h >> 16); 152 if (ret < 0) 153 return ret; 154 155 plane->crtc = crtc; 156 plane->fb = crtc->fb; 157 158 exynos_plane_commit(plane); 159 exynos_plane_dpms(plane, DRM_MODE_DPMS_ON); 160 161 return 0; 162 } 163 164 static int exynos_disable_plane(struct drm_plane *plane) 165 { 166 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 167 168 exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF); 169 170 return 0; 171 } 172 173 static void exynos_plane_destroy(struct drm_plane *plane) 174 { 175 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 176 177 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 178 179 exynos_disable_plane(plane); 180 drm_plane_cleanup(plane); 181 kfree(exynos_plane); 182 } 183 184 static int exynos_plane_set_property(struct drm_plane *plane, 185 struct drm_property *property, 186 uint64_t val) 187 { 188 struct drm_device *dev = plane->dev; 189 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 190 struct exynos_drm_private *dev_priv = dev->dev_private; 191 192 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 193 194 if (property == dev_priv->plane_zpos_property) { 195 exynos_plane->overlay.zpos = val; 196 return 0; 197 } 198 199 return -EINVAL; 200 } 201 202 static struct drm_plane_funcs exynos_plane_funcs = { 203 .update_plane = exynos_update_plane, 204 .disable_plane = exynos_disable_plane, 205 .destroy = exynos_plane_destroy, 206 .set_property = exynos_plane_set_property, 207 }; 208 209 static void exynos_plane_attach_zpos_property(struct drm_plane *plane) 210 { 211 struct drm_device *dev = plane->dev; 212 struct exynos_drm_private *dev_priv = dev->dev_private; 213 struct drm_property *prop; 214 215 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 216 217 prop = dev_priv->plane_zpos_property; 218 if (!prop) { 219 prop = drm_property_create_range(dev, 0, "zpos", 0, 220 MAX_PLANE - 1); 221 if (!prop) 222 return; 223 224 dev_priv->plane_zpos_property = prop; 225 } 226 227 drm_object_attach_property(&plane->base, prop, 0); 228 } 229 230 struct drm_plane *exynos_plane_init(struct drm_device *dev, 231 unsigned int possible_crtcs, bool priv) 232 { 233 struct exynos_plane *exynos_plane; 234 int err; 235 236 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 237 238 exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL); 239 if (!exynos_plane) { 240 DRM_ERROR("failed to allocate plane\n"); 241 return NULL; 242 } 243 244 err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs, 245 &exynos_plane_funcs, formats, ARRAY_SIZE(formats), 246 priv); 247 if (err) { 248 DRM_ERROR("failed to initialize plane\n"); 249 kfree(exynos_plane); 250 return NULL; 251 } 252 253 if (priv) 254 exynos_plane->overlay.zpos = DEFAULT_ZPOS; 255 else 256 exynos_plane_attach_zpos_property(&exynos_plane->base); 257 258 return &exynos_plane->base; 259 } 260