1 /* 2 * Copyright (C) 2011 Samsung Electronics Co.Ltd 3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 * 10 */ 11 12 #include <drm/drmP.h> 13 14 #include <drm/exynos_drm.h> 15 #include "exynos_drm_drv.h" 16 #include "exynos_drm_encoder.h" 17 #include "exynos_drm_fb.h" 18 #include "exynos_drm_gem.h" 19 20 #define to_exynos_plane(x) container_of(x, struct exynos_plane, base) 21 22 struct exynos_plane { 23 struct drm_plane base; 24 struct exynos_drm_overlay overlay; 25 bool enabled; 26 }; 27 28 static const uint32_t formats[] = { 29 DRM_FORMAT_XRGB8888, 30 DRM_FORMAT_ARGB8888, 31 DRM_FORMAT_NV12, 32 DRM_FORMAT_NV12MT, 33 }; 34 35 /* 36 * This function is to get X or Y size shown via screen. This needs length and 37 * start position of CRTC. 38 * 39 * <--- length ---> 40 * CRTC ---------------- 41 * ^ start ^ end 42 * 43 * There are six cases from a to b. 44 * 45 * <----- SCREEN -----> 46 * 0 last 47 * ----------|------------------|---------- 48 * CRTCs 49 * a ------- 50 * b ------- 51 * c -------------------------- 52 * d -------- 53 * e ------- 54 * f ------- 55 */ 56 static int exynos_plane_get_size(int start, unsigned length, unsigned last) 57 { 58 int end = start + length; 59 int size = 0; 60 61 if (start <= 0) { 62 if (end > 0) 63 size = min_t(unsigned, end, last); 64 } else if (start <= last) { 65 size = min_t(unsigned, last - start, length); 66 } 67 68 return size; 69 } 70 71 int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, 72 struct drm_framebuffer *fb, int crtc_x, int crtc_y, 73 unsigned int crtc_w, unsigned int crtc_h, 74 uint32_t src_x, uint32_t src_y, 75 uint32_t src_w, uint32_t src_h) 76 { 77 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 78 struct exynos_drm_overlay *overlay = &exynos_plane->overlay; 79 unsigned int actual_w; 80 unsigned int actual_h; 81 int nr; 82 int i; 83 84 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 85 86 nr = exynos_drm_fb_get_buf_cnt(fb); 87 for (i = 0; i < nr; i++) { 88 struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i); 89 90 if (!buffer) { 91 DRM_LOG_KMS("buffer is null\n"); 92 return -EFAULT; 93 } 94 95 overlay->dma_addr[i] = buffer->dma_addr; 96 overlay->vaddr[i] = buffer->kvaddr; 97 98 DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n", 99 i, (unsigned long)overlay->vaddr[i], 100 (unsigned long)overlay->dma_addr[i]); 101 } 102 103 actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay); 104 actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay); 105 106 if (crtc_x < 0) { 107 if (actual_w) 108 src_x -= crtc_x; 109 else 110 src_x += crtc_w; 111 crtc_x = 0; 112 } 113 114 if (crtc_y < 0) { 115 if (actual_h) 116 src_y -= crtc_y; 117 else 118 src_y += crtc_h; 119 crtc_y = 0; 120 } 121 122 /* set drm framebuffer data. */ 123 overlay->fb_x = src_x; 124 overlay->fb_y = src_y; 125 overlay->fb_width = fb->width; 126 overlay->fb_height = fb->height; 127 overlay->src_width = src_w; 128 overlay->src_height = src_h; 129 overlay->bpp = fb->bits_per_pixel; 130 overlay->pitch = fb->pitches[0]; 131 overlay->pixel_format = fb->pixel_format; 132 133 /* set overlay range to be displayed. */ 134 overlay->crtc_x = crtc_x; 135 overlay->crtc_y = crtc_y; 136 overlay->crtc_width = actual_w; 137 overlay->crtc_height = actual_h; 138 139 /* set drm mode data. */ 140 overlay->mode_width = crtc->mode.hdisplay; 141 overlay->mode_height = crtc->mode.vdisplay; 142 overlay->refresh = crtc->mode.vrefresh; 143 overlay->scan_flag = crtc->mode.flags; 144 145 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)", 146 overlay->crtc_x, overlay->crtc_y, 147 overlay->crtc_width, overlay->crtc_height); 148 149 exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set); 150 151 return 0; 152 } 153 154 void exynos_plane_commit(struct drm_plane *plane) 155 { 156 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 157 struct exynos_drm_overlay *overlay = &exynos_plane->overlay; 158 159 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos, 160 exynos_drm_encoder_plane_commit); 161 } 162 163 void exynos_plane_dpms(struct drm_plane *plane, int mode) 164 { 165 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 166 struct exynos_drm_overlay *overlay = &exynos_plane->overlay; 167 168 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 169 170 if (mode == DRM_MODE_DPMS_ON) { 171 if (exynos_plane->enabled) 172 return; 173 174 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos, 175 exynos_drm_encoder_plane_enable); 176 177 exynos_plane->enabled = true; 178 } else { 179 if (!exynos_plane->enabled) 180 return; 181 182 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos, 183 exynos_drm_encoder_plane_disable); 184 185 exynos_plane->enabled = false; 186 } 187 } 188 189 static int 190 exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, 191 struct drm_framebuffer *fb, int crtc_x, int crtc_y, 192 unsigned int crtc_w, unsigned int crtc_h, 193 uint32_t src_x, uint32_t src_y, 194 uint32_t src_w, uint32_t src_h) 195 { 196 int ret; 197 198 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 199 200 ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y, 201 crtc_w, crtc_h, src_x >> 16, src_y >> 16, 202 src_w >> 16, src_h >> 16); 203 if (ret < 0) 204 return ret; 205 206 plane->crtc = crtc; 207 plane->fb = crtc->fb; 208 209 exynos_plane_commit(plane); 210 exynos_plane_dpms(plane, DRM_MODE_DPMS_ON); 211 212 return 0; 213 } 214 215 static int exynos_disable_plane(struct drm_plane *plane) 216 { 217 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 218 219 exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF); 220 221 return 0; 222 } 223 224 static void exynos_plane_destroy(struct drm_plane *plane) 225 { 226 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 227 228 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 229 230 exynos_disable_plane(plane); 231 drm_plane_cleanup(plane); 232 kfree(exynos_plane); 233 } 234 235 static int exynos_plane_set_property(struct drm_plane *plane, 236 struct drm_property *property, 237 uint64_t val) 238 { 239 struct drm_device *dev = plane->dev; 240 struct exynos_plane *exynos_plane = to_exynos_plane(plane); 241 struct exynos_drm_private *dev_priv = dev->dev_private; 242 243 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 244 245 if (property == dev_priv->plane_zpos_property) { 246 exynos_plane->overlay.zpos = val; 247 return 0; 248 } 249 250 return -EINVAL; 251 } 252 253 static struct drm_plane_funcs exynos_plane_funcs = { 254 .update_plane = exynos_update_plane, 255 .disable_plane = exynos_disable_plane, 256 .destroy = exynos_plane_destroy, 257 .set_property = exynos_plane_set_property, 258 }; 259 260 static void exynos_plane_attach_zpos_property(struct drm_plane *plane) 261 { 262 struct drm_device *dev = plane->dev; 263 struct exynos_drm_private *dev_priv = dev->dev_private; 264 struct drm_property *prop; 265 266 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 267 268 prop = dev_priv->plane_zpos_property; 269 if (!prop) { 270 prop = drm_property_create_range(dev, 0, "zpos", 0, 271 MAX_PLANE - 1); 272 if (!prop) 273 return; 274 275 dev_priv->plane_zpos_property = prop; 276 } 277 278 drm_object_attach_property(&plane->base, prop, 0); 279 } 280 281 struct drm_plane *exynos_plane_init(struct drm_device *dev, 282 unsigned int possible_crtcs, bool priv) 283 { 284 struct exynos_plane *exynos_plane; 285 int err; 286 287 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 288 289 exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL); 290 if (!exynos_plane) { 291 DRM_ERROR("failed to allocate plane\n"); 292 return NULL; 293 } 294 295 err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs, 296 &exynos_plane_funcs, formats, ARRAY_SIZE(formats), 297 priv); 298 if (err) { 299 DRM_ERROR("failed to initialize plane\n"); 300 kfree(exynos_plane); 301 return NULL; 302 } 303 304 if (priv) 305 exynos_plane->overlay.zpos = DEFAULT_ZPOS; 306 else 307 exynos_plane_attach_zpos_property(&exynos_plane->base); 308 309 return &exynos_plane->base; 310 } 311