12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2f2646380SEunchul Kim /* 3f2646380SEunchul Kim * Copyright (C) 2012 Samsung Electronics Co.Ltd 4f2646380SEunchul Kim * Authors: 5f2646380SEunchul Kim * Eunchul Kim <chulspro.kim@samsung.com> 6f2646380SEunchul Kim * Jinyoung Jeon <jy0.jeon@samsung.com> 7f2646380SEunchul Kim * Sangmin Lee <lsmin.lee@samsung.com> 8f2646380SEunchul Kim */ 92bda34d7SSam Ravnborg 10f2646380SEunchul Kim #include <linux/clk.h> 112bda34d7SSam Ravnborg #include <linux/component.h> 122bda34d7SSam Ravnborg #include <linux/kernel.h> 13aeefb368SSeung-Woo Kim #include <linux/mfd/syscon.h> 148b7d3ec8SMarek Szyprowski #include <linux/of_device.h> 152bda34d7SSam Ravnborg #include <linux/platform_device.h> 162bda34d7SSam Ravnborg #include <linux/pm_runtime.h> 17aeefb368SSeung-Woo Kim #include <linux/regmap.h> 18f2646380SEunchul Kim 19f2646380SEunchul Kim #include <drm/exynos_drm.h> 202bda34d7SSam Ravnborg 21e30655d0SMark Brown #include "exynos_drm_drv.h" 22f2646380SEunchul Kim #include "exynos_drm_ipp.h" 232bda34d7SSam Ravnborg #include "regs-gsc.h" 24f2646380SEunchul Kim 25f2646380SEunchul Kim /* 266fe891f6SEunchul Kim * GSC stands for General SCaler and 27f2646380SEunchul Kim * supports image scaler/rotator and input/output DMA operations. 28f2646380SEunchul Kim * input DMA reads image data from the memory. 29f2646380SEunchul Kim * output DMA writes image data to memory. 30f2646380SEunchul Kim * GSC supports image rotation and image effect functions. 31f2646380SEunchul Kim */ 32f2646380SEunchul Kim 33f2646380SEunchul Kim 348b7d3ec8SMarek Szyprowski #define GSC_MAX_CLOCKS 8 35f2646380SEunchul Kim #define GSC_MAX_SRC 4 36f2646380SEunchul Kim #define GSC_MAX_DST 16 37f2646380SEunchul Kim #define GSC_RESET_TIMEOUT 50 38f2646380SEunchul Kim #define GSC_BUF_STOP 1 39f2646380SEunchul Kim #define GSC_BUF_START 2 40f2646380SEunchul Kim #define GSC_REG_SZ 16 41f2646380SEunchul Kim #define GSC_WIDTH_ITU_709 1280 42f2646380SEunchul Kim #define GSC_SC_UP_MAX_RATIO 65536 43f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_7_8 74898 44f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_6_8 87381 45f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_5_8 104857 46f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_4_8 131072 47f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_3_8 174762 48f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_2_8 262144 49f2646380SEunchul Kim #define GSC_CROP_MAX 8192 50f2646380SEunchul Kim #define GSC_CROP_MIN 32 51f2646380SEunchul Kim #define GSC_SCALE_MAX 4224 52f2646380SEunchul Kim #define GSC_SCALE_MIN 32 53f2646380SEunchul Kim #define GSC_COEF_RATIO 7 54f2646380SEunchul Kim #define GSC_COEF_PHASE 9 55f2646380SEunchul Kim #define GSC_COEF_ATTR 16 56f2646380SEunchul Kim #define GSC_COEF_H_8T 8 57f2646380SEunchul Kim #define GSC_COEF_V_4T 4 58f2646380SEunchul Kim #define GSC_COEF_DEPTH 3 598b7d3ec8SMarek Szyprowski #define GSC_AUTOSUSPEND_DELAY 2000 60f2646380SEunchul Kim 619eae7c3bSFuqian Huang #define get_gsc_context(dev) dev_get_drvdata(dev) 62f2646380SEunchul Kim #define gsc_read(offset) readl(ctx->regs + (offset)) 63f2646380SEunchul Kim #define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset)) 64f2646380SEunchul Kim 65f2646380SEunchul Kim /* 66f2646380SEunchul Kim * A structure of scaler. 67f2646380SEunchul Kim * 68f2646380SEunchul Kim * @range: narrow, wide. 69f2646380SEunchul Kim * @pre_shfactor: pre sclaer shift factor. 70f2646380SEunchul Kim * @pre_hratio: horizontal ratio of the prescaler. 71f2646380SEunchul Kim * @pre_vratio: vertical ratio of the prescaler. 72f2646380SEunchul Kim * @main_hratio: the main scaler's horizontal ratio. 73f2646380SEunchul Kim * @main_vratio: the main scaler's vertical ratio. 74f2646380SEunchul Kim */ 75f2646380SEunchul Kim struct gsc_scaler { 76f2646380SEunchul Kim bool range; 77f2646380SEunchul Kim u32 pre_shfactor; 78f2646380SEunchul Kim u32 pre_hratio; 79f2646380SEunchul Kim u32 pre_vratio; 80f2646380SEunchul Kim unsigned long main_hratio; 81f2646380SEunchul Kim unsigned long main_vratio; 82f2646380SEunchul Kim }; 83f2646380SEunchul Kim 84f2646380SEunchul Kim /* 85f2646380SEunchul Kim * A structure of gsc context. 86f2646380SEunchul Kim * 87f2646380SEunchul Kim * @regs_res: register resources. 88f2646380SEunchul Kim * @regs: memory mapped io registers. 89f2646380SEunchul Kim * @gsc_clk: gsc gate clock. 90f2646380SEunchul Kim * @sc: scaler infomations. 91f2646380SEunchul Kim * @id: gsc id. 92f2646380SEunchul Kim * @irq: irq number. 93f2646380SEunchul Kim * @rotation: supports rotation of src. 94f2646380SEunchul Kim */ 95f2646380SEunchul Kim struct gsc_context { 968b7d3ec8SMarek Szyprowski struct exynos_drm_ipp ipp; 978b7d3ec8SMarek Szyprowski struct drm_device *drm_dev; 988b7d3ec8SMarek Szyprowski struct device *dev; 998b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task; 1008b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_formats *formats; 1018b7d3ec8SMarek Szyprowski unsigned int num_formats; 1028b7d3ec8SMarek Szyprowski 103f2646380SEunchul Kim struct resource *regs_res; 104f2646380SEunchul Kim void __iomem *regs; 1058b7d3ec8SMarek Szyprowski const char **clk_names; 1068b7d3ec8SMarek Szyprowski struct clk *clocks[GSC_MAX_CLOCKS]; 1078b7d3ec8SMarek Szyprowski int num_clocks; 108f2646380SEunchul Kim struct gsc_scaler sc; 109f2646380SEunchul Kim int id; 110f2646380SEunchul Kim int irq; 111f2646380SEunchul Kim bool rotation; 1128b7d3ec8SMarek Szyprowski }; 1138b7d3ec8SMarek Szyprowski 1148b7d3ec8SMarek Szyprowski /** 1158b7d3ec8SMarek Szyprowski * struct gsc_driverdata - per device type driver data for init time. 1168b7d3ec8SMarek Szyprowski * 1178b7d3ec8SMarek Szyprowski * @limits: picture size limits array 1188b7d3ec8SMarek Szyprowski * @clk_names: names of clocks needed by this variant 1198b7d3ec8SMarek Szyprowski * @num_clocks: the number of clocks needed by this variant 1208b7d3ec8SMarek Szyprowski */ 1218b7d3ec8SMarek Szyprowski struct gsc_driverdata { 1228b7d3ec8SMarek Szyprowski const struct drm_exynos_ipp_limit *limits; 1238b7d3ec8SMarek Szyprowski int num_limits; 1248b7d3ec8SMarek Szyprowski const char *clk_names[GSC_MAX_CLOCKS]; 1258b7d3ec8SMarek Szyprowski int num_clocks; 126f2646380SEunchul Kim }; 127f2646380SEunchul Kim 128f2646380SEunchul Kim /* 8-tap Filter Coefficient */ 129f2646380SEunchul Kim static const int h_coef_8t[GSC_COEF_RATIO][GSC_COEF_ATTR][GSC_COEF_H_8T] = { 130f2646380SEunchul Kim { /* Ratio <= 65536 (~8:8) */ 131f2646380SEunchul Kim { 0, 0, 0, 128, 0, 0, 0, 0 }, 132f2646380SEunchul Kim { -1, 2, -6, 127, 7, -2, 1, 0 }, 133f2646380SEunchul Kim { -1, 4, -12, 125, 16, -5, 1, 0 }, 134f2646380SEunchul Kim { -1, 5, -15, 120, 25, -8, 2, 0 }, 135f2646380SEunchul Kim { -1, 6, -18, 114, 35, -10, 3, -1 }, 136f2646380SEunchul Kim { -1, 6, -20, 107, 46, -13, 4, -1 }, 137f2646380SEunchul Kim { -2, 7, -21, 99, 57, -16, 5, -1 }, 138f2646380SEunchul Kim { -1, 6, -20, 89, 68, -18, 5, -1 }, 139f2646380SEunchul Kim { -1, 6, -20, 79, 79, -20, 6, -1 }, 140f2646380SEunchul Kim { -1, 5, -18, 68, 89, -20, 6, -1 }, 141f2646380SEunchul Kim { -1, 5, -16, 57, 99, -21, 7, -2 }, 142f2646380SEunchul Kim { -1, 4, -13, 46, 107, -20, 6, -1 }, 143f2646380SEunchul Kim { -1, 3, -10, 35, 114, -18, 6, -1 }, 144f2646380SEunchul Kim { 0, 2, -8, 25, 120, -15, 5, -1 }, 145f2646380SEunchul Kim { 0, 1, -5, 16, 125, -12, 4, -1 }, 146f2646380SEunchul Kim { 0, 1, -2, 7, 127, -6, 2, -1 } 147f2646380SEunchul Kim }, { /* 65536 < Ratio <= 74898 (~8:7) */ 148f2646380SEunchul Kim { 3, -8, 14, 111, 13, -8, 3, 0 }, 149f2646380SEunchul Kim { 2, -6, 7, 112, 21, -10, 3, -1 }, 150f2646380SEunchul Kim { 2, -4, 1, 110, 28, -12, 4, -1 }, 151f2646380SEunchul Kim { 1, -2, -3, 106, 36, -13, 4, -1 }, 152f2646380SEunchul Kim { 1, -1, -7, 103, 44, -15, 4, -1 }, 153f2646380SEunchul Kim { 1, 1, -11, 97, 53, -16, 4, -1 }, 154f2646380SEunchul Kim { 0, 2, -13, 91, 61, -16, 4, -1 }, 155f2646380SEunchul Kim { 0, 3, -15, 85, 69, -17, 4, -1 }, 156f2646380SEunchul Kim { 0, 3, -16, 77, 77, -16, 3, 0 }, 157f2646380SEunchul Kim { -1, 4, -17, 69, 85, -15, 3, 0 }, 158f2646380SEunchul Kim { -1, 4, -16, 61, 91, -13, 2, 0 }, 159f2646380SEunchul Kim { -1, 4, -16, 53, 97, -11, 1, 1 }, 160f2646380SEunchul Kim { -1, 4, -15, 44, 103, -7, -1, 1 }, 161f2646380SEunchul Kim { -1, 4, -13, 36, 106, -3, -2, 1 }, 162f2646380SEunchul Kim { -1, 4, -12, 28, 110, 1, -4, 2 }, 163f2646380SEunchul Kim { -1, 3, -10, 21, 112, 7, -6, 2 } 164f2646380SEunchul Kim }, { /* 74898 < Ratio <= 87381 (~8:6) */ 165f2646380SEunchul Kim { 2, -11, 25, 96, 25, -11, 2, 0 }, 166f2646380SEunchul Kim { 2, -10, 19, 96, 31, -12, 2, 0 }, 167f2646380SEunchul Kim { 2, -9, 14, 94, 37, -12, 2, 0 }, 168f2646380SEunchul Kim { 2, -8, 10, 92, 43, -12, 1, 0 }, 169f2646380SEunchul Kim { 2, -7, 5, 90, 49, -12, 1, 0 }, 170f2646380SEunchul Kim { 2, -5, 1, 86, 55, -12, 0, 1 }, 171f2646380SEunchul Kim { 2, -4, -2, 82, 61, -11, -1, 1 }, 172f2646380SEunchul Kim { 1, -3, -5, 77, 67, -9, -1, 1 }, 173f2646380SEunchul Kim { 1, -2, -7, 72, 72, -7, -2, 1 }, 174f2646380SEunchul Kim { 1, -1, -9, 67, 77, -5, -3, 1 }, 175f2646380SEunchul Kim { 1, -1, -11, 61, 82, -2, -4, 2 }, 176f2646380SEunchul Kim { 1, 0, -12, 55, 86, 1, -5, 2 }, 177f2646380SEunchul Kim { 0, 1, -12, 49, 90, 5, -7, 2 }, 178f2646380SEunchul Kim { 0, 1, -12, 43, 92, 10, -8, 2 }, 179f2646380SEunchul Kim { 0, 2, -12, 37, 94, 14, -9, 2 }, 180f2646380SEunchul Kim { 0, 2, -12, 31, 96, 19, -10, 2 } 181f2646380SEunchul Kim }, { /* 87381 < Ratio <= 104857 (~8:5) */ 182f2646380SEunchul Kim { -1, -8, 33, 80, 33, -8, -1, 0 }, 183f2646380SEunchul Kim { -1, -8, 28, 80, 37, -7, -2, 1 }, 184f2646380SEunchul Kim { 0, -8, 24, 79, 41, -7, -2, 1 }, 185f2646380SEunchul Kim { 0, -8, 20, 78, 46, -6, -3, 1 }, 186f2646380SEunchul Kim { 0, -8, 16, 76, 50, -4, -3, 1 }, 187f2646380SEunchul Kim { 0, -7, 13, 74, 54, -3, -4, 1 }, 188f2646380SEunchul Kim { 1, -7, 10, 71, 58, -1, -5, 1 }, 189f2646380SEunchul Kim { 1, -6, 6, 68, 62, 1, -5, 1 }, 190f2646380SEunchul Kim { 1, -6, 4, 65, 65, 4, -6, 1 }, 191f2646380SEunchul Kim { 1, -5, 1, 62, 68, 6, -6, 1 }, 192f2646380SEunchul Kim { 1, -5, -1, 58, 71, 10, -7, 1 }, 193f2646380SEunchul Kim { 1, -4, -3, 54, 74, 13, -7, 0 }, 194f2646380SEunchul Kim { 1, -3, -4, 50, 76, 16, -8, 0 }, 195f2646380SEunchul Kim { 1, -3, -6, 46, 78, 20, -8, 0 }, 196f2646380SEunchul Kim { 1, -2, -7, 41, 79, 24, -8, 0 }, 197f2646380SEunchul Kim { 1, -2, -7, 37, 80, 28, -8, -1 } 198f2646380SEunchul Kim }, { /* 104857 < Ratio <= 131072 (~8:4) */ 199f2646380SEunchul Kim { -3, 0, 35, 64, 35, 0, -3, 0 }, 200f2646380SEunchul Kim { -3, -1, 32, 64, 38, 1, -3, 0 }, 201f2646380SEunchul Kim { -2, -2, 29, 63, 41, 2, -3, 0 }, 202f2646380SEunchul Kim { -2, -3, 27, 63, 43, 4, -4, 0 }, 203f2646380SEunchul Kim { -2, -3, 24, 61, 46, 6, -4, 0 }, 204f2646380SEunchul Kim { -2, -3, 21, 60, 49, 7, -4, 0 }, 205f2646380SEunchul Kim { -1, -4, 19, 59, 51, 9, -4, -1 }, 206f2646380SEunchul Kim { -1, -4, 16, 57, 53, 12, -4, -1 }, 207f2646380SEunchul Kim { -1, -4, 14, 55, 55, 14, -4, -1 }, 208f2646380SEunchul Kim { -1, -4, 12, 53, 57, 16, -4, -1 }, 209f2646380SEunchul Kim { -1, -4, 9, 51, 59, 19, -4, -1 }, 210f2646380SEunchul Kim { 0, -4, 7, 49, 60, 21, -3, -2 }, 211f2646380SEunchul Kim { 0, -4, 6, 46, 61, 24, -3, -2 }, 212f2646380SEunchul Kim { 0, -4, 4, 43, 63, 27, -3, -2 }, 213f2646380SEunchul Kim { 0, -3, 2, 41, 63, 29, -2, -2 }, 214f2646380SEunchul Kim { 0, -3, 1, 38, 64, 32, -1, -3 } 215f2646380SEunchul Kim }, { /* 131072 < Ratio <= 174762 (~8:3) */ 216f2646380SEunchul Kim { -1, 8, 33, 48, 33, 8, -1, 0 }, 217f2646380SEunchul Kim { -1, 7, 31, 49, 35, 9, -1, -1 }, 218f2646380SEunchul Kim { -1, 6, 30, 49, 36, 10, -1, -1 }, 219f2646380SEunchul Kim { -1, 5, 28, 48, 38, 12, -1, -1 }, 220f2646380SEunchul Kim { -1, 4, 26, 48, 39, 13, 0, -1 }, 221f2646380SEunchul Kim { -1, 3, 24, 47, 41, 15, 0, -1 }, 222f2646380SEunchul Kim { -1, 2, 23, 47, 42, 16, 0, -1 }, 223f2646380SEunchul Kim { -1, 2, 21, 45, 43, 18, 1, -1 }, 224f2646380SEunchul Kim { -1, 1, 19, 45, 45, 19, 1, -1 }, 225f2646380SEunchul Kim { -1, 1, 18, 43, 45, 21, 2, -1 }, 226f2646380SEunchul Kim { -1, 0, 16, 42, 47, 23, 2, -1 }, 227f2646380SEunchul Kim { -1, 0, 15, 41, 47, 24, 3, -1 }, 228f2646380SEunchul Kim { -1, 0, 13, 39, 48, 26, 4, -1 }, 229f2646380SEunchul Kim { -1, -1, 12, 38, 48, 28, 5, -1 }, 230f2646380SEunchul Kim { -1, -1, 10, 36, 49, 30, 6, -1 }, 231f2646380SEunchul Kim { -1, -1, 9, 35, 49, 31, 7, -1 } 232f2646380SEunchul Kim }, { /* 174762 < Ratio <= 262144 (~8:2) */ 233f2646380SEunchul Kim { 2, 13, 30, 38, 30, 13, 2, 0 }, 234f2646380SEunchul Kim { 2, 12, 29, 38, 30, 14, 3, 0 }, 235f2646380SEunchul Kim { 2, 11, 28, 38, 31, 15, 3, 0 }, 236f2646380SEunchul Kim { 2, 10, 26, 38, 32, 16, 4, 0 }, 237f2646380SEunchul Kim { 1, 10, 26, 37, 33, 17, 4, 0 }, 238f2646380SEunchul Kim { 1, 9, 24, 37, 34, 18, 5, 0 }, 239f2646380SEunchul Kim { 1, 8, 24, 37, 34, 19, 5, 0 }, 240f2646380SEunchul Kim { 1, 7, 22, 36, 35, 20, 6, 1 }, 241f2646380SEunchul Kim { 1, 6, 21, 36, 36, 21, 6, 1 }, 242f2646380SEunchul Kim { 1, 6, 20, 35, 36, 22, 7, 1 }, 243f2646380SEunchul Kim { 0, 5, 19, 34, 37, 24, 8, 1 }, 244f2646380SEunchul Kim { 0, 5, 18, 34, 37, 24, 9, 1 }, 245f2646380SEunchul Kim { 0, 4, 17, 33, 37, 26, 10, 1 }, 246f2646380SEunchul Kim { 0, 4, 16, 32, 38, 26, 10, 2 }, 247f2646380SEunchul Kim { 0, 3, 15, 31, 38, 28, 11, 2 }, 248f2646380SEunchul Kim { 0, 3, 14, 30, 38, 29, 12, 2 } 249f2646380SEunchul Kim } 250f2646380SEunchul Kim }; 251f2646380SEunchul Kim 252f2646380SEunchul Kim /* 4-tap Filter Coefficient */ 253f2646380SEunchul Kim static const int v_coef_4t[GSC_COEF_RATIO][GSC_COEF_ATTR][GSC_COEF_V_4T] = { 254f2646380SEunchul Kim { /* Ratio <= 65536 (~8:8) */ 255f2646380SEunchul Kim { 0, 128, 0, 0 }, 256f2646380SEunchul Kim { -4, 127, 5, 0 }, 257f2646380SEunchul Kim { -6, 124, 11, -1 }, 258f2646380SEunchul Kim { -8, 118, 19, -1 }, 259f2646380SEunchul Kim { -8, 111, 27, -2 }, 260f2646380SEunchul Kim { -8, 102, 37, -3 }, 261f2646380SEunchul Kim { -8, 92, 48, -4 }, 262f2646380SEunchul Kim { -7, 81, 59, -5 }, 263f2646380SEunchul Kim { -6, 70, 70, -6 }, 264f2646380SEunchul Kim { -5, 59, 81, -7 }, 265f2646380SEunchul Kim { -4, 48, 92, -8 }, 266f2646380SEunchul Kim { -3, 37, 102, -8 }, 267f2646380SEunchul Kim { -2, 27, 111, -8 }, 268f2646380SEunchul Kim { -1, 19, 118, -8 }, 269f2646380SEunchul Kim { -1, 11, 124, -6 }, 270f2646380SEunchul Kim { 0, 5, 127, -4 } 271f2646380SEunchul Kim }, { /* 65536 < Ratio <= 74898 (~8:7) */ 272f2646380SEunchul Kim { 8, 112, 8, 0 }, 273f2646380SEunchul Kim { 4, 111, 14, -1 }, 274f2646380SEunchul Kim { 1, 109, 20, -2 }, 275f2646380SEunchul Kim { -2, 105, 27, -2 }, 276f2646380SEunchul Kim { -3, 100, 34, -3 }, 277f2646380SEunchul Kim { -5, 93, 43, -3 }, 278f2646380SEunchul Kim { -5, 86, 51, -4 }, 279f2646380SEunchul Kim { -5, 77, 60, -4 }, 280f2646380SEunchul Kim { -5, 69, 69, -5 }, 281f2646380SEunchul Kim { -4, 60, 77, -5 }, 282f2646380SEunchul Kim { -4, 51, 86, -5 }, 283f2646380SEunchul Kim { -3, 43, 93, -5 }, 284f2646380SEunchul Kim { -3, 34, 100, -3 }, 285f2646380SEunchul Kim { -2, 27, 105, -2 }, 286f2646380SEunchul Kim { -2, 20, 109, 1 }, 287f2646380SEunchul Kim { -1, 14, 111, 4 } 288f2646380SEunchul Kim }, { /* 74898 < Ratio <= 87381 (~8:6) */ 289f2646380SEunchul Kim { 16, 96, 16, 0 }, 290f2646380SEunchul Kim { 12, 97, 21, -2 }, 291f2646380SEunchul Kim { 8, 96, 26, -2 }, 292f2646380SEunchul Kim { 5, 93, 32, -2 }, 293f2646380SEunchul Kim { 2, 89, 39, -2 }, 294f2646380SEunchul Kim { 0, 84, 46, -2 }, 295f2646380SEunchul Kim { -1, 79, 53, -3 }, 296f2646380SEunchul Kim { -2, 73, 59, -2 }, 297f2646380SEunchul Kim { -2, 66, 66, -2 }, 298f2646380SEunchul Kim { -2, 59, 73, -2 }, 299f2646380SEunchul Kim { -3, 53, 79, -1 }, 300f2646380SEunchul Kim { -2, 46, 84, 0 }, 301f2646380SEunchul Kim { -2, 39, 89, 2 }, 302f2646380SEunchul Kim { -2, 32, 93, 5 }, 303f2646380SEunchul Kim { -2, 26, 96, 8 }, 304f2646380SEunchul Kim { -2, 21, 97, 12 } 305f2646380SEunchul Kim }, { /* 87381 < Ratio <= 104857 (~8:5) */ 306f2646380SEunchul Kim { 22, 84, 22, 0 }, 307f2646380SEunchul Kim { 18, 85, 26, -1 }, 308f2646380SEunchul Kim { 14, 84, 31, -1 }, 309f2646380SEunchul Kim { 11, 82, 36, -1 }, 310f2646380SEunchul Kim { 8, 79, 42, -1 }, 311f2646380SEunchul Kim { 6, 76, 47, -1 }, 312f2646380SEunchul Kim { 4, 72, 52, 0 }, 313f2646380SEunchul Kim { 2, 68, 58, 0 }, 314f2646380SEunchul Kim { 1, 63, 63, 1 }, 315f2646380SEunchul Kim { 0, 58, 68, 2 }, 316f2646380SEunchul Kim { 0, 52, 72, 4 }, 317f2646380SEunchul Kim { -1, 47, 76, 6 }, 318f2646380SEunchul Kim { -1, 42, 79, 8 }, 319f2646380SEunchul Kim { -1, 36, 82, 11 }, 320f2646380SEunchul Kim { -1, 31, 84, 14 }, 321f2646380SEunchul Kim { -1, 26, 85, 18 } 322f2646380SEunchul Kim }, { /* 104857 < Ratio <= 131072 (~8:4) */ 323f2646380SEunchul Kim { 26, 76, 26, 0 }, 324f2646380SEunchul Kim { 22, 76, 30, 0 }, 325f2646380SEunchul Kim { 19, 75, 34, 0 }, 326f2646380SEunchul Kim { 16, 73, 38, 1 }, 327f2646380SEunchul Kim { 13, 71, 43, 1 }, 328f2646380SEunchul Kim { 10, 69, 47, 2 }, 329f2646380SEunchul Kim { 8, 66, 51, 3 }, 330f2646380SEunchul Kim { 6, 63, 55, 4 }, 331f2646380SEunchul Kim { 5, 59, 59, 5 }, 332f2646380SEunchul Kim { 4, 55, 63, 6 }, 333f2646380SEunchul Kim { 3, 51, 66, 8 }, 334f2646380SEunchul Kim { 2, 47, 69, 10 }, 335f2646380SEunchul Kim { 1, 43, 71, 13 }, 336f2646380SEunchul Kim { 1, 38, 73, 16 }, 337f2646380SEunchul Kim { 0, 34, 75, 19 }, 338f2646380SEunchul Kim { 0, 30, 76, 22 } 339f2646380SEunchul Kim }, { /* 131072 < Ratio <= 174762 (~8:3) */ 340f2646380SEunchul Kim { 29, 70, 29, 0 }, 341f2646380SEunchul Kim { 26, 68, 32, 2 }, 342f2646380SEunchul Kim { 23, 67, 36, 2 }, 343f2646380SEunchul Kim { 20, 66, 39, 3 }, 344f2646380SEunchul Kim { 17, 65, 43, 3 }, 345f2646380SEunchul Kim { 15, 63, 46, 4 }, 346f2646380SEunchul Kim { 12, 61, 50, 5 }, 347f2646380SEunchul Kim { 10, 58, 53, 7 }, 348f2646380SEunchul Kim { 8, 56, 56, 8 }, 349f2646380SEunchul Kim { 7, 53, 58, 10 }, 350f2646380SEunchul Kim { 5, 50, 61, 12 }, 351f2646380SEunchul Kim { 4, 46, 63, 15 }, 352f2646380SEunchul Kim { 3, 43, 65, 17 }, 353f2646380SEunchul Kim { 3, 39, 66, 20 }, 354f2646380SEunchul Kim { 2, 36, 67, 23 }, 355f2646380SEunchul Kim { 2, 32, 68, 26 } 356f2646380SEunchul Kim }, { /* 174762 < Ratio <= 262144 (~8:2) */ 357f2646380SEunchul Kim { 32, 64, 32, 0 }, 358f2646380SEunchul Kim { 28, 63, 34, 3 }, 359f2646380SEunchul Kim { 25, 62, 37, 4 }, 360f2646380SEunchul Kim { 22, 62, 40, 4 }, 361f2646380SEunchul Kim { 19, 61, 43, 5 }, 362f2646380SEunchul Kim { 17, 59, 46, 6 }, 363f2646380SEunchul Kim { 15, 58, 48, 7 }, 364f2646380SEunchul Kim { 13, 55, 51, 9 }, 365f2646380SEunchul Kim { 11, 53, 53, 11 }, 366f2646380SEunchul Kim { 9, 51, 55, 13 }, 367f2646380SEunchul Kim { 7, 48, 58, 15 }, 368f2646380SEunchul Kim { 6, 46, 59, 17 }, 369f2646380SEunchul Kim { 5, 43, 61, 19 }, 370f2646380SEunchul Kim { 4, 40, 62, 22 }, 371f2646380SEunchul Kim { 4, 37, 62, 25 }, 372f2646380SEunchul Kim { 3, 34, 63, 28 } 373f2646380SEunchul Kim } 374f2646380SEunchul Kim }; 375f2646380SEunchul Kim 376f2646380SEunchul Kim static int gsc_sw_reset(struct gsc_context *ctx) 377f2646380SEunchul Kim { 378f2646380SEunchul Kim u32 cfg; 379f2646380SEunchul Kim int count = GSC_RESET_TIMEOUT; 380f2646380SEunchul Kim 381f2646380SEunchul Kim /* s/w reset */ 382f2646380SEunchul Kim cfg = (GSC_SW_RESET_SRESET); 383f2646380SEunchul Kim gsc_write(cfg, GSC_SW_RESET); 384f2646380SEunchul Kim 385f2646380SEunchul Kim /* wait s/w reset complete */ 386f2646380SEunchul Kim while (count--) { 387f2646380SEunchul Kim cfg = gsc_read(GSC_SW_RESET); 388f2646380SEunchul Kim if (!cfg) 389f2646380SEunchul Kim break; 390f2646380SEunchul Kim usleep_range(1000, 2000); 391f2646380SEunchul Kim } 392f2646380SEunchul Kim 393f2646380SEunchul Kim if (cfg) { 3946f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to reset gsc h/w.\n"); 395f2646380SEunchul Kim return -EBUSY; 396f2646380SEunchul Kim } 397f2646380SEunchul Kim 398f2646380SEunchul Kim /* reset sequence */ 399f2646380SEunchul Kim cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); 400f2646380SEunchul Kim cfg |= (GSC_IN_BASE_ADDR_MASK | 401f2646380SEunchul Kim GSC_IN_BASE_ADDR_PINGPONG(0)); 402f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_Y_MASK); 403f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CB_MASK); 404f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CR_MASK); 405f2646380SEunchul Kim 406f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); 407f2646380SEunchul Kim cfg |= (GSC_OUT_BASE_ADDR_MASK | 408f2646380SEunchul Kim GSC_OUT_BASE_ADDR_PINGPONG(0)); 409f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_Y_MASK); 410f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CB_MASK); 411f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CR_MASK); 412f2646380SEunchul Kim 413f2646380SEunchul Kim return 0; 414f2646380SEunchul Kim } 415f2646380SEunchul Kim 416f2646380SEunchul Kim static void gsc_handle_irq(struct gsc_context *ctx, bool enable, 417f2646380SEunchul Kim bool overflow, bool done) 418f2646380SEunchul Kim { 419f2646380SEunchul Kim u32 cfg; 420f2646380SEunchul Kim 4216be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "enable[%d]overflow[%d]level[%d]\n", 422f2646380SEunchul Kim enable, overflow, done); 423f2646380SEunchul Kim 424f2646380SEunchul Kim cfg = gsc_read(GSC_IRQ); 425f2646380SEunchul Kim cfg |= (GSC_IRQ_OR_MASK | GSC_IRQ_FRMDONE_MASK); 426f2646380SEunchul Kim 427f2646380SEunchul Kim if (enable) 428f2646380SEunchul Kim cfg |= GSC_IRQ_ENABLE; 429f2646380SEunchul Kim else 430f2646380SEunchul Kim cfg &= ~GSC_IRQ_ENABLE; 431f2646380SEunchul Kim 432f2646380SEunchul Kim if (overflow) 433f2646380SEunchul Kim cfg &= ~GSC_IRQ_OR_MASK; 434f2646380SEunchul Kim else 435f2646380SEunchul Kim cfg |= GSC_IRQ_OR_MASK; 436f2646380SEunchul Kim 437f2646380SEunchul Kim if (done) 438f2646380SEunchul Kim cfg &= ~GSC_IRQ_FRMDONE_MASK; 439f2646380SEunchul Kim else 440f2646380SEunchul Kim cfg |= GSC_IRQ_FRMDONE_MASK; 441f2646380SEunchul Kim 442f2646380SEunchul Kim gsc_write(cfg, GSC_IRQ); 443f2646380SEunchul Kim } 444f2646380SEunchul Kim 445f2646380SEunchul Kim 446d25a40a7SMarek Szyprowski static void gsc_src_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled) 447f2646380SEunchul Kim { 448f2646380SEunchul Kim u32 cfg; 449f2646380SEunchul Kim 4506be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt); 451f2646380SEunchul Kim 452f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON); 453f2646380SEunchul Kim cfg &= ~(GSC_IN_RGB_TYPE_MASK | GSC_IN_YUV422_1P_ORDER_MASK | 454f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_MASK | GSC_IN_FORMAT_MASK | 455f2646380SEunchul Kim GSC_IN_TILE_TYPE_MASK | GSC_IN_TILE_MODE | 456f2646380SEunchul Kim GSC_IN_CHROM_STRIDE_SEL_MASK | GSC_IN_RB_SWAP_MASK); 457f2646380SEunchul Kim 458f2646380SEunchul Kim switch (fmt) { 459f2646380SEunchul Kim case DRM_FORMAT_RGB565: 460f2646380SEunchul Kim cfg |= GSC_IN_RGB565; 461f2646380SEunchul Kim break; 462f2646380SEunchul Kim case DRM_FORMAT_XRGB8888: 4638b7d3ec8SMarek Szyprowski case DRM_FORMAT_ARGB8888: 464f2646380SEunchul Kim cfg |= GSC_IN_XRGB8888; 465f2646380SEunchul Kim break; 466f2646380SEunchul Kim case DRM_FORMAT_BGRX8888: 467f2646380SEunchul Kim cfg |= (GSC_IN_XRGB8888 | GSC_IN_RB_SWAP); 468f2646380SEunchul Kim break; 469f2646380SEunchul Kim case DRM_FORMAT_YUYV: 470f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P | 471f2646380SEunchul Kim GSC_IN_YUV422_1P_ORDER_LSB_Y | 472f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CBCR); 473f2646380SEunchul Kim break; 474f2646380SEunchul Kim case DRM_FORMAT_YVYU: 475f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P | 476f2646380SEunchul Kim GSC_IN_YUV422_1P_ORDER_LSB_Y | 477f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CRCB); 478f2646380SEunchul Kim break; 479f2646380SEunchul Kim case DRM_FORMAT_UYVY: 480f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P | 481f2646380SEunchul Kim GSC_IN_YUV422_1P_OEDER_LSB_C | 482f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CBCR); 483f2646380SEunchul Kim break; 484f2646380SEunchul Kim case DRM_FORMAT_VYUY: 485f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P | 486f2646380SEunchul Kim GSC_IN_YUV422_1P_OEDER_LSB_C | 487f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CRCB); 488f2646380SEunchul Kim break; 489f2646380SEunchul Kim case DRM_FORMAT_NV21: 490dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV420_2P); 491dd209ef8SMarek Szyprowski break; 492f2646380SEunchul Kim case DRM_FORMAT_NV61: 493dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV422_2P); 494f2646380SEunchul Kim break; 495f2646380SEunchul Kim case DRM_FORMAT_YUV422: 496f2646380SEunchul Kim cfg |= GSC_IN_YUV422_3P; 497f2646380SEunchul Kim break; 498f2646380SEunchul Kim case DRM_FORMAT_YUV420: 499dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV420_3P); 500dd209ef8SMarek Szyprowski break; 501f2646380SEunchul Kim case DRM_FORMAT_YVU420: 502dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV420_3P); 503f2646380SEunchul Kim break; 504f2646380SEunchul Kim case DRM_FORMAT_NV12: 505dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV420_2P); 506dd209ef8SMarek Szyprowski break; 507f2646380SEunchul Kim case DRM_FORMAT_NV16: 508dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV422_2P); 509f2646380SEunchul Kim break; 510f2646380SEunchul Kim } 511f2646380SEunchul Kim 512d25a40a7SMarek Szyprowski if (tiled) 513d25a40a7SMarek Szyprowski cfg |= (GSC_IN_TILE_C_16x8 | GSC_IN_TILE_MODE); 514d25a40a7SMarek Szyprowski 515f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON); 516f2646380SEunchul Kim } 517f2646380SEunchul Kim 5188b7d3ec8SMarek Szyprowski static void gsc_src_set_transf(struct gsc_context *ctx, unsigned int rotation) 519f2646380SEunchul Kim { 5208b7d3ec8SMarek Szyprowski unsigned int degree = rotation & DRM_MODE_ROTATE_MASK; 521f2646380SEunchul Kim u32 cfg; 522f2646380SEunchul Kim 523f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON); 524f2646380SEunchul Kim cfg &= ~GSC_IN_ROT_MASK; 525f2646380SEunchul Kim 526f2646380SEunchul Kim switch (degree) { 5278b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_0: 5288b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X) 5294cc11a5fSMarek Szyprowski cfg |= GSC_IN_ROT_XFLIP; 5304cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y) 531f2646380SEunchul Kim cfg |= GSC_IN_ROT_YFLIP; 532f2646380SEunchul Kim break; 5338b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_90: 534f2646380SEunchul Kim cfg |= GSC_IN_ROT_90; 5358b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X) 5364cc11a5fSMarek Szyprowski cfg |= GSC_IN_ROT_XFLIP; 5374cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y) 5388b7d3ec8SMarek Szyprowski cfg |= GSC_IN_ROT_YFLIP; 539f2646380SEunchul Kim break; 5408b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_180: 541f2646380SEunchul Kim cfg |= GSC_IN_ROT_180; 5428b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X) 5434cc11a5fSMarek Szyprowski cfg &= ~GSC_IN_ROT_XFLIP; 5444cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y) 5455149705dSHyungwon Hwang cfg &= ~GSC_IN_ROT_YFLIP; 546f2646380SEunchul Kim break; 5478b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_270: 548f2646380SEunchul Kim cfg |= GSC_IN_ROT_270; 5498b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X) 5504cc11a5fSMarek Szyprowski cfg &= ~GSC_IN_ROT_XFLIP; 5514cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y) 5525149705dSHyungwon Hwang cfg &= ~GSC_IN_ROT_YFLIP; 553f2646380SEunchul Kim break; 554f2646380SEunchul Kim } 555f2646380SEunchul Kim 556f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON); 557f2646380SEunchul Kim 558988a4731SHyungwon Hwang ctx->rotation = (cfg & GSC_IN_ROT_90) ? 1 : 0; 559f2646380SEunchul Kim } 560f2646380SEunchul Kim 5618b7d3ec8SMarek Szyprowski static void gsc_src_set_size(struct gsc_context *ctx, 5628b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_buffer *buf) 563f2646380SEunchul Kim { 564f2646380SEunchul Kim struct gsc_scaler *sc = &ctx->sc; 565f2646380SEunchul Kim u32 cfg; 566f2646380SEunchul Kim 567f2646380SEunchul Kim /* pixel offset */ 5688b7d3ec8SMarek Szyprowski cfg = (GSC_SRCIMG_OFFSET_X(buf->rect.x) | 5698b7d3ec8SMarek Szyprowski GSC_SRCIMG_OFFSET_Y(buf->rect.y)); 570f2646380SEunchul Kim gsc_write(cfg, GSC_SRCIMG_OFFSET); 571f2646380SEunchul Kim 572f2646380SEunchul Kim /* cropped size */ 5738b7d3ec8SMarek Szyprowski cfg = (GSC_CROPPED_WIDTH(buf->rect.w) | 5748b7d3ec8SMarek Szyprowski GSC_CROPPED_HEIGHT(buf->rect.h)); 575f2646380SEunchul Kim gsc_write(cfg, GSC_CROPPED_SIZE); 576f2646380SEunchul Kim 577f2646380SEunchul Kim /* original size */ 578f2646380SEunchul Kim cfg = gsc_read(GSC_SRCIMG_SIZE); 579f2646380SEunchul Kim cfg &= ~(GSC_SRCIMG_HEIGHT_MASK | 580f2646380SEunchul Kim GSC_SRCIMG_WIDTH_MASK); 581f2646380SEunchul Kim 5824958a1c0SMarek Szyprowski cfg |= (GSC_SRCIMG_WIDTH(buf->buf.pitch[0] / buf->format->cpp[0]) | 5838b7d3ec8SMarek Szyprowski GSC_SRCIMG_HEIGHT(buf->buf.height)); 584f2646380SEunchul Kim 585f2646380SEunchul Kim gsc_write(cfg, GSC_SRCIMG_SIZE); 586f2646380SEunchul Kim 587f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON); 588f2646380SEunchul Kim cfg &= ~GSC_IN_RGB_TYPE_MASK; 589f2646380SEunchul Kim 5908b7d3ec8SMarek Szyprowski if (buf->rect.w >= GSC_WIDTH_ITU_709) 591f2646380SEunchul Kim if (sc->range) 592f2646380SEunchul Kim cfg |= GSC_IN_RGB_HD_WIDE; 593f2646380SEunchul Kim else 594f2646380SEunchul Kim cfg |= GSC_IN_RGB_HD_NARROW; 595f2646380SEunchul Kim else 596f2646380SEunchul Kim if (sc->range) 597f2646380SEunchul Kim cfg |= GSC_IN_RGB_SD_WIDE; 598f2646380SEunchul Kim else 599f2646380SEunchul Kim cfg |= GSC_IN_RGB_SD_NARROW; 600f2646380SEunchul Kim 601f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON); 602f2646380SEunchul Kim } 603f2646380SEunchul Kim 6048b7d3ec8SMarek Szyprowski static void gsc_src_set_buf_seq(struct gsc_context *ctx, u32 buf_id, 6058b7d3ec8SMarek Szyprowski bool enqueue) 606f2646380SEunchul Kim { 6078b7d3ec8SMarek Szyprowski bool masked = !enqueue; 608f2646380SEunchul Kim u32 cfg; 609f2646380SEunchul Kim u32 mask = 0x00000001 << buf_id; 610f2646380SEunchul Kim 611f2646380SEunchul Kim /* mask register set */ 612f2646380SEunchul Kim cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); 613f2646380SEunchul Kim 614f2646380SEunchul Kim /* sequence id */ 615f2646380SEunchul Kim cfg &= ~mask; 616f2646380SEunchul Kim cfg |= masked << buf_id; 617f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_Y_MASK); 618f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CB_MASK); 619f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CR_MASK); 620f2646380SEunchul Kim } 621f2646380SEunchul Kim 6228b7d3ec8SMarek Szyprowski static void gsc_src_set_addr(struct gsc_context *ctx, u32 buf_id, 6238b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_buffer *buf) 624f2646380SEunchul Kim { 625f2646380SEunchul Kim /* address register set */ 6268b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[0], GSC_IN_BASE_ADDR_Y(buf_id)); 6278b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[1], GSC_IN_BASE_ADDR_CB(buf_id)); 6288b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[2], GSC_IN_BASE_ADDR_CR(buf_id)); 6298b7d3ec8SMarek Szyprowski 6308b7d3ec8SMarek Szyprowski gsc_src_set_buf_seq(ctx, buf_id, true); 631f2646380SEunchul Kim } 632f2646380SEunchul Kim 633d25a40a7SMarek Szyprowski static void gsc_dst_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled) 634f2646380SEunchul Kim { 635f2646380SEunchul Kim u32 cfg; 636f2646380SEunchul Kim 6376be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt); 638f2646380SEunchul Kim 639f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_CON); 640f2646380SEunchul Kim cfg &= ~(GSC_OUT_RGB_TYPE_MASK | GSC_OUT_YUV422_1P_ORDER_MASK | 641f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_MASK | GSC_OUT_FORMAT_MASK | 642f2646380SEunchul Kim GSC_OUT_CHROM_STRIDE_SEL_MASK | GSC_OUT_RB_SWAP_MASK | 643f2646380SEunchul Kim GSC_OUT_GLOBAL_ALPHA_MASK); 644f2646380SEunchul Kim 645f2646380SEunchul Kim switch (fmt) { 646f2646380SEunchul Kim case DRM_FORMAT_RGB565: 647f2646380SEunchul Kim cfg |= GSC_OUT_RGB565; 648f2646380SEunchul Kim break; 6498b7d3ec8SMarek Szyprowski case DRM_FORMAT_ARGB8888: 650f2646380SEunchul Kim case DRM_FORMAT_XRGB8888: 6518b7d3ec8SMarek Szyprowski cfg |= (GSC_OUT_XRGB8888 | GSC_OUT_GLOBAL_ALPHA(0xff)); 652f2646380SEunchul Kim break; 653f2646380SEunchul Kim case DRM_FORMAT_BGRX8888: 654f2646380SEunchul Kim cfg |= (GSC_OUT_XRGB8888 | GSC_OUT_RB_SWAP); 655f2646380SEunchul Kim break; 656f2646380SEunchul Kim case DRM_FORMAT_YUYV: 657f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P | 658f2646380SEunchul Kim GSC_OUT_YUV422_1P_ORDER_LSB_Y | 659f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CBCR); 660f2646380SEunchul Kim break; 661f2646380SEunchul Kim case DRM_FORMAT_YVYU: 662f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P | 663f2646380SEunchul Kim GSC_OUT_YUV422_1P_ORDER_LSB_Y | 664f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CRCB); 665f2646380SEunchul Kim break; 666f2646380SEunchul Kim case DRM_FORMAT_UYVY: 667f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P | 668f2646380SEunchul Kim GSC_OUT_YUV422_1P_OEDER_LSB_C | 669f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CBCR); 670f2646380SEunchul Kim break; 671f2646380SEunchul Kim case DRM_FORMAT_VYUY: 672f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P | 673f2646380SEunchul Kim GSC_OUT_YUV422_1P_OEDER_LSB_C | 674f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CRCB); 675f2646380SEunchul Kim break; 676f2646380SEunchul Kim case DRM_FORMAT_NV21: 677f2646380SEunchul Kim cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV420_2P); 678f2646380SEunchul Kim break; 679dd209ef8SMarek Szyprowski case DRM_FORMAT_NV61: 680dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV422_2P); 681dd209ef8SMarek Szyprowski break; 682f2646380SEunchul Kim case DRM_FORMAT_YUV422: 683dd209ef8SMarek Szyprowski cfg |= GSC_OUT_YUV422_3P; 684dd209ef8SMarek Szyprowski break; 685f2646380SEunchul Kim case DRM_FORMAT_YUV420: 686dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV420_3P); 687dd209ef8SMarek Szyprowski break; 688f2646380SEunchul Kim case DRM_FORMAT_YVU420: 689dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV420_3P); 690f2646380SEunchul Kim break; 691f2646380SEunchul Kim case DRM_FORMAT_NV12: 692dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV420_2P); 693dd209ef8SMarek Szyprowski break; 694f2646380SEunchul Kim case DRM_FORMAT_NV16: 695dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV422_2P); 696f2646380SEunchul Kim break; 697f2646380SEunchul Kim } 698f2646380SEunchul Kim 699d25a40a7SMarek Szyprowski if (tiled) 700d25a40a7SMarek Szyprowski cfg |= (GSC_IN_TILE_C_16x8 | GSC_OUT_TILE_MODE); 701d25a40a7SMarek Szyprowski 702f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_CON); 703f2646380SEunchul Kim } 704f2646380SEunchul Kim 7056f83d208SInki Dae static int gsc_get_ratio_shift(struct gsc_context *ctx, u32 src, u32 dst, 7066f83d208SInki Dae u32 *ratio) 707f2646380SEunchul Kim { 7086be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "src[%d]dst[%d]\n", src, dst); 709f2646380SEunchul Kim 710f2646380SEunchul Kim if (src >= dst * 8) { 7116f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to make ratio and shift.\n"); 712f2646380SEunchul Kim return -EINVAL; 713f2646380SEunchul Kim } else if (src >= dst * 4) 714f2646380SEunchul Kim *ratio = 4; 715f2646380SEunchul Kim else if (src >= dst * 2) 716f2646380SEunchul Kim *ratio = 2; 717f2646380SEunchul Kim else 718f2646380SEunchul Kim *ratio = 1; 719f2646380SEunchul Kim 720f2646380SEunchul Kim return 0; 721f2646380SEunchul Kim } 722f2646380SEunchul Kim 723f2646380SEunchul Kim static void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *shfactor) 724f2646380SEunchul Kim { 725f2646380SEunchul Kim if (hratio == 4 && vratio == 4) 726f2646380SEunchul Kim *shfactor = 4; 727f2646380SEunchul Kim else if ((hratio == 4 && vratio == 2) || 728f2646380SEunchul Kim (hratio == 2 && vratio == 4)) 729f2646380SEunchul Kim *shfactor = 3; 730f2646380SEunchul Kim else if ((hratio == 4 && vratio == 1) || 731f2646380SEunchul Kim (hratio == 1 && vratio == 4) || 732f2646380SEunchul Kim (hratio == 2 && vratio == 2)) 733f2646380SEunchul Kim *shfactor = 2; 734f2646380SEunchul Kim else if (hratio == 1 && vratio == 1) 735f2646380SEunchul Kim *shfactor = 0; 736f2646380SEunchul Kim else 737f2646380SEunchul Kim *shfactor = 1; 738f2646380SEunchul Kim } 739f2646380SEunchul Kim 740f2646380SEunchul Kim static int gsc_set_prescaler(struct gsc_context *ctx, struct gsc_scaler *sc, 7418b7d3ec8SMarek Szyprowski struct drm_exynos_ipp_task_rect *src, 7428b7d3ec8SMarek Szyprowski struct drm_exynos_ipp_task_rect *dst) 743f2646380SEunchul Kim { 744f2646380SEunchul Kim u32 cfg; 745f2646380SEunchul Kim u32 src_w, src_h, dst_w, dst_h; 746f2646380SEunchul Kim int ret = 0; 747f2646380SEunchul Kim 748f2646380SEunchul Kim src_w = src->w; 749f2646380SEunchul Kim src_h = src->h; 750f2646380SEunchul Kim 751f2646380SEunchul Kim if (ctx->rotation) { 752f2646380SEunchul Kim dst_w = dst->h; 753f2646380SEunchul Kim dst_h = dst->w; 754f2646380SEunchul Kim } else { 755f2646380SEunchul Kim dst_w = dst->w; 756f2646380SEunchul Kim dst_h = dst->h; 757f2646380SEunchul Kim } 758f2646380SEunchul Kim 7596f83d208SInki Dae ret = gsc_get_ratio_shift(ctx, src_w, dst_w, &sc->pre_hratio); 760f2646380SEunchul Kim if (ret) { 7616f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to get ratio horizontal.\n"); 762f2646380SEunchul Kim return ret; 763f2646380SEunchul Kim } 764f2646380SEunchul Kim 7656f83d208SInki Dae ret = gsc_get_ratio_shift(ctx, src_h, dst_h, &sc->pre_vratio); 766f2646380SEunchul Kim if (ret) { 7676f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to get ratio vertical.\n"); 768f2646380SEunchul Kim return ret; 769f2646380SEunchul Kim } 770f2646380SEunchul Kim 7716be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "pre_hratio[%d]pre_vratio[%d]\n", 772cbc4c33dSYoungJun Cho sc->pre_hratio, sc->pre_vratio); 773f2646380SEunchul Kim 774f2646380SEunchul Kim sc->main_hratio = (src_w << 16) / dst_w; 775f2646380SEunchul Kim sc->main_vratio = (src_h << 16) / dst_h; 776f2646380SEunchul Kim 7776be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "main_hratio[%ld]main_vratio[%ld]\n", 778cbc4c33dSYoungJun Cho sc->main_hratio, sc->main_vratio); 779f2646380SEunchul Kim 780f2646380SEunchul Kim gsc_get_prescaler_shfactor(sc->pre_hratio, sc->pre_vratio, 781f2646380SEunchul Kim &sc->pre_shfactor); 782f2646380SEunchul Kim 7836be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "pre_shfactor[%d]\n", sc->pre_shfactor); 784f2646380SEunchul Kim 785f2646380SEunchul Kim cfg = (GSC_PRESC_SHFACTOR(sc->pre_shfactor) | 786f2646380SEunchul Kim GSC_PRESC_H_RATIO(sc->pre_hratio) | 787f2646380SEunchul Kim GSC_PRESC_V_RATIO(sc->pre_vratio)); 788f2646380SEunchul Kim gsc_write(cfg, GSC_PRE_SCALE_RATIO); 789f2646380SEunchul Kim 790f2646380SEunchul Kim return ret; 791f2646380SEunchul Kim } 792f2646380SEunchul Kim 793f2646380SEunchul Kim static void gsc_set_h_coef(struct gsc_context *ctx, unsigned long main_hratio) 794f2646380SEunchul Kim { 795f2646380SEunchul Kim int i, j, k, sc_ratio; 796f2646380SEunchul Kim 797f2646380SEunchul Kim if (main_hratio <= GSC_SC_UP_MAX_RATIO) 798f2646380SEunchul Kim sc_ratio = 0; 799f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_7_8) 800f2646380SEunchul Kim sc_ratio = 1; 801f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_6_8) 802f2646380SEunchul Kim sc_ratio = 2; 803f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_5_8) 804f2646380SEunchul Kim sc_ratio = 3; 805f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_4_8) 806f2646380SEunchul Kim sc_ratio = 4; 807f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_3_8) 808f2646380SEunchul Kim sc_ratio = 5; 809f2646380SEunchul Kim else 810f2646380SEunchul Kim sc_ratio = 6; 811f2646380SEunchul Kim 812f2646380SEunchul Kim for (i = 0; i < GSC_COEF_PHASE; i++) 813f2646380SEunchul Kim for (j = 0; j < GSC_COEF_H_8T; j++) 814f2646380SEunchul Kim for (k = 0; k < GSC_COEF_DEPTH; k++) 815f2646380SEunchul Kim gsc_write(h_coef_8t[sc_ratio][i][j], 816f2646380SEunchul Kim GSC_HCOEF(i, j, k)); 817f2646380SEunchul Kim } 818f2646380SEunchul Kim 819f2646380SEunchul Kim static void gsc_set_v_coef(struct gsc_context *ctx, unsigned long main_vratio) 820f2646380SEunchul Kim { 821f2646380SEunchul Kim int i, j, k, sc_ratio; 822f2646380SEunchul Kim 823f2646380SEunchul Kim if (main_vratio <= GSC_SC_UP_MAX_RATIO) 824f2646380SEunchul Kim sc_ratio = 0; 825f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_7_8) 826f2646380SEunchul Kim sc_ratio = 1; 827f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_6_8) 828f2646380SEunchul Kim sc_ratio = 2; 829f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_5_8) 830f2646380SEunchul Kim sc_ratio = 3; 831f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_4_8) 832f2646380SEunchul Kim sc_ratio = 4; 833f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_3_8) 834f2646380SEunchul Kim sc_ratio = 5; 835f2646380SEunchul Kim else 836f2646380SEunchul Kim sc_ratio = 6; 837f2646380SEunchul Kim 838f2646380SEunchul Kim for (i = 0; i < GSC_COEF_PHASE; i++) 839f2646380SEunchul Kim for (j = 0; j < GSC_COEF_V_4T; j++) 840f2646380SEunchul Kim for (k = 0; k < GSC_COEF_DEPTH; k++) 841f2646380SEunchul Kim gsc_write(v_coef_4t[sc_ratio][i][j], 842f2646380SEunchul Kim GSC_VCOEF(i, j, k)); 843f2646380SEunchul Kim } 844f2646380SEunchul Kim 845f2646380SEunchul Kim static void gsc_set_scaler(struct gsc_context *ctx, struct gsc_scaler *sc) 846f2646380SEunchul Kim { 847f2646380SEunchul Kim u32 cfg; 848f2646380SEunchul Kim 8496be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "main_hratio[%ld]main_vratio[%ld]\n", 850cbc4c33dSYoungJun Cho sc->main_hratio, sc->main_vratio); 851f2646380SEunchul Kim 852f2646380SEunchul Kim gsc_set_h_coef(ctx, sc->main_hratio); 853f2646380SEunchul Kim cfg = GSC_MAIN_H_RATIO_VALUE(sc->main_hratio); 854f2646380SEunchul Kim gsc_write(cfg, GSC_MAIN_H_RATIO); 855f2646380SEunchul Kim 856f2646380SEunchul Kim gsc_set_v_coef(ctx, sc->main_vratio); 857f2646380SEunchul Kim cfg = GSC_MAIN_V_RATIO_VALUE(sc->main_vratio); 858f2646380SEunchul Kim gsc_write(cfg, GSC_MAIN_V_RATIO); 859f2646380SEunchul Kim } 860f2646380SEunchul Kim 8618b7d3ec8SMarek Szyprowski static void gsc_dst_set_size(struct gsc_context *ctx, 8628b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_buffer *buf) 863f2646380SEunchul Kim { 864f2646380SEunchul Kim struct gsc_scaler *sc = &ctx->sc; 865f2646380SEunchul Kim u32 cfg; 866f2646380SEunchul Kim 867f2646380SEunchul Kim /* pixel offset */ 8688b7d3ec8SMarek Szyprowski cfg = (GSC_DSTIMG_OFFSET_X(buf->rect.x) | 8698b7d3ec8SMarek Szyprowski GSC_DSTIMG_OFFSET_Y(buf->rect.y)); 870f2646380SEunchul Kim gsc_write(cfg, GSC_DSTIMG_OFFSET); 871f2646380SEunchul Kim 872f2646380SEunchul Kim /* scaled size */ 8738b7d3ec8SMarek Szyprowski if (ctx->rotation) 8748b7d3ec8SMarek Szyprowski cfg = (GSC_SCALED_WIDTH(buf->rect.h) | 8758b7d3ec8SMarek Szyprowski GSC_SCALED_HEIGHT(buf->rect.w)); 8768b7d3ec8SMarek Szyprowski else 8778b7d3ec8SMarek Szyprowski cfg = (GSC_SCALED_WIDTH(buf->rect.w) | 8788b7d3ec8SMarek Szyprowski GSC_SCALED_HEIGHT(buf->rect.h)); 879f2646380SEunchul Kim gsc_write(cfg, GSC_SCALED_SIZE); 880f2646380SEunchul Kim 881f2646380SEunchul Kim /* original size */ 882f2646380SEunchul Kim cfg = gsc_read(GSC_DSTIMG_SIZE); 8838b7d3ec8SMarek Szyprowski cfg &= ~(GSC_DSTIMG_HEIGHT_MASK | GSC_DSTIMG_WIDTH_MASK); 8844958a1c0SMarek Szyprowski cfg |= GSC_DSTIMG_WIDTH(buf->buf.pitch[0] / buf->format->cpp[0]) | 8858b7d3ec8SMarek Szyprowski GSC_DSTIMG_HEIGHT(buf->buf.height); 886f2646380SEunchul Kim gsc_write(cfg, GSC_DSTIMG_SIZE); 887f2646380SEunchul Kim 888f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_CON); 889f2646380SEunchul Kim cfg &= ~GSC_OUT_RGB_TYPE_MASK; 890f2646380SEunchul Kim 8918b7d3ec8SMarek Szyprowski if (buf->rect.w >= GSC_WIDTH_ITU_709) 892f2646380SEunchul Kim if (sc->range) 893f2646380SEunchul Kim cfg |= GSC_OUT_RGB_HD_WIDE; 894f2646380SEunchul Kim else 895f2646380SEunchul Kim cfg |= GSC_OUT_RGB_HD_NARROW; 896f2646380SEunchul Kim else 897f2646380SEunchul Kim if (sc->range) 898f2646380SEunchul Kim cfg |= GSC_OUT_RGB_SD_WIDE; 899f2646380SEunchul Kim else 900f2646380SEunchul Kim cfg |= GSC_OUT_RGB_SD_NARROW; 901f2646380SEunchul Kim 902f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_CON); 903f2646380SEunchul Kim } 904f2646380SEunchul Kim 905f2646380SEunchul Kim static int gsc_dst_get_buf_seq(struct gsc_context *ctx) 906f2646380SEunchul Kim { 907f2646380SEunchul Kim u32 cfg, i, buf_num = GSC_REG_SZ; 908f2646380SEunchul Kim u32 mask = 0x00000001; 909f2646380SEunchul Kim 910f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); 911f2646380SEunchul Kim 912f2646380SEunchul Kim for (i = 0; i < GSC_REG_SZ; i++) 913f2646380SEunchul Kim if (cfg & (mask << i)) 914f2646380SEunchul Kim buf_num--; 915f2646380SEunchul Kim 9166be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "buf_num[%d]\n", buf_num); 917f2646380SEunchul Kim 918f2646380SEunchul Kim return buf_num; 919f2646380SEunchul Kim } 920f2646380SEunchul Kim 9218b7d3ec8SMarek Szyprowski static void gsc_dst_set_buf_seq(struct gsc_context *ctx, u32 buf_id, 9228b7d3ec8SMarek Szyprowski bool enqueue) 923f2646380SEunchul Kim { 9248b7d3ec8SMarek Szyprowski bool masked = !enqueue; 925f2646380SEunchul Kim u32 cfg; 926f2646380SEunchul Kim u32 mask = 0x00000001 << buf_id; 927f2646380SEunchul Kim 928f2646380SEunchul Kim /* mask register set */ 929f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); 930f2646380SEunchul Kim 931f2646380SEunchul Kim /* sequence id */ 932f2646380SEunchul Kim cfg &= ~mask; 933f2646380SEunchul Kim cfg |= masked << buf_id; 934f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_Y_MASK); 935f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CB_MASK); 936f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CR_MASK); 937f2646380SEunchul Kim 938f2646380SEunchul Kim /* interrupt enable */ 9398b7d3ec8SMarek Szyprowski if (enqueue && gsc_dst_get_buf_seq(ctx) >= GSC_BUF_START) 940f2646380SEunchul Kim gsc_handle_irq(ctx, true, false, true); 941f2646380SEunchul Kim 942f2646380SEunchul Kim /* interrupt disable */ 9438b7d3ec8SMarek Szyprowski if (!enqueue && gsc_dst_get_buf_seq(ctx) <= GSC_BUF_STOP) 944f2646380SEunchul Kim gsc_handle_irq(ctx, false, false, true); 945f2646380SEunchul Kim } 946f2646380SEunchul Kim 9478b7d3ec8SMarek Szyprowski static void gsc_dst_set_addr(struct gsc_context *ctx, 9488b7d3ec8SMarek Szyprowski u32 buf_id, struct exynos_drm_ipp_buffer *buf) 949f2646380SEunchul Kim { 950f2646380SEunchul Kim /* address register set */ 9518b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[0], GSC_OUT_BASE_ADDR_Y(buf_id)); 9528b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[1], GSC_OUT_BASE_ADDR_CB(buf_id)); 9538b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[2], GSC_OUT_BASE_ADDR_CR(buf_id)); 954f2646380SEunchul Kim 9558b7d3ec8SMarek Szyprowski gsc_dst_set_buf_seq(ctx, buf_id, true); 956f2646380SEunchul Kim } 957f2646380SEunchul Kim 958f2646380SEunchul Kim static int gsc_get_src_buf_index(struct gsc_context *ctx) 959f2646380SEunchul Kim { 960f2646380SEunchul Kim u32 cfg, curr_index, i; 961f2646380SEunchul Kim u32 buf_id = GSC_MAX_SRC; 962f2646380SEunchul Kim 9636be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id); 964f2646380SEunchul Kim 965f2646380SEunchul Kim cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); 966f2646380SEunchul Kim curr_index = GSC_IN_CURR_GET_INDEX(cfg); 967f2646380SEunchul Kim 968f2646380SEunchul Kim for (i = curr_index; i < GSC_MAX_SRC; i++) { 969f2646380SEunchul Kim if (!((cfg >> i) & 0x1)) { 970f2646380SEunchul Kim buf_id = i; 971f2646380SEunchul Kim break; 972f2646380SEunchul Kim } 973f2646380SEunchul Kim } 974f2646380SEunchul Kim 9756be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, 9768b7d3ec8SMarek Szyprowski curr_index, buf_id); 9778b7d3ec8SMarek Szyprowski 978f2646380SEunchul Kim if (buf_id == GSC_MAX_SRC) { 9796f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to get in buffer index.\n"); 980f2646380SEunchul Kim return -EINVAL; 981f2646380SEunchul Kim } 982f2646380SEunchul Kim 9838b7d3ec8SMarek Szyprowski gsc_src_set_buf_seq(ctx, buf_id, false); 984f2646380SEunchul Kim 985f2646380SEunchul Kim return buf_id; 986f2646380SEunchul Kim } 987f2646380SEunchul Kim 988f2646380SEunchul Kim static int gsc_get_dst_buf_index(struct gsc_context *ctx) 989f2646380SEunchul Kim { 990f2646380SEunchul Kim u32 cfg, curr_index, i; 991f2646380SEunchul Kim u32 buf_id = GSC_MAX_DST; 992f2646380SEunchul Kim 9936be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id); 994f2646380SEunchul Kim 995f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); 996f2646380SEunchul Kim curr_index = GSC_OUT_CURR_GET_INDEX(cfg); 997f2646380SEunchul Kim 998f2646380SEunchul Kim for (i = curr_index; i < GSC_MAX_DST; i++) { 999f2646380SEunchul Kim if (!((cfg >> i) & 0x1)) { 1000f2646380SEunchul Kim buf_id = i; 1001f2646380SEunchul Kim break; 1002f2646380SEunchul Kim } 1003f2646380SEunchul Kim } 1004f2646380SEunchul Kim 1005f2646380SEunchul Kim if (buf_id == GSC_MAX_DST) { 10066f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to get out buffer index.\n"); 1007f2646380SEunchul Kim return -EINVAL; 1008f2646380SEunchul Kim } 1009f2646380SEunchul Kim 10108b7d3ec8SMarek Szyprowski gsc_dst_set_buf_seq(ctx, buf_id, false); 1011f2646380SEunchul Kim 10126be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, 1013f2646380SEunchul Kim curr_index, buf_id); 1014f2646380SEunchul Kim 1015f2646380SEunchul Kim return buf_id; 1016f2646380SEunchul Kim } 1017f2646380SEunchul Kim 1018f2646380SEunchul Kim static irqreturn_t gsc_irq_handler(int irq, void *dev_id) 1019f2646380SEunchul Kim { 1020f2646380SEunchul Kim struct gsc_context *ctx = dev_id; 1021f2646380SEunchul Kim u32 status; 10228b7d3ec8SMarek Szyprowski int err = 0; 1023f2646380SEunchul Kim 10246be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id); 1025f2646380SEunchul Kim 1026f2646380SEunchul Kim status = gsc_read(GSC_IRQ); 1027f2646380SEunchul Kim if (status & GSC_IRQ_STATUS_OR_IRQ) { 10288b7d3ec8SMarek Szyprowski dev_err(ctx->dev, "occurred overflow at %d, status 0x%x.\n", 1029f2646380SEunchul Kim ctx->id, status); 10308b7d3ec8SMarek Szyprowski err = -EINVAL; 1031f2646380SEunchul Kim } 1032f2646380SEunchul Kim 1033f2646380SEunchul Kim if (status & GSC_IRQ_STATUS_OR_FRM_DONE) { 10348b7d3ec8SMarek Szyprowski int src_buf_id, dst_buf_id; 10358b7d3ec8SMarek Szyprowski 10368b7d3ec8SMarek Szyprowski dev_dbg(ctx->dev, "occurred frame done at %d, status 0x%x.\n", 1037f2646380SEunchul Kim ctx->id, status); 1038f2646380SEunchul Kim 10398b7d3ec8SMarek Szyprowski src_buf_id = gsc_get_src_buf_index(ctx); 10408b7d3ec8SMarek Szyprowski dst_buf_id = gsc_get_dst_buf_index(ctx); 1041f2646380SEunchul Kim 10426be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "buf_id_src[%d]buf_id_dst[%d]\n", 10436be90056SInki Dae src_buf_id, dst_buf_id); 1044f2646380SEunchul Kim 10458b7d3ec8SMarek Szyprowski if (src_buf_id < 0 || dst_buf_id < 0) 10468b7d3ec8SMarek Szyprowski err = -EINVAL; 10478b7d3ec8SMarek Szyprowski } 1048f2646380SEunchul Kim 10498b7d3ec8SMarek Szyprowski if (ctx->task) { 10508b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task = ctx->task; 10518b7d3ec8SMarek Szyprowski 10528b7d3ec8SMarek Szyprowski ctx->task = NULL; 10538b7d3ec8SMarek Szyprowski pm_runtime_mark_last_busy(ctx->dev); 10548b7d3ec8SMarek Szyprowski pm_runtime_put_autosuspend(ctx->dev); 10558b7d3ec8SMarek Szyprowski exynos_drm_ipp_task_done(task, err); 1056f2646380SEunchul Kim } 1057f2646380SEunchul Kim 1058f2646380SEunchul Kim return IRQ_HANDLED; 1059f2646380SEunchul Kim } 1060f2646380SEunchul Kim 10618b7d3ec8SMarek Szyprowski static int gsc_reset(struct gsc_context *ctx) 1062f2646380SEunchul Kim { 1063f2646380SEunchul Kim struct gsc_scaler *sc = &ctx->sc; 1064f2646380SEunchul Kim int ret; 1065f2646380SEunchul Kim 1066f2646380SEunchul Kim /* reset h/w block */ 1067f2646380SEunchul Kim ret = gsc_sw_reset(ctx); 1068f2646380SEunchul Kim if (ret < 0) { 10698b7d3ec8SMarek Szyprowski dev_err(ctx->dev, "failed to reset hardware.\n"); 1070f2646380SEunchul Kim return ret; 1071f2646380SEunchul Kim } 1072f2646380SEunchul Kim 1073f2646380SEunchul Kim /* scaler setting */ 1074f2646380SEunchul Kim memset(&ctx->sc, 0x0, sizeof(ctx->sc)); 1075f2646380SEunchul Kim sc->range = true; 1076f2646380SEunchul Kim 1077f2646380SEunchul Kim return 0; 1078f2646380SEunchul Kim } 1079f2646380SEunchul Kim 10808b7d3ec8SMarek Szyprowski static void gsc_start(struct gsc_context *ctx) 1081f2646380SEunchul Kim { 1082f2646380SEunchul Kim u32 cfg; 1083f2646380SEunchul Kim 1084f2646380SEunchul Kim gsc_handle_irq(ctx, true, false, true); 1085f2646380SEunchul Kim 1086f2646380SEunchul Kim /* enable one shot */ 1087f2646380SEunchul Kim cfg = gsc_read(GSC_ENABLE); 1088f2646380SEunchul Kim cfg &= ~(GSC_ENABLE_ON_CLEAR_MASK | 1089f2646380SEunchul Kim GSC_ENABLE_CLK_GATE_MODE_MASK); 1090f2646380SEunchul Kim cfg |= GSC_ENABLE_ON_CLEAR_ONESHOT; 1091f2646380SEunchul Kim gsc_write(cfg, GSC_ENABLE); 1092f2646380SEunchul Kim 1093f2646380SEunchul Kim /* src dma memory */ 1094f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON); 1095f2646380SEunchul Kim cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK); 1096f2646380SEunchul Kim cfg |= GSC_IN_PATH_MEMORY; 1097f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON); 1098f2646380SEunchul Kim 1099f2646380SEunchul Kim /* dst dma memory */ 1100f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_CON); 1101f2646380SEunchul Kim cfg |= GSC_OUT_PATH_MEMORY; 1102f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_CON); 1103f2646380SEunchul Kim 1104f2646380SEunchul Kim gsc_set_scaler(ctx, &ctx->sc); 1105f2646380SEunchul Kim 1106f2646380SEunchul Kim cfg = gsc_read(GSC_ENABLE); 1107f2646380SEunchul Kim cfg |= GSC_ENABLE_ON; 1108f2646380SEunchul Kim gsc_write(cfg, GSC_ENABLE); 11098b7d3ec8SMarek Szyprowski } 11108b7d3ec8SMarek Szyprowski 11118b7d3ec8SMarek Szyprowski static int gsc_commit(struct exynos_drm_ipp *ipp, 11128b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task) 11138b7d3ec8SMarek Szyprowski { 11148b7d3ec8SMarek Szyprowski struct gsc_context *ctx = container_of(ipp, struct gsc_context, ipp); 11158b7d3ec8SMarek Szyprowski int ret; 11168b7d3ec8SMarek Szyprowski 11178b7d3ec8SMarek Szyprowski pm_runtime_get_sync(ctx->dev); 11188b7d3ec8SMarek Szyprowski ctx->task = task; 11198b7d3ec8SMarek Szyprowski 11208b7d3ec8SMarek Szyprowski ret = gsc_reset(ctx); 11218b7d3ec8SMarek Szyprowski if (ret) { 11228b7d3ec8SMarek Szyprowski pm_runtime_put_autosuspend(ctx->dev); 11238b7d3ec8SMarek Szyprowski ctx->task = NULL; 11248b7d3ec8SMarek Szyprowski return ret; 11258b7d3ec8SMarek Szyprowski } 11268b7d3ec8SMarek Szyprowski 1127d25a40a7SMarek Szyprowski gsc_src_set_fmt(ctx, task->src.buf.fourcc, task->src.buf.modifier); 11288b7d3ec8SMarek Szyprowski gsc_src_set_transf(ctx, task->transform.rotation); 11298b7d3ec8SMarek Szyprowski gsc_src_set_size(ctx, &task->src); 11308b7d3ec8SMarek Szyprowski gsc_src_set_addr(ctx, 0, &task->src); 1131d25a40a7SMarek Szyprowski gsc_dst_set_fmt(ctx, task->dst.buf.fourcc, task->dst.buf.modifier); 11328b7d3ec8SMarek Szyprowski gsc_dst_set_size(ctx, &task->dst); 11338b7d3ec8SMarek Szyprowski gsc_dst_set_addr(ctx, 0, &task->dst); 11348b7d3ec8SMarek Szyprowski gsc_set_prescaler(ctx, &ctx->sc, &task->src.rect, &task->dst.rect); 11358b7d3ec8SMarek Szyprowski gsc_start(ctx); 1136f2646380SEunchul Kim 1137f2646380SEunchul Kim return 0; 1138f2646380SEunchul Kim } 1139f2646380SEunchul Kim 11408b7d3ec8SMarek Szyprowski static void gsc_abort(struct exynos_drm_ipp *ipp, 11418b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task) 1142f2646380SEunchul Kim { 11438b7d3ec8SMarek Szyprowski struct gsc_context *ctx = 11448b7d3ec8SMarek Szyprowski container_of(ipp, struct gsc_context, ipp); 1145f2646380SEunchul Kim 11468b7d3ec8SMarek Szyprowski gsc_reset(ctx); 11478b7d3ec8SMarek Szyprowski if (ctx->task) { 11488b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task = ctx->task; 1149f2646380SEunchul Kim 11508b7d3ec8SMarek Szyprowski ctx->task = NULL; 11518b7d3ec8SMarek Szyprowski pm_runtime_mark_last_busy(ctx->dev); 11528b7d3ec8SMarek Szyprowski pm_runtime_put_autosuspend(ctx->dev); 11538b7d3ec8SMarek Szyprowski exynos_drm_ipp_task_done(task, -EIO); 11548b7d3ec8SMarek Szyprowski } 1155f2646380SEunchul Kim } 1156f2646380SEunchul Kim 11578b7d3ec8SMarek Szyprowski static struct exynos_drm_ipp_funcs ipp_funcs = { 11588b7d3ec8SMarek Szyprowski .commit = gsc_commit, 11598b7d3ec8SMarek Szyprowski .abort = gsc_abort, 11608b7d3ec8SMarek Szyprowski }; 1161f2646380SEunchul Kim 11628b7d3ec8SMarek Szyprowski static int gsc_bind(struct device *dev, struct device *master, void *data) 11638b7d3ec8SMarek Szyprowski { 11648b7d3ec8SMarek Szyprowski struct gsc_context *ctx = dev_get_drvdata(dev); 11658b7d3ec8SMarek Szyprowski struct drm_device *drm_dev = data; 11668b7d3ec8SMarek Szyprowski struct exynos_drm_ipp *ipp = &ctx->ipp; 1167f2646380SEunchul Kim 11688b7d3ec8SMarek Szyprowski ctx->drm_dev = drm_dev; 11698b955034SInki Dae ctx->drm_dev = drm_dev; 117029cbf24aSAndrzej Hajda exynos_drm_register_dma(drm_dev, dev); 11718b7d3ec8SMarek Szyprowski 11728b955034SInki Dae exynos_drm_ipp_register(dev, ipp, &ipp_funcs, 11738b7d3ec8SMarek Szyprowski DRM_EXYNOS_IPP_CAP_CROP | DRM_EXYNOS_IPP_CAP_ROTATE | 11748b7d3ec8SMarek Szyprowski DRM_EXYNOS_IPP_CAP_SCALE | DRM_EXYNOS_IPP_CAP_CONVERT, 11758b7d3ec8SMarek Szyprowski ctx->formats, ctx->num_formats, "gsc"); 11768b7d3ec8SMarek Szyprowski 11778b7d3ec8SMarek Szyprowski dev_info(dev, "The exynos gscaler has been probed successfully\n"); 11788b7d3ec8SMarek Szyprowski 11798b7d3ec8SMarek Szyprowski return 0; 1180f2646380SEunchul Kim } 1181f2646380SEunchul Kim 11828b7d3ec8SMarek Szyprowski static void gsc_unbind(struct device *dev, struct device *master, 11838b7d3ec8SMarek Szyprowski void *data) 11848b7d3ec8SMarek Szyprowski { 11858b7d3ec8SMarek Szyprowski struct gsc_context *ctx = dev_get_drvdata(dev); 11868b7d3ec8SMarek Szyprowski struct drm_device *drm_dev = data; 11878b7d3ec8SMarek Szyprowski struct exynos_drm_ipp *ipp = &ctx->ipp; 11888b7d3ec8SMarek Szyprowski 11898b955034SInki Dae exynos_drm_ipp_unregister(dev, ipp); 119023755696SAndrzej Hajda exynos_drm_unregister_dma(drm_dev, dev); 11918b7d3ec8SMarek Szyprowski } 11928b7d3ec8SMarek Szyprowski 11938b7d3ec8SMarek Szyprowski static const struct component_ops gsc_component_ops = { 11948b7d3ec8SMarek Szyprowski .bind = gsc_bind, 11958b7d3ec8SMarek Szyprowski .unbind = gsc_unbind, 11968b7d3ec8SMarek Szyprowski }; 11978b7d3ec8SMarek Szyprowski 11988b7d3ec8SMarek Szyprowski static const unsigned int gsc_formats[] = { 11998b7d3ec8SMarek Szyprowski DRM_FORMAT_ARGB8888, 12008b7d3ec8SMarek Szyprowski DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB565, DRM_FORMAT_BGRX8888, 12018b7d3ec8SMarek Szyprowski DRM_FORMAT_NV12, DRM_FORMAT_NV16, DRM_FORMAT_NV21, DRM_FORMAT_NV61, 12028b7d3ec8SMarek Szyprowski DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, 12038b7d3ec8SMarek Szyprowski DRM_FORMAT_YUV420, DRM_FORMAT_YVU420, DRM_FORMAT_YUV422, 12048b7d3ec8SMarek Szyprowski }; 12058b7d3ec8SMarek Szyprowski 1206d25a40a7SMarek Szyprowski static const unsigned int gsc_tiled_formats[] = { 1207d25a40a7SMarek Szyprowski DRM_FORMAT_NV12, DRM_FORMAT_NV21, 1208d25a40a7SMarek Szyprowski }; 1209d25a40a7SMarek Szyprowski 121056550d94SGreg Kroah-Hartman static int gsc_probe(struct platform_device *pdev) 1211f2646380SEunchul Kim { 1212f2646380SEunchul Kim struct device *dev = &pdev->dev; 12138b7d3ec8SMarek Szyprowski struct gsc_driverdata *driver_data; 12148b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_formats *formats; 1215f2646380SEunchul Kim struct gsc_context *ctx; 1216f2646380SEunchul Kim struct resource *res; 1217d25a40a7SMarek Szyprowski int num_formats, ret, i, j; 1218f2646380SEunchul Kim 1219f2646380SEunchul Kim ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); 1220f2646380SEunchul Kim if (!ctx) 1221f2646380SEunchul Kim return -ENOMEM; 1222f2646380SEunchul Kim 12238b7d3ec8SMarek Szyprowski driver_data = (struct gsc_driverdata *)of_device_get_match_data(dev); 12248b7d3ec8SMarek Szyprowski ctx->dev = dev; 12258b7d3ec8SMarek Szyprowski ctx->num_clocks = driver_data->num_clocks; 12268b7d3ec8SMarek Szyprowski ctx->clk_names = driver_data->clk_names; 12278b7d3ec8SMarek Szyprowski 1228d25a40a7SMarek Szyprowski /* construct formats/limits array */ 1229d25a40a7SMarek Szyprowski num_formats = ARRAY_SIZE(gsc_formats) + ARRAY_SIZE(gsc_tiled_formats); 1230d25a40a7SMarek Szyprowski formats = devm_kcalloc(dev, num_formats, sizeof(*formats), GFP_KERNEL); 1231d25a40a7SMarek Szyprowski if (!formats) 1232d25a40a7SMarek Szyprowski return -ENOMEM; 1233d25a40a7SMarek Szyprowski 1234d25a40a7SMarek Szyprowski /* linear formats */ 12358b7d3ec8SMarek Szyprowski for (i = 0; i < ARRAY_SIZE(gsc_formats); i++) { 12368b7d3ec8SMarek Szyprowski formats[i].fourcc = gsc_formats[i]; 12378b7d3ec8SMarek Szyprowski formats[i].type = DRM_EXYNOS_IPP_FORMAT_SOURCE | 12388b7d3ec8SMarek Szyprowski DRM_EXYNOS_IPP_FORMAT_DESTINATION; 12398b7d3ec8SMarek Szyprowski formats[i].limits = driver_data->limits; 12408b7d3ec8SMarek Szyprowski formats[i].num_limits = driver_data->num_limits; 1241aeefb368SSeung-Woo Kim } 1242d25a40a7SMarek Szyprowski 1243d25a40a7SMarek Szyprowski /* tiled formats */ 1244d25a40a7SMarek Szyprowski for (j = i, i = 0; i < ARRAY_SIZE(gsc_tiled_formats); j++, i++) { 1245d25a40a7SMarek Szyprowski formats[j].fourcc = gsc_tiled_formats[i]; 1246d25a40a7SMarek Szyprowski formats[j].modifier = DRM_FORMAT_MOD_SAMSUNG_16_16_TILE; 1247d25a40a7SMarek Szyprowski formats[j].type = DRM_EXYNOS_IPP_FORMAT_SOURCE | 1248d25a40a7SMarek Szyprowski DRM_EXYNOS_IPP_FORMAT_DESTINATION; 1249d25a40a7SMarek Szyprowski formats[j].limits = driver_data->limits; 1250d25a40a7SMarek Szyprowski formats[j].num_limits = driver_data->num_limits; 1251d25a40a7SMarek Szyprowski } 1252d25a40a7SMarek Szyprowski 12538b7d3ec8SMarek Szyprowski ctx->formats = formats; 1254d25a40a7SMarek Szyprowski ctx->num_formats = num_formats; 1255aeefb368SSeung-Woo Kim 1256f2646380SEunchul Kim /* clock control */ 12578b7d3ec8SMarek Szyprowski for (i = 0; i < ctx->num_clocks; i++) { 12588b7d3ec8SMarek Szyprowski ctx->clocks[i] = devm_clk_get(dev, ctx->clk_names[i]); 12598b7d3ec8SMarek Szyprowski if (IS_ERR(ctx->clocks[i])) { 12608b7d3ec8SMarek Szyprowski dev_err(dev, "failed to get clock: %s\n", 12618b7d3ec8SMarek Szyprowski ctx->clk_names[i]); 12628b7d3ec8SMarek Szyprowski return PTR_ERR(ctx->clocks[i]); 12638b7d3ec8SMarek Szyprowski } 1264f2646380SEunchul Kim } 1265f2646380SEunchul Kim 1266f2646380SEunchul Kim /* resource memory */ 1267f2646380SEunchul Kim ctx->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1268d4ed6025SThierry Reding ctx->regs = devm_ioremap_resource(dev, ctx->regs_res); 1269d4ed6025SThierry Reding if (IS_ERR(ctx->regs)) 1270d4ed6025SThierry Reding return PTR_ERR(ctx->regs); 1271f2646380SEunchul Kim 1272f2646380SEunchul Kim /* resource irq */ 1273f2646380SEunchul Kim res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1274f2646380SEunchul Kim if (!res) { 1275f2646380SEunchul Kim dev_err(dev, "failed to request irq resource.\n"); 12765cbd419cSSachin Kamat return -ENOENT; 1277f2646380SEunchul Kim } 1278f2646380SEunchul Kim 1279f2646380SEunchul Kim ctx->irq = res->start; 12808b7d3ec8SMarek Szyprowski ret = devm_request_irq(dev, ctx->irq, gsc_irq_handler, 0, 12818b7d3ec8SMarek Szyprowski dev_name(dev), ctx); 1282f2646380SEunchul Kim if (ret < 0) { 1283f2646380SEunchul Kim dev_err(dev, "failed to request irq.\n"); 12845cbd419cSSachin Kamat return ret; 1285f2646380SEunchul Kim } 1286f2646380SEunchul Kim 1287f2646380SEunchul Kim /* context initailization */ 1288f2646380SEunchul Kim ctx->id = pdev->id; 1289f2646380SEunchul Kim 1290f2646380SEunchul Kim platform_set_drvdata(pdev, ctx); 1291f2646380SEunchul Kim 12928b7d3ec8SMarek Szyprowski pm_runtime_use_autosuspend(dev); 12938b7d3ec8SMarek Szyprowski pm_runtime_set_autosuspend_delay(dev, GSC_AUTOSUSPEND_DELAY); 1294f2646380SEunchul Kim pm_runtime_enable(dev); 1295f2646380SEunchul Kim 12968b7d3ec8SMarek Szyprowski ret = component_add(dev, &gsc_component_ops); 12978b7d3ec8SMarek Szyprowski if (ret) 12988b7d3ec8SMarek Szyprowski goto err_pm_dis; 1299f2646380SEunchul Kim 1300d873ab99SSeung-Woo Kim dev_info(dev, "drm gsc registered successfully.\n"); 1301f2646380SEunchul Kim 1302f2646380SEunchul Kim return 0; 1303f2646380SEunchul Kim 13048b7d3ec8SMarek Szyprowski err_pm_dis: 13058b7d3ec8SMarek Szyprowski pm_runtime_dont_use_autosuspend(dev); 1306f2646380SEunchul Kim pm_runtime_disable(dev); 1307f2646380SEunchul Kim return ret; 1308f2646380SEunchul Kim } 1309f2646380SEunchul Kim 131056550d94SGreg Kroah-Hartman static int gsc_remove(struct platform_device *pdev) 1311f2646380SEunchul Kim { 1312f2646380SEunchul Kim struct device *dev = &pdev->dev; 1313f2646380SEunchul Kim 13148b7d3ec8SMarek Szyprowski pm_runtime_dont_use_autosuspend(dev); 1315f2646380SEunchul Kim pm_runtime_disable(dev); 1316f2646380SEunchul Kim 1317f2646380SEunchul Kim return 0; 1318f2646380SEunchul Kim } 1319f2646380SEunchul Kim 13204158dbe1SArnd Bergmann static int __maybe_unused gsc_runtime_suspend(struct device *dev) 1321f2646380SEunchul Kim { 1322f2646380SEunchul Kim struct gsc_context *ctx = get_gsc_context(dev); 13238b7d3ec8SMarek Szyprowski int i; 1324f2646380SEunchul Kim 13256be90056SInki Dae DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id); 1326f2646380SEunchul Kim 13278b7d3ec8SMarek Szyprowski for (i = ctx->num_clocks - 1; i >= 0; i--) 13288b7d3ec8SMarek Szyprowski clk_disable_unprepare(ctx->clocks[i]); 13298b7d3ec8SMarek Szyprowski 13308b7d3ec8SMarek Szyprowski return 0; 1331f2646380SEunchul Kim } 1332f2646380SEunchul Kim 13334158dbe1SArnd Bergmann static int __maybe_unused gsc_runtime_resume(struct device *dev) 1334f2646380SEunchul Kim { 1335f2646380SEunchul Kim struct gsc_context *ctx = get_gsc_context(dev); 13368b7d3ec8SMarek Szyprowski int i, ret; 1337f2646380SEunchul Kim 13386be90056SInki Dae DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id); 1339f2646380SEunchul Kim 13408b7d3ec8SMarek Szyprowski for (i = 0; i < ctx->num_clocks; i++) { 13418b7d3ec8SMarek Szyprowski ret = clk_prepare_enable(ctx->clocks[i]); 13428b7d3ec8SMarek Szyprowski if (ret) { 13438b7d3ec8SMarek Szyprowski while (--i > 0) 13448b7d3ec8SMarek Szyprowski clk_disable_unprepare(ctx->clocks[i]); 13458b7d3ec8SMarek Szyprowski return ret; 13468b7d3ec8SMarek Szyprowski } 13478b7d3ec8SMarek Szyprowski } 13488b7d3ec8SMarek Szyprowski return 0; 1349f2646380SEunchul Kim } 1350f2646380SEunchul Kim 1351f2646380SEunchul Kim static const struct dev_pm_ops gsc_pm_ops = { 135283bd7b20SMarek Szyprowski SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 135383bd7b20SMarek Szyprowski pm_runtime_force_resume) 1354f2646380SEunchul Kim SET_RUNTIME_PM_OPS(gsc_runtime_suspend, gsc_runtime_resume, NULL) 1355f2646380SEunchul Kim }; 1356f2646380SEunchul Kim 13578b7d3ec8SMarek Szyprowski static const struct drm_exynos_ipp_limit gsc_5250_limits[] = { 13588b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) }, 13598b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) }, 13608b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2048 }, .v = { 16, 2048 }) }, 13618b7d3ec8SMarek Szyprowski { IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 }, 13628b7d3ec8SMarek Szyprowski .v = { (1 << 16) / 16, (1 << 16) * 8 }) }, 13638b7d3ec8SMarek Szyprowski }; 13648b7d3ec8SMarek Szyprowski 13658b7d3ec8SMarek Szyprowski static const struct drm_exynos_ipp_limit gsc_5420_limits[] = { 13668b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) }, 13678b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) }, 13688b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(ROTATED, .h = { 16, 2016 }, .v = { 8, 2016 }) }, 13698b7d3ec8SMarek Szyprowski { IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 }, 13708b7d3ec8SMarek Szyprowski .v = { (1 << 16) / 16, (1 << 16) * 8 }) }, 13718b7d3ec8SMarek Szyprowski }; 13728b7d3ec8SMarek Szyprowski 13738b7d3ec8SMarek Szyprowski static const struct drm_exynos_ipp_limit gsc_5433_limits[] = { 137428b67632SMarek Szyprowski { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 8191, 16 }, .v = { 16, 8191, 2 }) }, 13758b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 1 }, .v = { 8, 3344, 1 }) }, 13768b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2047 }, .v = { 8, 8191 }) }, 13778b7d3ec8SMarek Szyprowski { IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 }, 13788b7d3ec8SMarek Szyprowski .v = { (1 << 16) / 16, (1 << 16) * 8 }) }, 13798b7d3ec8SMarek Szyprowski }; 13808b7d3ec8SMarek Szyprowski 13818b7d3ec8SMarek Szyprowski static struct gsc_driverdata gsc_exynos5250_drvdata = { 13828b7d3ec8SMarek Szyprowski .clk_names = {"gscl"}, 13838b7d3ec8SMarek Szyprowski .num_clocks = 1, 13848b7d3ec8SMarek Szyprowski .limits = gsc_5250_limits, 13858b7d3ec8SMarek Szyprowski .num_limits = ARRAY_SIZE(gsc_5250_limits), 13868b7d3ec8SMarek Szyprowski }; 13878b7d3ec8SMarek Szyprowski 13888b7d3ec8SMarek Szyprowski static struct gsc_driverdata gsc_exynos5420_drvdata = { 13898b7d3ec8SMarek Szyprowski .clk_names = {"gscl"}, 13908b7d3ec8SMarek Szyprowski .num_clocks = 1, 13918b7d3ec8SMarek Szyprowski .limits = gsc_5420_limits, 13928b7d3ec8SMarek Szyprowski .num_limits = ARRAY_SIZE(gsc_5420_limits), 13938b7d3ec8SMarek Szyprowski }; 13948b7d3ec8SMarek Szyprowski 13958b7d3ec8SMarek Szyprowski static struct gsc_driverdata gsc_exynos5433_drvdata = { 13968b7d3ec8SMarek Szyprowski .clk_names = {"pclk", "aclk", "aclk_xiu", "aclk_gsclbend"}, 13978b7d3ec8SMarek Szyprowski .num_clocks = 4, 13988b7d3ec8SMarek Szyprowski .limits = gsc_5433_limits, 13998b7d3ec8SMarek Szyprowski .num_limits = ARRAY_SIZE(gsc_5433_limits), 14008b7d3ec8SMarek Szyprowski }; 14018b7d3ec8SMarek Szyprowski 1402aeefb368SSeung-Woo Kim static const struct of_device_id exynos_drm_gsc_of_match[] = { 14038b7d3ec8SMarek Szyprowski { 14048b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5-gsc", 14058b7d3ec8SMarek Szyprowski .data = &gsc_exynos5250_drvdata, 14068b7d3ec8SMarek Szyprowski }, { 14078b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5250-gsc", 14088b7d3ec8SMarek Szyprowski .data = &gsc_exynos5250_drvdata, 14098b7d3ec8SMarek Szyprowski }, { 14108b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5420-gsc", 14118b7d3ec8SMarek Szyprowski .data = &gsc_exynos5420_drvdata, 14128b7d3ec8SMarek Szyprowski }, { 14138b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5433-gsc", 14148b7d3ec8SMarek Szyprowski .data = &gsc_exynos5433_drvdata, 14158b7d3ec8SMarek Szyprowski }, { 14168b7d3ec8SMarek Szyprowski }, 1417aeefb368SSeung-Woo Kim }; 1418aeefb368SSeung-Woo Kim MODULE_DEVICE_TABLE(of, exynos_drm_gsc_of_match); 1419aeefb368SSeung-Woo Kim 1420f2646380SEunchul Kim struct platform_driver gsc_driver = { 1421f2646380SEunchul Kim .probe = gsc_probe, 142256550d94SGreg Kroah-Hartman .remove = gsc_remove, 1423f2646380SEunchul Kim .driver = { 1424f2646380SEunchul Kim .name = "exynos-drm-gsc", 1425f2646380SEunchul Kim .owner = THIS_MODULE, 1426f2646380SEunchul Kim .pm = &gsc_pm_ops, 1427aeefb368SSeung-Woo Kim .of_match_table = of_match_ptr(exynos_drm_gsc_of_match), 1428f2646380SEunchul Kim }, 1429f2646380SEunchul Kim }; 1430