1f2646380SEunchul Kim /* 2f2646380SEunchul Kim * Copyright (C) 2012 Samsung Electronics Co.Ltd 3f2646380SEunchul Kim * Authors: 4f2646380SEunchul Kim * Eunchul Kim <chulspro.kim@samsung.com> 5f2646380SEunchul Kim * Jinyoung Jeon <jy0.jeon@samsung.com> 6f2646380SEunchul Kim * Sangmin Lee <lsmin.lee@samsung.com> 7f2646380SEunchul Kim * 8f2646380SEunchul Kim * This program is free software; you can redistribute it and/or modify it 9f2646380SEunchul Kim * under the terms of the GNU General Public License as published by the 10f2646380SEunchul Kim * Free Software Foundation; either version 2 of the License, or (at your 11f2646380SEunchul Kim * option) any later version. 12f2646380SEunchul Kim * 13f2646380SEunchul Kim */ 14f2646380SEunchul Kim #include <linux/kernel.h> 158b7d3ec8SMarek Szyprowski #include <linux/component.h> 16f2646380SEunchul Kim #include <linux/platform_device.h> 17f2646380SEunchul Kim #include <linux/clk.h> 18f2646380SEunchul Kim #include <linux/pm_runtime.h> 19aeefb368SSeung-Woo Kim #include <linux/mfd/syscon.h> 208b7d3ec8SMarek Szyprowski #include <linux/of_device.h> 21aeefb368SSeung-Woo Kim #include <linux/regmap.h> 22f2646380SEunchul Kim 23f2646380SEunchul Kim #include <drm/drmP.h> 24f2646380SEunchul Kim #include <drm/exynos_drm.h> 25f2646380SEunchul Kim #include "regs-gsc.h" 26e30655d0SMark Brown #include "exynos_drm_drv.h" 27f2646380SEunchul Kim #include "exynos_drm_ipp.h" 28f2646380SEunchul Kim 29f2646380SEunchul Kim /* 306fe891f6SEunchul Kim * GSC stands for General SCaler and 31f2646380SEunchul Kim * supports image scaler/rotator and input/output DMA operations. 32f2646380SEunchul Kim * input DMA reads image data from the memory. 33f2646380SEunchul Kim * output DMA writes image data to memory. 34f2646380SEunchul Kim * GSC supports image rotation and image effect functions. 35f2646380SEunchul Kim */ 36f2646380SEunchul Kim 37f2646380SEunchul Kim 388b7d3ec8SMarek Szyprowski #define GSC_MAX_CLOCKS 8 39f2646380SEunchul Kim #define GSC_MAX_SRC 4 40f2646380SEunchul Kim #define GSC_MAX_DST 16 41f2646380SEunchul Kim #define GSC_RESET_TIMEOUT 50 42f2646380SEunchul Kim #define GSC_BUF_STOP 1 43f2646380SEunchul Kim #define GSC_BUF_START 2 44f2646380SEunchul Kim #define GSC_REG_SZ 16 45f2646380SEunchul Kim #define GSC_WIDTH_ITU_709 1280 46f2646380SEunchul Kim #define GSC_SC_UP_MAX_RATIO 65536 47f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_7_8 74898 48f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_6_8 87381 49f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_5_8 104857 50f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_4_8 131072 51f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_3_8 174762 52f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_2_8 262144 53f2646380SEunchul Kim #define GSC_CROP_MAX 8192 54f2646380SEunchul Kim #define GSC_CROP_MIN 32 55f2646380SEunchul Kim #define GSC_SCALE_MAX 4224 56f2646380SEunchul Kim #define GSC_SCALE_MIN 32 57f2646380SEunchul Kim #define GSC_COEF_RATIO 7 58f2646380SEunchul Kim #define GSC_COEF_PHASE 9 59f2646380SEunchul Kim #define GSC_COEF_ATTR 16 60f2646380SEunchul Kim #define GSC_COEF_H_8T 8 61f2646380SEunchul Kim #define GSC_COEF_V_4T 4 62f2646380SEunchul Kim #define GSC_COEF_DEPTH 3 638b7d3ec8SMarek Szyprowski #define GSC_AUTOSUSPEND_DELAY 2000 64f2646380SEunchul Kim 65f2646380SEunchul Kim #define get_gsc_context(dev) platform_get_drvdata(to_platform_device(dev)) 66f2646380SEunchul Kim #define gsc_read(offset) readl(ctx->regs + (offset)) 67f2646380SEunchul Kim #define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset)) 68f2646380SEunchul Kim 69f2646380SEunchul Kim /* 70f2646380SEunchul Kim * A structure of scaler. 71f2646380SEunchul Kim * 72f2646380SEunchul Kim * @range: narrow, wide. 73f2646380SEunchul Kim * @pre_shfactor: pre sclaer shift factor. 74f2646380SEunchul Kim * @pre_hratio: horizontal ratio of the prescaler. 75f2646380SEunchul Kim * @pre_vratio: vertical ratio of the prescaler. 76f2646380SEunchul Kim * @main_hratio: the main scaler's horizontal ratio. 77f2646380SEunchul Kim * @main_vratio: the main scaler's vertical ratio. 78f2646380SEunchul Kim */ 79f2646380SEunchul Kim struct gsc_scaler { 80f2646380SEunchul Kim bool range; 81f2646380SEunchul Kim u32 pre_shfactor; 82f2646380SEunchul Kim u32 pre_hratio; 83f2646380SEunchul Kim u32 pre_vratio; 84f2646380SEunchul Kim unsigned long main_hratio; 85f2646380SEunchul Kim unsigned long main_vratio; 86f2646380SEunchul Kim }; 87f2646380SEunchul Kim 88f2646380SEunchul Kim /* 89f2646380SEunchul Kim * A structure of gsc context. 90f2646380SEunchul Kim * 91f2646380SEunchul Kim * @regs_res: register resources. 92f2646380SEunchul Kim * @regs: memory mapped io registers. 93f2646380SEunchul Kim * @gsc_clk: gsc gate clock. 94f2646380SEunchul Kim * @sc: scaler infomations. 95f2646380SEunchul Kim * @id: gsc id. 96f2646380SEunchul Kim * @irq: irq number. 97f2646380SEunchul Kim * @rotation: supports rotation of src. 98f2646380SEunchul Kim */ 99f2646380SEunchul Kim struct gsc_context { 1008b7d3ec8SMarek Szyprowski struct exynos_drm_ipp ipp; 1018b7d3ec8SMarek Szyprowski struct drm_device *drm_dev; 1028b7d3ec8SMarek Szyprowski struct device *dev; 1038b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task; 1048b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_formats *formats; 1058b7d3ec8SMarek Szyprowski unsigned int num_formats; 1068b7d3ec8SMarek Szyprowski 107f2646380SEunchul Kim struct resource *regs_res; 108f2646380SEunchul Kim void __iomem *regs; 1098b7d3ec8SMarek Szyprowski const char **clk_names; 1108b7d3ec8SMarek Szyprowski struct clk *clocks[GSC_MAX_CLOCKS]; 1118b7d3ec8SMarek Szyprowski int num_clocks; 112f2646380SEunchul Kim struct gsc_scaler sc; 113f2646380SEunchul Kim int id; 114f2646380SEunchul Kim int irq; 115f2646380SEunchul Kim bool rotation; 1168b7d3ec8SMarek Szyprowski }; 1178b7d3ec8SMarek Szyprowski 1188b7d3ec8SMarek Szyprowski /** 1198b7d3ec8SMarek Szyprowski * struct gsc_driverdata - per device type driver data for init time. 1208b7d3ec8SMarek Szyprowski * 1218b7d3ec8SMarek Szyprowski * @limits: picture size limits array 1228b7d3ec8SMarek Szyprowski * @clk_names: names of clocks needed by this variant 1238b7d3ec8SMarek Szyprowski * @num_clocks: the number of clocks needed by this variant 1248b7d3ec8SMarek Szyprowski */ 1258b7d3ec8SMarek Szyprowski struct gsc_driverdata { 1268b7d3ec8SMarek Szyprowski const struct drm_exynos_ipp_limit *limits; 1278b7d3ec8SMarek Szyprowski int num_limits; 1288b7d3ec8SMarek Szyprowski const char *clk_names[GSC_MAX_CLOCKS]; 1298b7d3ec8SMarek Szyprowski int num_clocks; 130f2646380SEunchul Kim }; 131f2646380SEunchul Kim 132f2646380SEunchul Kim /* 8-tap Filter Coefficient */ 133f2646380SEunchul Kim static const int h_coef_8t[GSC_COEF_RATIO][GSC_COEF_ATTR][GSC_COEF_H_8T] = { 134f2646380SEunchul Kim { /* Ratio <= 65536 (~8:8) */ 135f2646380SEunchul Kim { 0, 0, 0, 128, 0, 0, 0, 0 }, 136f2646380SEunchul Kim { -1, 2, -6, 127, 7, -2, 1, 0 }, 137f2646380SEunchul Kim { -1, 4, -12, 125, 16, -5, 1, 0 }, 138f2646380SEunchul Kim { -1, 5, -15, 120, 25, -8, 2, 0 }, 139f2646380SEunchul Kim { -1, 6, -18, 114, 35, -10, 3, -1 }, 140f2646380SEunchul Kim { -1, 6, -20, 107, 46, -13, 4, -1 }, 141f2646380SEunchul Kim { -2, 7, -21, 99, 57, -16, 5, -1 }, 142f2646380SEunchul Kim { -1, 6, -20, 89, 68, -18, 5, -1 }, 143f2646380SEunchul Kim { -1, 6, -20, 79, 79, -20, 6, -1 }, 144f2646380SEunchul Kim { -1, 5, -18, 68, 89, -20, 6, -1 }, 145f2646380SEunchul Kim { -1, 5, -16, 57, 99, -21, 7, -2 }, 146f2646380SEunchul Kim { -1, 4, -13, 46, 107, -20, 6, -1 }, 147f2646380SEunchul Kim { -1, 3, -10, 35, 114, -18, 6, -1 }, 148f2646380SEunchul Kim { 0, 2, -8, 25, 120, -15, 5, -1 }, 149f2646380SEunchul Kim { 0, 1, -5, 16, 125, -12, 4, -1 }, 150f2646380SEunchul Kim { 0, 1, -2, 7, 127, -6, 2, -1 } 151f2646380SEunchul Kim }, { /* 65536 < Ratio <= 74898 (~8:7) */ 152f2646380SEunchul Kim { 3, -8, 14, 111, 13, -8, 3, 0 }, 153f2646380SEunchul Kim { 2, -6, 7, 112, 21, -10, 3, -1 }, 154f2646380SEunchul Kim { 2, -4, 1, 110, 28, -12, 4, -1 }, 155f2646380SEunchul Kim { 1, -2, -3, 106, 36, -13, 4, -1 }, 156f2646380SEunchul Kim { 1, -1, -7, 103, 44, -15, 4, -1 }, 157f2646380SEunchul Kim { 1, 1, -11, 97, 53, -16, 4, -1 }, 158f2646380SEunchul Kim { 0, 2, -13, 91, 61, -16, 4, -1 }, 159f2646380SEunchul Kim { 0, 3, -15, 85, 69, -17, 4, -1 }, 160f2646380SEunchul Kim { 0, 3, -16, 77, 77, -16, 3, 0 }, 161f2646380SEunchul Kim { -1, 4, -17, 69, 85, -15, 3, 0 }, 162f2646380SEunchul Kim { -1, 4, -16, 61, 91, -13, 2, 0 }, 163f2646380SEunchul Kim { -1, 4, -16, 53, 97, -11, 1, 1 }, 164f2646380SEunchul Kim { -1, 4, -15, 44, 103, -7, -1, 1 }, 165f2646380SEunchul Kim { -1, 4, -13, 36, 106, -3, -2, 1 }, 166f2646380SEunchul Kim { -1, 4, -12, 28, 110, 1, -4, 2 }, 167f2646380SEunchul Kim { -1, 3, -10, 21, 112, 7, -6, 2 } 168f2646380SEunchul Kim }, { /* 74898 < Ratio <= 87381 (~8:6) */ 169f2646380SEunchul Kim { 2, -11, 25, 96, 25, -11, 2, 0 }, 170f2646380SEunchul Kim { 2, -10, 19, 96, 31, -12, 2, 0 }, 171f2646380SEunchul Kim { 2, -9, 14, 94, 37, -12, 2, 0 }, 172f2646380SEunchul Kim { 2, -8, 10, 92, 43, -12, 1, 0 }, 173f2646380SEunchul Kim { 2, -7, 5, 90, 49, -12, 1, 0 }, 174f2646380SEunchul Kim { 2, -5, 1, 86, 55, -12, 0, 1 }, 175f2646380SEunchul Kim { 2, -4, -2, 82, 61, -11, -1, 1 }, 176f2646380SEunchul Kim { 1, -3, -5, 77, 67, -9, -1, 1 }, 177f2646380SEunchul Kim { 1, -2, -7, 72, 72, -7, -2, 1 }, 178f2646380SEunchul Kim { 1, -1, -9, 67, 77, -5, -3, 1 }, 179f2646380SEunchul Kim { 1, -1, -11, 61, 82, -2, -4, 2 }, 180f2646380SEunchul Kim { 1, 0, -12, 55, 86, 1, -5, 2 }, 181f2646380SEunchul Kim { 0, 1, -12, 49, 90, 5, -7, 2 }, 182f2646380SEunchul Kim { 0, 1, -12, 43, 92, 10, -8, 2 }, 183f2646380SEunchul Kim { 0, 2, -12, 37, 94, 14, -9, 2 }, 184f2646380SEunchul Kim { 0, 2, -12, 31, 96, 19, -10, 2 } 185f2646380SEunchul Kim }, { /* 87381 < Ratio <= 104857 (~8:5) */ 186f2646380SEunchul Kim { -1, -8, 33, 80, 33, -8, -1, 0 }, 187f2646380SEunchul Kim { -1, -8, 28, 80, 37, -7, -2, 1 }, 188f2646380SEunchul Kim { 0, -8, 24, 79, 41, -7, -2, 1 }, 189f2646380SEunchul Kim { 0, -8, 20, 78, 46, -6, -3, 1 }, 190f2646380SEunchul Kim { 0, -8, 16, 76, 50, -4, -3, 1 }, 191f2646380SEunchul Kim { 0, -7, 13, 74, 54, -3, -4, 1 }, 192f2646380SEunchul Kim { 1, -7, 10, 71, 58, -1, -5, 1 }, 193f2646380SEunchul Kim { 1, -6, 6, 68, 62, 1, -5, 1 }, 194f2646380SEunchul Kim { 1, -6, 4, 65, 65, 4, -6, 1 }, 195f2646380SEunchul Kim { 1, -5, 1, 62, 68, 6, -6, 1 }, 196f2646380SEunchul Kim { 1, -5, -1, 58, 71, 10, -7, 1 }, 197f2646380SEunchul Kim { 1, -4, -3, 54, 74, 13, -7, 0 }, 198f2646380SEunchul Kim { 1, -3, -4, 50, 76, 16, -8, 0 }, 199f2646380SEunchul Kim { 1, -3, -6, 46, 78, 20, -8, 0 }, 200f2646380SEunchul Kim { 1, -2, -7, 41, 79, 24, -8, 0 }, 201f2646380SEunchul Kim { 1, -2, -7, 37, 80, 28, -8, -1 } 202f2646380SEunchul Kim }, { /* 104857 < Ratio <= 131072 (~8:4) */ 203f2646380SEunchul Kim { -3, 0, 35, 64, 35, 0, -3, 0 }, 204f2646380SEunchul Kim { -3, -1, 32, 64, 38, 1, -3, 0 }, 205f2646380SEunchul Kim { -2, -2, 29, 63, 41, 2, -3, 0 }, 206f2646380SEunchul Kim { -2, -3, 27, 63, 43, 4, -4, 0 }, 207f2646380SEunchul Kim { -2, -3, 24, 61, 46, 6, -4, 0 }, 208f2646380SEunchul Kim { -2, -3, 21, 60, 49, 7, -4, 0 }, 209f2646380SEunchul Kim { -1, -4, 19, 59, 51, 9, -4, -1 }, 210f2646380SEunchul Kim { -1, -4, 16, 57, 53, 12, -4, -1 }, 211f2646380SEunchul Kim { -1, -4, 14, 55, 55, 14, -4, -1 }, 212f2646380SEunchul Kim { -1, -4, 12, 53, 57, 16, -4, -1 }, 213f2646380SEunchul Kim { -1, -4, 9, 51, 59, 19, -4, -1 }, 214f2646380SEunchul Kim { 0, -4, 7, 49, 60, 21, -3, -2 }, 215f2646380SEunchul Kim { 0, -4, 6, 46, 61, 24, -3, -2 }, 216f2646380SEunchul Kim { 0, -4, 4, 43, 63, 27, -3, -2 }, 217f2646380SEunchul Kim { 0, -3, 2, 41, 63, 29, -2, -2 }, 218f2646380SEunchul Kim { 0, -3, 1, 38, 64, 32, -1, -3 } 219f2646380SEunchul Kim }, { /* 131072 < Ratio <= 174762 (~8:3) */ 220f2646380SEunchul Kim { -1, 8, 33, 48, 33, 8, -1, 0 }, 221f2646380SEunchul Kim { -1, 7, 31, 49, 35, 9, -1, -1 }, 222f2646380SEunchul Kim { -1, 6, 30, 49, 36, 10, -1, -1 }, 223f2646380SEunchul Kim { -1, 5, 28, 48, 38, 12, -1, -1 }, 224f2646380SEunchul Kim { -1, 4, 26, 48, 39, 13, 0, -1 }, 225f2646380SEunchul Kim { -1, 3, 24, 47, 41, 15, 0, -1 }, 226f2646380SEunchul Kim { -1, 2, 23, 47, 42, 16, 0, -1 }, 227f2646380SEunchul Kim { -1, 2, 21, 45, 43, 18, 1, -1 }, 228f2646380SEunchul Kim { -1, 1, 19, 45, 45, 19, 1, -1 }, 229f2646380SEunchul Kim { -1, 1, 18, 43, 45, 21, 2, -1 }, 230f2646380SEunchul Kim { -1, 0, 16, 42, 47, 23, 2, -1 }, 231f2646380SEunchul Kim { -1, 0, 15, 41, 47, 24, 3, -1 }, 232f2646380SEunchul Kim { -1, 0, 13, 39, 48, 26, 4, -1 }, 233f2646380SEunchul Kim { -1, -1, 12, 38, 48, 28, 5, -1 }, 234f2646380SEunchul Kim { -1, -1, 10, 36, 49, 30, 6, -1 }, 235f2646380SEunchul Kim { -1, -1, 9, 35, 49, 31, 7, -1 } 236f2646380SEunchul Kim }, { /* 174762 < Ratio <= 262144 (~8:2) */ 237f2646380SEunchul Kim { 2, 13, 30, 38, 30, 13, 2, 0 }, 238f2646380SEunchul Kim { 2, 12, 29, 38, 30, 14, 3, 0 }, 239f2646380SEunchul Kim { 2, 11, 28, 38, 31, 15, 3, 0 }, 240f2646380SEunchul Kim { 2, 10, 26, 38, 32, 16, 4, 0 }, 241f2646380SEunchul Kim { 1, 10, 26, 37, 33, 17, 4, 0 }, 242f2646380SEunchul Kim { 1, 9, 24, 37, 34, 18, 5, 0 }, 243f2646380SEunchul Kim { 1, 8, 24, 37, 34, 19, 5, 0 }, 244f2646380SEunchul Kim { 1, 7, 22, 36, 35, 20, 6, 1 }, 245f2646380SEunchul Kim { 1, 6, 21, 36, 36, 21, 6, 1 }, 246f2646380SEunchul Kim { 1, 6, 20, 35, 36, 22, 7, 1 }, 247f2646380SEunchul Kim { 0, 5, 19, 34, 37, 24, 8, 1 }, 248f2646380SEunchul Kim { 0, 5, 18, 34, 37, 24, 9, 1 }, 249f2646380SEunchul Kim { 0, 4, 17, 33, 37, 26, 10, 1 }, 250f2646380SEunchul Kim { 0, 4, 16, 32, 38, 26, 10, 2 }, 251f2646380SEunchul Kim { 0, 3, 15, 31, 38, 28, 11, 2 }, 252f2646380SEunchul Kim { 0, 3, 14, 30, 38, 29, 12, 2 } 253f2646380SEunchul Kim } 254f2646380SEunchul Kim }; 255f2646380SEunchul Kim 256f2646380SEunchul Kim /* 4-tap Filter Coefficient */ 257f2646380SEunchul Kim static const int v_coef_4t[GSC_COEF_RATIO][GSC_COEF_ATTR][GSC_COEF_V_4T] = { 258f2646380SEunchul Kim { /* Ratio <= 65536 (~8:8) */ 259f2646380SEunchul Kim { 0, 128, 0, 0 }, 260f2646380SEunchul Kim { -4, 127, 5, 0 }, 261f2646380SEunchul Kim { -6, 124, 11, -1 }, 262f2646380SEunchul Kim { -8, 118, 19, -1 }, 263f2646380SEunchul Kim { -8, 111, 27, -2 }, 264f2646380SEunchul Kim { -8, 102, 37, -3 }, 265f2646380SEunchul Kim { -8, 92, 48, -4 }, 266f2646380SEunchul Kim { -7, 81, 59, -5 }, 267f2646380SEunchul Kim { -6, 70, 70, -6 }, 268f2646380SEunchul Kim { -5, 59, 81, -7 }, 269f2646380SEunchul Kim { -4, 48, 92, -8 }, 270f2646380SEunchul Kim { -3, 37, 102, -8 }, 271f2646380SEunchul Kim { -2, 27, 111, -8 }, 272f2646380SEunchul Kim { -1, 19, 118, -8 }, 273f2646380SEunchul Kim { -1, 11, 124, -6 }, 274f2646380SEunchul Kim { 0, 5, 127, -4 } 275f2646380SEunchul Kim }, { /* 65536 < Ratio <= 74898 (~8:7) */ 276f2646380SEunchul Kim { 8, 112, 8, 0 }, 277f2646380SEunchul Kim { 4, 111, 14, -1 }, 278f2646380SEunchul Kim { 1, 109, 20, -2 }, 279f2646380SEunchul Kim { -2, 105, 27, -2 }, 280f2646380SEunchul Kim { -3, 100, 34, -3 }, 281f2646380SEunchul Kim { -5, 93, 43, -3 }, 282f2646380SEunchul Kim { -5, 86, 51, -4 }, 283f2646380SEunchul Kim { -5, 77, 60, -4 }, 284f2646380SEunchul Kim { -5, 69, 69, -5 }, 285f2646380SEunchul Kim { -4, 60, 77, -5 }, 286f2646380SEunchul Kim { -4, 51, 86, -5 }, 287f2646380SEunchul Kim { -3, 43, 93, -5 }, 288f2646380SEunchul Kim { -3, 34, 100, -3 }, 289f2646380SEunchul Kim { -2, 27, 105, -2 }, 290f2646380SEunchul Kim { -2, 20, 109, 1 }, 291f2646380SEunchul Kim { -1, 14, 111, 4 } 292f2646380SEunchul Kim }, { /* 74898 < Ratio <= 87381 (~8:6) */ 293f2646380SEunchul Kim { 16, 96, 16, 0 }, 294f2646380SEunchul Kim { 12, 97, 21, -2 }, 295f2646380SEunchul Kim { 8, 96, 26, -2 }, 296f2646380SEunchul Kim { 5, 93, 32, -2 }, 297f2646380SEunchul Kim { 2, 89, 39, -2 }, 298f2646380SEunchul Kim { 0, 84, 46, -2 }, 299f2646380SEunchul Kim { -1, 79, 53, -3 }, 300f2646380SEunchul Kim { -2, 73, 59, -2 }, 301f2646380SEunchul Kim { -2, 66, 66, -2 }, 302f2646380SEunchul Kim { -2, 59, 73, -2 }, 303f2646380SEunchul Kim { -3, 53, 79, -1 }, 304f2646380SEunchul Kim { -2, 46, 84, 0 }, 305f2646380SEunchul Kim { -2, 39, 89, 2 }, 306f2646380SEunchul Kim { -2, 32, 93, 5 }, 307f2646380SEunchul Kim { -2, 26, 96, 8 }, 308f2646380SEunchul Kim { -2, 21, 97, 12 } 309f2646380SEunchul Kim }, { /* 87381 < Ratio <= 104857 (~8:5) */ 310f2646380SEunchul Kim { 22, 84, 22, 0 }, 311f2646380SEunchul Kim { 18, 85, 26, -1 }, 312f2646380SEunchul Kim { 14, 84, 31, -1 }, 313f2646380SEunchul Kim { 11, 82, 36, -1 }, 314f2646380SEunchul Kim { 8, 79, 42, -1 }, 315f2646380SEunchul Kim { 6, 76, 47, -1 }, 316f2646380SEunchul Kim { 4, 72, 52, 0 }, 317f2646380SEunchul Kim { 2, 68, 58, 0 }, 318f2646380SEunchul Kim { 1, 63, 63, 1 }, 319f2646380SEunchul Kim { 0, 58, 68, 2 }, 320f2646380SEunchul Kim { 0, 52, 72, 4 }, 321f2646380SEunchul Kim { -1, 47, 76, 6 }, 322f2646380SEunchul Kim { -1, 42, 79, 8 }, 323f2646380SEunchul Kim { -1, 36, 82, 11 }, 324f2646380SEunchul Kim { -1, 31, 84, 14 }, 325f2646380SEunchul Kim { -1, 26, 85, 18 } 326f2646380SEunchul Kim }, { /* 104857 < Ratio <= 131072 (~8:4) */ 327f2646380SEunchul Kim { 26, 76, 26, 0 }, 328f2646380SEunchul Kim { 22, 76, 30, 0 }, 329f2646380SEunchul Kim { 19, 75, 34, 0 }, 330f2646380SEunchul Kim { 16, 73, 38, 1 }, 331f2646380SEunchul Kim { 13, 71, 43, 1 }, 332f2646380SEunchul Kim { 10, 69, 47, 2 }, 333f2646380SEunchul Kim { 8, 66, 51, 3 }, 334f2646380SEunchul Kim { 6, 63, 55, 4 }, 335f2646380SEunchul Kim { 5, 59, 59, 5 }, 336f2646380SEunchul Kim { 4, 55, 63, 6 }, 337f2646380SEunchul Kim { 3, 51, 66, 8 }, 338f2646380SEunchul Kim { 2, 47, 69, 10 }, 339f2646380SEunchul Kim { 1, 43, 71, 13 }, 340f2646380SEunchul Kim { 1, 38, 73, 16 }, 341f2646380SEunchul Kim { 0, 34, 75, 19 }, 342f2646380SEunchul Kim { 0, 30, 76, 22 } 343f2646380SEunchul Kim }, { /* 131072 < Ratio <= 174762 (~8:3) */ 344f2646380SEunchul Kim { 29, 70, 29, 0 }, 345f2646380SEunchul Kim { 26, 68, 32, 2 }, 346f2646380SEunchul Kim { 23, 67, 36, 2 }, 347f2646380SEunchul Kim { 20, 66, 39, 3 }, 348f2646380SEunchul Kim { 17, 65, 43, 3 }, 349f2646380SEunchul Kim { 15, 63, 46, 4 }, 350f2646380SEunchul Kim { 12, 61, 50, 5 }, 351f2646380SEunchul Kim { 10, 58, 53, 7 }, 352f2646380SEunchul Kim { 8, 56, 56, 8 }, 353f2646380SEunchul Kim { 7, 53, 58, 10 }, 354f2646380SEunchul Kim { 5, 50, 61, 12 }, 355f2646380SEunchul Kim { 4, 46, 63, 15 }, 356f2646380SEunchul Kim { 3, 43, 65, 17 }, 357f2646380SEunchul Kim { 3, 39, 66, 20 }, 358f2646380SEunchul Kim { 2, 36, 67, 23 }, 359f2646380SEunchul Kim { 2, 32, 68, 26 } 360f2646380SEunchul Kim }, { /* 174762 < Ratio <= 262144 (~8:2) */ 361f2646380SEunchul Kim { 32, 64, 32, 0 }, 362f2646380SEunchul Kim { 28, 63, 34, 3 }, 363f2646380SEunchul Kim { 25, 62, 37, 4 }, 364f2646380SEunchul Kim { 22, 62, 40, 4 }, 365f2646380SEunchul Kim { 19, 61, 43, 5 }, 366f2646380SEunchul Kim { 17, 59, 46, 6 }, 367f2646380SEunchul Kim { 15, 58, 48, 7 }, 368f2646380SEunchul Kim { 13, 55, 51, 9 }, 369f2646380SEunchul Kim { 11, 53, 53, 11 }, 370f2646380SEunchul Kim { 9, 51, 55, 13 }, 371f2646380SEunchul Kim { 7, 48, 58, 15 }, 372f2646380SEunchul Kim { 6, 46, 59, 17 }, 373f2646380SEunchul Kim { 5, 43, 61, 19 }, 374f2646380SEunchul Kim { 4, 40, 62, 22 }, 375f2646380SEunchul Kim { 4, 37, 62, 25 }, 376f2646380SEunchul Kim { 3, 34, 63, 28 } 377f2646380SEunchul Kim } 378f2646380SEunchul Kim }; 379f2646380SEunchul Kim 380f2646380SEunchul Kim static int gsc_sw_reset(struct gsc_context *ctx) 381f2646380SEunchul Kim { 382f2646380SEunchul Kim u32 cfg; 383f2646380SEunchul Kim int count = GSC_RESET_TIMEOUT; 384f2646380SEunchul Kim 385f2646380SEunchul Kim /* s/w reset */ 386f2646380SEunchul Kim cfg = (GSC_SW_RESET_SRESET); 387f2646380SEunchul Kim gsc_write(cfg, GSC_SW_RESET); 388f2646380SEunchul Kim 389f2646380SEunchul Kim /* wait s/w reset complete */ 390f2646380SEunchul Kim while (count--) { 391f2646380SEunchul Kim cfg = gsc_read(GSC_SW_RESET); 392f2646380SEunchul Kim if (!cfg) 393f2646380SEunchul Kim break; 394f2646380SEunchul Kim usleep_range(1000, 2000); 395f2646380SEunchul Kim } 396f2646380SEunchul Kim 397f2646380SEunchul Kim if (cfg) { 398f2646380SEunchul Kim DRM_ERROR("failed to reset gsc h/w.\n"); 399f2646380SEunchul Kim return -EBUSY; 400f2646380SEunchul Kim } 401f2646380SEunchul Kim 402f2646380SEunchul Kim /* reset sequence */ 403f2646380SEunchul Kim cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); 404f2646380SEunchul Kim cfg |= (GSC_IN_BASE_ADDR_MASK | 405f2646380SEunchul Kim GSC_IN_BASE_ADDR_PINGPONG(0)); 406f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_Y_MASK); 407f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CB_MASK); 408f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CR_MASK); 409f2646380SEunchul Kim 410f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); 411f2646380SEunchul Kim cfg |= (GSC_OUT_BASE_ADDR_MASK | 412f2646380SEunchul Kim GSC_OUT_BASE_ADDR_PINGPONG(0)); 413f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_Y_MASK); 414f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CB_MASK); 415f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CR_MASK); 416f2646380SEunchul Kim 417f2646380SEunchul Kim return 0; 418f2646380SEunchul Kim } 419f2646380SEunchul Kim 420f2646380SEunchul Kim static void gsc_handle_irq(struct gsc_context *ctx, bool enable, 421f2646380SEunchul Kim bool overflow, bool done) 422f2646380SEunchul Kim { 423f2646380SEunchul Kim u32 cfg; 424f2646380SEunchul Kim 425cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("enable[%d]overflow[%d]level[%d]\n", 426f2646380SEunchul Kim enable, overflow, done); 427f2646380SEunchul Kim 428f2646380SEunchul Kim cfg = gsc_read(GSC_IRQ); 429f2646380SEunchul Kim cfg |= (GSC_IRQ_OR_MASK | GSC_IRQ_FRMDONE_MASK); 430f2646380SEunchul Kim 431f2646380SEunchul Kim if (enable) 432f2646380SEunchul Kim cfg |= GSC_IRQ_ENABLE; 433f2646380SEunchul Kim else 434f2646380SEunchul Kim cfg &= ~GSC_IRQ_ENABLE; 435f2646380SEunchul Kim 436f2646380SEunchul Kim if (overflow) 437f2646380SEunchul Kim cfg &= ~GSC_IRQ_OR_MASK; 438f2646380SEunchul Kim else 439f2646380SEunchul Kim cfg |= GSC_IRQ_OR_MASK; 440f2646380SEunchul Kim 441f2646380SEunchul Kim if (done) 442f2646380SEunchul Kim cfg &= ~GSC_IRQ_FRMDONE_MASK; 443f2646380SEunchul Kim else 444f2646380SEunchul Kim cfg |= GSC_IRQ_FRMDONE_MASK; 445f2646380SEunchul Kim 446f2646380SEunchul Kim gsc_write(cfg, GSC_IRQ); 447f2646380SEunchul Kim } 448f2646380SEunchul Kim 449f2646380SEunchul Kim 450d25a40a7SMarek Szyprowski static void gsc_src_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled) 451f2646380SEunchul Kim { 452f2646380SEunchul Kim u32 cfg; 453f2646380SEunchul Kim 454cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); 455f2646380SEunchul Kim 456f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON); 457f2646380SEunchul Kim cfg &= ~(GSC_IN_RGB_TYPE_MASK | GSC_IN_YUV422_1P_ORDER_MASK | 458f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_MASK | GSC_IN_FORMAT_MASK | 459f2646380SEunchul Kim GSC_IN_TILE_TYPE_MASK | GSC_IN_TILE_MODE | 460f2646380SEunchul Kim GSC_IN_CHROM_STRIDE_SEL_MASK | GSC_IN_RB_SWAP_MASK); 461f2646380SEunchul Kim 462f2646380SEunchul Kim switch (fmt) { 463f2646380SEunchul Kim case DRM_FORMAT_RGB565: 464f2646380SEunchul Kim cfg |= GSC_IN_RGB565; 465f2646380SEunchul Kim break; 466f2646380SEunchul Kim case DRM_FORMAT_XRGB8888: 4678b7d3ec8SMarek Szyprowski case DRM_FORMAT_ARGB8888: 468f2646380SEunchul Kim cfg |= GSC_IN_XRGB8888; 469f2646380SEunchul Kim break; 470f2646380SEunchul Kim case DRM_FORMAT_BGRX8888: 471f2646380SEunchul Kim cfg |= (GSC_IN_XRGB8888 | GSC_IN_RB_SWAP); 472f2646380SEunchul Kim break; 473f2646380SEunchul Kim case DRM_FORMAT_YUYV: 474f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P | 475f2646380SEunchul Kim GSC_IN_YUV422_1P_ORDER_LSB_Y | 476f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CBCR); 477f2646380SEunchul Kim break; 478f2646380SEunchul Kim case DRM_FORMAT_YVYU: 479f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P | 480f2646380SEunchul Kim GSC_IN_YUV422_1P_ORDER_LSB_Y | 481f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CRCB); 482f2646380SEunchul Kim break; 483f2646380SEunchul Kim case DRM_FORMAT_UYVY: 484f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P | 485f2646380SEunchul Kim GSC_IN_YUV422_1P_OEDER_LSB_C | 486f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CBCR); 487f2646380SEunchul Kim break; 488f2646380SEunchul Kim case DRM_FORMAT_VYUY: 489f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P | 490f2646380SEunchul Kim GSC_IN_YUV422_1P_OEDER_LSB_C | 491f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CRCB); 492f2646380SEunchul Kim break; 493f2646380SEunchul Kim case DRM_FORMAT_NV21: 494dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV420_2P); 495dd209ef8SMarek Szyprowski break; 496f2646380SEunchul Kim case DRM_FORMAT_NV61: 497dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV422_2P); 498f2646380SEunchul Kim break; 499f2646380SEunchul Kim case DRM_FORMAT_YUV422: 500f2646380SEunchul Kim cfg |= GSC_IN_YUV422_3P; 501f2646380SEunchul Kim break; 502f2646380SEunchul Kim case DRM_FORMAT_YUV420: 503dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV420_3P); 504dd209ef8SMarek Szyprowski break; 505f2646380SEunchul Kim case DRM_FORMAT_YVU420: 506dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV420_3P); 507f2646380SEunchul Kim break; 508f2646380SEunchul Kim case DRM_FORMAT_NV12: 509dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV420_2P); 510dd209ef8SMarek Szyprowski break; 511f2646380SEunchul Kim case DRM_FORMAT_NV16: 512dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV422_2P); 513f2646380SEunchul Kim break; 514f2646380SEunchul Kim } 515f2646380SEunchul Kim 516d25a40a7SMarek Szyprowski if (tiled) 517d25a40a7SMarek Szyprowski cfg |= (GSC_IN_TILE_C_16x8 | GSC_IN_TILE_MODE); 518d25a40a7SMarek Szyprowski 519f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON); 520f2646380SEunchul Kim } 521f2646380SEunchul Kim 5228b7d3ec8SMarek Szyprowski static void gsc_src_set_transf(struct gsc_context *ctx, unsigned int rotation) 523f2646380SEunchul Kim { 5248b7d3ec8SMarek Szyprowski unsigned int degree = rotation & DRM_MODE_ROTATE_MASK; 525f2646380SEunchul Kim u32 cfg; 526f2646380SEunchul Kim 527f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON); 528f2646380SEunchul Kim cfg &= ~GSC_IN_ROT_MASK; 529f2646380SEunchul Kim 530f2646380SEunchul Kim switch (degree) { 5318b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_0: 5328b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X) 5334cc11a5fSMarek Szyprowski cfg |= GSC_IN_ROT_XFLIP; 5344cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y) 535f2646380SEunchul Kim cfg |= GSC_IN_ROT_YFLIP; 536f2646380SEunchul Kim break; 5378b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_90: 538f2646380SEunchul Kim cfg |= GSC_IN_ROT_90; 5398b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X) 5404cc11a5fSMarek Szyprowski cfg |= GSC_IN_ROT_XFLIP; 5414cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y) 5428b7d3ec8SMarek Szyprowski cfg |= GSC_IN_ROT_YFLIP; 543f2646380SEunchul Kim break; 5448b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_180: 545f2646380SEunchul Kim cfg |= GSC_IN_ROT_180; 5468b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X) 5474cc11a5fSMarek Szyprowski cfg &= ~GSC_IN_ROT_XFLIP; 5484cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y) 5495149705dSHyungwon Hwang cfg &= ~GSC_IN_ROT_YFLIP; 550f2646380SEunchul Kim break; 5518b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_270: 552f2646380SEunchul Kim cfg |= GSC_IN_ROT_270; 5538b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X) 5544cc11a5fSMarek Szyprowski cfg &= ~GSC_IN_ROT_XFLIP; 5554cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y) 5565149705dSHyungwon Hwang cfg &= ~GSC_IN_ROT_YFLIP; 557f2646380SEunchul Kim break; 558f2646380SEunchul Kim } 559f2646380SEunchul Kim 560f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON); 561f2646380SEunchul Kim 562988a4731SHyungwon Hwang ctx->rotation = (cfg & GSC_IN_ROT_90) ? 1 : 0; 563f2646380SEunchul Kim } 564f2646380SEunchul Kim 5658b7d3ec8SMarek Szyprowski static void gsc_src_set_size(struct gsc_context *ctx, 5668b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_buffer *buf) 567f2646380SEunchul Kim { 568f2646380SEunchul Kim struct gsc_scaler *sc = &ctx->sc; 569f2646380SEunchul Kim u32 cfg; 570f2646380SEunchul Kim 571f2646380SEunchul Kim /* pixel offset */ 5728b7d3ec8SMarek Szyprowski cfg = (GSC_SRCIMG_OFFSET_X(buf->rect.x) | 5738b7d3ec8SMarek Szyprowski GSC_SRCIMG_OFFSET_Y(buf->rect.y)); 574f2646380SEunchul Kim gsc_write(cfg, GSC_SRCIMG_OFFSET); 575f2646380SEunchul Kim 576f2646380SEunchul Kim /* cropped size */ 5778b7d3ec8SMarek Szyprowski cfg = (GSC_CROPPED_WIDTH(buf->rect.w) | 5788b7d3ec8SMarek Szyprowski GSC_CROPPED_HEIGHT(buf->rect.h)); 579f2646380SEunchul Kim gsc_write(cfg, GSC_CROPPED_SIZE); 580f2646380SEunchul Kim 581f2646380SEunchul Kim /* original size */ 582f2646380SEunchul Kim cfg = gsc_read(GSC_SRCIMG_SIZE); 583f2646380SEunchul Kim cfg &= ~(GSC_SRCIMG_HEIGHT_MASK | 584f2646380SEunchul Kim GSC_SRCIMG_WIDTH_MASK); 585f2646380SEunchul Kim 5864958a1c0SMarek Szyprowski cfg |= (GSC_SRCIMG_WIDTH(buf->buf.pitch[0] / buf->format->cpp[0]) | 5878b7d3ec8SMarek Szyprowski GSC_SRCIMG_HEIGHT(buf->buf.height)); 588f2646380SEunchul Kim 589f2646380SEunchul Kim gsc_write(cfg, GSC_SRCIMG_SIZE); 590f2646380SEunchul Kim 591f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON); 592f2646380SEunchul Kim cfg &= ~GSC_IN_RGB_TYPE_MASK; 593f2646380SEunchul Kim 5948b7d3ec8SMarek Szyprowski if (buf->rect.w >= GSC_WIDTH_ITU_709) 595f2646380SEunchul Kim if (sc->range) 596f2646380SEunchul Kim cfg |= GSC_IN_RGB_HD_WIDE; 597f2646380SEunchul Kim else 598f2646380SEunchul Kim cfg |= GSC_IN_RGB_HD_NARROW; 599f2646380SEunchul Kim else 600f2646380SEunchul Kim if (sc->range) 601f2646380SEunchul Kim cfg |= GSC_IN_RGB_SD_WIDE; 602f2646380SEunchul Kim else 603f2646380SEunchul Kim cfg |= GSC_IN_RGB_SD_NARROW; 604f2646380SEunchul Kim 605f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON); 606f2646380SEunchul Kim } 607f2646380SEunchul Kim 6088b7d3ec8SMarek Szyprowski static void gsc_src_set_buf_seq(struct gsc_context *ctx, u32 buf_id, 6098b7d3ec8SMarek Szyprowski bool enqueue) 610f2646380SEunchul Kim { 6118b7d3ec8SMarek Szyprowski bool masked = !enqueue; 612f2646380SEunchul Kim u32 cfg; 613f2646380SEunchul Kim u32 mask = 0x00000001 << buf_id; 614f2646380SEunchul Kim 615f2646380SEunchul Kim /* mask register set */ 616f2646380SEunchul Kim cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); 617f2646380SEunchul Kim 618f2646380SEunchul Kim /* sequence id */ 619f2646380SEunchul Kim cfg &= ~mask; 620f2646380SEunchul Kim cfg |= masked << buf_id; 621f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_Y_MASK); 622f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CB_MASK); 623f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CR_MASK); 624f2646380SEunchul Kim } 625f2646380SEunchul Kim 6268b7d3ec8SMarek Szyprowski static void gsc_src_set_addr(struct gsc_context *ctx, u32 buf_id, 6278b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_buffer *buf) 628f2646380SEunchul Kim { 629f2646380SEunchul Kim /* address register set */ 6308b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[0], GSC_IN_BASE_ADDR_Y(buf_id)); 6318b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[1], GSC_IN_BASE_ADDR_CB(buf_id)); 6328b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[2], GSC_IN_BASE_ADDR_CR(buf_id)); 6338b7d3ec8SMarek Szyprowski 6348b7d3ec8SMarek Szyprowski gsc_src_set_buf_seq(ctx, buf_id, true); 635f2646380SEunchul Kim } 636f2646380SEunchul Kim 637d25a40a7SMarek Szyprowski static void gsc_dst_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled) 638f2646380SEunchul Kim { 639f2646380SEunchul Kim u32 cfg; 640f2646380SEunchul Kim 641cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); 642f2646380SEunchul Kim 643f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_CON); 644f2646380SEunchul Kim cfg &= ~(GSC_OUT_RGB_TYPE_MASK | GSC_OUT_YUV422_1P_ORDER_MASK | 645f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_MASK | GSC_OUT_FORMAT_MASK | 646f2646380SEunchul Kim GSC_OUT_CHROM_STRIDE_SEL_MASK | GSC_OUT_RB_SWAP_MASK | 647f2646380SEunchul Kim GSC_OUT_GLOBAL_ALPHA_MASK); 648f2646380SEunchul Kim 649f2646380SEunchul Kim switch (fmt) { 650f2646380SEunchul Kim case DRM_FORMAT_RGB565: 651f2646380SEunchul Kim cfg |= GSC_OUT_RGB565; 652f2646380SEunchul Kim break; 6538b7d3ec8SMarek Szyprowski case DRM_FORMAT_ARGB8888: 654f2646380SEunchul Kim case DRM_FORMAT_XRGB8888: 6558b7d3ec8SMarek Szyprowski cfg |= (GSC_OUT_XRGB8888 | GSC_OUT_GLOBAL_ALPHA(0xff)); 656f2646380SEunchul Kim break; 657f2646380SEunchul Kim case DRM_FORMAT_BGRX8888: 658f2646380SEunchul Kim cfg |= (GSC_OUT_XRGB8888 | GSC_OUT_RB_SWAP); 659f2646380SEunchul Kim break; 660f2646380SEunchul Kim case DRM_FORMAT_YUYV: 661f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P | 662f2646380SEunchul Kim GSC_OUT_YUV422_1P_ORDER_LSB_Y | 663f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CBCR); 664f2646380SEunchul Kim break; 665f2646380SEunchul Kim case DRM_FORMAT_YVYU: 666f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P | 667f2646380SEunchul Kim GSC_OUT_YUV422_1P_ORDER_LSB_Y | 668f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CRCB); 669f2646380SEunchul Kim break; 670f2646380SEunchul Kim case DRM_FORMAT_UYVY: 671f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P | 672f2646380SEunchul Kim GSC_OUT_YUV422_1P_OEDER_LSB_C | 673f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CBCR); 674f2646380SEunchul Kim break; 675f2646380SEunchul Kim case DRM_FORMAT_VYUY: 676f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P | 677f2646380SEunchul Kim GSC_OUT_YUV422_1P_OEDER_LSB_C | 678f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CRCB); 679f2646380SEunchul Kim break; 680f2646380SEunchul Kim case DRM_FORMAT_NV21: 681f2646380SEunchul Kim cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV420_2P); 682f2646380SEunchul Kim break; 683dd209ef8SMarek Szyprowski case DRM_FORMAT_NV61: 684dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV422_2P); 685dd209ef8SMarek Szyprowski break; 686f2646380SEunchul Kim case DRM_FORMAT_YUV422: 687dd209ef8SMarek Szyprowski cfg |= GSC_OUT_YUV422_3P; 688dd209ef8SMarek Szyprowski break; 689f2646380SEunchul Kim case DRM_FORMAT_YUV420: 690dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV420_3P); 691dd209ef8SMarek Szyprowski break; 692f2646380SEunchul Kim case DRM_FORMAT_YVU420: 693dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV420_3P); 694f2646380SEunchul Kim break; 695f2646380SEunchul Kim case DRM_FORMAT_NV12: 696dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV420_2P); 697dd209ef8SMarek Szyprowski break; 698f2646380SEunchul Kim case DRM_FORMAT_NV16: 699dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV422_2P); 700f2646380SEunchul Kim break; 701f2646380SEunchul Kim } 702f2646380SEunchul Kim 703d25a40a7SMarek Szyprowski if (tiled) 704d25a40a7SMarek Szyprowski cfg |= (GSC_IN_TILE_C_16x8 | GSC_OUT_TILE_MODE); 705d25a40a7SMarek Szyprowski 706f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_CON); 707f2646380SEunchul Kim } 708f2646380SEunchul Kim 709f2646380SEunchul Kim static int gsc_get_ratio_shift(u32 src, u32 dst, u32 *ratio) 710f2646380SEunchul Kim { 711cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("src[%d]dst[%d]\n", src, dst); 712f2646380SEunchul Kim 713f2646380SEunchul Kim if (src >= dst * 8) { 714f2646380SEunchul Kim DRM_ERROR("failed to make ratio and shift.\n"); 715f2646380SEunchul Kim return -EINVAL; 716f2646380SEunchul Kim } else if (src >= dst * 4) 717f2646380SEunchul Kim *ratio = 4; 718f2646380SEunchul Kim else if (src >= dst * 2) 719f2646380SEunchul Kim *ratio = 2; 720f2646380SEunchul Kim else 721f2646380SEunchul Kim *ratio = 1; 722f2646380SEunchul Kim 723f2646380SEunchul Kim return 0; 724f2646380SEunchul Kim } 725f2646380SEunchul Kim 726f2646380SEunchul Kim static void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *shfactor) 727f2646380SEunchul Kim { 728f2646380SEunchul Kim if (hratio == 4 && vratio == 4) 729f2646380SEunchul Kim *shfactor = 4; 730f2646380SEunchul Kim else if ((hratio == 4 && vratio == 2) || 731f2646380SEunchul Kim (hratio == 2 && vratio == 4)) 732f2646380SEunchul Kim *shfactor = 3; 733f2646380SEunchul Kim else if ((hratio == 4 && vratio == 1) || 734f2646380SEunchul Kim (hratio == 1 && vratio == 4) || 735f2646380SEunchul Kim (hratio == 2 && vratio == 2)) 736f2646380SEunchul Kim *shfactor = 2; 737f2646380SEunchul Kim else if (hratio == 1 && vratio == 1) 738f2646380SEunchul Kim *shfactor = 0; 739f2646380SEunchul Kim else 740f2646380SEunchul Kim *shfactor = 1; 741f2646380SEunchul Kim } 742f2646380SEunchul Kim 743f2646380SEunchul Kim static int gsc_set_prescaler(struct gsc_context *ctx, struct gsc_scaler *sc, 7448b7d3ec8SMarek Szyprowski struct drm_exynos_ipp_task_rect *src, 7458b7d3ec8SMarek Szyprowski struct drm_exynos_ipp_task_rect *dst) 746f2646380SEunchul Kim { 747f2646380SEunchul Kim u32 cfg; 748f2646380SEunchul Kim u32 src_w, src_h, dst_w, dst_h; 749f2646380SEunchul Kim int ret = 0; 750f2646380SEunchul Kim 751f2646380SEunchul Kim src_w = src->w; 752f2646380SEunchul Kim src_h = src->h; 753f2646380SEunchul Kim 754f2646380SEunchul Kim if (ctx->rotation) { 755f2646380SEunchul Kim dst_w = dst->h; 756f2646380SEunchul Kim dst_h = dst->w; 757f2646380SEunchul Kim } else { 758f2646380SEunchul Kim dst_w = dst->w; 759f2646380SEunchul Kim dst_h = dst->h; 760f2646380SEunchul Kim } 761f2646380SEunchul Kim 762f2646380SEunchul Kim ret = gsc_get_ratio_shift(src_w, dst_w, &sc->pre_hratio); 763f2646380SEunchul Kim if (ret) { 7648b7d3ec8SMarek Szyprowski dev_err(ctx->dev, "failed to get ratio horizontal.\n"); 765f2646380SEunchul Kim return ret; 766f2646380SEunchul Kim } 767f2646380SEunchul Kim 768f2646380SEunchul Kim ret = gsc_get_ratio_shift(src_h, dst_h, &sc->pre_vratio); 769f2646380SEunchul Kim if (ret) { 7708b7d3ec8SMarek Szyprowski dev_err(ctx->dev, "failed to get ratio vertical.\n"); 771f2646380SEunchul Kim return ret; 772f2646380SEunchul Kim } 773f2646380SEunchul Kim 774cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("pre_hratio[%d]pre_vratio[%d]\n", 775cbc4c33dSYoungJun Cho sc->pre_hratio, sc->pre_vratio); 776f2646380SEunchul Kim 777f2646380SEunchul Kim sc->main_hratio = (src_w << 16) / dst_w; 778f2646380SEunchul Kim sc->main_vratio = (src_h << 16) / dst_h; 779f2646380SEunchul Kim 780cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("main_hratio[%ld]main_vratio[%ld]\n", 781cbc4c33dSYoungJun Cho sc->main_hratio, sc->main_vratio); 782f2646380SEunchul Kim 783f2646380SEunchul Kim gsc_get_prescaler_shfactor(sc->pre_hratio, sc->pre_vratio, 784f2646380SEunchul Kim &sc->pre_shfactor); 785f2646380SEunchul Kim 786cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("pre_shfactor[%d]\n", sc->pre_shfactor); 787f2646380SEunchul Kim 788f2646380SEunchul Kim cfg = (GSC_PRESC_SHFACTOR(sc->pre_shfactor) | 789f2646380SEunchul Kim GSC_PRESC_H_RATIO(sc->pre_hratio) | 790f2646380SEunchul Kim GSC_PRESC_V_RATIO(sc->pre_vratio)); 791f2646380SEunchul Kim gsc_write(cfg, GSC_PRE_SCALE_RATIO); 792f2646380SEunchul Kim 793f2646380SEunchul Kim return ret; 794f2646380SEunchul Kim } 795f2646380SEunchul Kim 796f2646380SEunchul Kim static void gsc_set_h_coef(struct gsc_context *ctx, unsigned long main_hratio) 797f2646380SEunchul Kim { 798f2646380SEunchul Kim int i, j, k, sc_ratio; 799f2646380SEunchul Kim 800f2646380SEunchul Kim if (main_hratio <= GSC_SC_UP_MAX_RATIO) 801f2646380SEunchul Kim sc_ratio = 0; 802f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_7_8) 803f2646380SEunchul Kim sc_ratio = 1; 804f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_6_8) 805f2646380SEunchul Kim sc_ratio = 2; 806f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_5_8) 807f2646380SEunchul Kim sc_ratio = 3; 808f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_4_8) 809f2646380SEunchul Kim sc_ratio = 4; 810f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_3_8) 811f2646380SEunchul Kim sc_ratio = 5; 812f2646380SEunchul Kim else 813f2646380SEunchul Kim sc_ratio = 6; 814f2646380SEunchul Kim 815f2646380SEunchul Kim for (i = 0; i < GSC_COEF_PHASE; i++) 816f2646380SEunchul Kim for (j = 0; j < GSC_COEF_H_8T; j++) 817f2646380SEunchul Kim for (k = 0; k < GSC_COEF_DEPTH; k++) 818f2646380SEunchul Kim gsc_write(h_coef_8t[sc_ratio][i][j], 819f2646380SEunchul Kim GSC_HCOEF(i, j, k)); 820f2646380SEunchul Kim } 821f2646380SEunchul Kim 822f2646380SEunchul Kim static void gsc_set_v_coef(struct gsc_context *ctx, unsigned long main_vratio) 823f2646380SEunchul Kim { 824f2646380SEunchul Kim int i, j, k, sc_ratio; 825f2646380SEunchul Kim 826f2646380SEunchul Kim if (main_vratio <= GSC_SC_UP_MAX_RATIO) 827f2646380SEunchul Kim sc_ratio = 0; 828f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_7_8) 829f2646380SEunchul Kim sc_ratio = 1; 830f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_6_8) 831f2646380SEunchul Kim sc_ratio = 2; 832f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_5_8) 833f2646380SEunchul Kim sc_ratio = 3; 834f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_4_8) 835f2646380SEunchul Kim sc_ratio = 4; 836f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_3_8) 837f2646380SEunchul Kim sc_ratio = 5; 838f2646380SEunchul Kim else 839f2646380SEunchul Kim sc_ratio = 6; 840f2646380SEunchul Kim 841f2646380SEunchul Kim for (i = 0; i < GSC_COEF_PHASE; i++) 842f2646380SEunchul Kim for (j = 0; j < GSC_COEF_V_4T; j++) 843f2646380SEunchul Kim for (k = 0; k < GSC_COEF_DEPTH; k++) 844f2646380SEunchul Kim gsc_write(v_coef_4t[sc_ratio][i][j], 845f2646380SEunchul Kim GSC_VCOEF(i, j, k)); 846f2646380SEunchul Kim } 847f2646380SEunchul Kim 848f2646380SEunchul Kim static void gsc_set_scaler(struct gsc_context *ctx, struct gsc_scaler *sc) 849f2646380SEunchul Kim { 850f2646380SEunchul Kim u32 cfg; 851f2646380SEunchul Kim 852cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("main_hratio[%ld]main_vratio[%ld]\n", 853cbc4c33dSYoungJun Cho sc->main_hratio, sc->main_vratio); 854f2646380SEunchul Kim 855f2646380SEunchul Kim gsc_set_h_coef(ctx, sc->main_hratio); 856f2646380SEunchul Kim cfg = GSC_MAIN_H_RATIO_VALUE(sc->main_hratio); 857f2646380SEunchul Kim gsc_write(cfg, GSC_MAIN_H_RATIO); 858f2646380SEunchul Kim 859f2646380SEunchul Kim gsc_set_v_coef(ctx, sc->main_vratio); 860f2646380SEunchul Kim cfg = GSC_MAIN_V_RATIO_VALUE(sc->main_vratio); 861f2646380SEunchul Kim gsc_write(cfg, GSC_MAIN_V_RATIO); 862f2646380SEunchul Kim } 863f2646380SEunchul Kim 8648b7d3ec8SMarek Szyprowski static void gsc_dst_set_size(struct gsc_context *ctx, 8658b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_buffer *buf) 866f2646380SEunchul Kim { 867f2646380SEunchul Kim struct gsc_scaler *sc = &ctx->sc; 868f2646380SEunchul Kim u32 cfg; 869f2646380SEunchul Kim 870f2646380SEunchul Kim /* pixel offset */ 8718b7d3ec8SMarek Szyprowski cfg = (GSC_DSTIMG_OFFSET_X(buf->rect.x) | 8728b7d3ec8SMarek Szyprowski GSC_DSTIMG_OFFSET_Y(buf->rect.y)); 873f2646380SEunchul Kim gsc_write(cfg, GSC_DSTIMG_OFFSET); 874f2646380SEunchul Kim 875f2646380SEunchul Kim /* scaled size */ 8768b7d3ec8SMarek Szyprowski if (ctx->rotation) 8778b7d3ec8SMarek Szyprowski cfg = (GSC_SCALED_WIDTH(buf->rect.h) | 8788b7d3ec8SMarek Szyprowski GSC_SCALED_HEIGHT(buf->rect.w)); 8798b7d3ec8SMarek Szyprowski else 8808b7d3ec8SMarek Szyprowski cfg = (GSC_SCALED_WIDTH(buf->rect.w) | 8818b7d3ec8SMarek Szyprowski GSC_SCALED_HEIGHT(buf->rect.h)); 882f2646380SEunchul Kim gsc_write(cfg, GSC_SCALED_SIZE); 883f2646380SEunchul Kim 884f2646380SEunchul Kim /* original size */ 885f2646380SEunchul Kim cfg = gsc_read(GSC_DSTIMG_SIZE); 8868b7d3ec8SMarek Szyprowski cfg &= ~(GSC_DSTIMG_HEIGHT_MASK | GSC_DSTIMG_WIDTH_MASK); 8874958a1c0SMarek Szyprowski cfg |= GSC_DSTIMG_WIDTH(buf->buf.pitch[0] / buf->format->cpp[0]) | 8888b7d3ec8SMarek Szyprowski GSC_DSTIMG_HEIGHT(buf->buf.height); 889f2646380SEunchul Kim gsc_write(cfg, GSC_DSTIMG_SIZE); 890f2646380SEunchul Kim 891f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_CON); 892f2646380SEunchul Kim cfg &= ~GSC_OUT_RGB_TYPE_MASK; 893f2646380SEunchul Kim 8948b7d3ec8SMarek Szyprowski if (buf->rect.w >= GSC_WIDTH_ITU_709) 895f2646380SEunchul Kim if (sc->range) 896f2646380SEunchul Kim cfg |= GSC_OUT_RGB_HD_WIDE; 897f2646380SEunchul Kim else 898f2646380SEunchul Kim cfg |= GSC_OUT_RGB_HD_NARROW; 899f2646380SEunchul Kim else 900f2646380SEunchul Kim if (sc->range) 901f2646380SEunchul Kim cfg |= GSC_OUT_RGB_SD_WIDE; 902f2646380SEunchul Kim else 903f2646380SEunchul Kim cfg |= GSC_OUT_RGB_SD_NARROW; 904f2646380SEunchul Kim 905f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_CON); 906f2646380SEunchul Kim } 907f2646380SEunchul Kim 908f2646380SEunchul Kim static int gsc_dst_get_buf_seq(struct gsc_context *ctx) 909f2646380SEunchul Kim { 910f2646380SEunchul Kim u32 cfg, i, buf_num = GSC_REG_SZ; 911f2646380SEunchul Kim u32 mask = 0x00000001; 912f2646380SEunchul Kim 913f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); 914f2646380SEunchul Kim 915f2646380SEunchul Kim for (i = 0; i < GSC_REG_SZ; i++) 916f2646380SEunchul Kim if (cfg & (mask << i)) 917f2646380SEunchul Kim buf_num--; 918f2646380SEunchul Kim 919cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("buf_num[%d]\n", buf_num); 920f2646380SEunchul Kim 921f2646380SEunchul Kim return buf_num; 922f2646380SEunchul Kim } 923f2646380SEunchul Kim 9248b7d3ec8SMarek Szyprowski static void gsc_dst_set_buf_seq(struct gsc_context *ctx, u32 buf_id, 9258b7d3ec8SMarek Szyprowski bool enqueue) 926f2646380SEunchul Kim { 9278b7d3ec8SMarek Szyprowski bool masked = !enqueue; 928f2646380SEunchul Kim u32 cfg; 929f2646380SEunchul Kim u32 mask = 0x00000001 << buf_id; 930f2646380SEunchul Kim 931f2646380SEunchul Kim /* mask register set */ 932f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); 933f2646380SEunchul Kim 934f2646380SEunchul Kim /* sequence id */ 935f2646380SEunchul Kim cfg &= ~mask; 936f2646380SEunchul Kim cfg |= masked << buf_id; 937f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_Y_MASK); 938f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CB_MASK); 939f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CR_MASK); 940f2646380SEunchul Kim 941f2646380SEunchul Kim /* interrupt enable */ 9428b7d3ec8SMarek Szyprowski if (enqueue && gsc_dst_get_buf_seq(ctx) >= GSC_BUF_START) 943f2646380SEunchul Kim gsc_handle_irq(ctx, true, false, true); 944f2646380SEunchul Kim 945f2646380SEunchul Kim /* interrupt disable */ 9468b7d3ec8SMarek Szyprowski if (!enqueue && gsc_dst_get_buf_seq(ctx) <= GSC_BUF_STOP) 947f2646380SEunchul Kim gsc_handle_irq(ctx, false, false, true); 948f2646380SEunchul Kim } 949f2646380SEunchul Kim 9508b7d3ec8SMarek Szyprowski static void gsc_dst_set_addr(struct gsc_context *ctx, 9518b7d3ec8SMarek Szyprowski u32 buf_id, struct exynos_drm_ipp_buffer *buf) 952f2646380SEunchul Kim { 953f2646380SEunchul Kim /* address register set */ 9548b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[0], GSC_OUT_BASE_ADDR_Y(buf_id)); 9558b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[1], GSC_OUT_BASE_ADDR_CB(buf_id)); 9568b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[2], GSC_OUT_BASE_ADDR_CR(buf_id)); 957f2646380SEunchul Kim 9588b7d3ec8SMarek Szyprowski gsc_dst_set_buf_seq(ctx, buf_id, true); 959f2646380SEunchul Kim } 960f2646380SEunchul Kim 961f2646380SEunchul Kim static int gsc_get_src_buf_index(struct gsc_context *ctx) 962f2646380SEunchul Kim { 963f2646380SEunchul Kim u32 cfg, curr_index, i; 964f2646380SEunchul Kim u32 buf_id = GSC_MAX_SRC; 965f2646380SEunchul Kim 966cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("gsc id[%d]\n", ctx->id); 967f2646380SEunchul Kim 968f2646380SEunchul Kim cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); 969f2646380SEunchul Kim curr_index = GSC_IN_CURR_GET_INDEX(cfg); 970f2646380SEunchul Kim 971f2646380SEunchul Kim for (i = curr_index; i < GSC_MAX_SRC; i++) { 972f2646380SEunchul Kim if (!((cfg >> i) & 0x1)) { 973f2646380SEunchul Kim buf_id = i; 974f2646380SEunchul Kim break; 975f2646380SEunchul Kim } 976f2646380SEunchul Kim } 977f2646380SEunchul Kim 9788b7d3ec8SMarek Szyprowski DRM_DEBUG_KMS("cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, 9798b7d3ec8SMarek Szyprowski curr_index, buf_id); 9808b7d3ec8SMarek Szyprowski 981f2646380SEunchul Kim if (buf_id == GSC_MAX_SRC) { 982f2646380SEunchul Kim DRM_ERROR("failed to get in buffer index.\n"); 983f2646380SEunchul Kim return -EINVAL; 984f2646380SEunchul Kim } 985f2646380SEunchul Kim 9868b7d3ec8SMarek Szyprowski gsc_src_set_buf_seq(ctx, buf_id, false); 987f2646380SEunchul Kim 988f2646380SEunchul Kim return buf_id; 989f2646380SEunchul Kim } 990f2646380SEunchul Kim 991f2646380SEunchul Kim static int gsc_get_dst_buf_index(struct gsc_context *ctx) 992f2646380SEunchul Kim { 993f2646380SEunchul Kim u32 cfg, curr_index, i; 994f2646380SEunchul Kim u32 buf_id = GSC_MAX_DST; 995f2646380SEunchul Kim 996cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("gsc id[%d]\n", ctx->id); 997f2646380SEunchul Kim 998f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); 999f2646380SEunchul Kim curr_index = GSC_OUT_CURR_GET_INDEX(cfg); 1000f2646380SEunchul Kim 1001f2646380SEunchul Kim for (i = curr_index; i < GSC_MAX_DST; i++) { 1002f2646380SEunchul Kim if (!((cfg >> i) & 0x1)) { 1003f2646380SEunchul Kim buf_id = i; 1004f2646380SEunchul Kim break; 1005f2646380SEunchul Kim } 1006f2646380SEunchul Kim } 1007f2646380SEunchul Kim 1008f2646380SEunchul Kim if (buf_id == GSC_MAX_DST) { 1009f2646380SEunchul Kim DRM_ERROR("failed to get out buffer index.\n"); 1010f2646380SEunchul Kim return -EINVAL; 1011f2646380SEunchul Kim } 1012f2646380SEunchul Kim 10138b7d3ec8SMarek Szyprowski gsc_dst_set_buf_seq(ctx, buf_id, false); 1014f2646380SEunchul Kim 1015cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, 1016f2646380SEunchul Kim curr_index, buf_id); 1017f2646380SEunchul Kim 1018f2646380SEunchul Kim return buf_id; 1019f2646380SEunchul Kim } 1020f2646380SEunchul Kim 1021f2646380SEunchul Kim static irqreturn_t gsc_irq_handler(int irq, void *dev_id) 1022f2646380SEunchul Kim { 1023f2646380SEunchul Kim struct gsc_context *ctx = dev_id; 1024f2646380SEunchul Kim u32 status; 10258b7d3ec8SMarek Szyprowski int err = 0; 1026f2646380SEunchul Kim 1027cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("gsc id[%d]\n", ctx->id); 1028f2646380SEunchul Kim 1029f2646380SEunchul Kim status = gsc_read(GSC_IRQ); 1030f2646380SEunchul Kim if (status & GSC_IRQ_STATUS_OR_IRQ) { 10318b7d3ec8SMarek Szyprowski dev_err(ctx->dev, "occurred overflow at %d, status 0x%x.\n", 1032f2646380SEunchul Kim ctx->id, status); 10338b7d3ec8SMarek Szyprowski err = -EINVAL; 1034f2646380SEunchul Kim } 1035f2646380SEunchul Kim 1036f2646380SEunchul Kim if (status & GSC_IRQ_STATUS_OR_FRM_DONE) { 10378b7d3ec8SMarek Szyprowski int src_buf_id, dst_buf_id; 10388b7d3ec8SMarek Szyprowski 10398b7d3ec8SMarek Szyprowski dev_dbg(ctx->dev, "occurred frame done at %d, status 0x%x.\n", 1040f2646380SEunchul Kim ctx->id, status); 1041f2646380SEunchul Kim 10428b7d3ec8SMarek Szyprowski src_buf_id = gsc_get_src_buf_index(ctx); 10438b7d3ec8SMarek Szyprowski dst_buf_id = gsc_get_dst_buf_index(ctx); 1044f2646380SEunchul Kim 10458b7d3ec8SMarek Szyprowski DRM_DEBUG_KMS("buf_id_src[%d]buf_id_dst[%d]\n", src_buf_id, 10468b7d3ec8SMarek Szyprowski dst_buf_id); 1047f2646380SEunchul Kim 10488b7d3ec8SMarek Szyprowski if (src_buf_id < 0 || dst_buf_id < 0) 10498b7d3ec8SMarek Szyprowski err = -EINVAL; 10508b7d3ec8SMarek Szyprowski } 1051f2646380SEunchul Kim 10528b7d3ec8SMarek Szyprowski if (ctx->task) { 10538b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task = ctx->task; 10548b7d3ec8SMarek Szyprowski 10558b7d3ec8SMarek Szyprowski ctx->task = NULL; 10568b7d3ec8SMarek Szyprowski pm_runtime_mark_last_busy(ctx->dev); 10578b7d3ec8SMarek Szyprowski pm_runtime_put_autosuspend(ctx->dev); 10588b7d3ec8SMarek Szyprowski exynos_drm_ipp_task_done(task, err); 1059f2646380SEunchul Kim } 1060f2646380SEunchul Kim 1061f2646380SEunchul Kim return IRQ_HANDLED; 1062f2646380SEunchul Kim } 1063f2646380SEunchul Kim 10648b7d3ec8SMarek Szyprowski static int gsc_reset(struct gsc_context *ctx) 1065f2646380SEunchul Kim { 1066f2646380SEunchul Kim struct gsc_scaler *sc = &ctx->sc; 1067f2646380SEunchul Kim int ret; 1068f2646380SEunchul Kim 1069f2646380SEunchul Kim /* reset h/w block */ 1070f2646380SEunchul Kim ret = gsc_sw_reset(ctx); 1071f2646380SEunchul Kim if (ret < 0) { 10728b7d3ec8SMarek Szyprowski dev_err(ctx->dev, "failed to reset hardware.\n"); 1073f2646380SEunchul Kim return ret; 1074f2646380SEunchul Kim } 1075f2646380SEunchul Kim 1076f2646380SEunchul Kim /* scaler setting */ 1077f2646380SEunchul Kim memset(&ctx->sc, 0x0, sizeof(ctx->sc)); 1078f2646380SEunchul Kim sc->range = true; 1079f2646380SEunchul Kim 1080f2646380SEunchul Kim return 0; 1081f2646380SEunchul Kim } 1082f2646380SEunchul Kim 10838b7d3ec8SMarek Szyprowski static void gsc_start(struct gsc_context *ctx) 1084f2646380SEunchul Kim { 1085f2646380SEunchul Kim u32 cfg; 1086f2646380SEunchul Kim 1087f2646380SEunchul Kim gsc_handle_irq(ctx, true, false, true); 1088f2646380SEunchul Kim 1089f2646380SEunchul Kim /* enable one shot */ 1090f2646380SEunchul Kim cfg = gsc_read(GSC_ENABLE); 1091f2646380SEunchul Kim cfg &= ~(GSC_ENABLE_ON_CLEAR_MASK | 1092f2646380SEunchul Kim GSC_ENABLE_CLK_GATE_MODE_MASK); 1093f2646380SEunchul Kim cfg |= GSC_ENABLE_ON_CLEAR_ONESHOT; 1094f2646380SEunchul Kim gsc_write(cfg, GSC_ENABLE); 1095f2646380SEunchul Kim 1096f2646380SEunchul Kim /* src dma memory */ 1097f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON); 1098f2646380SEunchul Kim cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK); 1099f2646380SEunchul Kim cfg |= GSC_IN_PATH_MEMORY; 1100f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON); 1101f2646380SEunchul Kim 1102f2646380SEunchul Kim /* dst dma memory */ 1103f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_CON); 1104f2646380SEunchul Kim cfg |= GSC_OUT_PATH_MEMORY; 1105f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_CON); 1106f2646380SEunchul Kim 1107f2646380SEunchul Kim gsc_set_scaler(ctx, &ctx->sc); 1108f2646380SEunchul Kim 1109f2646380SEunchul Kim cfg = gsc_read(GSC_ENABLE); 1110f2646380SEunchul Kim cfg |= GSC_ENABLE_ON; 1111f2646380SEunchul Kim gsc_write(cfg, GSC_ENABLE); 11128b7d3ec8SMarek Szyprowski } 11138b7d3ec8SMarek Szyprowski 11148b7d3ec8SMarek Szyprowski static int gsc_commit(struct exynos_drm_ipp *ipp, 11158b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task) 11168b7d3ec8SMarek Szyprowski { 11178b7d3ec8SMarek Szyprowski struct gsc_context *ctx = container_of(ipp, struct gsc_context, ipp); 11188b7d3ec8SMarek Szyprowski int ret; 11198b7d3ec8SMarek Szyprowski 11208b7d3ec8SMarek Szyprowski pm_runtime_get_sync(ctx->dev); 11218b7d3ec8SMarek Szyprowski ctx->task = task; 11228b7d3ec8SMarek Szyprowski 11238b7d3ec8SMarek Szyprowski ret = gsc_reset(ctx); 11248b7d3ec8SMarek Szyprowski if (ret) { 11258b7d3ec8SMarek Szyprowski pm_runtime_put_autosuspend(ctx->dev); 11268b7d3ec8SMarek Szyprowski ctx->task = NULL; 11278b7d3ec8SMarek Szyprowski return ret; 11288b7d3ec8SMarek Szyprowski } 11298b7d3ec8SMarek Szyprowski 1130d25a40a7SMarek Szyprowski gsc_src_set_fmt(ctx, task->src.buf.fourcc, task->src.buf.modifier); 11318b7d3ec8SMarek Szyprowski gsc_src_set_transf(ctx, task->transform.rotation); 11328b7d3ec8SMarek Szyprowski gsc_src_set_size(ctx, &task->src); 11338b7d3ec8SMarek Szyprowski gsc_src_set_addr(ctx, 0, &task->src); 1134d25a40a7SMarek Szyprowski gsc_dst_set_fmt(ctx, task->dst.buf.fourcc, task->dst.buf.modifier); 11358b7d3ec8SMarek Szyprowski gsc_dst_set_size(ctx, &task->dst); 11368b7d3ec8SMarek Szyprowski gsc_dst_set_addr(ctx, 0, &task->dst); 11378b7d3ec8SMarek Szyprowski gsc_set_prescaler(ctx, &ctx->sc, &task->src.rect, &task->dst.rect); 11388b7d3ec8SMarek Szyprowski gsc_start(ctx); 1139f2646380SEunchul Kim 1140f2646380SEunchul Kim return 0; 1141f2646380SEunchul Kim } 1142f2646380SEunchul Kim 11438b7d3ec8SMarek Szyprowski static void gsc_abort(struct exynos_drm_ipp *ipp, 11448b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task) 1145f2646380SEunchul Kim { 11468b7d3ec8SMarek Szyprowski struct gsc_context *ctx = 11478b7d3ec8SMarek Szyprowski container_of(ipp, struct gsc_context, ipp); 1148f2646380SEunchul Kim 11498b7d3ec8SMarek Szyprowski gsc_reset(ctx); 11508b7d3ec8SMarek Szyprowski if (ctx->task) { 11518b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task = ctx->task; 1152f2646380SEunchul Kim 11538b7d3ec8SMarek Szyprowski ctx->task = NULL; 11548b7d3ec8SMarek Szyprowski pm_runtime_mark_last_busy(ctx->dev); 11558b7d3ec8SMarek Szyprowski pm_runtime_put_autosuspend(ctx->dev); 11568b7d3ec8SMarek Szyprowski exynos_drm_ipp_task_done(task, -EIO); 11578b7d3ec8SMarek Szyprowski } 1158f2646380SEunchul Kim } 1159f2646380SEunchul Kim 11608b7d3ec8SMarek Szyprowski static struct exynos_drm_ipp_funcs ipp_funcs = { 11618b7d3ec8SMarek Szyprowski .commit = gsc_commit, 11628b7d3ec8SMarek Szyprowski .abort = gsc_abort, 11638b7d3ec8SMarek Szyprowski }; 1164f2646380SEunchul Kim 11658b7d3ec8SMarek Szyprowski static int gsc_bind(struct device *dev, struct device *master, void *data) 11668b7d3ec8SMarek Szyprowski { 11678b7d3ec8SMarek Szyprowski struct gsc_context *ctx = dev_get_drvdata(dev); 11688b7d3ec8SMarek Szyprowski struct drm_device *drm_dev = data; 11698b7d3ec8SMarek Szyprowski struct exynos_drm_ipp *ipp = &ctx->ipp; 1170f2646380SEunchul Kim 11718b7d3ec8SMarek Szyprowski ctx->drm_dev = drm_dev; 117229cbf24aSAndrzej Hajda exynos_drm_register_dma(drm_dev, dev); 11738b7d3ec8SMarek Szyprowski 11748b7d3ec8SMarek Szyprowski exynos_drm_ipp_register(drm_dev, ipp, &ipp_funcs, 11758b7d3ec8SMarek Szyprowski DRM_EXYNOS_IPP_CAP_CROP | DRM_EXYNOS_IPP_CAP_ROTATE | 11768b7d3ec8SMarek Szyprowski DRM_EXYNOS_IPP_CAP_SCALE | DRM_EXYNOS_IPP_CAP_CONVERT, 11778b7d3ec8SMarek Szyprowski ctx->formats, ctx->num_formats, "gsc"); 11788b7d3ec8SMarek Szyprowski 11798b7d3ec8SMarek Szyprowski dev_info(dev, "The exynos gscaler has been probed successfully\n"); 11808b7d3ec8SMarek Szyprowski 11818b7d3ec8SMarek Szyprowski return 0; 1182f2646380SEunchul Kim } 1183f2646380SEunchul Kim 11848b7d3ec8SMarek Szyprowski static void gsc_unbind(struct device *dev, struct device *master, 11858b7d3ec8SMarek Szyprowski void *data) 11868b7d3ec8SMarek Szyprowski { 11878b7d3ec8SMarek Szyprowski struct gsc_context *ctx = dev_get_drvdata(dev); 11888b7d3ec8SMarek Szyprowski struct drm_device *drm_dev = data; 11898b7d3ec8SMarek Szyprowski struct exynos_drm_ipp *ipp = &ctx->ipp; 11908b7d3ec8SMarek Szyprowski 11918b7d3ec8SMarek Szyprowski exynos_drm_ipp_unregister(drm_dev, ipp); 119223755696SAndrzej Hajda exynos_drm_unregister_dma(drm_dev, dev); 11938b7d3ec8SMarek Szyprowski } 11948b7d3ec8SMarek Szyprowski 11958b7d3ec8SMarek Szyprowski static const struct component_ops gsc_component_ops = { 11968b7d3ec8SMarek Szyprowski .bind = gsc_bind, 11978b7d3ec8SMarek Szyprowski .unbind = gsc_unbind, 11988b7d3ec8SMarek Szyprowski }; 11998b7d3ec8SMarek Szyprowski 12008b7d3ec8SMarek Szyprowski static const unsigned int gsc_formats[] = { 12018b7d3ec8SMarek Szyprowski DRM_FORMAT_ARGB8888, 12028b7d3ec8SMarek Szyprowski DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB565, DRM_FORMAT_BGRX8888, 12038b7d3ec8SMarek Szyprowski DRM_FORMAT_NV12, DRM_FORMAT_NV16, DRM_FORMAT_NV21, DRM_FORMAT_NV61, 12048b7d3ec8SMarek Szyprowski DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, 12058b7d3ec8SMarek Szyprowski DRM_FORMAT_YUV420, DRM_FORMAT_YVU420, DRM_FORMAT_YUV422, 12068b7d3ec8SMarek Szyprowski }; 12078b7d3ec8SMarek Szyprowski 1208d25a40a7SMarek Szyprowski static const unsigned int gsc_tiled_formats[] = { 1209d25a40a7SMarek Szyprowski DRM_FORMAT_NV12, DRM_FORMAT_NV21, 1210d25a40a7SMarek Szyprowski }; 1211d25a40a7SMarek Szyprowski 121256550d94SGreg Kroah-Hartman static int gsc_probe(struct platform_device *pdev) 1213f2646380SEunchul Kim { 1214f2646380SEunchul Kim struct device *dev = &pdev->dev; 12158b7d3ec8SMarek Szyprowski struct gsc_driverdata *driver_data; 12168b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_formats *formats; 1217f2646380SEunchul Kim struct gsc_context *ctx; 1218f2646380SEunchul Kim struct resource *res; 1219d25a40a7SMarek Szyprowski int num_formats, ret, i, j; 1220f2646380SEunchul Kim 1221f2646380SEunchul Kim ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); 1222f2646380SEunchul Kim if (!ctx) 1223f2646380SEunchul Kim return -ENOMEM; 1224f2646380SEunchul Kim 12258b7d3ec8SMarek Szyprowski driver_data = (struct gsc_driverdata *)of_device_get_match_data(dev); 12268b7d3ec8SMarek Szyprowski ctx->dev = dev; 12278b7d3ec8SMarek Szyprowski ctx->num_clocks = driver_data->num_clocks; 12288b7d3ec8SMarek Szyprowski ctx->clk_names = driver_data->clk_names; 12298b7d3ec8SMarek Szyprowski 1230d25a40a7SMarek Szyprowski /* construct formats/limits array */ 1231d25a40a7SMarek Szyprowski num_formats = ARRAY_SIZE(gsc_formats) + ARRAY_SIZE(gsc_tiled_formats); 1232d25a40a7SMarek Szyprowski formats = devm_kcalloc(dev, num_formats, sizeof(*formats), GFP_KERNEL); 1233d25a40a7SMarek Szyprowski if (!formats) 1234d25a40a7SMarek Szyprowski return -ENOMEM; 1235d25a40a7SMarek Szyprowski 1236d25a40a7SMarek Szyprowski /* linear formats */ 12378b7d3ec8SMarek Szyprowski for (i = 0; i < ARRAY_SIZE(gsc_formats); i++) { 12388b7d3ec8SMarek Szyprowski formats[i].fourcc = gsc_formats[i]; 12398b7d3ec8SMarek Szyprowski formats[i].type = DRM_EXYNOS_IPP_FORMAT_SOURCE | 12408b7d3ec8SMarek Szyprowski DRM_EXYNOS_IPP_FORMAT_DESTINATION; 12418b7d3ec8SMarek Szyprowski formats[i].limits = driver_data->limits; 12428b7d3ec8SMarek Szyprowski formats[i].num_limits = driver_data->num_limits; 1243aeefb368SSeung-Woo Kim } 1244d25a40a7SMarek Szyprowski 1245d25a40a7SMarek Szyprowski /* tiled formats */ 1246d25a40a7SMarek Szyprowski for (j = i, i = 0; i < ARRAY_SIZE(gsc_tiled_formats); j++, i++) { 1247d25a40a7SMarek Szyprowski formats[j].fourcc = gsc_tiled_formats[i]; 1248d25a40a7SMarek Szyprowski formats[j].modifier = DRM_FORMAT_MOD_SAMSUNG_16_16_TILE; 1249d25a40a7SMarek Szyprowski formats[j].type = DRM_EXYNOS_IPP_FORMAT_SOURCE | 1250d25a40a7SMarek Szyprowski DRM_EXYNOS_IPP_FORMAT_DESTINATION; 1251d25a40a7SMarek Szyprowski formats[j].limits = driver_data->limits; 1252d25a40a7SMarek Szyprowski formats[j].num_limits = driver_data->num_limits; 1253d25a40a7SMarek Szyprowski } 1254d25a40a7SMarek Szyprowski 12558b7d3ec8SMarek Szyprowski ctx->formats = formats; 1256d25a40a7SMarek Szyprowski ctx->num_formats = num_formats; 1257aeefb368SSeung-Woo Kim 1258f2646380SEunchul Kim /* clock control */ 12598b7d3ec8SMarek Szyprowski for (i = 0; i < ctx->num_clocks; i++) { 12608b7d3ec8SMarek Szyprowski ctx->clocks[i] = devm_clk_get(dev, ctx->clk_names[i]); 12618b7d3ec8SMarek Szyprowski if (IS_ERR(ctx->clocks[i])) { 12628b7d3ec8SMarek Szyprowski dev_err(dev, "failed to get clock: %s\n", 12638b7d3ec8SMarek Szyprowski ctx->clk_names[i]); 12648b7d3ec8SMarek Szyprowski return PTR_ERR(ctx->clocks[i]); 12658b7d3ec8SMarek Szyprowski } 1266f2646380SEunchul Kim } 1267f2646380SEunchul Kim 1268f2646380SEunchul Kim /* resource memory */ 1269f2646380SEunchul Kim ctx->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1270d4ed6025SThierry Reding ctx->regs = devm_ioremap_resource(dev, ctx->regs_res); 1271d4ed6025SThierry Reding if (IS_ERR(ctx->regs)) 1272d4ed6025SThierry Reding return PTR_ERR(ctx->regs); 1273f2646380SEunchul Kim 1274f2646380SEunchul Kim /* resource irq */ 1275f2646380SEunchul Kim res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1276f2646380SEunchul Kim if (!res) { 1277f2646380SEunchul Kim dev_err(dev, "failed to request irq resource.\n"); 12785cbd419cSSachin Kamat return -ENOENT; 1279f2646380SEunchul Kim } 1280f2646380SEunchul Kim 1281f2646380SEunchul Kim ctx->irq = res->start; 12828b7d3ec8SMarek Szyprowski ret = devm_request_irq(dev, ctx->irq, gsc_irq_handler, 0, 12838b7d3ec8SMarek Szyprowski dev_name(dev), ctx); 1284f2646380SEunchul Kim if (ret < 0) { 1285f2646380SEunchul Kim dev_err(dev, "failed to request irq.\n"); 12865cbd419cSSachin Kamat return ret; 1287f2646380SEunchul Kim } 1288f2646380SEunchul Kim 1289f2646380SEunchul Kim /* context initailization */ 1290f2646380SEunchul Kim ctx->id = pdev->id; 1291f2646380SEunchul Kim 1292f2646380SEunchul Kim platform_set_drvdata(pdev, ctx); 1293f2646380SEunchul Kim 12948b7d3ec8SMarek Szyprowski pm_runtime_use_autosuspend(dev); 12958b7d3ec8SMarek Szyprowski pm_runtime_set_autosuspend_delay(dev, GSC_AUTOSUSPEND_DELAY); 1296f2646380SEunchul Kim pm_runtime_enable(dev); 1297f2646380SEunchul Kim 12988b7d3ec8SMarek Szyprowski ret = component_add(dev, &gsc_component_ops); 12998b7d3ec8SMarek Szyprowski if (ret) 13008b7d3ec8SMarek Szyprowski goto err_pm_dis; 1301f2646380SEunchul Kim 1302d873ab99SSeung-Woo Kim dev_info(dev, "drm gsc registered successfully.\n"); 1303f2646380SEunchul Kim 1304f2646380SEunchul Kim return 0; 1305f2646380SEunchul Kim 13068b7d3ec8SMarek Szyprowski err_pm_dis: 13078b7d3ec8SMarek Szyprowski pm_runtime_dont_use_autosuspend(dev); 1308f2646380SEunchul Kim pm_runtime_disable(dev); 1309f2646380SEunchul Kim return ret; 1310f2646380SEunchul Kim } 1311f2646380SEunchul Kim 131256550d94SGreg Kroah-Hartman static int gsc_remove(struct platform_device *pdev) 1313f2646380SEunchul Kim { 1314f2646380SEunchul Kim struct device *dev = &pdev->dev; 1315f2646380SEunchul Kim 13168b7d3ec8SMarek Szyprowski pm_runtime_dont_use_autosuspend(dev); 1317f2646380SEunchul Kim pm_runtime_disable(dev); 1318f2646380SEunchul Kim 1319f2646380SEunchul Kim return 0; 1320f2646380SEunchul Kim } 1321f2646380SEunchul Kim 13224158dbe1SArnd Bergmann static int __maybe_unused gsc_runtime_suspend(struct device *dev) 1323f2646380SEunchul Kim { 1324f2646380SEunchul Kim struct gsc_context *ctx = get_gsc_context(dev); 13258b7d3ec8SMarek Szyprowski int i; 1326f2646380SEunchul Kim 1327cbc4c33dSYoungJun Cho DRM_DEBUG_KMS("id[%d]\n", ctx->id); 1328f2646380SEunchul Kim 13298b7d3ec8SMarek Szyprowski for (i = ctx->num_clocks - 1; i >= 0; i--) 13308b7d3ec8SMarek Szyprowski clk_disable_unprepare(ctx->clocks[i]); 13318b7d3ec8SMarek Szyprowski 13328b7d3ec8SMarek Szyprowski return 0; 1333f2646380SEunchul Kim } 1334f2646380SEunchul Kim 13354158dbe1SArnd Bergmann static int __maybe_unused gsc_runtime_resume(struct device *dev) 1336f2646380SEunchul Kim { 1337f2646380SEunchul Kim struct gsc_context *ctx = get_gsc_context(dev); 13388b7d3ec8SMarek Szyprowski int i, ret; 1339f2646380SEunchul Kim 1340bca34c9aSYoungJun Cho DRM_DEBUG_KMS("id[%d]\n", ctx->id); 1341f2646380SEunchul Kim 13428b7d3ec8SMarek Szyprowski for (i = 0; i < ctx->num_clocks; i++) { 13438b7d3ec8SMarek Szyprowski ret = clk_prepare_enable(ctx->clocks[i]); 13448b7d3ec8SMarek Szyprowski if (ret) { 13458b7d3ec8SMarek Szyprowski while (--i > 0) 13468b7d3ec8SMarek Szyprowski clk_disable_unprepare(ctx->clocks[i]); 13478b7d3ec8SMarek Szyprowski return ret; 13488b7d3ec8SMarek Szyprowski } 13498b7d3ec8SMarek Szyprowski } 13508b7d3ec8SMarek Szyprowski return 0; 1351f2646380SEunchul Kim } 1352f2646380SEunchul Kim 1353f2646380SEunchul Kim static const struct dev_pm_ops gsc_pm_ops = { 135483bd7b20SMarek Szyprowski SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 135583bd7b20SMarek Szyprowski pm_runtime_force_resume) 1356f2646380SEunchul Kim SET_RUNTIME_PM_OPS(gsc_runtime_suspend, gsc_runtime_resume, NULL) 1357f2646380SEunchul Kim }; 1358f2646380SEunchul Kim 13598b7d3ec8SMarek Szyprowski static const struct drm_exynos_ipp_limit gsc_5250_limits[] = { 13608b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) }, 13618b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) }, 13628b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2048 }, .v = { 16, 2048 }) }, 13638b7d3ec8SMarek Szyprowski { IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 }, 13648b7d3ec8SMarek Szyprowski .v = { (1 << 16) / 16, (1 << 16) * 8 }) }, 13658b7d3ec8SMarek Szyprowski }; 13668b7d3ec8SMarek Szyprowski 13678b7d3ec8SMarek Szyprowski static const struct drm_exynos_ipp_limit gsc_5420_limits[] = { 13688b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) }, 13698b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) }, 13708b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(ROTATED, .h = { 16, 2016 }, .v = { 8, 2016 }) }, 13718b7d3ec8SMarek Szyprowski { IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 }, 13728b7d3ec8SMarek Szyprowski .v = { (1 << 16) / 16, (1 << 16) * 8 }) }, 13738b7d3ec8SMarek Szyprowski }; 13748b7d3ec8SMarek Szyprowski 13758b7d3ec8SMarek Szyprowski static const struct drm_exynos_ipp_limit gsc_5433_limits[] = { 137628b67632SMarek Szyprowski { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 8191, 16 }, .v = { 16, 8191, 2 }) }, 13778b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 1 }, .v = { 8, 3344, 1 }) }, 13788b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2047 }, .v = { 8, 8191 }) }, 13798b7d3ec8SMarek Szyprowski { IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 }, 13808b7d3ec8SMarek Szyprowski .v = { (1 << 16) / 16, (1 << 16) * 8 }) }, 13818b7d3ec8SMarek Szyprowski }; 13828b7d3ec8SMarek Szyprowski 13838b7d3ec8SMarek Szyprowski static struct gsc_driverdata gsc_exynos5250_drvdata = { 13848b7d3ec8SMarek Szyprowski .clk_names = {"gscl"}, 13858b7d3ec8SMarek Szyprowski .num_clocks = 1, 13868b7d3ec8SMarek Szyprowski .limits = gsc_5250_limits, 13878b7d3ec8SMarek Szyprowski .num_limits = ARRAY_SIZE(gsc_5250_limits), 13888b7d3ec8SMarek Szyprowski }; 13898b7d3ec8SMarek Szyprowski 13908b7d3ec8SMarek Szyprowski static struct gsc_driverdata gsc_exynos5420_drvdata = { 13918b7d3ec8SMarek Szyprowski .clk_names = {"gscl"}, 13928b7d3ec8SMarek Szyprowski .num_clocks = 1, 13938b7d3ec8SMarek Szyprowski .limits = gsc_5420_limits, 13948b7d3ec8SMarek Szyprowski .num_limits = ARRAY_SIZE(gsc_5420_limits), 13958b7d3ec8SMarek Szyprowski }; 13968b7d3ec8SMarek Szyprowski 13978b7d3ec8SMarek Szyprowski static struct gsc_driverdata gsc_exynos5433_drvdata = { 13988b7d3ec8SMarek Szyprowski .clk_names = {"pclk", "aclk", "aclk_xiu", "aclk_gsclbend"}, 13998b7d3ec8SMarek Szyprowski .num_clocks = 4, 14008b7d3ec8SMarek Szyprowski .limits = gsc_5433_limits, 14018b7d3ec8SMarek Szyprowski .num_limits = ARRAY_SIZE(gsc_5433_limits), 14028b7d3ec8SMarek Szyprowski }; 14038b7d3ec8SMarek Szyprowski 1404aeefb368SSeung-Woo Kim static const struct of_device_id exynos_drm_gsc_of_match[] = { 14058b7d3ec8SMarek Szyprowski { 14068b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5-gsc", 14078b7d3ec8SMarek Szyprowski .data = &gsc_exynos5250_drvdata, 14088b7d3ec8SMarek Szyprowski }, { 14098b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5250-gsc", 14108b7d3ec8SMarek Szyprowski .data = &gsc_exynos5250_drvdata, 14118b7d3ec8SMarek Szyprowski }, { 14128b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5420-gsc", 14138b7d3ec8SMarek Szyprowski .data = &gsc_exynos5420_drvdata, 14148b7d3ec8SMarek Szyprowski }, { 14158b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5433-gsc", 14168b7d3ec8SMarek Szyprowski .data = &gsc_exynos5433_drvdata, 14178b7d3ec8SMarek Szyprowski }, { 14188b7d3ec8SMarek Szyprowski }, 1419aeefb368SSeung-Woo Kim }; 1420aeefb368SSeung-Woo Kim MODULE_DEVICE_TABLE(of, exynos_drm_gsc_of_match); 1421aeefb368SSeung-Woo Kim 1422f2646380SEunchul Kim struct platform_driver gsc_driver = { 1423f2646380SEunchul Kim .probe = gsc_probe, 142456550d94SGreg Kroah-Hartman .remove = gsc_remove, 1425f2646380SEunchul Kim .driver = { 1426f2646380SEunchul Kim .name = "exynos-drm-gsc", 1427f2646380SEunchul Kim .owner = THIS_MODULE, 1428f2646380SEunchul Kim .pm = &gsc_pm_ops, 1429aeefb368SSeung-Woo Kim .of_match_table = of_match_ptr(exynos_drm_gsc_of_match), 1430f2646380SEunchul Kim }, 1431f2646380SEunchul Kim }; 1432