12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2f2646380SEunchul Kim /*
3f2646380SEunchul Kim * Copyright (C) 2012 Samsung Electronics Co.Ltd
4f2646380SEunchul Kim * Authors:
5f2646380SEunchul Kim * Eunchul Kim <chulspro.kim@samsung.com>
6f2646380SEunchul Kim * Jinyoung Jeon <jy0.jeon@samsung.com>
7f2646380SEunchul Kim * Sangmin Lee <lsmin.lee@samsung.com>
8f2646380SEunchul Kim */
92bda34d7SSam Ravnborg
10f2646380SEunchul Kim #include <linux/clk.h>
112bda34d7SSam Ravnborg #include <linux/component.h>
122bda34d7SSam Ravnborg #include <linux/kernel.h>
13aeefb368SSeung-Woo Kim #include <linux/mfd/syscon.h>
148b7d3ec8SMarek Szyprowski #include <linux/of_device.h>
152bda34d7SSam Ravnborg #include <linux/platform_device.h>
162bda34d7SSam Ravnborg #include <linux/pm_runtime.h>
17aeefb368SSeung-Woo Kim #include <linux/regmap.h>
18f2646380SEunchul Kim
19226024b1SSam Ravnborg #include <drm/drm_fourcc.h>
20226024b1SSam Ravnborg #include <drm/drm_print.h>
21f2646380SEunchul Kim #include <drm/exynos_drm.h>
222bda34d7SSam Ravnborg
23e30655d0SMark Brown #include "exynos_drm_drv.h"
24f2646380SEunchul Kim #include "exynos_drm_ipp.h"
252bda34d7SSam Ravnborg #include "regs-gsc.h"
26f2646380SEunchul Kim
27f2646380SEunchul Kim /*
286fe891f6SEunchul Kim * GSC stands for General SCaler and
29f2646380SEunchul Kim * supports image scaler/rotator and input/output DMA operations.
30f2646380SEunchul Kim * input DMA reads image data from the memory.
31f2646380SEunchul Kim * output DMA writes image data to memory.
32f2646380SEunchul Kim * GSC supports image rotation and image effect functions.
33f2646380SEunchul Kim */
34f2646380SEunchul Kim
35f2646380SEunchul Kim
368b7d3ec8SMarek Szyprowski #define GSC_MAX_CLOCKS 8
37f2646380SEunchul Kim #define GSC_MAX_SRC 4
38f2646380SEunchul Kim #define GSC_MAX_DST 16
39f2646380SEunchul Kim #define GSC_RESET_TIMEOUT 50
40f2646380SEunchul Kim #define GSC_BUF_STOP 1
41f2646380SEunchul Kim #define GSC_BUF_START 2
42f2646380SEunchul Kim #define GSC_REG_SZ 16
43f2646380SEunchul Kim #define GSC_WIDTH_ITU_709 1280
44f2646380SEunchul Kim #define GSC_SC_UP_MAX_RATIO 65536
45f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_7_8 74898
46f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_6_8 87381
47f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_5_8 104857
48f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_4_8 131072
49f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_3_8 174762
50f2646380SEunchul Kim #define GSC_SC_DOWN_RATIO_2_8 262144
51f2646380SEunchul Kim #define GSC_CROP_MAX 8192
52f2646380SEunchul Kim #define GSC_CROP_MIN 32
53f2646380SEunchul Kim #define GSC_SCALE_MAX 4224
54f2646380SEunchul Kim #define GSC_SCALE_MIN 32
55f2646380SEunchul Kim #define GSC_COEF_RATIO 7
56f2646380SEunchul Kim #define GSC_COEF_PHASE 9
57f2646380SEunchul Kim #define GSC_COEF_ATTR 16
58f2646380SEunchul Kim #define GSC_COEF_H_8T 8
59f2646380SEunchul Kim #define GSC_COEF_V_4T 4
60f2646380SEunchul Kim #define GSC_COEF_DEPTH 3
618b7d3ec8SMarek Szyprowski #define GSC_AUTOSUSPEND_DELAY 2000
62f2646380SEunchul Kim
639eae7c3bSFuqian Huang #define get_gsc_context(dev) dev_get_drvdata(dev)
64f2646380SEunchul Kim #define gsc_read(offset) readl(ctx->regs + (offset))
65f2646380SEunchul Kim #define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset))
66f2646380SEunchul Kim
67f2646380SEunchul Kim /*
68f2646380SEunchul Kim * A structure of scaler.
69f2646380SEunchul Kim *
70f2646380SEunchul Kim * @range: narrow, wide.
71f2646380SEunchul Kim * @pre_shfactor: pre sclaer shift factor.
72f2646380SEunchul Kim * @pre_hratio: horizontal ratio of the prescaler.
73f2646380SEunchul Kim * @pre_vratio: vertical ratio of the prescaler.
74f2646380SEunchul Kim * @main_hratio: the main scaler's horizontal ratio.
75f2646380SEunchul Kim * @main_vratio: the main scaler's vertical ratio.
76f2646380SEunchul Kim */
77f2646380SEunchul Kim struct gsc_scaler {
78f2646380SEunchul Kim bool range;
79f2646380SEunchul Kim u32 pre_shfactor;
80f2646380SEunchul Kim u32 pre_hratio;
81f2646380SEunchul Kim u32 pre_vratio;
82f2646380SEunchul Kim unsigned long main_hratio;
83f2646380SEunchul Kim unsigned long main_vratio;
84f2646380SEunchul Kim };
85f2646380SEunchul Kim
86f2646380SEunchul Kim /*
87f2646380SEunchul Kim * A structure of gsc context.
88f2646380SEunchul Kim *
89f2646380SEunchul Kim * @regs: memory mapped io registers.
90f2646380SEunchul Kim * @gsc_clk: gsc gate clock.
91f2646380SEunchul Kim * @sc: scaler infomations.
92f2646380SEunchul Kim * @id: gsc id.
93f2646380SEunchul Kim * @irq: irq number.
94f2646380SEunchul Kim * @rotation: supports rotation of src.
95f2646380SEunchul Kim */
96f2646380SEunchul Kim struct gsc_context {
978b7d3ec8SMarek Szyprowski struct exynos_drm_ipp ipp;
988b7d3ec8SMarek Szyprowski struct drm_device *drm_dev;
9907dc3678SMarek Szyprowski void *dma_priv;
1008b7d3ec8SMarek Szyprowski struct device *dev;
1018b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task;
1028b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_formats *formats;
1038b7d3ec8SMarek Szyprowski unsigned int num_formats;
1048b7d3ec8SMarek Szyprowski
105f2646380SEunchul Kim void __iomem *regs;
1068b7d3ec8SMarek Szyprowski const char **clk_names;
1078b7d3ec8SMarek Szyprowski struct clk *clocks[GSC_MAX_CLOCKS];
1088b7d3ec8SMarek Szyprowski int num_clocks;
109f2646380SEunchul Kim struct gsc_scaler sc;
110f2646380SEunchul Kim int id;
111f2646380SEunchul Kim int irq;
112f2646380SEunchul Kim bool rotation;
1138b7d3ec8SMarek Szyprowski };
1148b7d3ec8SMarek Szyprowski
1158b7d3ec8SMarek Szyprowski /**
1168b7d3ec8SMarek Szyprowski * struct gsc_driverdata - per device type driver data for init time.
1178b7d3ec8SMarek Szyprowski *
1188b7d3ec8SMarek Szyprowski * @limits: picture size limits array
119dd59eed1SLee Jones * @num_limits: number of items in the aforementioned array
1208b7d3ec8SMarek Szyprowski * @clk_names: names of clocks needed by this variant
1218b7d3ec8SMarek Szyprowski * @num_clocks: the number of clocks needed by this variant
1228b7d3ec8SMarek Szyprowski */
1238b7d3ec8SMarek Szyprowski struct gsc_driverdata {
1248b7d3ec8SMarek Szyprowski const struct drm_exynos_ipp_limit *limits;
1258b7d3ec8SMarek Szyprowski int num_limits;
1268b7d3ec8SMarek Szyprowski const char *clk_names[GSC_MAX_CLOCKS];
1278b7d3ec8SMarek Szyprowski int num_clocks;
128f2646380SEunchul Kim };
129f2646380SEunchul Kim
130f2646380SEunchul Kim /* 8-tap Filter Coefficient */
131f2646380SEunchul Kim static const int h_coef_8t[GSC_COEF_RATIO][GSC_COEF_ATTR][GSC_COEF_H_8T] = {
132f2646380SEunchul Kim { /* Ratio <= 65536 (~8:8) */
133f2646380SEunchul Kim { 0, 0, 0, 128, 0, 0, 0, 0 },
134f2646380SEunchul Kim { -1, 2, -6, 127, 7, -2, 1, 0 },
135f2646380SEunchul Kim { -1, 4, -12, 125, 16, -5, 1, 0 },
136f2646380SEunchul Kim { -1, 5, -15, 120, 25, -8, 2, 0 },
137f2646380SEunchul Kim { -1, 6, -18, 114, 35, -10, 3, -1 },
138f2646380SEunchul Kim { -1, 6, -20, 107, 46, -13, 4, -1 },
139f2646380SEunchul Kim { -2, 7, -21, 99, 57, -16, 5, -1 },
140f2646380SEunchul Kim { -1, 6, -20, 89, 68, -18, 5, -1 },
141f2646380SEunchul Kim { -1, 6, -20, 79, 79, -20, 6, -1 },
142f2646380SEunchul Kim { -1, 5, -18, 68, 89, -20, 6, -1 },
143f2646380SEunchul Kim { -1, 5, -16, 57, 99, -21, 7, -2 },
144f2646380SEunchul Kim { -1, 4, -13, 46, 107, -20, 6, -1 },
145f2646380SEunchul Kim { -1, 3, -10, 35, 114, -18, 6, -1 },
146f2646380SEunchul Kim { 0, 2, -8, 25, 120, -15, 5, -1 },
147f2646380SEunchul Kim { 0, 1, -5, 16, 125, -12, 4, -1 },
148f2646380SEunchul Kim { 0, 1, -2, 7, 127, -6, 2, -1 }
149f2646380SEunchul Kim }, { /* 65536 < Ratio <= 74898 (~8:7) */
150f2646380SEunchul Kim { 3, -8, 14, 111, 13, -8, 3, 0 },
151f2646380SEunchul Kim { 2, -6, 7, 112, 21, -10, 3, -1 },
152f2646380SEunchul Kim { 2, -4, 1, 110, 28, -12, 4, -1 },
153f2646380SEunchul Kim { 1, -2, -3, 106, 36, -13, 4, -1 },
154f2646380SEunchul Kim { 1, -1, -7, 103, 44, -15, 4, -1 },
155f2646380SEunchul Kim { 1, 1, -11, 97, 53, -16, 4, -1 },
156f2646380SEunchul Kim { 0, 2, -13, 91, 61, -16, 4, -1 },
157f2646380SEunchul Kim { 0, 3, -15, 85, 69, -17, 4, -1 },
158f2646380SEunchul Kim { 0, 3, -16, 77, 77, -16, 3, 0 },
159f2646380SEunchul Kim { -1, 4, -17, 69, 85, -15, 3, 0 },
160f2646380SEunchul Kim { -1, 4, -16, 61, 91, -13, 2, 0 },
161f2646380SEunchul Kim { -1, 4, -16, 53, 97, -11, 1, 1 },
162f2646380SEunchul Kim { -1, 4, -15, 44, 103, -7, -1, 1 },
163f2646380SEunchul Kim { -1, 4, -13, 36, 106, -3, -2, 1 },
164f2646380SEunchul Kim { -1, 4, -12, 28, 110, 1, -4, 2 },
165f2646380SEunchul Kim { -1, 3, -10, 21, 112, 7, -6, 2 }
166f2646380SEunchul Kim }, { /* 74898 < Ratio <= 87381 (~8:6) */
167f2646380SEunchul Kim { 2, -11, 25, 96, 25, -11, 2, 0 },
168f2646380SEunchul Kim { 2, -10, 19, 96, 31, -12, 2, 0 },
169f2646380SEunchul Kim { 2, -9, 14, 94, 37, -12, 2, 0 },
170f2646380SEunchul Kim { 2, -8, 10, 92, 43, -12, 1, 0 },
171f2646380SEunchul Kim { 2, -7, 5, 90, 49, -12, 1, 0 },
172f2646380SEunchul Kim { 2, -5, 1, 86, 55, -12, 0, 1 },
173f2646380SEunchul Kim { 2, -4, -2, 82, 61, -11, -1, 1 },
174f2646380SEunchul Kim { 1, -3, -5, 77, 67, -9, -1, 1 },
175f2646380SEunchul Kim { 1, -2, -7, 72, 72, -7, -2, 1 },
176f2646380SEunchul Kim { 1, -1, -9, 67, 77, -5, -3, 1 },
177f2646380SEunchul Kim { 1, -1, -11, 61, 82, -2, -4, 2 },
178f2646380SEunchul Kim { 1, 0, -12, 55, 86, 1, -5, 2 },
179f2646380SEunchul Kim { 0, 1, -12, 49, 90, 5, -7, 2 },
180f2646380SEunchul Kim { 0, 1, -12, 43, 92, 10, -8, 2 },
181f2646380SEunchul Kim { 0, 2, -12, 37, 94, 14, -9, 2 },
182f2646380SEunchul Kim { 0, 2, -12, 31, 96, 19, -10, 2 }
183f2646380SEunchul Kim }, { /* 87381 < Ratio <= 104857 (~8:5) */
184f2646380SEunchul Kim { -1, -8, 33, 80, 33, -8, -1, 0 },
185f2646380SEunchul Kim { -1, -8, 28, 80, 37, -7, -2, 1 },
186f2646380SEunchul Kim { 0, -8, 24, 79, 41, -7, -2, 1 },
187f2646380SEunchul Kim { 0, -8, 20, 78, 46, -6, -3, 1 },
188f2646380SEunchul Kim { 0, -8, 16, 76, 50, -4, -3, 1 },
189f2646380SEunchul Kim { 0, -7, 13, 74, 54, -3, -4, 1 },
190f2646380SEunchul Kim { 1, -7, 10, 71, 58, -1, -5, 1 },
191f2646380SEunchul Kim { 1, -6, 6, 68, 62, 1, -5, 1 },
192f2646380SEunchul Kim { 1, -6, 4, 65, 65, 4, -6, 1 },
193f2646380SEunchul Kim { 1, -5, 1, 62, 68, 6, -6, 1 },
194f2646380SEunchul Kim { 1, -5, -1, 58, 71, 10, -7, 1 },
195f2646380SEunchul Kim { 1, -4, -3, 54, 74, 13, -7, 0 },
196f2646380SEunchul Kim { 1, -3, -4, 50, 76, 16, -8, 0 },
197f2646380SEunchul Kim { 1, -3, -6, 46, 78, 20, -8, 0 },
198f2646380SEunchul Kim { 1, -2, -7, 41, 79, 24, -8, 0 },
199f2646380SEunchul Kim { 1, -2, -7, 37, 80, 28, -8, -1 }
200f2646380SEunchul Kim }, { /* 104857 < Ratio <= 131072 (~8:4) */
201f2646380SEunchul Kim { -3, 0, 35, 64, 35, 0, -3, 0 },
202f2646380SEunchul Kim { -3, -1, 32, 64, 38, 1, -3, 0 },
203f2646380SEunchul Kim { -2, -2, 29, 63, 41, 2, -3, 0 },
204f2646380SEunchul Kim { -2, -3, 27, 63, 43, 4, -4, 0 },
205f2646380SEunchul Kim { -2, -3, 24, 61, 46, 6, -4, 0 },
206f2646380SEunchul Kim { -2, -3, 21, 60, 49, 7, -4, 0 },
207f2646380SEunchul Kim { -1, -4, 19, 59, 51, 9, -4, -1 },
208f2646380SEunchul Kim { -1, -4, 16, 57, 53, 12, -4, -1 },
209f2646380SEunchul Kim { -1, -4, 14, 55, 55, 14, -4, -1 },
210f2646380SEunchul Kim { -1, -4, 12, 53, 57, 16, -4, -1 },
211f2646380SEunchul Kim { -1, -4, 9, 51, 59, 19, -4, -1 },
212f2646380SEunchul Kim { 0, -4, 7, 49, 60, 21, -3, -2 },
213f2646380SEunchul Kim { 0, -4, 6, 46, 61, 24, -3, -2 },
214f2646380SEunchul Kim { 0, -4, 4, 43, 63, 27, -3, -2 },
215f2646380SEunchul Kim { 0, -3, 2, 41, 63, 29, -2, -2 },
216f2646380SEunchul Kim { 0, -3, 1, 38, 64, 32, -1, -3 }
217f2646380SEunchul Kim }, { /* 131072 < Ratio <= 174762 (~8:3) */
218f2646380SEunchul Kim { -1, 8, 33, 48, 33, 8, -1, 0 },
219f2646380SEunchul Kim { -1, 7, 31, 49, 35, 9, -1, -1 },
220f2646380SEunchul Kim { -1, 6, 30, 49, 36, 10, -1, -1 },
221f2646380SEunchul Kim { -1, 5, 28, 48, 38, 12, -1, -1 },
222f2646380SEunchul Kim { -1, 4, 26, 48, 39, 13, 0, -1 },
223f2646380SEunchul Kim { -1, 3, 24, 47, 41, 15, 0, -1 },
224f2646380SEunchul Kim { -1, 2, 23, 47, 42, 16, 0, -1 },
225f2646380SEunchul Kim { -1, 2, 21, 45, 43, 18, 1, -1 },
226f2646380SEunchul Kim { -1, 1, 19, 45, 45, 19, 1, -1 },
227f2646380SEunchul Kim { -1, 1, 18, 43, 45, 21, 2, -1 },
228f2646380SEunchul Kim { -1, 0, 16, 42, 47, 23, 2, -1 },
229f2646380SEunchul Kim { -1, 0, 15, 41, 47, 24, 3, -1 },
230f2646380SEunchul Kim { -1, 0, 13, 39, 48, 26, 4, -1 },
231f2646380SEunchul Kim { -1, -1, 12, 38, 48, 28, 5, -1 },
232f2646380SEunchul Kim { -1, -1, 10, 36, 49, 30, 6, -1 },
233f2646380SEunchul Kim { -1, -1, 9, 35, 49, 31, 7, -1 }
234f2646380SEunchul Kim }, { /* 174762 < Ratio <= 262144 (~8:2) */
235f2646380SEunchul Kim { 2, 13, 30, 38, 30, 13, 2, 0 },
236f2646380SEunchul Kim { 2, 12, 29, 38, 30, 14, 3, 0 },
237f2646380SEunchul Kim { 2, 11, 28, 38, 31, 15, 3, 0 },
238f2646380SEunchul Kim { 2, 10, 26, 38, 32, 16, 4, 0 },
239f2646380SEunchul Kim { 1, 10, 26, 37, 33, 17, 4, 0 },
240f2646380SEunchul Kim { 1, 9, 24, 37, 34, 18, 5, 0 },
241f2646380SEunchul Kim { 1, 8, 24, 37, 34, 19, 5, 0 },
242f2646380SEunchul Kim { 1, 7, 22, 36, 35, 20, 6, 1 },
243f2646380SEunchul Kim { 1, 6, 21, 36, 36, 21, 6, 1 },
244f2646380SEunchul Kim { 1, 6, 20, 35, 36, 22, 7, 1 },
245f2646380SEunchul Kim { 0, 5, 19, 34, 37, 24, 8, 1 },
246f2646380SEunchul Kim { 0, 5, 18, 34, 37, 24, 9, 1 },
247f2646380SEunchul Kim { 0, 4, 17, 33, 37, 26, 10, 1 },
248f2646380SEunchul Kim { 0, 4, 16, 32, 38, 26, 10, 2 },
249f2646380SEunchul Kim { 0, 3, 15, 31, 38, 28, 11, 2 },
250f2646380SEunchul Kim { 0, 3, 14, 30, 38, 29, 12, 2 }
251f2646380SEunchul Kim }
252f2646380SEunchul Kim };
253f2646380SEunchul Kim
254f2646380SEunchul Kim /* 4-tap Filter Coefficient */
255f2646380SEunchul Kim static const int v_coef_4t[GSC_COEF_RATIO][GSC_COEF_ATTR][GSC_COEF_V_4T] = {
256f2646380SEunchul Kim { /* Ratio <= 65536 (~8:8) */
257f2646380SEunchul Kim { 0, 128, 0, 0 },
258f2646380SEunchul Kim { -4, 127, 5, 0 },
259f2646380SEunchul Kim { -6, 124, 11, -1 },
260f2646380SEunchul Kim { -8, 118, 19, -1 },
261f2646380SEunchul Kim { -8, 111, 27, -2 },
262f2646380SEunchul Kim { -8, 102, 37, -3 },
263f2646380SEunchul Kim { -8, 92, 48, -4 },
264f2646380SEunchul Kim { -7, 81, 59, -5 },
265f2646380SEunchul Kim { -6, 70, 70, -6 },
266f2646380SEunchul Kim { -5, 59, 81, -7 },
267f2646380SEunchul Kim { -4, 48, 92, -8 },
268f2646380SEunchul Kim { -3, 37, 102, -8 },
269f2646380SEunchul Kim { -2, 27, 111, -8 },
270f2646380SEunchul Kim { -1, 19, 118, -8 },
271f2646380SEunchul Kim { -1, 11, 124, -6 },
272f2646380SEunchul Kim { 0, 5, 127, -4 }
273f2646380SEunchul Kim }, { /* 65536 < Ratio <= 74898 (~8:7) */
274f2646380SEunchul Kim { 8, 112, 8, 0 },
275f2646380SEunchul Kim { 4, 111, 14, -1 },
276f2646380SEunchul Kim { 1, 109, 20, -2 },
277f2646380SEunchul Kim { -2, 105, 27, -2 },
278f2646380SEunchul Kim { -3, 100, 34, -3 },
279f2646380SEunchul Kim { -5, 93, 43, -3 },
280f2646380SEunchul Kim { -5, 86, 51, -4 },
281f2646380SEunchul Kim { -5, 77, 60, -4 },
282f2646380SEunchul Kim { -5, 69, 69, -5 },
283f2646380SEunchul Kim { -4, 60, 77, -5 },
284f2646380SEunchul Kim { -4, 51, 86, -5 },
285f2646380SEunchul Kim { -3, 43, 93, -5 },
286f2646380SEunchul Kim { -3, 34, 100, -3 },
287f2646380SEunchul Kim { -2, 27, 105, -2 },
288f2646380SEunchul Kim { -2, 20, 109, 1 },
289f2646380SEunchul Kim { -1, 14, 111, 4 }
290f2646380SEunchul Kim }, { /* 74898 < Ratio <= 87381 (~8:6) */
291f2646380SEunchul Kim { 16, 96, 16, 0 },
292f2646380SEunchul Kim { 12, 97, 21, -2 },
293f2646380SEunchul Kim { 8, 96, 26, -2 },
294f2646380SEunchul Kim { 5, 93, 32, -2 },
295f2646380SEunchul Kim { 2, 89, 39, -2 },
296f2646380SEunchul Kim { 0, 84, 46, -2 },
297f2646380SEunchul Kim { -1, 79, 53, -3 },
298f2646380SEunchul Kim { -2, 73, 59, -2 },
299f2646380SEunchul Kim { -2, 66, 66, -2 },
300f2646380SEunchul Kim { -2, 59, 73, -2 },
301f2646380SEunchul Kim { -3, 53, 79, -1 },
302f2646380SEunchul Kim { -2, 46, 84, 0 },
303f2646380SEunchul Kim { -2, 39, 89, 2 },
304f2646380SEunchul Kim { -2, 32, 93, 5 },
305f2646380SEunchul Kim { -2, 26, 96, 8 },
306f2646380SEunchul Kim { -2, 21, 97, 12 }
307f2646380SEunchul Kim }, { /* 87381 < Ratio <= 104857 (~8:5) */
308f2646380SEunchul Kim { 22, 84, 22, 0 },
309f2646380SEunchul Kim { 18, 85, 26, -1 },
310f2646380SEunchul Kim { 14, 84, 31, -1 },
311f2646380SEunchul Kim { 11, 82, 36, -1 },
312f2646380SEunchul Kim { 8, 79, 42, -1 },
313f2646380SEunchul Kim { 6, 76, 47, -1 },
314f2646380SEunchul Kim { 4, 72, 52, 0 },
315f2646380SEunchul Kim { 2, 68, 58, 0 },
316f2646380SEunchul Kim { 1, 63, 63, 1 },
317f2646380SEunchul Kim { 0, 58, 68, 2 },
318f2646380SEunchul Kim { 0, 52, 72, 4 },
319f2646380SEunchul Kim { -1, 47, 76, 6 },
320f2646380SEunchul Kim { -1, 42, 79, 8 },
321f2646380SEunchul Kim { -1, 36, 82, 11 },
322f2646380SEunchul Kim { -1, 31, 84, 14 },
323f2646380SEunchul Kim { -1, 26, 85, 18 }
324f2646380SEunchul Kim }, { /* 104857 < Ratio <= 131072 (~8:4) */
325f2646380SEunchul Kim { 26, 76, 26, 0 },
326f2646380SEunchul Kim { 22, 76, 30, 0 },
327f2646380SEunchul Kim { 19, 75, 34, 0 },
328f2646380SEunchul Kim { 16, 73, 38, 1 },
329f2646380SEunchul Kim { 13, 71, 43, 1 },
330f2646380SEunchul Kim { 10, 69, 47, 2 },
331f2646380SEunchul Kim { 8, 66, 51, 3 },
332f2646380SEunchul Kim { 6, 63, 55, 4 },
333f2646380SEunchul Kim { 5, 59, 59, 5 },
334f2646380SEunchul Kim { 4, 55, 63, 6 },
335f2646380SEunchul Kim { 3, 51, 66, 8 },
336f2646380SEunchul Kim { 2, 47, 69, 10 },
337f2646380SEunchul Kim { 1, 43, 71, 13 },
338f2646380SEunchul Kim { 1, 38, 73, 16 },
339f2646380SEunchul Kim { 0, 34, 75, 19 },
340f2646380SEunchul Kim { 0, 30, 76, 22 }
341f2646380SEunchul Kim }, { /* 131072 < Ratio <= 174762 (~8:3) */
342f2646380SEunchul Kim { 29, 70, 29, 0 },
343f2646380SEunchul Kim { 26, 68, 32, 2 },
344f2646380SEunchul Kim { 23, 67, 36, 2 },
345f2646380SEunchul Kim { 20, 66, 39, 3 },
346f2646380SEunchul Kim { 17, 65, 43, 3 },
347f2646380SEunchul Kim { 15, 63, 46, 4 },
348f2646380SEunchul Kim { 12, 61, 50, 5 },
349f2646380SEunchul Kim { 10, 58, 53, 7 },
350f2646380SEunchul Kim { 8, 56, 56, 8 },
351f2646380SEunchul Kim { 7, 53, 58, 10 },
352f2646380SEunchul Kim { 5, 50, 61, 12 },
353f2646380SEunchul Kim { 4, 46, 63, 15 },
354f2646380SEunchul Kim { 3, 43, 65, 17 },
355f2646380SEunchul Kim { 3, 39, 66, 20 },
356f2646380SEunchul Kim { 2, 36, 67, 23 },
357f2646380SEunchul Kim { 2, 32, 68, 26 }
358f2646380SEunchul Kim }, { /* 174762 < Ratio <= 262144 (~8:2) */
359f2646380SEunchul Kim { 32, 64, 32, 0 },
360f2646380SEunchul Kim { 28, 63, 34, 3 },
361f2646380SEunchul Kim { 25, 62, 37, 4 },
362f2646380SEunchul Kim { 22, 62, 40, 4 },
363f2646380SEunchul Kim { 19, 61, 43, 5 },
364f2646380SEunchul Kim { 17, 59, 46, 6 },
365f2646380SEunchul Kim { 15, 58, 48, 7 },
366f2646380SEunchul Kim { 13, 55, 51, 9 },
367f2646380SEunchul Kim { 11, 53, 53, 11 },
368f2646380SEunchul Kim { 9, 51, 55, 13 },
369f2646380SEunchul Kim { 7, 48, 58, 15 },
370f2646380SEunchul Kim { 6, 46, 59, 17 },
371f2646380SEunchul Kim { 5, 43, 61, 19 },
372f2646380SEunchul Kim { 4, 40, 62, 22 },
373f2646380SEunchul Kim { 4, 37, 62, 25 },
374f2646380SEunchul Kim { 3, 34, 63, 28 }
375f2646380SEunchul Kim }
376f2646380SEunchul Kim };
377f2646380SEunchul Kim
gsc_sw_reset(struct gsc_context * ctx)378f2646380SEunchul Kim static int gsc_sw_reset(struct gsc_context *ctx)
379f2646380SEunchul Kim {
380f2646380SEunchul Kim u32 cfg;
381f2646380SEunchul Kim int count = GSC_RESET_TIMEOUT;
382f2646380SEunchul Kim
383f2646380SEunchul Kim /* s/w reset */
384f2646380SEunchul Kim cfg = (GSC_SW_RESET_SRESET);
385f2646380SEunchul Kim gsc_write(cfg, GSC_SW_RESET);
386f2646380SEunchul Kim
387f2646380SEunchul Kim /* wait s/w reset complete */
388f2646380SEunchul Kim while (count--) {
389f2646380SEunchul Kim cfg = gsc_read(GSC_SW_RESET);
390f2646380SEunchul Kim if (!cfg)
391f2646380SEunchul Kim break;
392f2646380SEunchul Kim usleep_range(1000, 2000);
393f2646380SEunchul Kim }
394f2646380SEunchul Kim
395f2646380SEunchul Kim if (cfg) {
3966f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to reset gsc h/w.\n");
397f2646380SEunchul Kim return -EBUSY;
398f2646380SEunchul Kim }
399f2646380SEunchul Kim
400f2646380SEunchul Kim /* reset sequence */
401f2646380SEunchul Kim cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK);
402f2646380SEunchul Kim cfg |= (GSC_IN_BASE_ADDR_MASK |
403f2646380SEunchul Kim GSC_IN_BASE_ADDR_PINGPONG(0));
404f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_Y_MASK);
405f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CB_MASK);
406f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CR_MASK);
407f2646380SEunchul Kim
408f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK);
409f2646380SEunchul Kim cfg |= (GSC_OUT_BASE_ADDR_MASK |
410f2646380SEunchul Kim GSC_OUT_BASE_ADDR_PINGPONG(0));
411f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_Y_MASK);
412f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CB_MASK);
413f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CR_MASK);
414f2646380SEunchul Kim
415f2646380SEunchul Kim return 0;
416f2646380SEunchul Kim }
417f2646380SEunchul Kim
gsc_handle_irq(struct gsc_context * ctx,bool enable,bool overflow,bool done)418f2646380SEunchul Kim static void gsc_handle_irq(struct gsc_context *ctx, bool enable,
419f2646380SEunchul Kim bool overflow, bool done)
420f2646380SEunchul Kim {
421f2646380SEunchul Kim u32 cfg;
422f2646380SEunchul Kim
4236be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "enable[%d]overflow[%d]level[%d]\n",
424f2646380SEunchul Kim enable, overflow, done);
425f2646380SEunchul Kim
426f2646380SEunchul Kim cfg = gsc_read(GSC_IRQ);
427f2646380SEunchul Kim cfg |= (GSC_IRQ_OR_MASK | GSC_IRQ_FRMDONE_MASK);
428f2646380SEunchul Kim
429f2646380SEunchul Kim if (enable)
430f2646380SEunchul Kim cfg |= GSC_IRQ_ENABLE;
431f2646380SEunchul Kim else
432f2646380SEunchul Kim cfg &= ~GSC_IRQ_ENABLE;
433f2646380SEunchul Kim
434f2646380SEunchul Kim if (overflow)
435f2646380SEunchul Kim cfg &= ~GSC_IRQ_OR_MASK;
436f2646380SEunchul Kim else
437f2646380SEunchul Kim cfg |= GSC_IRQ_OR_MASK;
438f2646380SEunchul Kim
439f2646380SEunchul Kim if (done)
440f2646380SEunchul Kim cfg &= ~GSC_IRQ_FRMDONE_MASK;
441f2646380SEunchul Kim else
442f2646380SEunchul Kim cfg |= GSC_IRQ_FRMDONE_MASK;
443f2646380SEunchul Kim
444f2646380SEunchul Kim gsc_write(cfg, GSC_IRQ);
445f2646380SEunchul Kim }
446f2646380SEunchul Kim
447f2646380SEunchul Kim
gsc_src_set_fmt(struct gsc_context * ctx,u32 fmt,bool tiled)448d25a40a7SMarek Szyprowski static void gsc_src_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled)
449f2646380SEunchul Kim {
450f2646380SEunchul Kim u32 cfg;
451f2646380SEunchul Kim
4526be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt);
453f2646380SEunchul Kim
454f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON);
455f2646380SEunchul Kim cfg &= ~(GSC_IN_RGB_TYPE_MASK | GSC_IN_YUV422_1P_ORDER_MASK |
456f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_MASK | GSC_IN_FORMAT_MASK |
457f2646380SEunchul Kim GSC_IN_TILE_TYPE_MASK | GSC_IN_TILE_MODE |
458f2646380SEunchul Kim GSC_IN_CHROM_STRIDE_SEL_MASK | GSC_IN_RB_SWAP_MASK);
459f2646380SEunchul Kim
460f2646380SEunchul Kim switch (fmt) {
461f2646380SEunchul Kim case DRM_FORMAT_RGB565:
462f2646380SEunchul Kim cfg |= GSC_IN_RGB565;
463f2646380SEunchul Kim break;
464f2646380SEunchul Kim case DRM_FORMAT_XRGB8888:
4658b7d3ec8SMarek Szyprowski case DRM_FORMAT_ARGB8888:
466f2646380SEunchul Kim cfg |= GSC_IN_XRGB8888;
467f2646380SEunchul Kim break;
468f2646380SEunchul Kim case DRM_FORMAT_BGRX8888:
469f2646380SEunchul Kim cfg |= (GSC_IN_XRGB8888 | GSC_IN_RB_SWAP);
470f2646380SEunchul Kim break;
471f2646380SEunchul Kim case DRM_FORMAT_YUYV:
472f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P |
473f2646380SEunchul Kim GSC_IN_YUV422_1P_ORDER_LSB_Y |
474f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CBCR);
475f2646380SEunchul Kim break;
476f2646380SEunchul Kim case DRM_FORMAT_YVYU:
477f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P |
478f2646380SEunchul Kim GSC_IN_YUV422_1P_ORDER_LSB_Y |
479f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CRCB);
480f2646380SEunchul Kim break;
481f2646380SEunchul Kim case DRM_FORMAT_UYVY:
482f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P |
483f2646380SEunchul Kim GSC_IN_YUV422_1P_OEDER_LSB_C |
484f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CBCR);
485f2646380SEunchul Kim break;
486f2646380SEunchul Kim case DRM_FORMAT_VYUY:
487f2646380SEunchul Kim cfg |= (GSC_IN_YUV422_1P |
488f2646380SEunchul Kim GSC_IN_YUV422_1P_OEDER_LSB_C |
489f2646380SEunchul Kim GSC_IN_CHROMA_ORDER_CRCB);
490f2646380SEunchul Kim break;
491f2646380SEunchul Kim case DRM_FORMAT_NV21:
492dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV420_2P);
493dd209ef8SMarek Szyprowski break;
494f2646380SEunchul Kim case DRM_FORMAT_NV61:
495dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV422_2P);
496f2646380SEunchul Kim break;
497f2646380SEunchul Kim case DRM_FORMAT_YUV422:
498f2646380SEunchul Kim cfg |= GSC_IN_YUV422_3P;
499f2646380SEunchul Kim break;
500f2646380SEunchul Kim case DRM_FORMAT_YUV420:
501dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV420_3P);
502dd209ef8SMarek Szyprowski break;
503f2646380SEunchul Kim case DRM_FORMAT_YVU420:
504dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV420_3P);
505f2646380SEunchul Kim break;
506f2646380SEunchul Kim case DRM_FORMAT_NV12:
507dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV420_2P);
508dd209ef8SMarek Szyprowski break;
509f2646380SEunchul Kim case DRM_FORMAT_NV16:
510dd209ef8SMarek Szyprowski cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV422_2P);
511f2646380SEunchul Kim break;
512f2646380SEunchul Kim }
513f2646380SEunchul Kim
514d25a40a7SMarek Szyprowski if (tiled)
515d25a40a7SMarek Szyprowski cfg |= (GSC_IN_TILE_C_16x8 | GSC_IN_TILE_MODE);
516d25a40a7SMarek Szyprowski
517f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON);
518f2646380SEunchul Kim }
519f2646380SEunchul Kim
gsc_src_set_transf(struct gsc_context * ctx,unsigned int rotation)5208b7d3ec8SMarek Szyprowski static void gsc_src_set_transf(struct gsc_context *ctx, unsigned int rotation)
521f2646380SEunchul Kim {
5228b7d3ec8SMarek Szyprowski unsigned int degree = rotation & DRM_MODE_ROTATE_MASK;
523f2646380SEunchul Kim u32 cfg;
524f2646380SEunchul Kim
525f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON);
526f2646380SEunchul Kim cfg &= ~GSC_IN_ROT_MASK;
527f2646380SEunchul Kim
528f2646380SEunchul Kim switch (degree) {
5298b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_0:
5308b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X)
5314cc11a5fSMarek Szyprowski cfg |= GSC_IN_ROT_XFLIP;
5324cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y)
533f2646380SEunchul Kim cfg |= GSC_IN_ROT_YFLIP;
534f2646380SEunchul Kim break;
5358b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_90:
536f2646380SEunchul Kim cfg |= GSC_IN_ROT_90;
5378b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X)
5384cc11a5fSMarek Szyprowski cfg |= GSC_IN_ROT_XFLIP;
5394cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y)
5408b7d3ec8SMarek Szyprowski cfg |= GSC_IN_ROT_YFLIP;
541f2646380SEunchul Kim break;
5428b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_180:
543f2646380SEunchul Kim cfg |= GSC_IN_ROT_180;
5448b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X)
5454cc11a5fSMarek Szyprowski cfg &= ~GSC_IN_ROT_XFLIP;
5464cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y)
5475149705dSHyungwon Hwang cfg &= ~GSC_IN_ROT_YFLIP;
548f2646380SEunchul Kim break;
5498b7d3ec8SMarek Szyprowski case DRM_MODE_ROTATE_270:
550f2646380SEunchul Kim cfg |= GSC_IN_ROT_270;
5518b7d3ec8SMarek Szyprowski if (rotation & DRM_MODE_REFLECT_X)
5524cc11a5fSMarek Szyprowski cfg &= ~GSC_IN_ROT_XFLIP;
5534cc11a5fSMarek Szyprowski if (rotation & DRM_MODE_REFLECT_Y)
5545149705dSHyungwon Hwang cfg &= ~GSC_IN_ROT_YFLIP;
555f2646380SEunchul Kim break;
556f2646380SEunchul Kim }
557f2646380SEunchul Kim
558f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON);
559f2646380SEunchul Kim
560988a4731SHyungwon Hwang ctx->rotation = (cfg & GSC_IN_ROT_90) ? 1 : 0;
561f2646380SEunchul Kim }
562f2646380SEunchul Kim
gsc_src_set_size(struct gsc_context * ctx,struct exynos_drm_ipp_buffer * buf)5638b7d3ec8SMarek Szyprowski static void gsc_src_set_size(struct gsc_context *ctx,
5648b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_buffer *buf)
565f2646380SEunchul Kim {
566f2646380SEunchul Kim struct gsc_scaler *sc = &ctx->sc;
567f2646380SEunchul Kim u32 cfg;
568f2646380SEunchul Kim
569f2646380SEunchul Kim /* pixel offset */
5708b7d3ec8SMarek Szyprowski cfg = (GSC_SRCIMG_OFFSET_X(buf->rect.x) |
5718b7d3ec8SMarek Szyprowski GSC_SRCIMG_OFFSET_Y(buf->rect.y));
572f2646380SEunchul Kim gsc_write(cfg, GSC_SRCIMG_OFFSET);
573f2646380SEunchul Kim
574f2646380SEunchul Kim /* cropped size */
5758b7d3ec8SMarek Szyprowski cfg = (GSC_CROPPED_WIDTH(buf->rect.w) |
5768b7d3ec8SMarek Szyprowski GSC_CROPPED_HEIGHT(buf->rect.h));
577f2646380SEunchul Kim gsc_write(cfg, GSC_CROPPED_SIZE);
578f2646380SEunchul Kim
579f2646380SEunchul Kim /* original size */
580f2646380SEunchul Kim cfg = gsc_read(GSC_SRCIMG_SIZE);
581f2646380SEunchul Kim cfg &= ~(GSC_SRCIMG_HEIGHT_MASK |
582f2646380SEunchul Kim GSC_SRCIMG_WIDTH_MASK);
583f2646380SEunchul Kim
5844958a1c0SMarek Szyprowski cfg |= (GSC_SRCIMG_WIDTH(buf->buf.pitch[0] / buf->format->cpp[0]) |
5858b7d3ec8SMarek Szyprowski GSC_SRCIMG_HEIGHT(buf->buf.height));
586f2646380SEunchul Kim
587f2646380SEunchul Kim gsc_write(cfg, GSC_SRCIMG_SIZE);
588f2646380SEunchul Kim
589f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON);
590f2646380SEunchul Kim cfg &= ~GSC_IN_RGB_TYPE_MASK;
591f2646380SEunchul Kim
5928b7d3ec8SMarek Szyprowski if (buf->rect.w >= GSC_WIDTH_ITU_709)
593f2646380SEunchul Kim if (sc->range)
594f2646380SEunchul Kim cfg |= GSC_IN_RGB_HD_WIDE;
595f2646380SEunchul Kim else
596f2646380SEunchul Kim cfg |= GSC_IN_RGB_HD_NARROW;
597f2646380SEunchul Kim else
598f2646380SEunchul Kim if (sc->range)
599f2646380SEunchul Kim cfg |= GSC_IN_RGB_SD_WIDE;
600f2646380SEunchul Kim else
601f2646380SEunchul Kim cfg |= GSC_IN_RGB_SD_NARROW;
602f2646380SEunchul Kim
603f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON);
604f2646380SEunchul Kim }
605f2646380SEunchul Kim
gsc_src_set_buf_seq(struct gsc_context * ctx,u32 buf_id,bool enqueue)6068b7d3ec8SMarek Szyprowski static void gsc_src_set_buf_seq(struct gsc_context *ctx, u32 buf_id,
6078b7d3ec8SMarek Szyprowski bool enqueue)
608f2646380SEunchul Kim {
6098b7d3ec8SMarek Szyprowski bool masked = !enqueue;
610f2646380SEunchul Kim u32 cfg;
611f2646380SEunchul Kim u32 mask = 0x00000001 << buf_id;
612f2646380SEunchul Kim
613f2646380SEunchul Kim /* mask register set */
614f2646380SEunchul Kim cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK);
615f2646380SEunchul Kim
616f2646380SEunchul Kim /* sequence id */
617f2646380SEunchul Kim cfg &= ~mask;
618f2646380SEunchul Kim cfg |= masked << buf_id;
619f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_Y_MASK);
620f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CB_MASK);
621f2646380SEunchul Kim gsc_write(cfg, GSC_IN_BASE_ADDR_CR_MASK);
622f2646380SEunchul Kim }
623f2646380SEunchul Kim
gsc_src_set_addr(struct gsc_context * ctx,u32 buf_id,struct exynos_drm_ipp_buffer * buf)6248b7d3ec8SMarek Szyprowski static void gsc_src_set_addr(struct gsc_context *ctx, u32 buf_id,
6258b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_buffer *buf)
626f2646380SEunchul Kim {
627f2646380SEunchul Kim /* address register set */
6288b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[0], GSC_IN_BASE_ADDR_Y(buf_id));
6298b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[1], GSC_IN_BASE_ADDR_CB(buf_id));
6308b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[2], GSC_IN_BASE_ADDR_CR(buf_id));
6318b7d3ec8SMarek Szyprowski
6328b7d3ec8SMarek Szyprowski gsc_src_set_buf_seq(ctx, buf_id, true);
633f2646380SEunchul Kim }
634f2646380SEunchul Kim
gsc_dst_set_fmt(struct gsc_context * ctx,u32 fmt,bool tiled)635d25a40a7SMarek Szyprowski static void gsc_dst_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled)
636f2646380SEunchul Kim {
637f2646380SEunchul Kim u32 cfg;
638f2646380SEunchul Kim
6396be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt);
640f2646380SEunchul Kim
641f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_CON);
642f2646380SEunchul Kim cfg &= ~(GSC_OUT_RGB_TYPE_MASK | GSC_OUT_YUV422_1P_ORDER_MASK |
643f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_MASK | GSC_OUT_FORMAT_MASK |
644f2646380SEunchul Kim GSC_OUT_CHROM_STRIDE_SEL_MASK | GSC_OUT_RB_SWAP_MASK |
645f2646380SEunchul Kim GSC_OUT_GLOBAL_ALPHA_MASK);
646f2646380SEunchul Kim
647f2646380SEunchul Kim switch (fmt) {
648f2646380SEunchul Kim case DRM_FORMAT_RGB565:
649f2646380SEunchul Kim cfg |= GSC_OUT_RGB565;
650f2646380SEunchul Kim break;
6518b7d3ec8SMarek Szyprowski case DRM_FORMAT_ARGB8888:
652f2646380SEunchul Kim case DRM_FORMAT_XRGB8888:
6538b7d3ec8SMarek Szyprowski cfg |= (GSC_OUT_XRGB8888 | GSC_OUT_GLOBAL_ALPHA(0xff));
654f2646380SEunchul Kim break;
655f2646380SEunchul Kim case DRM_FORMAT_BGRX8888:
656f2646380SEunchul Kim cfg |= (GSC_OUT_XRGB8888 | GSC_OUT_RB_SWAP);
657f2646380SEunchul Kim break;
658f2646380SEunchul Kim case DRM_FORMAT_YUYV:
659f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P |
660f2646380SEunchul Kim GSC_OUT_YUV422_1P_ORDER_LSB_Y |
661f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CBCR);
662f2646380SEunchul Kim break;
663f2646380SEunchul Kim case DRM_FORMAT_YVYU:
664f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P |
665f2646380SEunchul Kim GSC_OUT_YUV422_1P_ORDER_LSB_Y |
666f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CRCB);
667f2646380SEunchul Kim break;
668f2646380SEunchul Kim case DRM_FORMAT_UYVY:
669f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P |
670f2646380SEunchul Kim GSC_OUT_YUV422_1P_OEDER_LSB_C |
671f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CBCR);
672f2646380SEunchul Kim break;
673f2646380SEunchul Kim case DRM_FORMAT_VYUY:
674f2646380SEunchul Kim cfg |= (GSC_OUT_YUV422_1P |
675f2646380SEunchul Kim GSC_OUT_YUV422_1P_OEDER_LSB_C |
676f2646380SEunchul Kim GSC_OUT_CHROMA_ORDER_CRCB);
677f2646380SEunchul Kim break;
678f2646380SEunchul Kim case DRM_FORMAT_NV21:
679f2646380SEunchul Kim cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV420_2P);
680f2646380SEunchul Kim break;
681dd209ef8SMarek Szyprowski case DRM_FORMAT_NV61:
682dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV422_2P);
683dd209ef8SMarek Szyprowski break;
684f2646380SEunchul Kim case DRM_FORMAT_YUV422:
685dd209ef8SMarek Szyprowski cfg |= GSC_OUT_YUV422_3P;
686dd209ef8SMarek Szyprowski break;
687f2646380SEunchul Kim case DRM_FORMAT_YUV420:
688dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV420_3P);
689dd209ef8SMarek Szyprowski break;
690f2646380SEunchul Kim case DRM_FORMAT_YVU420:
691dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV420_3P);
692f2646380SEunchul Kim break;
693f2646380SEunchul Kim case DRM_FORMAT_NV12:
694dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV420_2P);
695dd209ef8SMarek Szyprowski break;
696f2646380SEunchul Kim case DRM_FORMAT_NV16:
697dd209ef8SMarek Szyprowski cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV422_2P);
698f2646380SEunchul Kim break;
699f2646380SEunchul Kim }
700f2646380SEunchul Kim
701d25a40a7SMarek Szyprowski if (tiled)
702d25a40a7SMarek Szyprowski cfg |= (GSC_IN_TILE_C_16x8 | GSC_OUT_TILE_MODE);
703d25a40a7SMarek Szyprowski
704f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_CON);
705f2646380SEunchul Kim }
706f2646380SEunchul Kim
gsc_get_ratio_shift(struct gsc_context * ctx,u32 src,u32 dst,u32 * ratio)7076f83d208SInki Dae static int gsc_get_ratio_shift(struct gsc_context *ctx, u32 src, u32 dst,
7086f83d208SInki Dae u32 *ratio)
709f2646380SEunchul Kim {
7106be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "src[%d]dst[%d]\n", src, dst);
711f2646380SEunchul Kim
712f2646380SEunchul Kim if (src >= dst * 8) {
7136f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to make ratio and shift.\n");
714f2646380SEunchul Kim return -EINVAL;
715f2646380SEunchul Kim } else if (src >= dst * 4)
716f2646380SEunchul Kim *ratio = 4;
717f2646380SEunchul Kim else if (src >= dst * 2)
718f2646380SEunchul Kim *ratio = 2;
719f2646380SEunchul Kim else
720f2646380SEunchul Kim *ratio = 1;
721f2646380SEunchul Kim
722f2646380SEunchul Kim return 0;
723f2646380SEunchul Kim }
724f2646380SEunchul Kim
gsc_get_prescaler_shfactor(u32 hratio,u32 vratio,u32 * shfactor)725f2646380SEunchul Kim static void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *shfactor)
726f2646380SEunchul Kim {
727f2646380SEunchul Kim if (hratio == 4 && vratio == 4)
728f2646380SEunchul Kim *shfactor = 4;
729f2646380SEunchul Kim else if ((hratio == 4 && vratio == 2) ||
730f2646380SEunchul Kim (hratio == 2 && vratio == 4))
731f2646380SEunchul Kim *shfactor = 3;
732f2646380SEunchul Kim else if ((hratio == 4 && vratio == 1) ||
733f2646380SEunchul Kim (hratio == 1 && vratio == 4) ||
734f2646380SEunchul Kim (hratio == 2 && vratio == 2))
735f2646380SEunchul Kim *shfactor = 2;
736f2646380SEunchul Kim else if (hratio == 1 && vratio == 1)
737f2646380SEunchul Kim *shfactor = 0;
738f2646380SEunchul Kim else
739f2646380SEunchul Kim *shfactor = 1;
740f2646380SEunchul Kim }
741f2646380SEunchul Kim
gsc_set_prescaler(struct gsc_context * ctx,struct gsc_scaler * sc,struct drm_exynos_ipp_task_rect * src,struct drm_exynos_ipp_task_rect * dst)742f2646380SEunchul Kim static int gsc_set_prescaler(struct gsc_context *ctx, struct gsc_scaler *sc,
7438b7d3ec8SMarek Szyprowski struct drm_exynos_ipp_task_rect *src,
7448b7d3ec8SMarek Szyprowski struct drm_exynos_ipp_task_rect *dst)
745f2646380SEunchul Kim {
746f2646380SEunchul Kim u32 cfg;
747f2646380SEunchul Kim u32 src_w, src_h, dst_w, dst_h;
748f2646380SEunchul Kim int ret = 0;
749f2646380SEunchul Kim
750f2646380SEunchul Kim src_w = src->w;
751f2646380SEunchul Kim src_h = src->h;
752f2646380SEunchul Kim
753f2646380SEunchul Kim if (ctx->rotation) {
754f2646380SEunchul Kim dst_w = dst->h;
755f2646380SEunchul Kim dst_h = dst->w;
756f2646380SEunchul Kim } else {
757f2646380SEunchul Kim dst_w = dst->w;
758f2646380SEunchul Kim dst_h = dst->h;
759f2646380SEunchul Kim }
760f2646380SEunchul Kim
7616f83d208SInki Dae ret = gsc_get_ratio_shift(ctx, src_w, dst_w, &sc->pre_hratio);
762f2646380SEunchul Kim if (ret) {
7636f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to get ratio horizontal.\n");
764f2646380SEunchul Kim return ret;
765f2646380SEunchul Kim }
766f2646380SEunchul Kim
7676f83d208SInki Dae ret = gsc_get_ratio_shift(ctx, src_h, dst_h, &sc->pre_vratio);
768f2646380SEunchul Kim if (ret) {
7696f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to get ratio vertical.\n");
770f2646380SEunchul Kim return ret;
771f2646380SEunchul Kim }
772f2646380SEunchul Kim
7736be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "pre_hratio[%d]pre_vratio[%d]\n",
774cbc4c33dSYoungJun Cho sc->pre_hratio, sc->pre_vratio);
775f2646380SEunchul Kim
776f2646380SEunchul Kim sc->main_hratio = (src_w << 16) / dst_w;
777f2646380SEunchul Kim sc->main_vratio = (src_h << 16) / dst_h;
778f2646380SEunchul Kim
7796be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "main_hratio[%ld]main_vratio[%ld]\n",
780cbc4c33dSYoungJun Cho sc->main_hratio, sc->main_vratio);
781f2646380SEunchul Kim
782f2646380SEunchul Kim gsc_get_prescaler_shfactor(sc->pre_hratio, sc->pre_vratio,
783f2646380SEunchul Kim &sc->pre_shfactor);
784f2646380SEunchul Kim
7856be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "pre_shfactor[%d]\n", sc->pre_shfactor);
786f2646380SEunchul Kim
787f2646380SEunchul Kim cfg = (GSC_PRESC_SHFACTOR(sc->pre_shfactor) |
788f2646380SEunchul Kim GSC_PRESC_H_RATIO(sc->pre_hratio) |
789f2646380SEunchul Kim GSC_PRESC_V_RATIO(sc->pre_vratio));
790f2646380SEunchul Kim gsc_write(cfg, GSC_PRE_SCALE_RATIO);
791f2646380SEunchul Kim
792f2646380SEunchul Kim return ret;
793f2646380SEunchul Kim }
794f2646380SEunchul Kim
gsc_set_h_coef(struct gsc_context * ctx,unsigned long main_hratio)795f2646380SEunchul Kim static void gsc_set_h_coef(struct gsc_context *ctx, unsigned long main_hratio)
796f2646380SEunchul Kim {
797f2646380SEunchul Kim int i, j, k, sc_ratio;
798f2646380SEunchul Kim
799f2646380SEunchul Kim if (main_hratio <= GSC_SC_UP_MAX_RATIO)
800f2646380SEunchul Kim sc_ratio = 0;
801f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_7_8)
802f2646380SEunchul Kim sc_ratio = 1;
803f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_6_8)
804f2646380SEunchul Kim sc_ratio = 2;
805f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_5_8)
806f2646380SEunchul Kim sc_ratio = 3;
807f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_4_8)
808f2646380SEunchul Kim sc_ratio = 4;
809f2646380SEunchul Kim else if (main_hratio <= GSC_SC_DOWN_RATIO_3_8)
810f2646380SEunchul Kim sc_ratio = 5;
811f2646380SEunchul Kim else
812f2646380SEunchul Kim sc_ratio = 6;
813f2646380SEunchul Kim
814f2646380SEunchul Kim for (i = 0; i < GSC_COEF_PHASE; i++)
815f2646380SEunchul Kim for (j = 0; j < GSC_COEF_H_8T; j++)
816f2646380SEunchul Kim for (k = 0; k < GSC_COEF_DEPTH; k++)
817f2646380SEunchul Kim gsc_write(h_coef_8t[sc_ratio][i][j],
818f2646380SEunchul Kim GSC_HCOEF(i, j, k));
819f2646380SEunchul Kim }
820f2646380SEunchul Kim
gsc_set_v_coef(struct gsc_context * ctx,unsigned long main_vratio)821f2646380SEunchul Kim static void gsc_set_v_coef(struct gsc_context *ctx, unsigned long main_vratio)
822f2646380SEunchul Kim {
823f2646380SEunchul Kim int i, j, k, sc_ratio;
824f2646380SEunchul Kim
825f2646380SEunchul Kim if (main_vratio <= GSC_SC_UP_MAX_RATIO)
826f2646380SEunchul Kim sc_ratio = 0;
827f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_7_8)
828f2646380SEunchul Kim sc_ratio = 1;
829f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_6_8)
830f2646380SEunchul Kim sc_ratio = 2;
831f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_5_8)
832f2646380SEunchul Kim sc_ratio = 3;
833f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_4_8)
834f2646380SEunchul Kim sc_ratio = 4;
835f2646380SEunchul Kim else if (main_vratio <= GSC_SC_DOWN_RATIO_3_8)
836f2646380SEunchul Kim sc_ratio = 5;
837f2646380SEunchul Kim else
838f2646380SEunchul Kim sc_ratio = 6;
839f2646380SEunchul Kim
840f2646380SEunchul Kim for (i = 0; i < GSC_COEF_PHASE; i++)
841f2646380SEunchul Kim for (j = 0; j < GSC_COEF_V_4T; j++)
842f2646380SEunchul Kim for (k = 0; k < GSC_COEF_DEPTH; k++)
843f2646380SEunchul Kim gsc_write(v_coef_4t[sc_ratio][i][j],
844f2646380SEunchul Kim GSC_VCOEF(i, j, k));
845f2646380SEunchul Kim }
846f2646380SEunchul Kim
gsc_set_scaler(struct gsc_context * ctx,struct gsc_scaler * sc)847f2646380SEunchul Kim static void gsc_set_scaler(struct gsc_context *ctx, struct gsc_scaler *sc)
848f2646380SEunchul Kim {
849f2646380SEunchul Kim u32 cfg;
850f2646380SEunchul Kim
8516be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "main_hratio[%ld]main_vratio[%ld]\n",
852cbc4c33dSYoungJun Cho sc->main_hratio, sc->main_vratio);
853f2646380SEunchul Kim
854f2646380SEunchul Kim gsc_set_h_coef(ctx, sc->main_hratio);
855f2646380SEunchul Kim cfg = GSC_MAIN_H_RATIO_VALUE(sc->main_hratio);
856f2646380SEunchul Kim gsc_write(cfg, GSC_MAIN_H_RATIO);
857f2646380SEunchul Kim
858f2646380SEunchul Kim gsc_set_v_coef(ctx, sc->main_vratio);
859f2646380SEunchul Kim cfg = GSC_MAIN_V_RATIO_VALUE(sc->main_vratio);
860f2646380SEunchul Kim gsc_write(cfg, GSC_MAIN_V_RATIO);
861f2646380SEunchul Kim }
862f2646380SEunchul Kim
gsc_dst_set_size(struct gsc_context * ctx,struct exynos_drm_ipp_buffer * buf)8638b7d3ec8SMarek Szyprowski static void gsc_dst_set_size(struct gsc_context *ctx,
8648b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_buffer *buf)
865f2646380SEunchul Kim {
866f2646380SEunchul Kim struct gsc_scaler *sc = &ctx->sc;
867f2646380SEunchul Kim u32 cfg;
868f2646380SEunchul Kim
869f2646380SEunchul Kim /* pixel offset */
8708b7d3ec8SMarek Szyprowski cfg = (GSC_DSTIMG_OFFSET_X(buf->rect.x) |
8718b7d3ec8SMarek Szyprowski GSC_DSTIMG_OFFSET_Y(buf->rect.y));
872f2646380SEunchul Kim gsc_write(cfg, GSC_DSTIMG_OFFSET);
873f2646380SEunchul Kim
874f2646380SEunchul Kim /* scaled size */
8758b7d3ec8SMarek Szyprowski if (ctx->rotation)
8768b7d3ec8SMarek Szyprowski cfg = (GSC_SCALED_WIDTH(buf->rect.h) |
8778b7d3ec8SMarek Szyprowski GSC_SCALED_HEIGHT(buf->rect.w));
8788b7d3ec8SMarek Szyprowski else
8798b7d3ec8SMarek Szyprowski cfg = (GSC_SCALED_WIDTH(buf->rect.w) |
8808b7d3ec8SMarek Szyprowski GSC_SCALED_HEIGHT(buf->rect.h));
881f2646380SEunchul Kim gsc_write(cfg, GSC_SCALED_SIZE);
882f2646380SEunchul Kim
883f2646380SEunchul Kim /* original size */
884f2646380SEunchul Kim cfg = gsc_read(GSC_DSTIMG_SIZE);
8858b7d3ec8SMarek Szyprowski cfg &= ~(GSC_DSTIMG_HEIGHT_MASK | GSC_DSTIMG_WIDTH_MASK);
8864958a1c0SMarek Szyprowski cfg |= GSC_DSTIMG_WIDTH(buf->buf.pitch[0] / buf->format->cpp[0]) |
8878b7d3ec8SMarek Szyprowski GSC_DSTIMG_HEIGHT(buf->buf.height);
888f2646380SEunchul Kim gsc_write(cfg, GSC_DSTIMG_SIZE);
889f2646380SEunchul Kim
890f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_CON);
891f2646380SEunchul Kim cfg &= ~GSC_OUT_RGB_TYPE_MASK;
892f2646380SEunchul Kim
8938b7d3ec8SMarek Szyprowski if (buf->rect.w >= GSC_WIDTH_ITU_709)
894f2646380SEunchul Kim if (sc->range)
895f2646380SEunchul Kim cfg |= GSC_OUT_RGB_HD_WIDE;
896f2646380SEunchul Kim else
897f2646380SEunchul Kim cfg |= GSC_OUT_RGB_HD_NARROW;
898f2646380SEunchul Kim else
899f2646380SEunchul Kim if (sc->range)
900f2646380SEunchul Kim cfg |= GSC_OUT_RGB_SD_WIDE;
901f2646380SEunchul Kim else
902f2646380SEunchul Kim cfg |= GSC_OUT_RGB_SD_NARROW;
903f2646380SEunchul Kim
904f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_CON);
905f2646380SEunchul Kim }
906f2646380SEunchul Kim
gsc_dst_get_buf_seq(struct gsc_context * ctx)907f2646380SEunchul Kim static int gsc_dst_get_buf_seq(struct gsc_context *ctx)
908f2646380SEunchul Kim {
909f2646380SEunchul Kim u32 cfg, i, buf_num = GSC_REG_SZ;
910f2646380SEunchul Kim u32 mask = 0x00000001;
911f2646380SEunchul Kim
912f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK);
913f2646380SEunchul Kim
914f2646380SEunchul Kim for (i = 0; i < GSC_REG_SZ; i++)
915f2646380SEunchul Kim if (cfg & (mask << i))
916f2646380SEunchul Kim buf_num--;
917f2646380SEunchul Kim
9186be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "buf_num[%d]\n", buf_num);
919f2646380SEunchul Kim
920f2646380SEunchul Kim return buf_num;
921f2646380SEunchul Kim }
922f2646380SEunchul Kim
gsc_dst_set_buf_seq(struct gsc_context * ctx,u32 buf_id,bool enqueue)9238b7d3ec8SMarek Szyprowski static void gsc_dst_set_buf_seq(struct gsc_context *ctx, u32 buf_id,
9248b7d3ec8SMarek Szyprowski bool enqueue)
925f2646380SEunchul Kim {
9268b7d3ec8SMarek Szyprowski bool masked = !enqueue;
927f2646380SEunchul Kim u32 cfg;
928f2646380SEunchul Kim u32 mask = 0x00000001 << buf_id;
929f2646380SEunchul Kim
930f2646380SEunchul Kim /* mask register set */
931f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK);
932f2646380SEunchul Kim
933f2646380SEunchul Kim /* sequence id */
934f2646380SEunchul Kim cfg &= ~mask;
935f2646380SEunchul Kim cfg |= masked << buf_id;
936f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_Y_MASK);
937f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CB_MASK);
938f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_BASE_ADDR_CR_MASK);
939f2646380SEunchul Kim
940f2646380SEunchul Kim /* interrupt enable */
9418b7d3ec8SMarek Szyprowski if (enqueue && gsc_dst_get_buf_seq(ctx) >= GSC_BUF_START)
942f2646380SEunchul Kim gsc_handle_irq(ctx, true, false, true);
943f2646380SEunchul Kim
944f2646380SEunchul Kim /* interrupt disable */
9458b7d3ec8SMarek Szyprowski if (!enqueue && gsc_dst_get_buf_seq(ctx) <= GSC_BUF_STOP)
946f2646380SEunchul Kim gsc_handle_irq(ctx, false, false, true);
947f2646380SEunchul Kim }
948f2646380SEunchul Kim
gsc_dst_set_addr(struct gsc_context * ctx,u32 buf_id,struct exynos_drm_ipp_buffer * buf)9498b7d3ec8SMarek Szyprowski static void gsc_dst_set_addr(struct gsc_context *ctx,
9508b7d3ec8SMarek Szyprowski u32 buf_id, struct exynos_drm_ipp_buffer *buf)
951f2646380SEunchul Kim {
952f2646380SEunchul Kim /* address register set */
9538b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[0], GSC_OUT_BASE_ADDR_Y(buf_id));
9548b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[1], GSC_OUT_BASE_ADDR_CB(buf_id));
9558b7d3ec8SMarek Szyprowski gsc_write(buf->dma_addr[2], GSC_OUT_BASE_ADDR_CR(buf_id));
956f2646380SEunchul Kim
9578b7d3ec8SMarek Szyprowski gsc_dst_set_buf_seq(ctx, buf_id, true);
958f2646380SEunchul Kim }
959f2646380SEunchul Kim
gsc_get_src_buf_index(struct gsc_context * ctx)960f2646380SEunchul Kim static int gsc_get_src_buf_index(struct gsc_context *ctx)
961f2646380SEunchul Kim {
962f2646380SEunchul Kim u32 cfg, curr_index, i;
963f2646380SEunchul Kim u32 buf_id = GSC_MAX_SRC;
964f2646380SEunchul Kim
9656be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id);
966f2646380SEunchul Kim
967f2646380SEunchul Kim cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK);
968f2646380SEunchul Kim curr_index = GSC_IN_CURR_GET_INDEX(cfg);
969f2646380SEunchul Kim
970f2646380SEunchul Kim for (i = curr_index; i < GSC_MAX_SRC; i++) {
971f2646380SEunchul Kim if (!((cfg >> i) & 0x1)) {
972f2646380SEunchul Kim buf_id = i;
973f2646380SEunchul Kim break;
974f2646380SEunchul Kim }
975f2646380SEunchul Kim }
976f2646380SEunchul Kim
9776be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg,
9788b7d3ec8SMarek Szyprowski curr_index, buf_id);
9798b7d3ec8SMarek Szyprowski
980f2646380SEunchul Kim if (buf_id == GSC_MAX_SRC) {
9816f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to get in buffer index.\n");
982f2646380SEunchul Kim return -EINVAL;
983f2646380SEunchul Kim }
984f2646380SEunchul Kim
9858b7d3ec8SMarek Szyprowski gsc_src_set_buf_seq(ctx, buf_id, false);
986f2646380SEunchul Kim
987f2646380SEunchul Kim return buf_id;
988f2646380SEunchul Kim }
989f2646380SEunchul Kim
gsc_get_dst_buf_index(struct gsc_context * ctx)990f2646380SEunchul Kim static int gsc_get_dst_buf_index(struct gsc_context *ctx)
991f2646380SEunchul Kim {
992f2646380SEunchul Kim u32 cfg, curr_index, i;
993f2646380SEunchul Kim u32 buf_id = GSC_MAX_DST;
994f2646380SEunchul Kim
9956be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id);
996f2646380SEunchul Kim
997f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK);
998f2646380SEunchul Kim curr_index = GSC_OUT_CURR_GET_INDEX(cfg);
999f2646380SEunchul Kim
1000f2646380SEunchul Kim for (i = curr_index; i < GSC_MAX_DST; i++) {
1001f2646380SEunchul Kim if (!((cfg >> i) & 0x1)) {
1002f2646380SEunchul Kim buf_id = i;
1003f2646380SEunchul Kim break;
1004f2646380SEunchul Kim }
1005f2646380SEunchul Kim }
1006f2646380SEunchul Kim
1007f2646380SEunchul Kim if (buf_id == GSC_MAX_DST) {
10086f83d208SInki Dae DRM_DEV_ERROR(ctx->dev, "failed to get out buffer index.\n");
1009f2646380SEunchul Kim return -EINVAL;
1010f2646380SEunchul Kim }
1011f2646380SEunchul Kim
10128b7d3ec8SMarek Szyprowski gsc_dst_set_buf_seq(ctx, buf_id, false);
1013f2646380SEunchul Kim
10146be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg,
1015f2646380SEunchul Kim curr_index, buf_id);
1016f2646380SEunchul Kim
1017f2646380SEunchul Kim return buf_id;
1018f2646380SEunchul Kim }
1019f2646380SEunchul Kim
gsc_irq_handler(int irq,void * dev_id)1020f2646380SEunchul Kim static irqreturn_t gsc_irq_handler(int irq, void *dev_id)
1021f2646380SEunchul Kim {
1022f2646380SEunchul Kim struct gsc_context *ctx = dev_id;
1023f2646380SEunchul Kim u32 status;
10248b7d3ec8SMarek Szyprowski int err = 0;
1025f2646380SEunchul Kim
10266be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id);
1027f2646380SEunchul Kim
1028f2646380SEunchul Kim status = gsc_read(GSC_IRQ);
1029f2646380SEunchul Kim if (status & GSC_IRQ_STATUS_OR_IRQ) {
10308b7d3ec8SMarek Szyprowski dev_err(ctx->dev, "occurred overflow at %d, status 0x%x.\n",
1031f2646380SEunchul Kim ctx->id, status);
10328b7d3ec8SMarek Szyprowski err = -EINVAL;
1033f2646380SEunchul Kim }
1034f2646380SEunchul Kim
1035f2646380SEunchul Kim if (status & GSC_IRQ_STATUS_OR_FRM_DONE) {
10368b7d3ec8SMarek Szyprowski int src_buf_id, dst_buf_id;
10378b7d3ec8SMarek Szyprowski
10388b7d3ec8SMarek Szyprowski dev_dbg(ctx->dev, "occurred frame done at %d, status 0x%x.\n",
1039f2646380SEunchul Kim ctx->id, status);
1040f2646380SEunchul Kim
10418b7d3ec8SMarek Szyprowski src_buf_id = gsc_get_src_buf_index(ctx);
10428b7d3ec8SMarek Szyprowski dst_buf_id = gsc_get_dst_buf_index(ctx);
1043f2646380SEunchul Kim
10446be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "buf_id_src[%d]buf_id_dst[%d]\n",
10456be90056SInki Dae src_buf_id, dst_buf_id);
1046f2646380SEunchul Kim
10478b7d3ec8SMarek Szyprowski if (src_buf_id < 0 || dst_buf_id < 0)
10488b7d3ec8SMarek Szyprowski err = -EINVAL;
10498b7d3ec8SMarek Szyprowski }
1050f2646380SEunchul Kim
10518b7d3ec8SMarek Szyprowski if (ctx->task) {
10528b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task = ctx->task;
10538b7d3ec8SMarek Szyprowski
10548b7d3ec8SMarek Szyprowski ctx->task = NULL;
10558b7d3ec8SMarek Szyprowski pm_runtime_mark_last_busy(ctx->dev);
10568b7d3ec8SMarek Szyprowski pm_runtime_put_autosuspend(ctx->dev);
10578b7d3ec8SMarek Szyprowski exynos_drm_ipp_task_done(task, err);
1058f2646380SEunchul Kim }
1059f2646380SEunchul Kim
1060f2646380SEunchul Kim return IRQ_HANDLED;
1061f2646380SEunchul Kim }
1062f2646380SEunchul Kim
gsc_reset(struct gsc_context * ctx)10638b7d3ec8SMarek Szyprowski static int gsc_reset(struct gsc_context *ctx)
1064f2646380SEunchul Kim {
1065f2646380SEunchul Kim struct gsc_scaler *sc = &ctx->sc;
1066f2646380SEunchul Kim int ret;
1067f2646380SEunchul Kim
1068f2646380SEunchul Kim /* reset h/w block */
1069f2646380SEunchul Kim ret = gsc_sw_reset(ctx);
1070f2646380SEunchul Kim if (ret < 0) {
10718b7d3ec8SMarek Szyprowski dev_err(ctx->dev, "failed to reset hardware.\n");
1072f2646380SEunchul Kim return ret;
1073f2646380SEunchul Kim }
1074f2646380SEunchul Kim
1075f2646380SEunchul Kim /* scaler setting */
1076f2646380SEunchul Kim memset(&ctx->sc, 0x0, sizeof(ctx->sc));
1077f2646380SEunchul Kim sc->range = true;
1078f2646380SEunchul Kim
1079f2646380SEunchul Kim return 0;
1080f2646380SEunchul Kim }
1081f2646380SEunchul Kim
gsc_start(struct gsc_context * ctx)10828b7d3ec8SMarek Szyprowski static void gsc_start(struct gsc_context *ctx)
1083f2646380SEunchul Kim {
1084f2646380SEunchul Kim u32 cfg;
1085f2646380SEunchul Kim
1086f2646380SEunchul Kim gsc_handle_irq(ctx, true, false, true);
1087f2646380SEunchul Kim
1088f2646380SEunchul Kim /* enable one shot */
1089f2646380SEunchul Kim cfg = gsc_read(GSC_ENABLE);
1090f2646380SEunchul Kim cfg &= ~(GSC_ENABLE_ON_CLEAR_MASK |
1091f2646380SEunchul Kim GSC_ENABLE_CLK_GATE_MODE_MASK);
1092f2646380SEunchul Kim cfg |= GSC_ENABLE_ON_CLEAR_ONESHOT;
1093f2646380SEunchul Kim gsc_write(cfg, GSC_ENABLE);
1094f2646380SEunchul Kim
1095f2646380SEunchul Kim /* src dma memory */
1096f2646380SEunchul Kim cfg = gsc_read(GSC_IN_CON);
1097f2646380SEunchul Kim cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK);
1098f2646380SEunchul Kim cfg |= GSC_IN_PATH_MEMORY;
1099f2646380SEunchul Kim gsc_write(cfg, GSC_IN_CON);
1100f2646380SEunchul Kim
1101f2646380SEunchul Kim /* dst dma memory */
1102f2646380SEunchul Kim cfg = gsc_read(GSC_OUT_CON);
1103f2646380SEunchul Kim cfg |= GSC_OUT_PATH_MEMORY;
1104f2646380SEunchul Kim gsc_write(cfg, GSC_OUT_CON);
1105f2646380SEunchul Kim
1106f2646380SEunchul Kim gsc_set_scaler(ctx, &ctx->sc);
1107f2646380SEunchul Kim
1108f2646380SEunchul Kim cfg = gsc_read(GSC_ENABLE);
1109f2646380SEunchul Kim cfg |= GSC_ENABLE_ON;
1110f2646380SEunchul Kim gsc_write(cfg, GSC_ENABLE);
11118b7d3ec8SMarek Szyprowski }
11128b7d3ec8SMarek Szyprowski
gsc_commit(struct exynos_drm_ipp * ipp,struct exynos_drm_ipp_task * task)11138b7d3ec8SMarek Szyprowski static int gsc_commit(struct exynos_drm_ipp *ipp,
11148b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task)
11158b7d3ec8SMarek Szyprowski {
11168b7d3ec8SMarek Szyprowski struct gsc_context *ctx = container_of(ipp, struct gsc_context, ipp);
11178b7d3ec8SMarek Szyprowski int ret;
11188b7d3ec8SMarek Szyprowski
1119445d3bedSInki Dae ret = pm_runtime_resume_and_get(ctx->dev);
1120445d3bedSInki Dae if (ret < 0) {
1121445d3bedSInki Dae dev_err(ctx->dev, "failed to enable GScaler device.\n");
1122445d3bedSInki Dae return ret;
1123445d3bedSInki Dae }
1124445d3bedSInki Dae
11258b7d3ec8SMarek Szyprowski ctx->task = task;
11268b7d3ec8SMarek Szyprowski
11278b7d3ec8SMarek Szyprowski ret = gsc_reset(ctx);
11288b7d3ec8SMarek Szyprowski if (ret) {
11298b7d3ec8SMarek Szyprowski pm_runtime_put_autosuspend(ctx->dev);
11308b7d3ec8SMarek Szyprowski ctx->task = NULL;
11318b7d3ec8SMarek Szyprowski return ret;
11328b7d3ec8SMarek Szyprowski }
11338b7d3ec8SMarek Szyprowski
1134d25a40a7SMarek Szyprowski gsc_src_set_fmt(ctx, task->src.buf.fourcc, task->src.buf.modifier);
11358b7d3ec8SMarek Szyprowski gsc_src_set_transf(ctx, task->transform.rotation);
11368b7d3ec8SMarek Szyprowski gsc_src_set_size(ctx, &task->src);
11378b7d3ec8SMarek Szyprowski gsc_src_set_addr(ctx, 0, &task->src);
1138d25a40a7SMarek Szyprowski gsc_dst_set_fmt(ctx, task->dst.buf.fourcc, task->dst.buf.modifier);
11398b7d3ec8SMarek Szyprowski gsc_dst_set_size(ctx, &task->dst);
11408b7d3ec8SMarek Szyprowski gsc_dst_set_addr(ctx, 0, &task->dst);
11418b7d3ec8SMarek Szyprowski gsc_set_prescaler(ctx, &ctx->sc, &task->src.rect, &task->dst.rect);
11428b7d3ec8SMarek Szyprowski gsc_start(ctx);
1143f2646380SEunchul Kim
1144f2646380SEunchul Kim return 0;
1145f2646380SEunchul Kim }
1146f2646380SEunchul Kim
gsc_abort(struct exynos_drm_ipp * ipp,struct exynos_drm_ipp_task * task)11478b7d3ec8SMarek Szyprowski static void gsc_abort(struct exynos_drm_ipp *ipp,
11488b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task)
1149f2646380SEunchul Kim {
11508b7d3ec8SMarek Szyprowski struct gsc_context *ctx =
11518b7d3ec8SMarek Szyprowski container_of(ipp, struct gsc_context, ipp);
1152f2646380SEunchul Kim
11538b7d3ec8SMarek Szyprowski gsc_reset(ctx);
11548b7d3ec8SMarek Szyprowski if (ctx->task) {
11558b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_task *task = ctx->task;
1156f2646380SEunchul Kim
11578b7d3ec8SMarek Szyprowski ctx->task = NULL;
11588b7d3ec8SMarek Szyprowski pm_runtime_mark_last_busy(ctx->dev);
11598b7d3ec8SMarek Szyprowski pm_runtime_put_autosuspend(ctx->dev);
11608b7d3ec8SMarek Szyprowski exynos_drm_ipp_task_done(task, -EIO);
11618b7d3ec8SMarek Szyprowski }
1162f2646380SEunchul Kim }
1163f2646380SEunchul Kim
11648b7d3ec8SMarek Szyprowski static struct exynos_drm_ipp_funcs ipp_funcs = {
11658b7d3ec8SMarek Szyprowski .commit = gsc_commit,
11668b7d3ec8SMarek Szyprowski .abort = gsc_abort,
11678b7d3ec8SMarek Szyprowski };
1168f2646380SEunchul Kim
gsc_bind(struct device * dev,struct device * master,void * data)11698b7d3ec8SMarek Szyprowski static int gsc_bind(struct device *dev, struct device *master, void *data)
11708b7d3ec8SMarek Szyprowski {
11718b7d3ec8SMarek Szyprowski struct gsc_context *ctx = dev_get_drvdata(dev);
11728b7d3ec8SMarek Szyprowski struct drm_device *drm_dev = data;
11738b7d3ec8SMarek Szyprowski struct exynos_drm_ipp *ipp = &ctx->ipp;
1174f2646380SEunchul Kim
11758b7d3ec8SMarek Szyprowski ctx->drm_dev = drm_dev;
11768b955034SInki Dae ctx->drm_dev = drm_dev;
117707dc3678SMarek Szyprowski exynos_drm_register_dma(drm_dev, dev, &ctx->dma_priv);
11788b7d3ec8SMarek Szyprowski
11798b955034SInki Dae exynos_drm_ipp_register(dev, ipp, &ipp_funcs,
11808b7d3ec8SMarek Szyprowski DRM_EXYNOS_IPP_CAP_CROP | DRM_EXYNOS_IPP_CAP_ROTATE |
11818b7d3ec8SMarek Szyprowski DRM_EXYNOS_IPP_CAP_SCALE | DRM_EXYNOS_IPP_CAP_CONVERT,
11828b7d3ec8SMarek Szyprowski ctx->formats, ctx->num_formats, "gsc");
11838b7d3ec8SMarek Szyprowski
11848b7d3ec8SMarek Szyprowski dev_info(dev, "The exynos gscaler has been probed successfully\n");
11858b7d3ec8SMarek Szyprowski
11868b7d3ec8SMarek Szyprowski return 0;
1187f2646380SEunchul Kim }
1188f2646380SEunchul Kim
gsc_unbind(struct device * dev,struct device * master,void * data)11898b7d3ec8SMarek Szyprowski static void gsc_unbind(struct device *dev, struct device *master,
11908b7d3ec8SMarek Szyprowski void *data)
11918b7d3ec8SMarek Szyprowski {
11928b7d3ec8SMarek Szyprowski struct gsc_context *ctx = dev_get_drvdata(dev);
11938b7d3ec8SMarek Szyprowski struct drm_device *drm_dev = data;
11948b7d3ec8SMarek Szyprowski struct exynos_drm_ipp *ipp = &ctx->ipp;
11958b7d3ec8SMarek Szyprowski
11968b955034SInki Dae exynos_drm_ipp_unregister(dev, ipp);
119707dc3678SMarek Szyprowski exynos_drm_unregister_dma(drm_dev, dev, &ctx->dma_priv);
11988b7d3ec8SMarek Szyprowski }
11998b7d3ec8SMarek Szyprowski
12008b7d3ec8SMarek Szyprowski static const struct component_ops gsc_component_ops = {
12018b7d3ec8SMarek Szyprowski .bind = gsc_bind,
12028b7d3ec8SMarek Szyprowski .unbind = gsc_unbind,
12038b7d3ec8SMarek Szyprowski };
12048b7d3ec8SMarek Szyprowski
12058b7d3ec8SMarek Szyprowski static const unsigned int gsc_formats[] = {
12068b7d3ec8SMarek Szyprowski DRM_FORMAT_ARGB8888,
12078b7d3ec8SMarek Szyprowski DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB565, DRM_FORMAT_BGRX8888,
12088b7d3ec8SMarek Szyprowski DRM_FORMAT_NV12, DRM_FORMAT_NV16, DRM_FORMAT_NV21, DRM_FORMAT_NV61,
12098b7d3ec8SMarek Szyprowski DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU,
12108b7d3ec8SMarek Szyprowski DRM_FORMAT_YUV420, DRM_FORMAT_YVU420, DRM_FORMAT_YUV422,
12118b7d3ec8SMarek Szyprowski };
12128b7d3ec8SMarek Szyprowski
1213d25a40a7SMarek Szyprowski static const unsigned int gsc_tiled_formats[] = {
1214d25a40a7SMarek Szyprowski DRM_FORMAT_NV12, DRM_FORMAT_NV21,
1215d25a40a7SMarek Szyprowski };
1216d25a40a7SMarek Szyprowski
gsc_probe(struct platform_device * pdev)121756550d94SGreg Kroah-Hartman static int gsc_probe(struct platform_device *pdev)
1218f2646380SEunchul Kim {
1219f2646380SEunchul Kim struct device *dev = &pdev->dev;
12208b7d3ec8SMarek Szyprowski struct gsc_driverdata *driver_data;
12218b7d3ec8SMarek Szyprowski struct exynos_drm_ipp_formats *formats;
1222f2646380SEunchul Kim struct gsc_context *ctx;
1223d25a40a7SMarek Szyprowski int num_formats, ret, i, j;
1224f2646380SEunchul Kim
1225f2646380SEunchul Kim ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
1226f2646380SEunchul Kim if (!ctx)
1227f2646380SEunchul Kim return -ENOMEM;
1228f2646380SEunchul Kim
12298b7d3ec8SMarek Szyprowski driver_data = (struct gsc_driverdata *)of_device_get_match_data(dev);
12308b7d3ec8SMarek Szyprowski ctx->dev = dev;
12318b7d3ec8SMarek Szyprowski ctx->num_clocks = driver_data->num_clocks;
12328b7d3ec8SMarek Szyprowski ctx->clk_names = driver_data->clk_names;
12338b7d3ec8SMarek Szyprowski
1234d25a40a7SMarek Szyprowski /* construct formats/limits array */
1235d25a40a7SMarek Szyprowski num_formats = ARRAY_SIZE(gsc_formats) + ARRAY_SIZE(gsc_tiled_formats);
1236d25a40a7SMarek Szyprowski formats = devm_kcalloc(dev, num_formats, sizeof(*formats), GFP_KERNEL);
1237d25a40a7SMarek Szyprowski if (!formats)
1238d25a40a7SMarek Szyprowski return -ENOMEM;
1239d25a40a7SMarek Szyprowski
1240d25a40a7SMarek Szyprowski /* linear formats */
12418b7d3ec8SMarek Szyprowski for (i = 0; i < ARRAY_SIZE(gsc_formats); i++) {
12428b7d3ec8SMarek Szyprowski formats[i].fourcc = gsc_formats[i];
12438b7d3ec8SMarek Szyprowski formats[i].type = DRM_EXYNOS_IPP_FORMAT_SOURCE |
12448b7d3ec8SMarek Szyprowski DRM_EXYNOS_IPP_FORMAT_DESTINATION;
12458b7d3ec8SMarek Szyprowski formats[i].limits = driver_data->limits;
12468b7d3ec8SMarek Szyprowski formats[i].num_limits = driver_data->num_limits;
1247aeefb368SSeung-Woo Kim }
1248d25a40a7SMarek Szyprowski
1249d25a40a7SMarek Szyprowski /* tiled formats */
1250d25a40a7SMarek Szyprowski for (j = i, i = 0; i < ARRAY_SIZE(gsc_tiled_formats); j++, i++) {
1251d25a40a7SMarek Szyprowski formats[j].fourcc = gsc_tiled_formats[i];
1252d25a40a7SMarek Szyprowski formats[j].modifier = DRM_FORMAT_MOD_SAMSUNG_16_16_TILE;
1253d25a40a7SMarek Szyprowski formats[j].type = DRM_EXYNOS_IPP_FORMAT_SOURCE |
1254d25a40a7SMarek Szyprowski DRM_EXYNOS_IPP_FORMAT_DESTINATION;
1255d25a40a7SMarek Szyprowski formats[j].limits = driver_data->limits;
1256d25a40a7SMarek Szyprowski formats[j].num_limits = driver_data->num_limits;
1257d25a40a7SMarek Szyprowski }
1258d25a40a7SMarek Szyprowski
12598b7d3ec8SMarek Szyprowski ctx->formats = formats;
1260d25a40a7SMarek Szyprowski ctx->num_formats = num_formats;
1261aeefb368SSeung-Woo Kim
1262f2646380SEunchul Kim /* clock control */
12638b7d3ec8SMarek Szyprowski for (i = 0; i < ctx->num_clocks; i++) {
12648b7d3ec8SMarek Szyprowski ctx->clocks[i] = devm_clk_get(dev, ctx->clk_names[i]);
12658b7d3ec8SMarek Szyprowski if (IS_ERR(ctx->clocks[i])) {
12668b7d3ec8SMarek Szyprowski dev_err(dev, "failed to get clock: %s\n",
12678b7d3ec8SMarek Szyprowski ctx->clk_names[i]);
12688b7d3ec8SMarek Szyprowski return PTR_ERR(ctx->clocks[i]);
12698b7d3ec8SMarek Szyprowski }
1270f2646380SEunchul Kim }
1271f2646380SEunchul Kim
127217ac76e0SCai Huoqing ctx->regs = devm_platform_ioremap_resource(pdev, 0);
1273d4ed6025SThierry Reding if (IS_ERR(ctx->regs))
1274d4ed6025SThierry Reding return PTR_ERR(ctx->regs);
1275f2646380SEunchul Kim
1276f2646380SEunchul Kim /* resource irq */
1277586d0902SLad Prabhakar ctx->irq = platform_get_irq(pdev, 0);
1278586d0902SLad Prabhakar if (ctx->irq < 0)
1279586d0902SLad Prabhakar return ctx->irq;
1280f2646380SEunchul Kim
12818b7d3ec8SMarek Szyprowski ret = devm_request_irq(dev, ctx->irq, gsc_irq_handler, 0,
12828b7d3ec8SMarek Szyprowski dev_name(dev), ctx);
1283f2646380SEunchul Kim if (ret < 0) {
1284f2646380SEunchul Kim dev_err(dev, "failed to request irq.\n");
12855cbd419cSSachin Kamat return ret;
1286f2646380SEunchul Kim }
1287f2646380SEunchul Kim
1288f2646380SEunchul Kim /* context initailization */
1289f2646380SEunchul Kim ctx->id = pdev->id;
1290f2646380SEunchul Kim
1291f2646380SEunchul Kim platform_set_drvdata(pdev, ctx);
1292f2646380SEunchul Kim
12938b7d3ec8SMarek Szyprowski pm_runtime_use_autosuspend(dev);
12948b7d3ec8SMarek Szyprowski pm_runtime_set_autosuspend_delay(dev, GSC_AUTOSUSPEND_DELAY);
1295f2646380SEunchul Kim pm_runtime_enable(dev);
1296f2646380SEunchul Kim
12978b7d3ec8SMarek Szyprowski ret = component_add(dev, &gsc_component_ops);
12988b7d3ec8SMarek Szyprowski if (ret)
12998b7d3ec8SMarek Szyprowski goto err_pm_dis;
1300f2646380SEunchul Kim
1301d873ab99SSeung-Woo Kim dev_info(dev, "drm gsc registered successfully.\n");
1302f2646380SEunchul Kim
1303f2646380SEunchul Kim return 0;
1304f2646380SEunchul Kim
13058b7d3ec8SMarek Szyprowski err_pm_dis:
13068b7d3ec8SMarek Szyprowski pm_runtime_dont_use_autosuspend(dev);
1307f2646380SEunchul Kim pm_runtime_disable(dev);
1308f2646380SEunchul Kim return ret;
1309f2646380SEunchul Kim }
1310f2646380SEunchul Kim
gsc_remove(struct platform_device * pdev)131156550d94SGreg Kroah-Hartman static int gsc_remove(struct platform_device *pdev)
1312f2646380SEunchul Kim {
1313f2646380SEunchul Kim struct device *dev = &pdev->dev;
1314f2646380SEunchul Kim
131584c92365SChuhong Yuan component_del(dev, &gsc_component_ops);
13168b7d3ec8SMarek Szyprowski pm_runtime_dont_use_autosuspend(dev);
1317f2646380SEunchul Kim pm_runtime_disable(dev);
1318f2646380SEunchul Kim
1319f2646380SEunchul Kim return 0;
1320f2646380SEunchul Kim }
1321f2646380SEunchul Kim
gsc_runtime_suspend(struct device * dev)13224158dbe1SArnd Bergmann static int __maybe_unused gsc_runtime_suspend(struct device *dev)
1323f2646380SEunchul Kim {
1324f2646380SEunchul Kim struct gsc_context *ctx = get_gsc_context(dev);
13258b7d3ec8SMarek Szyprowski int i;
1326f2646380SEunchul Kim
13276be90056SInki Dae DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id);
1328f2646380SEunchul Kim
13298b7d3ec8SMarek Szyprowski for (i = ctx->num_clocks - 1; i >= 0; i--)
13308b7d3ec8SMarek Szyprowski clk_disable_unprepare(ctx->clocks[i]);
13318b7d3ec8SMarek Szyprowski
13328b7d3ec8SMarek Szyprowski return 0;
1333f2646380SEunchul Kim }
1334f2646380SEunchul Kim
gsc_runtime_resume(struct device * dev)13354158dbe1SArnd Bergmann static int __maybe_unused gsc_runtime_resume(struct device *dev)
1336f2646380SEunchul Kim {
1337f2646380SEunchul Kim struct gsc_context *ctx = get_gsc_context(dev);
13388b7d3ec8SMarek Szyprowski int i, ret;
1339f2646380SEunchul Kim
13406be90056SInki Dae DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id);
1341f2646380SEunchul Kim
13428b7d3ec8SMarek Szyprowski for (i = 0; i < ctx->num_clocks; i++) {
13438b7d3ec8SMarek Szyprowski ret = clk_prepare_enable(ctx->clocks[i]);
13448b7d3ec8SMarek Szyprowski if (ret) {
1345*dea5460bSFedor Pchelkin while (--i >= 0)
13468b7d3ec8SMarek Szyprowski clk_disable_unprepare(ctx->clocks[i]);
13478b7d3ec8SMarek Szyprowski return ret;
13488b7d3ec8SMarek Szyprowski }
13498b7d3ec8SMarek Szyprowski }
13508b7d3ec8SMarek Szyprowski return 0;
1351f2646380SEunchul Kim }
1352f2646380SEunchul Kim
1353f2646380SEunchul Kim static const struct dev_pm_ops gsc_pm_ops = {
135483bd7b20SMarek Szyprowski SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
135583bd7b20SMarek Szyprowski pm_runtime_force_resume)
1356f2646380SEunchul Kim SET_RUNTIME_PM_OPS(gsc_runtime_suspend, gsc_runtime_resume, NULL)
1357f2646380SEunchul Kim };
1358f2646380SEunchul Kim
13598b7d3ec8SMarek Szyprowski static const struct drm_exynos_ipp_limit gsc_5250_limits[] = {
13608b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) },
13618b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) },
13628b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2048 }, .v = { 16, 2048 }) },
13638b7d3ec8SMarek Szyprowski { IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 },
13648b7d3ec8SMarek Szyprowski .v = { (1 << 16) / 16, (1 << 16) * 8 }) },
13658b7d3ec8SMarek Szyprowski };
13668b7d3ec8SMarek Szyprowski
13678b7d3ec8SMarek Szyprowski static const struct drm_exynos_ipp_limit gsc_5420_limits[] = {
13688b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) },
13698b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) },
13708b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(ROTATED, .h = { 16, 2016 }, .v = { 8, 2016 }) },
13718b7d3ec8SMarek Szyprowski { IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 },
13728b7d3ec8SMarek Szyprowski .v = { (1 << 16) / 16, (1 << 16) * 8 }) },
13738b7d3ec8SMarek Szyprowski };
13748b7d3ec8SMarek Szyprowski
13758b7d3ec8SMarek Szyprowski static const struct drm_exynos_ipp_limit gsc_5433_limits[] = {
137628b67632SMarek Szyprowski { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 8191, 16 }, .v = { 16, 8191, 2 }) },
13778b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 1 }, .v = { 8, 3344, 1 }) },
13788b7d3ec8SMarek Szyprowski { IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2047 }, .v = { 8, 8191 }) },
13798b7d3ec8SMarek Szyprowski { IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 },
13808b7d3ec8SMarek Szyprowski .v = { (1 << 16) / 16, (1 << 16) * 8 }) },
13818b7d3ec8SMarek Szyprowski };
13828b7d3ec8SMarek Szyprowski
13838b7d3ec8SMarek Szyprowski static struct gsc_driverdata gsc_exynos5250_drvdata = {
13848b7d3ec8SMarek Szyprowski .clk_names = {"gscl"},
13858b7d3ec8SMarek Szyprowski .num_clocks = 1,
13868b7d3ec8SMarek Szyprowski .limits = gsc_5250_limits,
13878b7d3ec8SMarek Szyprowski .num_limits = ARRAY_SIZE(gsc_5250_limits),
13888b7d3ec8SMarek Szyprowski };
13898b7d3ec8SMarek Szyprowski
13908b7d3ec8SMarek Szyprowski static struct gsc_driverdata gsc_exynos5420_drvdata = {
13918b7d3ec8SMarek Szyprowski .clk_names = {"gscl"},
13928b7d3ec8SMarek Szyprowski .num_clocks = 1,
13938b7d3ec8SMarek Szyprowski .limits = gsc_5420_limits,
13948b7d3ec8SMarek Szyprowski .num_limits = ARRAY_SIZE(gsc_5420_limits),
13958b7d3ec8SMarek Szyprowski };
13968b7d3ec8SMarek Szyprowski
13978b7d3ec8SMarek Szyprowski static struct gsc_driverdata gsc_exynos5433_drvdata = {
13988b7d3ec8SMarek Szyprowski .clk_names = {"pclk", "aclk", "aclk_xiu", "aclk_gsclbend"},
13998b7d3ec8SMarek Szyprowski .num_clocks = 4,
14008b7d3ec8SMarek Szyprowski .limits = gsc_5433_limits,
14018b7d3ec8SMarek Szyprowski .num_limits = ARRAY_SIZE(gsc_5433_limits),
14028b7d3ec8SMarek Szyprowski };
14038b7d3ec8SMarek Szyprowski
1404aeefb368SSeung-Woo Kim static const struct of_device_id exynos_drm_gsc_of_match[] = {
14058b7d3ec8SMarek Szyprowski {
14068b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5-gsc",
14078b7d3ec8SMarek Szyprowski .data = &gsc_exynos5250_drvdata,
14088b7d3ec8SMarek Szyprowski }, {
14098b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5250-gsc",
14108b7d3ec8SMarek Szyprowski .data = &gsc_exynos5250_drvdata,
14118b7d3ec8SMarek Szyprowski }, {
14128b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5420-gsc",
14138b7d3ec8SMarek Szyprowski .data = &gsc_exynos5420_drvdata,
14148b7d3ec8SMarek Szyprowski }, {
14158b7d3ec8SMarek Szyprowski .compatible = "samsung,exynos5433-gsc",
14168b7d3ec8SMarek Szyprowski .data = &gsc_exynos5433_drvdata,
14178b7d3ec8SMarek Szyprowski }, {
14188b7d3ec8SMarek Szyprowski },
1419aeefb368SSeung-Woo Kim };
1420aeefb368SSeung-Woo Kim MODULE_DEVICE_TABLE(of, exynos_drm_gsc_of_match);
1421aeefb368SSeung-Woo Kim
1422f2646380SEunchul Kim struct platform_driver gsc_driver = {
1423f2646380SEunchul Kim .probe = gsc_probe,
142456550d94SGreg Kroah-Hartman .remove = gsc_remove,
1425f2646380SEunchul Kim .driver = {
1426f2646380SEunchul Kim .name = "exynos-drm-gsc",
1427f2646380SEunchul Kim .owner = THIS_MODULE,
1428f2646380SEunchul Kim .pm = &gsc_pm_ops,
14296b83c85bSZhu Wang .of_match_table = exynos_drm_gsc_of_match,
1430f2646380SEunchul Kim },
1431f2646380SEunchul Kim };
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