1 /*
2  * Copyright (C) 2012 Samsung Electronics Co.Ltd
3  * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundationr
8  */
9 
10 #include <linux/kernel.h>
11 #include <linux/clk.h>
12 #include <linux/err.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/slab.h>
18 #include <linux/workqueue.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-attrs.h>
21 #include <linux/of.h>
22 
23 #include <drm/drmP.h>
24 #include <drm/exynos_drm.h>
25 #include "exynos_drm_drv.h"
26 #include "exynos_drm_g2d.h"
27 #include "exynos_drm_gem.h"
28 #include "exynos_drm_iommu.h"
29 
30 #define G2D_HW_MAJOR_VER		4
31 #define G2D_HW_MINOR_VER		1
32 
33 /* vaild register range set from user: 0x0104 ~ 0x0880 */
34 #define G2D_VALID_START			0x0104
35 #define G2D_VALID_END			0x0880
36 
37 /* general registers */
38 #define G2D_SOFT_RESET			0x0000
39 #define G2D_INTEN			0x0004
40 #define G2D_INTC_PEND			0x000C
41 #define G2D_DMA_SFR_BASE_ADDR		0x0080
42 #define G2D_DMA_COMMAND			0x0084
43 #define G2D_DMA_STATUS			0x008C
44 #define G2D_DMA_HOLD_CMD		0x0090
45 
46 /* command registers */
47 #define G2D_BITBLT_START		0x0100
48 
49 /* registers for base address */
50 #define G2D_SRC_BASE_ADDR		0x0304
51 #define G2D_SRC_COLOR_MODE		0x030C
52 #define G2D_SRC_LEFT_TOP		0x0310
53 #define G2D_SRC_RIGHT_BOTTOM		0x0314
54 #define G2D_SRC_PLANE2_BASE_ADDR	0x0318
55 #define G2D_DST_BASE_ADDR		0x0404
56 #define G2D_DST_COLOR_MODE		0x040C
57 #define G2D_DST_LEFT_TOP		0x0410
58 #define G2D_DST_RIGHT_BOTTOM		0x0414
59 #define G2D_DST_PLANE2_BASE_ADDR	0x0418
60 #define G2D_PAT_BASE_ADDR		0x0500
61 #define G2D_MSK_BASE_ADDR		0x0520
62 
63 /* G2D_SOFT_RESET */
64 #define G2D_SFRCLEAR			(1 << 1)
65 #define G2D_R				(1 << 0)
66 
67 /* G2D_INTEN */
68 #define G2D_INTEN_ACF			(1 << 3)
69 #define G2D_INTEN_UCF			(1 << 2)
70 #define G2D_INTEN_GCF			(1 << 1)
71 #define G2D_INTEN_SCF			(1 << 0)
72 
73 /* G2D_INTC_PEND */
74 #define G2D_INTP_ACMD_FIN		(1 << 3)
75 #define G2D_INTP_UCMD_FIN		(1 << 2)
76 #define G2D_INTP_GCMD_FIN		(1 << 1)
77 #define G2D_INTP_SCMD_FIN		(1 << 0)
78 
79 /* G2D_DMA_COMMAND */
80 #define G2D_DMA_HALT			(1 << 2)
81 #define G2D_DMA_CONTINUE		(1 << 1)
82 #define G2D_DMA_START			(1 << 0)
83 
84 /* G2D_DMA_STATUS */
85 #define G2D_DMA_LIST_DONE_COUNT		(0xFF << 17)
86 #define G2D_DMA_BITBLT_DONE_COUNT	(0xFFFF << 1)
87 #define G2D_DMA_DONE			(1 << 0)
88 #define G2D_DMA_LIST_DONE_COUNT_OFFSET	17
89 
90 /* G2D_DMA_HOLD_CMD */
91 #define G2D_USER_HOLD			(1 << 2)
92 #define G2D_LIST_HOLD			(1 << 1)
93 #define G2D_BITBLT_HOLD			(1 << 0)
94 
95 /* G2D_BITBLT_START */
96 #define G2D_START_CASESEL		(1 << 2)
97 #define G2D_START_NHOLT			(1 << 1)
98 #define G2D_START_BITBLT		(1 << 0)
99 
100 /* buffer color format */
101 #define G2D_FMT_XRGB8888		0
102 #define G2D_FMT_ARGB8888		1
103 #define G2D_FMT_RGB565			2
104 #define G2D_FMT_XRGB1555		3
105 #define G2D_FMT_ARGB1555		4
106 #define G2D_FMT_XRGB4444		5
107 #define G2D_FMT_ARGB4444		6
108 #define G2D_FMT_PACKED_RGB888		7
109 #define G2D_FMT_A8			11
110 #define G2D_FMT_L8			12
111 
112 /* buffer valid length */
113 #define G2D_LEN_MIN			1
114 #define G2D_LEN_MAX			8000
115 
116 #define G2D_CMDLIST_SIZE		(PAGE_SIZE / 4)
117 #define G2D_CMDLIST_NUM			64
118 #define G2D_CMDLIST_POOL_SIZE		(G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
119 #define G2D_CMDLIST_DATA_NUM		(G2D_CMDLIST_SIZE / sizeof(u32) - 2)
120 
121 /* maximum buffer pool size of userptr is 64MB as default */
122 #define MAX_POOL		(64 * 1024 * 1024)
123 
124 enum {
125 	BUF_TYPE_GEM = 1,
126 	BUF_TYPE_USERPTR,
127 };
128 
129 enum g2d_reg_type {
130 	REG_TYPE_NONE = -1,
131 	REG_TYPE_SRC,
132 	REG_TYPE_SRC_PLANE2,
133 	REG_TYPE_DST,
134 	REG_TYPE_DST_PLANE2,
135 	REG_TYPE_PAT,
136 	REG_TYPE_MSK,
137 	MAX_REG_TYPE_NR
138 };
139 
140 /* cmdlist data structure */
141 struct g2d_cmdlist {
142 	u32		head;
143 	unsigned long	data[G2D_CMDLIST_DATA_NUM];
144 	u32		last;	/* last data offset */
145 };
146 
147 /*
148  * A structure of buffer description
149  *
150  * @format: color format
151  * @left_x: the x coordinates of left top corner
152  * @top_y: the y coordinates of left top corner
153  * @right_x: the x coordinates of right bottom corner
154  * @bottom_y: the y coordinates of right bottom corner
155  *
156  */
157 struct g2d_buf_desc {
158 	unsigned int	format;
159 	unsigned int	left_x;
160 	unsigned int	top_y;
161 	unsigned int	right_x;
162 	unsigned int	bottom_y;
163 };
164 
165 /*
166  * A structure of buffer information
167  *
168  * @map_nr: manages the number of mapped buffers
169  * @reg_types: stores regitster type in the order of requested command
170  * @handles: stores buffer handle in its reg_type position
171  * @types: stores buffer type in its reg_type position
172  * @descs: stores buffer description in its reg_type position
173  *
174  */
175 struct g2d_buf_info {
176 	unsigned int		map_nr;
177 	enum g2d_reg_type	reg_types[MAX_REG_TYPE_NR];
178 	unsigned long		handles[MAX_REG_TYPE_NR];
179 	unsigned int		types[MAX_REG_TYPE_NR];
180 	struct g2d_buf_desc	descs[MAX_REG_TYPE_NR];
181 };
182 
183 struct drm_exynos_pending_g2d_event {
184 	struct drm_pending_event	base;
185 	struct drm_exynos_g2d_event	event;
186 };
187 
188 struct g2d_cmdlist_userptr {
189 	struct list_head	list;
190 	dma_addr_t		dma_addr;
191 	unsigned long		userptr;
192 	unsigned long		size;
193 	struct page		**pages;
194 	unsigned int		npages;
195 	struct sg_table		*sgt;
196 	struct vm_area_struct	*vma;
197 	atomic_t		refcount;
198 	bool			in_pool;
199 	bool			out_of_list;
200 };
201 struct g2d_cmdlist_node {
202 	struct list_head	list;
203 	struct g2d_cmdlist	*cmdlist;
204 	dma_addr_t		dma_addr;
205 	struct g2d_buf_info	buf_info;
206 
207 	struct drm_exynos_pending_g2d_event	*event;
208 };
209 
210 struct g2d_runqueue_node {
211 	struct list_head	list;
212 	struct list_head	run_cmdlist;
213 	struct list_head	event_list;
214 	struct drm_file		*filp;
215 	pid_t			pid;
216 	struct completion	complete;
217 	int			async;
218 };
219 
220 struct g2d_data {
221 	struct device			*dev;
222 	struct clk			*gate_clk;
223 	void __iomem			*regs;
224 	int				irq;
225 	struct workqueue_struct		*g2d_workq;
226 	struct work_struct		runqueue_work;
227 	struct exynos_drm_subdrv	subdrv;
228 	bool				suspended;
229 
230 	/* cmdlist */
231 	struct g2d_cmdlist_node		*cmdlist_node;
232 	struct list_head		free_cmdlist;
233 	struct mutex			cmdlist_mutex;
234 	dma_addr_t			cmdlist_pool;
235 	void				*cmdlist_pool_virt;
236 	struct dma_attrs		cmdlist_dma_attrs;
237 
238 	/* runqueue*/
239 	struct g2d_runqueue_node	*runqueue_node;
240 	struct list_head		runqueue;
241 	struct mutex			runqueue_mutex;
242 	struct kmem_cache		*runqueue_slab;
243 
244 	unsigned long			current_pool;
245 	unsigned long			max_pool;
246 };
247 
248 static int g2d_init_cmdlist(struct g2d_data *g2d)
249 {
250 	struct device *dev = g2d->dev;
251 	struct g2d_cmdlist_node *node = g2d->cmdlist_node;
252 	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
253 	int nr;
254 	int ret;
255 	struct g2d_buf_info *buf_info;
256 
257 	init_dma_attrs(&g2d->cmdlist_dma_attrs);
258 	dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
259 
260 	g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev,
261 						G2D_CMDLIST_POOL_SIZE,
262 						&g2d->cmdlist_pool, GFP_KERNEL,
263 						&g2d->cmdlist_dma_attrs);
264 	if (!g2d->cmdlist_pool_virt) {
265 		dev_err(dev, "failed to allocate dma memory\n");
266 		return -ENOMEM;
267 	}
268 
269 	node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
270 	if (!node) {
271 		dev_err(dev, "failed to allocate memory\n");
272 		ret = -ENOMEM;
273 		goto err;
274 	}
275 
276 	for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
277 		unsigned int i;
278 
279 		node[nr].cmdlist =
280 			g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
281 		node[nr].dma_addr =
282 			g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
283 
284 		buf_info = &node[nr].buf_info;
285 		for (i = 0; i < MAX_REG_TYPE_NR; i++)
286 			buf_info->reg_types[i] = REG_TYPE_NONE;
287 
288 		list_add_tail(&node[nr].list, &g2d->free_cmdlist);
289 	}
290 
291 	return 0;
292 
293 err:
294 	dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
295 			g2d->cmdlist_pool_virt,
296 			g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
297 	return ret;
298 }
299 
300 static void g2d_fini_cmdlist(struct g2d_data *g2d)
301 {
302 	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
303 
304 	kfree(g2d->cmdlist_node);
305 	dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
306 			g2d->cmdlist_pool_virt,
307 			g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
308 }
309 
310 static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
311 {
312 	struct device *dev = g2d->dev;
313 	struct g2d_cmdlist_node *node;
314 
315 	mutex_lock(&g2d->cmdlist_mutex);
316 	if (list_empty(&g2d->free_cmdlist)) {
317 		dev_err(dev, "there is no free cmdlist\n");
318 		mutex_unlock(&g2d->cmdlist_mutex);
319 		return NULL;
320 	}
321 
322 	node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
323 				list);
324 	list_del_init(&node->list);
325 	mutex_unlock(&g2d->cmdlist_mutex);
326 
327 	return node;
328 }
329 
330 static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
331 {
332 	mutex_lock(&g2d->cmdlist_mutex);
333 	list_move_tail(&node->list, &g2d->free_cmdlist);
334 	mutex_unlock(&g2d->cmdlist_mutex);
335 }
336 
337 static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
338 				     struct g2d_cmdlist_node *node)
339 {
340 	struct g2d_cmdlist_node *lnode;
341 
342 	if (list_empty(&g2d_priv->inuse_cmdlist))
343 		goto add_to_list;
344 
345 	/* this links to base address of new cmdlist */
346 	lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
347 				struct g2d_cmdlist_node, list);
348 	lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
349 
350 add_to_list:
351 	list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
352 
353 	if (node->event)
354 		list_add_tail(&node->event->base.link, &g2d_priv->event_list);
355 }
356 
357 static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
358 					unsigned long obj,
359 					bool force)
360 {
361 	struct g2d_cmdlist_userptr *g2d_userptr =
362 					(struct g2d_cmdlist_userptr *)obj;
363 
364 	if (!obj)
365 		return;
366 
367 	if (force)
368 		goto out;
369 
370 	atomic_dec(&g2d_userptr->refcount);
371 
372 	if (atomic_read(&g2d_userptr->refcount) > 0)
373 		return;
374 
375 	if (g2d_userptr->in_pool)
376 		return;
377 
378 out:
379 	exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt,
380 					DMA_BIDIRECTIONAL);
381 
382 	exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
383 					g2d_userptr->npages,
384 					g2d_userptr->vma);
385 
386 	if (!g2d_userptr->out_of_list)
387 		list_del_init(&g2d_userptr->list);
388 
389 	sg_free_table(g2d_userptr->sgt);
390 	kfree(g2d_userptr->sgt);
391 
392 	drm_free_large(g2d_userptr->pages);
393 	kfree(g2d_userptr);
394 }
395 
396 static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
397 					unsigned long userptr,
398 					unsigned long size,
399 					struct drm_file *filp,
400 					unsigned long *obj)
401 {
402 	struct drm_exynos_file_private *file_priv = filp->driver_priv;
403 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
404 	struct g2d_cmdlist_userptr *g2d_userptr;
405 	struct g2d_data *g2d;
406 	struct page **pages;
407 	struct sg_table	*sgt;
408 	struct vm_area_struct *vma;
409 	unsigned long start, end;
410 	unsigned int npages, offset;
411 	int ret;
412 
413 	if (!size) {
414 		DRM_ERROR("invalid userptr size.\n");
415 		return ERR_PTR(-EINVAL);
416 	}
417 
418 	g2d = dev_get_drvdata(g2d_priv->dev);
419 
420 	/* check if userptr already exists in userptr_list. */
421 	list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
422 		if (g2d_userptr->userptr == userptr) {
423 			/*
424 			 * also check size because there could be same address
425 			 * and different size.
426 			 */
427 			if (g2d_userptr->size == size) {
428 				atomic_inc(&g2d_userptr->refcount);
429 				*obj = (unsigned long)g2d_userptr;
430 
431 				return &g2d_userptr->dma_addr;
432 			}
433 
434 			/*
435 			 * at this moment, maybe g2d dma is accessing this
436 			 * g2d_userptr memory region so just remove this
437 			 * g2d_userptr object from userptr_list not to be
438 			 * referred again and also except it the userptr
439 			 * pool to be released after the dma access completion.
440 			 */
441 			g2d_userptr->out_of_list = true;
442 			g2d_userptr->in_pool = false;
443 			list_del_init(&g2d_userptr->list);
444 
445 			break;
446 		}
447 	}
448 
449 	g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
450 	if (!g2d_userptr)
451 		return ERR_PTR(-ENOMEM);
452 
453 	atomic_set(&g2d_userptr->refcount, 1);
454 
455 	start = userptr & PAGE_MASK;
456 	offset = userptr & ~PAGE_MASK;
457 	end = PAGE_ALIGN(userptr + size);
458 	npages = (end - start) >> PAGE_SHIFT;
459 	g2d_userptr->npages = npages;
460 
461 	pages = drm_calloc_large(npages, sizeof(struct page *));
462 	if (!pages) {
463 		DRM_ERROR("failed to allocate pages.\n");
464 		ret = -ENOMEM;
465 		goto err_free;
466 	}
467 
468 	vma = find_vma(current->mm, userptr);
469 	if (!vma) {
470 		DRM_ERROR("failed to get vm region.\n");
471 		ret = -EFAULT;
472 		goto err_free_pages;
473 	}
474 
475 	if (vma->vm_end < userptr + size) {
476 		DRM_ERROR("vma is too small.\n");
477 		ret = -EFAULT;
478 		goto err_free_pages;
479 	}
480 
481 	g2d_userptr->vma = exynos_gem_get_vma(vma);
482 	if (!g2d_userptr->vma) {
483 		DRM_ERROR("failed to copy vma.\n");
484 		ret = -ENOMEM;
485 		goto err_free_pages;
486 	}
487 
488 	g2d_userptr->size = size;
489 
490 	ret = exynos_gem_get_pages_from_userptr(start & PAGE_MASK,
491 						npages, pages, vma);
492 	if (ret < 0) {
493 		DRM_ERROR("failed to get user pages from userptr.\n");
494 		goto err_put_vma;
495 	}
496 
497 	g2d_userptr->pages = pages;
498 
499 	sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
500 	if (!sgt) {
501 		ret = -ENOMEM;
502 		goto err_free_userptr;
503 	}
504 
505 	ret = sg_alloc_table_from_pages(sgt, pages, npages, offset,
506 					size, GFP_KERNEL);
507 	if (ret < 0) {
508 		DRM_ERROR("failed to get sgt from pages.\n");
509 		goto err_free_sgt;
510 	}
511 
512 	g2d_userptr->sgt = sgt;
513 
514 	ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt,
515 						DMA_BIDIRECTIONAL);
516 	if (ret < 0) {
517 		DRM_ERROR("failed to map sgt with dma region.\n");
518 		goto err_sg_free_table;
519 	}
520 
521 	g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
522 	g2d_userptr->userptr = userptr;
523 
524 	list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
525 
526 	if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
527 		g2d->current_pool += npages << PAGE_SHIFT;
528 		g2d_userptr->in_pool = true;
529 	}
530 
531 	*obj = (unsigned long)g2d_userptr;
532 
533 	return &g2d_userptr->dma_addr;
534 
535 err_sg_free_table:
536 	sg_free_table(sgt);
537 
538 err_free_sgt:
539 	kfree(sgt);
540 
541 err_free_userptr:
542 	exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
543 					g2d_userptr->npages,
544 					g2d_userptr->vma);
545 
546 err_put_vma:
547 	exynos_gem_put_vma(g2d_userptr->vma);
548 
549 err_free_pages:
550 	drm_free_large(pages);
551 
552 err_free:
553 	kfree(g2d_userptr);
554 
555 	return ERR_PTR(ret);
556 }
557 
558 static void g2d_userptr_free_all(struct drm_device *drm_dev,
559 					struct g2d_data *g2d,
560 					struct drm_file *filp)
561 {
562 	struct drm_exynos_file_private *file_priv = filp->driver_priv;
563 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
564 	struct g2d_cmdlist_userptr *g2d_userptr, *n;
565 
566 	list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
567 		if (g2d_userptr->in_pool)
568 			g2d_userptr_put_dma_addr(drm_dev,
569 						(unsigned long)g2d_userptr,
570 						true);
571 
572 	g2d->current_pool = 0;
573 }
574 
575 static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
576 {
577 	enum g2d_reg_type reg_type;
578 
579 	switch (reg_offset) {
580 	case G2D_SRC_BASE_ADDR:
581 	case G2D_SRC_COLOR_MODE:
582 	case G2D_SRC_LEFT_TOP:
583 	case G2D_SRC_RIGHT_BOTTOM:
584 		reg_type = REG_TYPE_SRC;
585 		break;
586 	case G2D_SRC_PLANE2_BASE_ADDR:
587 		reg_type = REG_TYPE_SRC_PLANE2;
588 		break;
589 	case G2D_DST_BASE_ADDR:
590 	case G2D_DST_COLOR_MODE:
591 	case G2D_DST_LEFT_TOP:
592 	case G2D_DST_RIGHT_BOTTOM:
593 		reg_type = REG_TYPE_DST;
594 		break;
595 	case G2D_DST_PLANE2_BASE_ADDR:
596 		reg_type = REG_TYPE_DST_PLANE2;
597 		break;
598 	case G2D_PAT_BASE_ADDR:
599 		reg_type = REG_TYPE_PAT;
600 		break;
601 	case G2D_MSK_BASE_ADDR:
602 		reg_type = REG_TYPE_MSK;
603 		break;
604 	default:
605 		reg_type = REG_TYPE_NONE;
606 		DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
607 		break;
608 	};
609 
610 	return reg_type;
611 }
612 
613 static unsigned long g2d_get_buf_bpp(unsigned int format)
614 {
615 	unsigned long bpp;
616 
617 	switch (format) {
618 	case G2D_FMT_XRGB8888:
619 	case G2D_FMT_ARGB8888:
620 		bpp = 4;
621 		break;
622 	case G2D_FMT_RGB565:
623 	case G2D_FMT_XRGB1555:
624 	case G2D_FMT_ARGB1555:
625 	case G2D_FMT_XRGB4444:
626 	case G2D_FMT_ARGB4444:
627 		bpp = 2;
628 		break;
629 	case G2D_FMT_PACKED_RGB888:
630 		bpp = 3;
631 		break;
632 	default:
633 		bpp = 1;
634 		break;
635 	}
636 
637 	return bpp;
638 }
639 
640 static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
641 						enum g2d_reg_type reg_type,
642 						unsigned long size)
643 {
644 	unsigned int width, height;
645 	unsigned long area;
646 
647 	/*
648 	 * check source and destination buffers only.
649 	 * so the others are always valid.
650 	 */
651 	if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
652 		return true;
653 
654 	width = buf_desc->right_x - buf_desc->left_x;
655 	if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
656 		DRM_ERROR("width[%u] is out of range!\n", width);
657 		return false;
658 	}
659 
660 	height = buf_desc->bottom_y - buf_desc->top_y;
661 	if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
662 		DRM_ERROR("height[%u] is out of range!\n", height);
663 		return false;
664 	}
665 
666 	area = (unsigned long)width * (unsigned long)height *
667 					g2d_get_buf_bpp(buf_desc->format);
668 	if (area > size) {
669 		DRM_ERROR("area[%lu] is out of range[%lu]!\n", area, size);
670 		return false;
671 	}
672 
673 	return true;
674 }
675 
676 static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
677 				struct g2d_cmdlist_node *node,
678 				struct drm_device *drm_dev,
679 				struct drm_file *file)
680 {
681 	struct g2d_cmdlist *cmdlist = node->cmdlist;
682 	struct g2d_buf_info *buf_info = &node->buf_info;
683 	int offset;
684 	int ret;
685 	int i;
686 
687 	for (i = 0; i < buf_info->map_nr; i++) {
688 		struct g2d_buf_desc *buf_desc;
689 		enum g2d_reg_type reg_type;
690 		int reg_pos;
691 		unsigned long handle;
692 		dma_addr_t *addr;
693 
694 		reg_pos = cmdlist->last - 2 * (i + 1);
695 
696 		offset = cmdlist->data[reg_pos];
697 		handle = cmdlist->data[reg_pos + 1];
698 
699 		reg_type = g2d_get_reg_type(offset);
700 		if (reg_type == REG_TYPE_NONE) {
701 			ret = -EFAULT;
702 			goto err;
703 		}
704 
705 		buf_desc = &buf_info->descs[reg_type];
706 
707 		if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
708 			unsigned long size;
709 
710 			size = exynos_drm_gem_get_size(drm_dev, handle, file);
711 			if (!size) {
712 				ret = -EFAULT;
713 				goto err;
714 			}
715 
716 			if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
717 									size)) {
718 				ret = -EFAULT;
719 				goto err;
720 			}
721 
722 			addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
723 								file);
724 			if (IS_ERR(addr)) {
725 				ret = -EFAULT;
726 				goto err;
727 			}
728 		} else {
729 			struct drm_exynos_g2d_userptr g2d_userptr;
730 
731 			if (copy_from_user(&g2d_userptr, (void __user *)handle,
732 				sizeof(struct drm_exynos_g2d_userptr))) {
733 				ret = -EFAULT;
734 				goto err;
735 			}
736 
737 			if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
738 							g2d_userptr.size)) {
739 				ret = -EFAULT;
740 				goto err;
741 			}
742 
743 			addr = g2d_userptr_get_dma_addr(drm_dev,
744 							g2d_userptr.userptr,
745 							g2d_userptr.size,
746 							file,
747 							&handle);
748 			if (IS_ERR(addr)) {
749 				ret = -EFAULT;
750 				goto err;
751 			}
752 		}
753 
754 		cmdlist->data[reg_pos + 1] = *addr;
755 		buf_info->reg_types[i] = reg_type;
756 		buf_info->handles[reg_type] = handle;
757 	}
758 
759 	return 0;
760 
761 err:
762 	buf_info->map_nr = i;
763 	return ret;
764 }
765 
766 static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
767 				  struct g2d_cmdlist_node *node,
768 				  struct drm_file *filp)
769 {
770 	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
771 	struct g2d_buf_info *buf_info = &node->buf_info;
772 	int i;
773 
774 	for (i = 0; i < buf_info->map_nr; i++) {
775 		struct g2d_buf_desc *buf_desc;
776 		enum g2d_reg_type reg_type;
777 		unsigned long handle;
778 
779 		reg_type = buf_info->reg_types[i];
780 
781 		buf_desc = &buf_info->descs[reg_type];
782 		handle = buf_info->handles[reg_type];
783 
784 		if (buf_info->types[reg_type] == BUF_TYPE_GEM)
785 			exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
786 							filp);
787 		else
788 			g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
789 							false);
790 
791 		buf_info->reg_types[i] = REG_TYPE_NONE;
792 		buf_info->handles[reg_type] = 0;
793 		buf_info->types[reg_type] = 0;
794 		memset(buf_desc, 0x00, sizeof(*buf_desc));
795 	}
796 
797 	buf_info->map_nr = 0;
798 }
799 
800 static void g2d_dma_start(struct g2d_data *g2d,
801 			  struct g2d_runqueue_node *runqueue_node)
802 {
803 	struct g2d_cmdlist_node *node =
804 				list_first_entry(&runqueue_node->run_cmdlist,
805 						struct g2d_cmdlist_node, list);
806 	int ret;
807 
808 	ret = pm_runtime_get_sync(g2d->dev);
809 	if (ret < 0)
810 		return;
811 
812 	writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
813 	writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
814 }
815 
816 static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
817 {
818 	struct g2d_runqueue_node *runqueue_node;
819 
820 	if (list_empty(&g2d->runqueue))
821 		return NULL;
822 
823 	runqueue_node = list_first_entry(&g2d->runqueue,
824 					 struct g2d_runqueue_node, list);
825 	list_del_init(&runqueue_node->list);
826 	return runqueue_node;
827 }
828 
829 static void g2d_free_runqueue_node(struct g2d_data *g2d,
830 				   struct g2d_runqueue_node *runqueue_node)
831 {
832 	struct g2d_cmdlist_node *node;
833 
834 	if (!runqueue_node)
835 		return;
836 
837 	mutex_lock(&g2d->cmdlist_mutex);
838 	/*
839 	 * commands in run_cmdlist have been completed so unmap all gem
840 	 * objects in each command node so that they are unreferenced.
841 	 */
842 	list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
843 		g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
844 	list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
845 	mutex_unlock(&g2d->cmdlist_mutex);
846 
847 	kmem_cache_free(g2d->runqueue_slab, runqueue_node);
848 }
849 
850 static void g2d_exec_runqueue(struct g2d_data *g2d)
851 {
852 	g2d->runqueue_node = g2d_get_runqueue_node(g2d);
853 	if (g2d->runqueue_node)
854 		g2d_dma_start(g2d, g2d->runqueue_node);
855 }
856 
857 static void g2d_runqueue_worker(struct work_struct *work)
858 {
859 	struct g2d_data *g2d = container_of(work, struct g2d_data,
860 					    runqueue_work);
861 
862 	mutex_lock(&g2d->runqueue_mutex);
863 	pm_runtime_put_sync(g2d->dev);
864 
865 	complete(&g2d->runqueue_node->complete);
866 	if (g2d->runqueue_node->async)
867 		g2d_free_runqueue_node(g2d, g2d->runqueue_node);
868 
869 	if (g2d->suspended)
870 		g2d->runqueue_node = NULL;
871 	else
872 		g2d_exec_runqueue(g2d);
873 	mutex_unlock(&g2d->runqueue_mutex);
874 }
875 
876 static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
877 {
878 	struct drm_device *drm_dev = g2d->subdrv.drm_dev;
879 	struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
880 	struct drm_exynos_pending_g2d_event *e;
881 	struct timeval now;
882 	unsigned long flags;
883 
884 	if (list_empty(&runqueue_node->event_list))
885 		return;
886 
887 	e = list_first_entry(&runqueue_node->event_list,
888 			     struct drm_exynos_pending_g2d_event, base.link);
889 
890 	do_gettimeofday(&now);
891 	e->event.tv_sec = now.tv_sec;
892 	e->event.tv_usec = now.tv_usec;
893 	e->event.cmdlist_no = cmdlist_no;
894 
895 	spin_lock_irqsave(&drm_dev->event_lock, flags);
896 	list_move_tail(&e->base.link, &e->base.file_priv->event_list);
897 	wake_up_interruptible(&e->base.file_priv->event_wait);
898 	spin_unlock_irqrestore(&drm_dev->event_lock, flags);
899 }
900 
901 static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
902 {
903 	struct g2d_data *g2d = dev_id;
904 	u32 pending;
905 
906 	pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
907 	if (pending)
908 		writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
909 
910 	if (pending & G2D_INTP_GCMD_FIN) {
911 		u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
912 
913 		cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
914 						G2D_DMA_LIST_DONE_COUNT_OFFSET;
915 
916 		g2d_finish_event(g2d, cmdlist_no);
917 
918 		writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
919 		if (!(pending & G2D_INTP_ACMD_FIN)) {
920 			writel_relaxed(G2D_DMA_CONTINUE,
921 					g2d->regs + G2D_DMA_COMMAND);
922 		}
923 	}
924 
925 	if (pending & G2D_INTP_ACMD_FIN)
926 		queue_work(g2d->g2d_workq, &g2d->runqueue_work);
927 
928 	return IRQ_HANDLED;
929 }
930 
931 static int g2d_check_reg_offset(struct device *dev,
932 				struct g2d_cmdlist_node *node,
933 				int nr, bool for_addr)
934 {
935 	struct g2d_cmdlist *cmdlist = node->cmdlist;
936 	int reg_offset;
937 	int index;
938 	int i;
939 
940 	for (i = 0; i < nr; i++) {
941 		struct g2d_buf_info *buf_info = &node->buf_info;
942 		struct g2d_buf_desc *buf_desc;
943 		enum g2d_reg_type reg_type;
944 		unsigned long value;
945 
946 		index = cmdlist->last - 2 * (i + 1);
947 
948 		reg_offset = cmdlist->data[index] & ~0xfffff000;
949 		if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
950 			goto err;
951 		if (reg_offset % 4)
952 			goto err;
953 
954 		switch (reg_offset) {
955 		case G2D_SRC_BASE_ADDR:
956 		case G2D_SRC_PLANE2_BASE_ADDR:
957 		case G2D_DST_BASE_ADDR:
958 		case G2D_DST_PLANE2_BASE_ADDR:
959 		case G2D_PAT_BASE_ADDR:
960 		case G2D_MSK_BASE_ADDR:
961 			if (!for_addr)
962 				goto err;
963 
964 			reg_type = g2d_get_reg_type(reg_offset);
965 			if (reg_type == REG_TYPE_NONE)
966 				goto err;
967 
968 			/* check userptr buffer type. */
969 			if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
970 				buf_info->types[reg_type] = BUF_TYPE_USERPTR;
971 				cmdlist->data[index] &= ~G2D_BUF_USERPTR;
972 			} else
973 				buf_info->types[reg_type] = BUF_TYPE_GEM;
974 			break;
975 		case G2D_SRC_COLOR_MODE:
976 		case G2D_DST_COLOR_MODE:
977 			if (for_addr)
978 				goto err;
979 
980 			reg_type = g2d_get_reg_type(reg_offset);
981 			if (reg_type == REG_TYPE_NONE)
982 				goto err;
983 
984 			buf_desc = &buf_info->descs[reg_type];
985 			value = cmdlist->data[index + 1];
986 
987 			buf_desc->format = value & 0xf;
988 			break;
989 		case G2D_SRC_LEFT_TOP:
990 		case G2D_DST_LEFT_TOP:
991 			if (for_addr)
992 				goto err;
993 
994 			reg_type = g2d_get_reg_type(reg_offset);
995 			if (reg_type == REG_TYPE_NONE)
996 				goto err;
997 
998 			buf_desc = &buf_info->descs[reg_type];
999 			value = cmdlist->data[index + 1];
1000 
1001 			buf_desc->left_x = value & 0x1fff;
1002 			buf_desc->top_y = (value & 0x1fff0000) >> 16;
1003 			break;
1004 		case G2D_SRC_RIGHT_BOTTOM:
1005 		case G2D_DST_RIGHT_BOTTOM:
1006 			if (for_addr)
1007 				goto err;
1008 
1009 			reg_type = g2d_get_reg_type(reg_offset);
1010 			if (reg_type == REG_TYPE_NONE)
1011 				goto err;
1012 
1013 			buf_desc = &buf_info->descs[reg_type];
1014 			value = cmdlist->data[index + 1];
1015 
1016 			buf_desc->right_x = value & 0x1fff;
1017 			buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
1018 			break;
1019 		default:
1020 			if (for_addr)
1021 				goto err;
1022 			break;
1023 		}
1024 	}
1025 
1026 	return 0;
1027 
1028 err:
1029 	dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
1030 	return -EINVAL;
1031 }
1032 
1033 /* ioctl functions */
1034 int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1035 			     struct drm_file *file)
1036 {
1037 	struct drm_exynos_g2d_get_ver *ver = data;
1038 
1039 	ver->major = G2D_HW_MAJOR_VER;
1040 	ver->minor = G2D_HW_MINOR_VER;
1041 
1042 	return 0;
1043 }
1044 EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl);
1045 
1046 int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1047 				 struct drm_file *file)
1048 {
1049 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1050 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1051 	struct device *dev = g2d_priv->dev;
1052 	struct g2d_data *g2d;
1053 	struct drm_exynos_g2d_set_cmdlist *req = data;
1054 	struct drm_exynos_g2d_cmd *cmd;
1055 	struct drm_exynos_pending_g2d_event *e;
1056 	struct g2d_cmdlist_node *node;
1057 	struct g2d_cmdlist *cmdlist;
1058 	unsigned long flags;
1059 	int size;
1060 	int ret;
1061 
1062 	if (!dev)
1063 		return -ENODEV;
1064 
1065 	g2d = dev_get_drvdata(dev);
1066 	if (!g2d)
1067 		return -EFAULT;
1068 
1069 	node = g2d_get_cmdlist(g2d);
1070 	if (!node)
1071 		return -ENOMEM;
1072 
1073 	node->event = NULL;
1074 
1075 	if (req->event_type != G2D_EVENT_NOT) {
1076 		spin_lock_irqsave(&drm_dev->event_lock, flags);
1077 		if (file->event_space < sizeof(e->event)) {
1078 			spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1079 			ret = -ENOMEM;
1080 			goto err;
1081 		}
1082 		file->event_space -= sizeof(e->event);
1083 		spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1084 
1085 		e = kzalloc(sizeof(*node->event), GFP_KERNEL);
1086 		if (!e) {
1087 			spin_lock_irqsave(&drm_dev->event_lock, flags);
1088 			file->event_space += sizeof(e->event);
1089 			spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1090 
1091 			ret = -ENOMEM;
1092 			goto err;
1093 		}
1094 
1095 		e->event.base.type = DRM_EXYNOS_G2D_EVENT;
1096 		e->event.base.length = sizeof(e->event);
1097 		e->event.user_data = req->user_data;
1098 		e->base.event = &e->event.base;
1099 		e->base.file_priv = file;
1100 		e->base.destroy = (void (*) (struct drm_pending_event *)) kfree;
1101 
1102 		node->event = e;
1103 	}
1104 
1105 	cmdlist = node->cmdlist;
1106 
1107 	cmdlist->last = 0;
1108 
1109 	/*
1110 	 * If don't clear SFR registers, the cmdlist is affected by register
1111 	 * values of previous cmdlist. G2D hw executes SFR clear command and
1112 	 * a next command at the same time then the next command is ignored and
1113 	 * is executed rightly from next next command, so needs a dummy command
1114 	 * to next command of SFR clear command.
1115 	 */
1116 	cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
1117 	cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
1118 	cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
1119 	cmdlist->data[cmdlist->last++] = 0;
1120 
1121 	/*
1122 	 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1123 	 * and GCF bit should be set to INTEN register if user wants
1124 	 * G2D interrupt event once current command list execution is
1125 	 * finished.
1126 	 * Otherwise only ACF bit should be set to INTEN register so
1127 	 * that one interrupt is occured after all command lists
1128 	 * have been completed.
1129 	 */
1130 	if (node->event) {
1131 		cmdlist->data[cmdlist->last++] = G2D_INTEN;
1132 		cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
1133 		cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
1134 		cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
1135 	} else {
1136 		cmdlist->data[cmdlist->last++] = G2D_INTEN;
1137 		cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
1138 	}
1139 
1140 	/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
1141 	size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
1142 	if (size > G2D_CMDLIST_DATA_NUM) {
1143 		dev_err(dev, "cmdlist size is too big\n");
1144 		ret = -EINVAL;
1145 		goto err_free_event;
1146 	}
1147 
1148 	cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd;
1149 
1150 	if (copy_from_user(cmdlist->data + cmdlist->last,
1151 				(void __user *)cmd,
1152 				sizeof(*cmd) * req->cmd_nr)) {
1153 		ret = -EFAULT;
1154 		goto err_free_event;
1155 	}
1156 	cmdlist->last += req->cmd_nr * 2;
1157 
1158 	ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
1159 	if (ret < 0)
1160 		goto err_free_event;
1161 
1162 	node->buf_info.map_nr = req->cmd_buf_nr;
1163 	if (req->cmd_buf_nr) {
1164 		struct drm_exynos_g2d_cmd *cmd_buf;
1165 
1166 		cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf;
1167 
1168 		if (copy_from_user(cmdlist->data + cmdlist->last,
1169 					(void __user *)cmd_buf,
1170 					sizeof(*cmd_buf) * req->cmd_buf_nr)) {
1171 			ret = -EFAULT;
1172 			goto err_free_event;
1173 		}
1174 		cmdlist->last += req->cmd_buf_nr * 2;
1175 
1176 		ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
1177 		if (ret < 0)
1178 			goto err_free_event;
1179 
1180 		ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
1181 		if (ret < 0)
1182 			goto err_unmap;
1183 	}
1184 
1185 	cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
1186 	cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
1187 
1188 	/* head */
1189 	cmdlist->head = cmdlist->last / 2;
1190 
1191 	/* tail */
1192 	cmdlist->data[cmdlist->last] = 0;
1193 
1194 	g2d_add_cmdlist_to_inuse(g2d_priv, node);
1195 
1196 	return 0;
1197 
1198 err_unmap:
1199 	g2d_unmap_cmdlist_gem(g2d, node, file);
1200 err_free_event:
1201 	if (node->event) {
1202 		spin_lock_irqsave(&drm_dev->event_lock, flags);
1203 		file->event_space += sizeof(e->event);
1204 		spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1205 		kfree(node->event);
1206 	}
1207 err:
1208 	g2d_put_cmdlist(g2d, node);
1209 	return ret;
1210 }
1211 EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl);
1212 
1213 int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1214 			  struct drm_file *file)
1215 {
1216 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1217 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1218 	struct device *dev = g2d_priv->dev;
1219 	struct g2d_data *g2d;
1220 	struct drm_exynos_g2d_exec *req = data;
1221 	struct g2d_runqueue_node *runqueue_node;
1222 	struct list_head *run_cmdlist;
1223 	struct list_head *event_list;
1224 
1225 	if (!dev)
1226 		return -ENODEV;
1227 
1228 	g2d = dev_get_drvdata(dev);
1229 	if (!g2d)
1230 		return -EFAULT;
1231 
1232 	runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
1233 	if (!runqueue_node) {
1234 		dev_err(dev, "failed to allocate memory\n");
1235 		return -ENOMEM;
1236 	}
1237 	run_cmdlist = &runqueue_node->run_cmdlist;
1238 	event_list = &runqueue_node->event_list;
1239 	INIT_LIST_HEAD(run_cmdlist);
1240 	INIT_LIST_HEAD(event_list);
1241 	init_completion(&runqueue_node->complete);
1242 	runqueue_node->async = req->async;
1243 
1244 	list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
1245 	list_splice_init(&g2d_priv->event_list, event_list);
1246 
1247 	if (list_empty(run_cmdlist)) {
1248 		dev_err(dev, "there is no inuse cmdlist\n");
1249 		kmem_cache_free(g2d->runqueue_slab, runqueue_node);
1250 		return -EPERM;
1251 	}
1252 
1253 	mutex_lock(&g2d->runqueue_mutex);
1254 	runqueue_node->pid = current->pid;
1255 	runqueue_node->filp = file;
1256 	list_add_tail(&runqueue_node->list, &g2d->runqueue);
1257 	if (!g2d->runqueue_node)
1258 		g2d_exec_runqueue(g2d);
1259 	mutex_unlock(&g2d->runqueue_mutex);
1260 
1261 	if (runqueue_node->async)
1262 		goto out;
1263 
1264 	wait_for_completion(&runqueue_node->complete);
1265 	g2d_free_runqueue_node(g2d, runqueue_node);
1266 
1267 out:
1268 	return 0;
1269 }
1270 EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl);
1271 
1272 static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1273 {
1274 	struct g2d_data *g2d;
1275 	int ret;
1276 
1277 	g2d = dev_get_drvdata(dev);
1278 	if (!g2d)
1279 		return -EFAULT;
1280 
1281 	/* allocate dma-aware cmdlist buffer. */
1282 	ret = g2d_init_cmdlist(g2d);
1283 	if (ret < 0) {
1284 		dev_err(dev, "cmdlist init failed\n");
1285 		return ret;
1286 	}
1287 
1288 	if (!is_drm_iommu_supported(drm_dev))
1289 		return 0;
1290 
1291 	ret = drm_iommu_attach_device(drm_dev, dev);
1292 	if (ret < 0) {
1293 		dev_err(dev, "failed to enable iommu.\n");
1294 		g2d_fini_cmdlist(g2d);
1295 	}
1296 
1297 	return ret;
1298 
1299 }
1300 
1301 static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
1302 {
1303 	if (!is_drm_iommu_supported(drm_dev))
1304 		return;
1305 
1306 	drm_iommu_detach_device(drm_dev, dev);
1307 }
1308 
1309 static int g2d_open(struct drm_device *drm_dev, struct device *dev,
1310 			struct drm_file *file)
1311 {
1312 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1313 	struct exynos_drm_g2d_private *g2d_priv;
1314 
1315 	g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
1316 	if (!g2d_priv)
1317 		return -ENOMEM;
1318 
1319 	g2d_priv->dev = dev;
1320 	file_priv->g2d_priv = g2d_priv;
1321 
1322 	INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
1323 	INIT_LIST_HEAD(&g2d_priv->event_list);
1324 	INIT_LIST_HEAD(&g2d_priv->userptr_list);
1325 
1326 	return 0;
1327 }
1328 
1329 static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1330 			struct drm_file *file)
1331 {
1332 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1333 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1334 	struct g2d_data *g2d;
1335 	struct g2d_cmdlist_node *node, *n;
1336 
1337 	if (!dev)
1338 		return;
1339 
1340 	g2d = dev_get_drvdata(dev);
1341 	if (!g2d)
1342 		return;
1343 
1344 	mutex_lock(&g2d->cmdlist_mutex);
1345 	list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
1346 		/*
1347 		 * unmap all gem objects not completed.
1348 		 *
1349 		 * P.S. if current process was terminated forcely then
1350 		 * there may be some commands in inuse_cmdlist so unmap
1351 		 * them.
1352 		 */
1353 		g2d_unmap_cmdlist_gem(g2d, node, file);
1354 		list_move_tail(&node->list, &g2d->free_cmdlist);
1355 	}
1356 	mutex_unlock(&g2d->cmdlist_mutex);
1357 
1358 	/* release all g2d_userptr in pool. */
1359 	g2d_userptr_free_all(drm_dev, g2d, file);
1360 
1361 	kfree(file_priv->g2d_priv);
1362 }
1363 
1364 static int g2d_probe(struct platform_device *pdev)
1365 {
1366 	struct device *dev = &pdev->dev;
1367 	struct resource *res;
1368 	struct g2d_data *g2d;
1369 	struct exynos_drm_subdrv *subdrv;
1370 	int ret;
1371 
1372 	g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL);
1373 	if (!g2d)
1374 		return -ENOMEM;
1375 
1376 	g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1377 			sizeof(struct g2d_runqueue_node), 0, 0, NULL);
1378 	if (!g2d->runqueue_slab)
1379 		return -ENOMEM;
1380 
1381 	g2d->dev = dev;
1382 
1383 	g2d->g2d_workq = create_singlethread_workqueue("g2d");
1384 	if (!g2d->g2d_workq) {
1385 		dev_err(dev, "failed to create workqueue\n");
1386 		ret = -EINVAL;
1387 		goto err_destroy_slab;
1388 	}
1389 
1390 	INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1391 	INIT_LIST_HEAD(&g2d->free_cmdlist);
1392 	INIT_LIST_HEAD(&g2d->runqueue);
1393 
1394 	mutex_init(&g2d->cmdlist_mutex);
1395 	mutex_init(&g2d->runqueue_mutex);
1396 
1397 	g2d->gate_clk = devm_clk_get(dev, "fimg2d");
1398 	if (IS_ERR(g2d->gate_clk)) {
1399 		dev_err(dev, "failed to get gate clock\n");
1400 		ret = PTR_ERR(g2d->gate_clk);
1401 		goto err_destroy_workqueue;
1402 	}
1403 
1404 	pm_runtime_enable(dev);
1405 
1406 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1407 
1408 	g2d->regs = devm_ioremap_resource(dev, res);
1409 	if (IS_ERR(g2d->regs)) {
1410 		ret = PTR_ERR(g2d->regs);
1411 		goto err_put_clk;
1412 	}
1413 
1414 	g2d->irq = platform_get_irq(pdev, 0);
1415 	if (g2d->irq < 0) {
1416 		dev_err(dev, "failed to get irq\n");
1417 		ret = g2d->irq;
1418 		goto err_put_clk;
1419 	}
1420 
1421 	ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0,
1422 								"drm_g2d", g2d);
1423 	if (ret < 0) {
1424 		dev_err(dev, "irq request failed\n");
1425 		goto err_put_clk;
1426 	}
1427 
1428 	g2d->max_pool = MAX_POOL;
1429 
1430 	platform_set_drvdata(pdev, g2d);
1431 
1432 	subdrv = &g2d->subdrv;
1433 	subdrv->dev = dev;
1434 	subdrv->probe = g2d_subdrv_probe;
1435 	subdrv->remove = g2d_subdrv_remove;
1436 	subdrv->open = g2d_open;
1437 	subdrv->close = g2d_close;
1438 
1439 	ret = exynos_drm_subdrv_register(subdrv);
1440 	if (ret < 0) {
1441 		dev_err(dev, "failed to register drm g2d device\n");
1442 		goto err_put_clk;
1443 	}
1444 
1445 	dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
1446 			G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1447 
1448 	return 0;
1449 
1450 err_put_clk:
1451 	pm_runtime_disable(dev);
1452 err_destroy_workqueue:
1453 	destroy_workqueue(g2d->g2d_workq);
1454 err_destroy_slab:
1455 	kmem_cache_destroy(g2d->runqueue_slab);
1456 	return ret;
1457 }
1458 
1459 static int g2d_remove(struct platform_device *pdev)
1460 {
1461 	struct g2d_data *g2d = platform_get_drvdata(pdev);
1462 
1463 	cancel_work_sync(&g2d->runqueue_work);
1464 	exynos_drm_subdrv_unregister(&g2d->subdrv);
1465 
1466 	while (g2d->runqueue_node) {
1467 		g2d_free_runqueue_node(g2d, g2d->runqueue_node);
1468 		g2d->runqueue_node = g2d_get_runqueue_node(g2d);
1469 	}
1470 
1471 	pm_runtime_disable(&pdev->dev);
1472 
1473 	g2d_fini_cmdlist(g2d);
1474 	destroy_workqueue(g2d->g2d_workq);
1475 	kmem_cache_destroy(g2d->runqueue_slab);
1476 
1477 	return 0;
1478 }
1479 
1480 #ifdef CONFIG_PM_SLEEP
1481 static int g2d_suspend(struct device *dev)
1482 {
1483 	struct g2d_data *g2d = dev_get_drvdata(dev);
1484 
1485 	mutex_lock(&g2d->runqueue_mutex);
1486 	g2d->suspended = true;
1487 	mutex_unlock(&g2d->runqueue_mutex);
1488 
1489 	while (g2d->runqueue_node)
1490 		/* FIXME: good range? */
1491 		usleep_range(500, 1000);
1492 
1493 	flush_work(&g2d->runqueue_work);
1494 
1495 	return 0;
1496 }
1497 
1498 static int g2d_resume(struct device *dev)
1499 {
1500 	struct g2d_data *g2d = dev_get_drvdata(dev);
1501 
1502 	g2d->suspended = false;
1503 	g2d_exec_runqueue(g2d);
1504 
1505 	return 0;
1506 }
1507 #endif
1508 
1509 #ifdef CONFIG_PM_RUNTIME
1510 static int g2d_runtime_suspend(struct device *dev)
1511 {
1512 	struct g2d_data *g2d = dev_get_drvdata(dev);
1513 
1514 	clk_disable_unprepare(g2d->gate_clk);
1515 
1516 	return 0;
1517 }
1518 
1519 static int g2d_runtime_resume(struct device *dev)
1520 {
1521 	struct g2d_data *g2d = dev_get_drvdata(dev);
1522 	int ret;
1523 
1524 	ret = clk_prepare_enable(g2d->gate_clk);
1525 	if (ret < 0)
1526 		dev_warn(dev, "failed to enable clock.\n");
1527 
1528 	return ret;
1529 }
1530 #endif
1531 
1532 static const struct dev_pm_ops g2d_pm_ops = {
1533 	SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume)
1534 	SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1535 };
1536 
1537 static const struct of_device_id exynos_g2d_match[] = {
1538 	{ .compatible = "samsung,exynos5250-g2d" },
1539 	{},
1540 };
1541 
1542 struct platform_driver g2d_driver = {
1543 	.probe		= g2d_probe,
1544 	.remove		= g2d_remove,
1545 	.driver		= {
1546 		.name	= "s5p-g2d",
1547 		.owner	= THIS_MODULE,
1548 		.pm	= &g2d_pm_ops,
1549 		.of_match_table = exynos_g2d_match,
1550 	},
1551 };
1552