1 /* 2 * Copyright (C) 2012 Samsung Electronics Co.Ltd 3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundationr 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/clk.h> 12 #include <linux/err.h> 13 #include <linux/interrupt.h> 14 #include <linux/io.h> 15 #include <linux/platform_device.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/slab.h> 18 #include <linux/workqueue.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/dma-attrs.h> 21 #include <linux/of.h> 22 23 #include <drm/drmP.h> 24 #include <drm/exynos_drm.h> 25 #include "exynos_drm_drv.h" 26 #include "exynos_drm_g2d.h" 27 #include "exynos_drm_gem.h" 28 #include "exynos_drm_iommu.h" 29 30 #define G2D_HW_MAJOR_VER 4 31 #define G2D_HW_MINOR_VER 1 32 33 /* vaild register range set from user: 0x0104 ~ 0x0880 */ 34 #define G2D_VALID_START 0x0104 35 #define G2D_VALID_END 0x0880 36 37 /* general registers */ 38 #define G2D_SOFT_RESET 0x0000 39 #define G2D_INTEN 0x0004 40 #define G2D_INTC_PEND 0x000C 41 #define G2D_DMA_SFR_BASE_ADDR 0x0080 42 #define G2D_DMA_COMMAND 0x0084 43 #define G2D_DMA_STATUS 0x008C 44 #define G2D_DMA_HOLD_CMD 0x0090 45 46 /* command registers */ 47 #define G2D_BITBLT_START 0x0100 48 49 /* registers for base address */ 50 #define G2D_SRC_BASE_ADDR 0x0304 51 #define G2D_SRC_STRIDE_REG 0x0308 52 #define G2D_SRC_COLOR_MODE 0x030C 53 #define G2D_SRC_LEFT_TOP 0x0310 54 #define G2D_SRC_RIGHT_BOTTOM 0x0314 55 #define G2D_SRC_PLANE2_BASE_ADDR 0x0318 56 #define G2D_DST_BASE_ADDR 0x0404 57 #define G2D_DST_STRIDE_REG 0x0408 58 #define G2D_DST_COLOR_MODE 0x040C 59 #define G2D_DST_LEFT_TOP 0x0410 60 #define G2D_DST_RIGHT_BOTTOM 0x0414 61 #define G2D_DST_PLANE2_BASE_ADDR 0x0418 62 #define G2D_PAT_BASE_ADDR 0x0500 63 #define G2D_MSK_BASE_ADDR 0x0520 64 65 /* G2D_SOFT_RESET */ 66 #define G2D_SFRCLEAR (1 << 1) 67 #define G2D_R (1 << 0) 68 69 /* G2D_INTEN */ 70 #define G2D_INTEN_ACF (1 << 3) 71 #define G2D_INTEN_UCF (1 << 2) 72 #define G2D_INTEN_GCF (1 << 1) 73 #define G2D_INTEN_SCF (1 << 0) 74 75 /* G2D_INTC_PEND */ 76 #define G2D_INTP_ACMD_FIN (1 << 3) 77 #define G2D_INTP_UCMD_FIN (1 << 2) 78 #define G2D_INTP_GCMD_FIN (1 << 1) 79 #define G2D_INTP_SCMD_FIN (1 << 0) 80 81 /* G2D_DMA_COMMAND */ 82 #define G2D_DMA_HALT (1 << 2) 83 #define G2D_DMA_CONTINUE (1 << 1) 84 #define G2D_DMA_START (1 << 0) 85 86 /* G2D_DMA_STATUS */ 87 #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17) 88 #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1) 89 #define G2D_DMA_DONE (1 << 0) 90 #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17 91 92 /* G2D_DMA_HOLD_CMD */ 93 #define G2D_USER_HOLD (1 << 2) 94 #define G2D_LIST_HOLD (1 << 1) 95 #define G2D_BITBLT_HOLD (1 << 0) 96 97 /* G2D_BITBLT_START */ 98 #define G2D_START_CASESEL (1 << 2) 99 #define G2D_START_NHOLT (1 << 1) 100 #define G2D_START_BITBLT (1 << 0) 101 102 /* buffer color format */ 103 #define G2D_FMT_XRGB8888 0 104 #define G2D_FMT_ARGB8888 1 105 #define G2D_FMT_RGB565 2 106 #define G2D_FMT_XRGB1555 3 107 #define G2D_FMT_ARGB1555 4 108 #define G2D_FMT_XRGB4444 5 109 #define G2D_FMT_ARGB4444 6 110 #define G2D_FMT_PACKED_RGB888 7 111 #define G2D_FMT_A8 11 112 #define G2D_FMT_L8 12 113 114 /* buffer valid length */ 115 #define G2D_LEN_MIN 1 116 #define G2D_LEN_MAX 8000 117 118 #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4) 119 #define G2D_CMDLIST_NUM 64 120 #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM) 121 #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2) 122 123 /* maximum buffer pool size of userptr is 64MB as default */ 124 #define MAX_POOL (64 * 1024 * 1024) 125 126 enum { 127 BUF_TYPE_GEM = 1, 128 BUF_TYPE_USERPTR, 129 }; 130 131 enum g2d_reg_type { 132 REG_TYPE_NONE = -1, 133 REG_TYPE_SRC, 134 REG_TYPE_SRC_PLANE2, 135 REG_TYPE_DST, 136 REG_TYPE_DST_PLANE2, 137 REG_TYPE_PAT, 138 REG_TYPE_MSK, 139 MAX_REG_TYPE_NR 140 }; 141 142 /* cmdlist data structure */ 143 struct g2d_cmdlist { 144 u32 head; 145 unsigned long data[G2D_CMDLIST_DATA_NUM]; 146 u32 last; /* last data offset */ 147 }; 148 149 /* 150 * A structure of buffer description 151 * 152 * @format: color format 153 * @stride: buffer stride/pitch in bytes 154 * @left_x: the x coordinates of left top corner 155 * @top_y: the y coordinates of left top corner 156 * @right_x: the x coordinates of right bottom corner 157 * @bottom_y: the y coordinates of right bottom corner 158 * 159 */ 160 struct g2d_buf_desc { 161 unsigned int format; 162 unsigned int stride; 163 unsigned int left_x; 164 unsigned int top_y; 165 unsigned int right_x; 166 unsigned int bottom_y; 167 }; 168 169 /* 170 * A structure of buffer information 171 * 172 * @map_nr: manages the number of mapped buffers 173 * @reg_types: stores regitster type in the order of requested command 174 * @handles: stores buffer handle in its reg_type position 175 * @types: stores buffer type in its reg_type position 176 * @descs: stores buffer description in its reg_type position 177 * 178 */ 179 struct g2d_buf_info { 180 unsigned int map_nr; 181 enum g2d_reg_type reg_types[MAX_REG_TYPE_NR]; 182 unsigned long handles[MAX_REG_TYPE_NR]; 183 unsigned int types[MAX_REG_TYPE_NR]; 184 struct g2d_buf_desc descs[MAX_REG_TYPE_NR]; 185 }; 186 187 struct drm_exynos_pending_g2d_event { 188 struct drm_pending_event base; 189 struct drm_exynos_g2d_event event; 190 }; 191 192 struct g2d_cmdlist_userptr { 193 struct list_head list; 194 dma_addr_t dma_addr; 195 unsigned long userptr; 196 unsigned long size; 197 struct frame_vector *vec; 198 struct sg_table *sgt; 199 atomic_t refcount; 200 bool in_pool; 201 bool out_of_list; 202 }; 203 struct g2d_cmdlist_node { 204 struct list_head list; 205 struct g2d_cmdlist *cmdlist; 206 dma_addr_t dma_addr; 207 struct g2d_buf_info buf_info; 208 209 struct drm_exynos_pending_g2d_event *event; 210 }; 211 212 struct g2d_runqueue_node { 213 struct list_head list; 214 struct list_head run_cmdlist; 215 struct list_head event_list; 216 struct drm_file *filp; 217 pid_t pid; 218 struct completion complete; 219 int async; 220 }; 221 222 struct g2d_data { 223 struct device *dev; 224 struct clk *gate_clk; 225 void __iomem *regs; 226 int irq; 227 struct workqueue_struct *g2d_workq; 228 struct work_struct runqueue_work; 229 struct exynos_drm_subdrv subdrv; 230 bool suspended; 231 232 /* cmdlist */ 233 struct g2d_cmdlist_node *cmdlist_node; 234 struct list_head free_cmdlist; 235 struct mutex cmdlist_mutex; 236 dma_addr_t cmdlist_pool; 237 void *cmdlist_pool_virt; 238 struct dma_attrs cmdlist_dma_attrs; 239 240 /* runqueue*/ 241 struct g2d_runqueue_node *runqueue_node; 242 struct list_head runqueue; 243 struct mutex runqueue_mutex; 244 struct kmem_cache *runqueue_slab; 245 246 unsigned long current_pool; 247 unsigned long max_pool; 248 }; 249 250 static int g2d_init_cmdlist(struct g2d_data *g2d) 251 { 252 struct device *dev = g2d->dev; 253 struct g2d_cmdlist_node *node = g2d->cmdlist_node; 254 struct exynos_drm_subdrv *subdrv = &g2d->subdrv; 255 int nr; 256 int ret; 257 struct g2d_buf_info *buf_info; 258 259 init_dma_attrs(&g2d->cmdlist_dma_attrs); 260 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs); 261 262 g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev, 263 G2D_CMDLIST_POOL_SIZE, 264 &g2d->cmdlist_pool, GFP_KERNEL, 265 &g2d->cmdlist_dma_attrs); 266 if (!g2d->cmdlist_pool_virt) { 267 dev_err(dev, "failed to allocate dma memory\n"); 268 return -ENOMEM; 269 } 270 271 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL); 272 if (!node) { 273 dev_err(dev, "failed to allocate memory\n"); 274 ret = -ENOMEM; 275 goto err; 276 } 277 278 for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) { 279 unsigned int i; 280 281 node[nr].cmdlist = 282 g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE; 283 node[nr].dma_addr = 284 g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE; 285 286 buf_info = &node[nr].buf_info; 287 for (i = 0; i < MAX_REG_TYPE_NR; i++) 288 buf_info->reg_types[i] = REG_TYPE_NONE; 289 290 list_add_tail(&node[nr].list, &g2d->free_cmdlist); 291 } 292 293 return 0; 294 295 err: 296 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE, 297 g2d->cmdlist_pool_virt, 298 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs); 299 return ret; 300 } 301 302 static void g2d_fini_cmdlist(struct g2d_data *g2d) 303 { 304 struct exynos_drm_subdrv *subdrv = &g2d->subdrv; 305 306 kfree(g2d->cmdlist_node); 307 308 if (g2d->cmdlist_pool_virt && g2d->cmdlist_pool) { 309 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE, 310 g2d->cmdlist_pool_virt, 311 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs); 312 } 313 } 314 315 static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d) 316 { 317 struct device *dev = g2d->dev; 318 struct g2d_cmdlist_node *node; 319 320 mutex_lock(&g2d->cmdlist_mutex); 321 if (list_empty(&g2d->free_cmdlist)) { 322 dev_err(dev, "there is no free cmdlist\n"); 323 mutex_unlock(&g2d->cmdlist_mutex); 324 return NULL; 325 } 326 327 node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node, 328 list); 329 list_del_init(&node->list); 330 mutex_unlock(&g2d->cmdlist_mutex); 331 332 return node; 333 } 334 335 static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node) 336 { 337 mutex_lock(&g2d->cmdlist_mutex); 338 list_move_tail(&node->list, &g2d->free_cmdlist); 339 mutex_unlock(&g2d->cmdlist_mutex); 340 } 341 342 static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv, 343 struct g2d_cmdlist_node *node) 344 { 345 struct g2d_cmdlist_node *lnode; 346 347 if (list_empty(&g2d_priv->inuse_cmdlist)) 348 goto add_to_list; 349 350 /* this links to base address of new cmdlist */ 351 lnode = list_entry(g2d_priv->inuse_cmdlist.prev, 352 struct g2d_cmdlist_node, list); 353 lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr; 354 355 add_to_list: 356 list_add_tail(&node->list, &g2d_priv->inuse_cmdlist); 357 358 if (node->event) 359 list_add_tail(&node->event->base.link, &g2d_priv->event_list); 360 } 361 362 static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev, 363 unsigned long obj, 364 bool force) 365 { 366 struct g2d_cmdlist_userptr *g2d_userptr = 367 (struct g2d_cmdlist_userptr *)obj; 368 struct page **pages; 369 370 if (!obj) 371 return; 372 373 if (force) 374 goto out; 375 376 atomic_dec(&g2d_userptr->refcount); 377 378 if (atomic_read(&g2d_userptr->refcount) > 0) 379 return; 380 381 if (g2d_userptr->in_pool) 382 return; 383 384 out: 385 exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt, 386 DMA_BIDIRECTIONAL); 387 388 pages = frame_vector_pages(g2d_userptr->vec); 389 if (!IS_ERR(pages)) { 390 int i; 391 392 for (i = 0; i < frame_vector_count(g2d_userptr->vec); i++) 393 set_page_dirty_lock(pages[i]); 394 } 395 put_vaddr_frames(g2d_userptr->vec); 396 frame_vector_destroy(g2d_userptr->vec); 397 398 if (!g2d_userptr->out_of_list) 399 list_del_init(&g2d_userptr->list); 400 401 sg_free_table(g2d_userptr->sgt); 402 kfree(g2d_userptr->sgt); 403 kfree(g2d_userptr); 404 } 405 406 static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev, 407 unsigned long userptr, 408 unsigned long size, 409 struct drm_file *filp, 410 unsigned long *obj) 411 { 412 struct drm_exynos_file_private *file_priv = filp->driver_priv; 413 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 414 struct g2d_cmdlist_userptr *g2d_userptr; 415 struct g2d_data *g2d; 416 struct sg_table *sgt; 417 unsigned long start, end; 418 unsigned int npages, offset; 419 int ret; 420 421 if (!size) { 422 DRM_ERROR("invalid userptr size.\n"); 423 return ERR_PTR(-EINVAL); 424 } 425 426 g2d = dev_get_drvdata(g2d_priv->dev); 427 428 /* check if userptr already exists in userptr_list. */ 429 list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) { 430 if (g2d_userptr->userptr == userptr) { 431 /* 432 * also check size because there could be same address 433 * and different size. 434 */ 435 if (g2d_userptr->size == size) { 436 atomic_inc(&g2d_userptr->refcount); 437 *obj = (unsigned long)g2d_userptr; 438 439 return &g2d_userptr->dma_addr; 440 } 441 442 /* 443 * at this moment, maybe g2d dma is accessing this 444 * g2d_userptr memory region so just remove this 445 * g2d_userptr object from userptr_list not to be 446 * referred again and also except it the userptr 447 * pool to be released after the dma access completion. 448 */ 449 g2d_userptr->out_of_list = true; 450 g2d_userptr->in_pool = false; 451 list_del_init(&g2d_userptr->list); 452 453 break; 454 } 455 } 456 457 g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL); 458 if (!g2d_userptr) 459 return ERR_PTR(-ENOMEM); 460 461 atomic_set(&g2d_userptr->refcount, 1); 462 g2d_userptr->size = size; 463 464 start = userptr & PAGE_MASK; 465 offset = userptr & ~PAGE_MASK; 466 end = PAGE_ALIGN(userptr + size); 467 npages = (end - start) >> PAGE_SHIFT; 468 g2d_userptr->vec = frame_vector_create(npages); 469 if (!g2d_userptr->vec) { 470 ret = -ENOMEM; 471 goto err_free; 472 } 473 474 ret = get_vaddr_frames(start, npages, true, true, g2d_userptr->vec); 475 if (ret != npages) { 476 DRM_ERROR("failed to get user pages from userptr.\n"); 477 if (ret < 0) 478 goto err_destroy_framevec; 479 ret = -EFAULT; 480 goto err_put_framevec; 481 } 482 if (frame_vector_to_pages(g2d_userptr->vec) < 0) { 483 ret = -EFAULT; 484 goto err_put_framevec; 485 } 486 487 sgt = kzalloc(sizeof(*sgt), GFP_KERNEL); 488 if (!sgt) { 489 ret = -ENOMEM; 490 goto err_put_framevec; 491 } 492 493 ret = sg_alloc_table_from_pages(sgt, 494 frame_vector_pages(g2d_userptr->vec), 495 npages, offset, size, GFP_KERNEL); 496 if (ret < 0) { 497 DRM_ERROR("failed to get sgt from pages.\n"); 498 goto err_free_sgt; 499 } 500 501 g2d_userptr->sgt = sgt; 502 503 ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt, 504 DMA_BIDIRECTIONAL); 505 if (ret < 0) { 506 DRM_ERROR("failed to map sgt with dma region.\n"); 507 goto err_sg_free_table; 508 } 509 510 g2d_userptr->dma_addr = sgt->sgl[0].dma_address; 511 g2d_userptr->userptr = userptr; 512 513 list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list); 514 515 if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) { 516 g2d->current_pool += npages << PAGE_SHIFT; 517 g2d_userptr->in_pool = true; 518 } 519 520 *obj = (unsigned long)g2d_userptr; 521 522 return &g2d_userptr->dma_addr; 523 524 err_sg_free_table: 525 sg_free_table(sgt); 526 527 err_free_sgt: 528 kfree(sgt); 529 530 err_put_framevec: 531 put_vaddr_frames(g2d_userptr->vec); 532 533 err_destroy_framevec: 534 frame_vector_destroy(g2d_userptr->vec); 535 536 err_free: 537 kfree(g2d_userptr); 538 539 return ERR_PTR(ret); 540 } 541 542 static void g2d_userptr_free_all(struct drm_device *drm_dev, 543 struct g2d_data *g2d, 544 struct drm_file *filp) 545 { 546 struct drm_exynos_file_private *file_priv = filp->driver_priv; 547 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 548 struct g2d_cmdlist_userptr *g2d_userptr, *n; 549 550 list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list) 551 if (g2d_userptr->in_pool) 552 g2d_userptr_put_dma_addr(drm_dev, 553 (unsigned long)g2d_userptr, 554 true); 555 556 g2d->current_pool = 0; 557 } 558 559 static enum g2d_reg_type g2d_get_reg_type(int reg_offset) 560 { 561 enum g2d_reg_type reg_type; 562 563 switch (reg_offset) { 564 case G2D_SRC_BASE_ADDR: 565 case G2D_SRC_STRIDE_REG: 566 case G2D_SRC_COLOR_MODE: 567 case G2D_SRC_LEFT_TOP: 568 case G2D_SRC_RIGHT_BOTTOM: 569 reg_type = REG_TYPE_SRC; 570 break; 571 case G2D_SRC_PLANE2_BASE_ADDR: 572 reg_type = REG_TYPE_SRC_PLANE2; 573 break; 574 case G2D_DST_BASE_ADDR: 575 case G2D_DST_STRIDE_REG: 576 case G2D_DST_COLOR_MODE: 577 case G2D_DST_LEFT_TOP: 578 case G2D_DST_RIGHT_BOTTOM: 579 reg_type = REG_TYPE_DST; 580 break; 581 case G2D_DST_PLANE2_BASE_ADDR: 582 reg_type = REG_TYPE_DST_PLANE2; 583 break; 584 case G2D_PAT_BASE_ADDR: 585 reg_type = REG_TYPE_PAT; 586 break; 587 case G2D_MSK_BASE_ADDR: 588 reg_type = REG_TYPE_MSK; 589 break; 590 default: 591 reg_type = REG_TYPE_NONE; 592 DRM_ERROR("Unknown register offset![%d]\n", reg_offset); 593 break; 594 } 595 596 return reg_type; 597 } 598 599 static unsigned long g2d_get_buf_bpp(unsigned int format) 600 { 601 unsigned long bpp; 602 603 switch (format) { 604 case G2D_FMT_XRGB8888: 605 case G2D_FMT_ARGB8888: 606 bpp = 4; 607 break; 608 case G2D_FMT_RGB565: 609 case G2D_FMT_XRGB1555: 610 case G2D_FMT_ARGB1555: 611 case G2D_FMT_XRGB4444: 612 case G2D_FMT_ARGB4444: 613 bpp = 2; 614 break; 615 case G2D_FMT_PACKED_RGB888: 616 bpp = 3; 617 break; 618 default: 619 bpp = 1; 620 break; 621 } 622 623 return bpp; 624 } 625 626 static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc, 627 enum g2d_reg_type reg_type, 628 unsigned long size) 629 { 630 int width, height; 631 unsigned long bpp, last_pos; 632 633 /* 634 * check source and destination buffers only. 635 * so the others are always valid. 636 */ 637 if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST) 638 return true; 639 640 /* This check also makes sure that right_x > left_x. */ 641 width = (int)buf_desc->right_x - (int)buf_desc->left_x; 642 if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) { 643 DRM_ERROR("width[%d] is out of range!\n", width); 644 return false; 645 } 646 647 /* This check also makes sure that bottom_y > top_y. */ 648 height = (int)buf_desc->bottom_y - (int)buf_desc->top_y; 649 if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) { 650 DRM_ERROR("height[%d] is out of range!\n", height); 651 return false; 652 } 653 654 bpp = g2d_get_buf_bpp(buf_desc->format); 655 656 /* Compute the position of the last byte that the engine accesses. */ 657 last_pos = ((unsigned long)buf_desc->bottom_y - 1) * 658 (unsigned long)buf_desc->stride + 659 (unsigned long)buf_desc->right_x * bpp - 1; 660 661 /* 662 * Since right_x > left_x and bottom_y > top_y we already know 663 * that the first_pos < last_pos (first_pos being the position 664 * of the first byte the engine accesses), it just remains to 665 * check if last_pos is smaller then the buffer size. 666 */ 667 668 if (last_pos >= size) { 669 DRM_ERROR("last engine access position [%lu] " 670 "is out of range [%lu]!\n", last_pos, size); 671 return false; 672 } 673 674 return true; 675 } 676 677 static int g2d_map_cmdlist_gem(struct g2d_data *g2d, 678 struct g2d_cmdlist_node *node, 679 struct drm_device *drm_dev, 680 struct drm_file *file) 681 { 682 struct g2d_cmdlist *cmdlist = node->cmdlist; 683 struct g2d_buf_info *buf_info = &node->buf_info; 684 int offset; 685 int ret; 686 int i; 687 688 for (i = 0; i < buf_info->map_nr; i++) { 689 struct g2d_buf_desc *buf_desc; 690 enum g2d_reg_type reg_type; 691 int reg_pos; 692 unsigned long handle; 693 dma_addr_t *addr; 694 695 reg_pos = cmdlist->last - 2 * (i + 1); 696 697 offset = cmdlist->data[reg_pos]; 698 handle = cmdlist->data[reg_pos + 1]; 699 700 reg_type = g2d_get_reg_type(offset); 701 if (reg_type == REG_TYPE_NONE) { 702 ret = -EFAULT; 703 goto err; 704 } 705 706 buf_desc = &buf_info->descs[reg_type]; 707 708 if (buf_info->types[reg_type] == BUF_TYPE_GEM) { 709 unsigned long size; 710 711 size = exynos_drm_gem_get_size(drm_dev, handle, file); 712 if (!size) { 713 ret = -EFAULT; 714 goto err; 715 } 716 717 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type, 718 size)) { 719 ret = -EFAULT; 720 goto err; 721 } 722 723 addr = exynos_drm_gem_get_dma_addr(drm_dev, handle, 724 file); 725 if (IS_ERR(addr)) { 726 ret = -EFAULT; 727 goto err; 728 } 729 } else { 730 struct drm_exynos_g2d_userptr g2d_userptr; 731 732 if (copy_from_user(&g2d_userptr, (void __user *)handle, 733 sizeof(struct drm_exynos_g2d_userptr))) { 734 ret = -EFAULT; 735 goto err; 736 } 737 738 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type, 739 g2d_userptr.size)) { 740 ret = -EFAULT; 741 goto err; 742 } 743 744 addr = g2d_userptr_get_dma_addr(drm_dev, 745 g2d_userptr.userptr, 746 g2d_userptr.size, 747 file, 748 &handle); 749 if (IS_ERR(addr)) { 750 ret = -EFAULT; 751 goto err; 752 } 753 } 754 755 cmdlist->data[reg_pos + 1] = *addr; 756 buf_info->reg_types[i] = reg_type; 757 buf_info->handles[reg_type] = handle; 758 } 759 760 return 0; 761 762 err: 763 buf_info->map_nr = i; 764 return ret; 765 } 766 767 static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d, 768 struct g2d_cmdlist_node *node, 769 struct drm_file *filp) 770 { 771 struct exynos_drm_subdrv *subdrv = &g2d->subdrv; 772 struct g2d_buf_info *buf_info = &node->buf_info; 773 int i; 774 775 for (i = 0; i < buf_info->map_nr; i++) { 776 struct g2d_buf_desc *buf_desc; 777 enum g2d_reg_type reg_type; 778 unsigned long handle; 779 780 reg_type = buf_info->reg_types[i]; 781 782 buf_desc = &buf_info->descs[reg_type]; 783 handle = buf_info->handles[reg_type]; 784 785 if (buf_info->types[reg_type] == BUF_TYPE_GEM) 786 exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle, 787 filp); 788 else 789 g2d_userptr_put_dma_addr(subdrv->drm_dev, handle, 790 false); 791 792 buf_info->reg_types[i] = REG_TYPE_NONE; 793 buf_info->handles[reg_type] = 0; 794 buf_info->types[reg_type] = 0; 795 memset(buf_desc, 0x00, sizeof(*buf_desc)); 796 } 797 798 buf_info->map_nr = 0; 799 } 800 801 static void g2d_dma_start(struct g2d_data *g2d, 802 struct g2d_runqueue_node *runqueue_node) 803 { 804 struct g2d_cmdlist_node *node = 805 list_first_entry(&runqueue_node->run_cmdlist, 806 struct g2d_cmdlist_node, list); 807 int ret; 808 809 ret = pm_runtime_get_sync(g2d->dev); 810 if (ret < 0) 811 return; 812 813 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR); 814 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND); 815 } 816 817 static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d) 818 { 819 struct g2d_runqueue_node *runqueue_node; 820 821 if (list_empty(&g2d->runqueue)) 822 return NULL; 823 824 runqueue_node = list_first_entry(&g2d->runqueue, 825 struct g2d_runqueue_node, list); 826 list_del_init(&runqueue_node->list); 827 return runqueue_node; 828 } 829 830 static void g2d_free_runqueue_node(struct g2d_data *g2d, 831 struct g2d_runqueue_node *runqueue_node) 832 { 833 struct g2d_cmdlist_node *node; 834 835 if (!runqueue_node) 836 return; 837 838 mutex_lock(&g2d->cmdlist_mutex); 839 /* 840 * commands in run_cmdlist have been completed so unmap all gem 841 * objects in each command node so that they are unreferenced. 842 */ 843 list_for_each_entry(node, &runqueue_node->run_cmdlist, list) 844 g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp); 845 list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist); 846 mutex_unlock(&g2d->cmdlist_mutex); 847 848 kmem_cache_free(g2d->runqueue_slab, runqueue_node); 849 } 850 851 static void g2d_exec_runqueue(struct g2d_data *g2d) 852 { 853 g2d->runqueue_node = g2d_get_runqueue_node(g2d); 854 if (g2d->runqueue_node) 855 g2d_dma_start(g2d, g2d->runqueue_node); 856 } 857 858 static void g2d_runqueue_worker(struct work_struct *work) 859 { 860 struct g2d_data *g2d = container_of(work, struct g2d_data, 861 runqueue_work); 862 863 mutex_lock(&g2d->runqueue_mutex); 864 pm_runtime_put_sync(g2d->dev); 865 866 complete(&g2d->runqueue_node->complete); 867 if (g2d->runqueue_node->async) 868 g2d_free_runqueue_node(g2d, g2d->runqueue_node); 869 870 if (g2d->suspended) 871 g2d->runqueue_node = NULL; 872 else 873 g2d_exec_runqueue(g2d); 874 mutex_unlock(&g2d->runqueue_mutex); 875 } 876 877 static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no) 878 { 879 struct drm_device *drm_dev = g2d->subdrv.drm_dev; 880 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node; 881 struct drm_exynos_pending_g2d_event *e; 882 struct timeval now; 883 unsigned long flags; 884 885 if (list_empty(&runqueue_node->event_list)) 886 return; 887 888 e = list_first_entry(&runqueue_node->event_list, 889 struct drm_exynos_pending_g2d_event, base.link); 890 891 do_gettimeofday(&now); 892 e->event.tv_sec = now.tv_sec; 893 e->event.tv_usec = now.tv_usec; 894 e->event.cmdlist_no = cmdlist_no; 895 896 spin_lock_irqsave(&drm_dev->event_lock, flags); 897 list_move_tail(&e->base.link, &e->base.file_priv->event_list); 898 wake_up_interruptible(&e->base.file_priv->event_wait); 899 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 900 } 901 902 static irqreturn_t g2d_irq_handler(int irq, void *dev_id) 903 { 904 struct g2d_data *g2d = dev_id; 905 u32 pending; 906 907 pending = readl_relaxed(g2d->regs + G2D_INTC_PEND); 908 if (pending) 909 writel_relaxed(pending, g2d->regs + G2D_INTC_PEND); 910 911 if (pending & G2D_INTP_GCMD_FIN) { 912 u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS); 913 914 cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >> 915 G2D_DMA_LIST_DONE_COUNT_OFFSET; 916 917 g2d_finish_event(g2d, cmdlist_no); 918 919 writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD); 920 if (!(pending & G2D_INTP_ACMD_FIN)) { 921 writel_relaxed(G2D_DMA_CONTINUE, 922 g2d->regs + G2D_DMA_COMMAND); 923 } 924 } 925 926 if (pending & G2D_INTP_ACMD_FIN) 927 queue_work(g2d->g2d_workq, &g2d->runqueue_work); 928 929 return IRQ_HANDLED; 930 } 931 932 static int g2d_check_reg_offset(struct device *dev, 933 struct g2d_cmdlist_node *node, 934 int nr, bool for_addr) 935 { 936 struct g2d_cmdlist *cmdlist = node->cmdlist; 937 int reg_offset; 938 int index; 939 int i; 940 941 for (i = 0; i < nr; i++) { 942 struct g2d_buf_info *buf_info = &node->buf_info; 943 struct g2d_buf_desc *buf_desc; 944 enum g2d_reg_type reg_type; 945 unsigned long value; 946 947 index = cmdlist->last - 2 * (i + 1); 948 949 reg_offset = cmdlist->data[index] & ~0xfffff000; 950 if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END) 951 goto err; 952 if (reg_offset % 4) 953 goto err; 954 955 switch (reg_offset) { 956 case G2D_SRC_BASE_ADDR: 957 case G2D_SRC_PLANE2_BASE_ADDR: 958 case G2D_DST_BASE_ADDR: 959 case G2D_DST_PLANE2_BASE_ADDR: 960 case G2D_PAT_BASE_ADDR: 961 case G2D_MSK_BASE_ADDR: 962 if (!for_addr) 963 goto err; 964 965 reg_type = g2d_get_reg_type(reg_offset); 966 967 /* check userptr buffer type. */ 968 if ((cmdlist->data[index] & ~0x7fffffff) >> 31) { 969 buf_info->types[reg_type] = BUF_TYPE_USERPTR; 970 cmdlist->data[index] &= ~G2D_BUF_USERPTR; 971 } else 972 buf_info->types[reg_type] = BUF_TYPE_GEM; 973 break; 974 case G2D_SRC_STRIDE_REG: 975 case G2D_DST_STRIDE_REG: 976 if (for_addr) 977 goto err; 978 979 reg_type = g2d_get_reg_type(reg_offset); 980 981 buf_desc = &buf_info->descs[reg_type]; 982 buf_desc->stride = cmdlist->data[index + 1]; 983 break; 984 case G2D_SRC_COLOR_MODE: 985 case G2D_DST_COLOR_MODE: 986 if (for_addr) 987 goto err; 988 989 reg_type = g2d_get_reg_type(reg_offset); 990 991 buf_desc = &buf_info->descs[reg_type]; 992 value = cmdlist->data[index + 1]; 993 994 buf_desc->format = value & 0xf; 995 break; 996 case G2D_SRC_LEFT_TOP: 997 case G2D_DST_LEFT_TOP: 998 if (for_addr) 999 goto err; 1000 1001 reg_type = g2d_get_reg_type(reg_offset); 1002 1003 buf_desc = &buf_info->descs[reg_type]; 1004 value = cmdlist->data[index + 1]; 1005 1006 buf_desc->left_x = value & 0x1fff; 1007 buf_desc->top_y = (value & 0x1fff0000) >> 16; 1008 break; 1009 case G2D_SRC_RIGHT_BOTTOM: 1010 case G2D_DST_RIGHT_BOTTOM: 1011 if (for_addr) 1012 goto err; 1013 1014 reg_type = g2d_get_reg_type(reg_offset); 1015 1016 buf_desc = &buf_info->descs[reg_type]; 1017 value = cmdlist->data[index + 1]; 1018 1019 buf_desc->right_x = value & 0x1fff; 1020 buf_desc->bottom_y = (value & 0x1fff0000) >> 16; 1021 break; 1022 default: 1023 if (for_addr) 1024 goto err; 1025 break; 1026 } 1027 } 1028 1029 return 0; 1030 1031 err: 1032 dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]); 1033 return -EINVAL; 1034 } 1035 1036 /* ioctl functions */ 1037 int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data, 1038 struct drm_file *file) 1039 { 1040 struct drm_exynos_file_private *file_priv = file->driver_priv; 1041 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 1042 struct device *dev; 1043 struct g2d_data *g2d; 1044 struct drm_exynos_g2d_get_ver *ver = data; 1045 1046 if (!g2d_priv) 1047 return -ENODEV; 1048 1049 dev = g2d_priv->dev; 1050 if (!dev) 1051 return -ENODEV; 1052 1053 g2d = dev_get_drvdata(dev); 1054 if (!g2d) 1055 return -EFAULT; 1056 1057 ver->major = G2D_HW_MAJOR_VER; 1058 ver->minor = G2D_HW_MINOR_VER; 1059 1060 return 0; 1061 } 1062 EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl); 1063 1064 int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data, 1065 struct drm_file *file) 1066 { 1067 struct drm_exynos_file_private *file_priv = file->driver_priv; 1068 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 1069 struct device *dev; 1070 struct g2d_data *g2d; 1071 struct drm_exynos_g2d_set_cmdlist *req = data; 1072 struct drm_exynos_g2d_cmd *cmd; 1073 struct drm_exynos_pending_g2d_event *e; 1074 struct g2d_cmdlist_node *node; 1075 struct g2d_cmdlist *cmdlist; 1076 unsigned long flags; 1077 int size; 1078 int ret; 1079 1080 if (!g2d_priv) 1081 return -ENODEV; 1082 1083 dev = g2d_priv->dev; 1084 if (!dev) 1085 return -ENODEV; 1086 1087 g2d = dev_get_drvdata(dev); 1088 if (!g2d) 1089 return -EFAULT; 1090 1091 node = g2d_get_cmdlist(g2d); 1092 if (!node) 1093 return -ENOMEM; 1094 1095 node->event = NULL; 1096 1097 if (req->event_type != G2D_EVENT_NOT) { 1098 spin_lock_irqsave(&drm_dev->event_lock, flags); 1099 if (file->event_space < sizeof(e->event)) { 1100 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 1101 ret = -ENOMEM; 1102 goto err; 1103 } 1104 file->event_space -= sizeof(e->event); 1105 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 1106 1107 e = kzalloc(sizeof(*node->event), GFP_KERNEL); 1108 if (!e) { 1109 spin_lock_irqsave(&drm_dev->event_lock, flags); 1110 file->event_space += sizeof(e->event); 1111 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 1112 1113 ret = -ENOMEM; 1114 goto err; 1115 } 1116 1117 e->event.base.type = DRM_EXYNOS_G2D_EVENT; 1118 e->event.base.length = sizeof(e->event); 1119 e->event.user_data = req->user_data; 1120 e->base.event = &e->event.base; 1121 e->base.file_priv = file; 1122 e->base.destroy = (void (*) (struct drm_pending_event *)) kfree; 1123 1124 node->event = e; 1125 } 1126 1127 cmdlist = node->cmdlist; 1128 1129 cmdlist->last = 0; 1130 1131 /* 1132 * If don't clear SFR registers, the cmdlist is affected by register 1133 * values of previous cmdlist. G2D hw executes SFR clear command and 1134 * a next command at the same time then the next command is ignored and 1135 * is executed rightly from next next command, so needs a dummy command 1136 * to next command of SFR clear command. 1137 */ 1138 cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET; 1139 cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR; 1140 cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR; 1141 cmdlist->data[cmdlist->last++] = 0; 1142 1143 /* 1144 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG 1145 * and GCF bit should be set to INTEN register if user wants 1146 * G2D interrupt event once current command list execution is 1147 * finished. 1148 * Otherwise only ACF bit should be set to INTEN register so 1149 * that one interrupt is occurred after all command lists 1150 * have been completed. 1151 */ 1152 if (node->event) { 1153 cmdlist->data[cmdlist->last++] = G2D_INTEN; 1154 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF; 1155 cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD; 1156 cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD; 1157 } else { 1158 cmdlist->data[cmdlist->last++] = G2D_INTEN; 1159 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF; 1160 } 1161 1162 /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */ 1163 size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2; 1164 if (size > G2D_CMDLIST_DATA_NUM) { 1165 dev_err(dev, "cmdlist size is too big\n"); 1166 ret = -EINVAL; 1167 goto err_free_event; 1168 } 1169 1170 cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd; 1171 1172 if (copy_from_user(cmdlist->data + cmdlist->last, 1173 (void __user *)cmd, 1174 sizeof(*cmd) * req->cmd_nr)) { 1175 ret = -EFAULT; 1176 goto err_free_event; 1177 } 1178 cmdlist->last += req->cmd_nr * 2; 1179 1180 ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false); 1181 if (ret < 0) 1182 goto err_free_event; 1183 1184 node->buf_info.map_nr = req->cmd_buf_nr; 1185 if (req->cmd_buf_nr) { 1186 struct drm_exynos_g2d_cmd *cmd_buf; 1187 1188 cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf; 1189 1190 if (copy_from_user(cmdlist->data + cmdlist->last, 1191 (void __user *)cmd_buf, 1192 sizeof(*cmd_buf) * req->cmd_buf_nr)) { 1193 ret = -EFAULT; 1194 goto err_free_event; 1195 } 1196 cmdlist->last += req->cmd_buf_nr * 2; 1197 1198 ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true); 1199 if (ret < 0) 1200 goto err_free_event; 1201 1202 ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file); 1203 if (ret < 0) 1204 goto err_unmap; 1205 } 1206 1207 cmdlist->data[cmdlist->last++] = G2D_BITBLT_START; 1208 cmdlist->data[cmdlist->last++] = G2D_START_BITBLT; 1209 1210 /* head */ 1211 cmdlist->head = cmdlist->last / 2; 1212 1213 /* tail */ 1214 cmdlist->data[cmdlist->last] = 0; 1215 1216 g2d_add_cmdlist_to_inuse(g2d_priv, node); 1217 1218 return 0; 1219 1220 err_unmap: 1221 g2d_unmap_cmdlist_gem(g2d, node, file); 1222 err_free_event: 1223 if (node->event) { 1224 spin_lock_irqsave(&drm_dev->event_lock, flags); 1225 file->event_space += sizeof(e->event); 1226 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 1227 kfree(node->event); 1228 } 1229 err: 1230 g2d_put_cmdlist(g2d, node); 1231 return ret; 1232 } 1233 EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl); 1234 1235 int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data, 1236 struct drm_file *file) 1237 { 1238 struct drm_exynos_file_private *file_priv = file->driver_priv; 1239 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 1240 struct device *dev; 1241 struct g2d_data *g2d; 1242 struct drm_exynos_g2d_exec *req = data; 1243 struct g2d_runqueue_node *runqueue_node; 1244 struct list_head *run_cmdlist; 1245 struct list_head *event_list; 1246 1247 if (!g2d_priv) 1248 return -ENODEV; 1249 1250 dev = g2d_priv->dev; 1251 if (!dev) 1252 return -ENODEV; 1253 1254 g2d = dev_get_drvdata(dev); 1255 if (!g2d) 1256 return -EFAULT; 1257 1258 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL); 1259 if (!runqueue_node) { 1260 dev_err(dev, "failed to allocate memory\n"); 1261 return -ENOMEM; 1262 } 1263 run_cmdlist = &runqueue_node->run_cmdlist; 1264 event_list = &runqueue_node->event_list; 1265 INIT_LIST_HEAD(run_cmdlist); 1266 INIT_LIST_HEAD(event_list); 1267 init_completion(&runqueue_node->complete); 1268 runqueue_node->async = req->async; 1269 1270 list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist); 1271 list_splice_init(&g2d_priv->event_list, event_list); 1272 1273 if (list_empty(run_cmdlist)) { 1274 dev_err(dev, "there is no inuse cmdlist\n"); 1275 kmem_cache_free(g2d->runqueue_slab, runqueue_node); 1276 return -EPERM; 1277 } 1278 1279 mutex_lock(&g2d->runqueue_mutex); 1280 runqueue_node->pid = current->pid; 1281 runqueue_node->filp = file; 1282 list_add_tail(&runqueue_node->list, &g2d->runqueue); 1283 if (!g2d->runqueue_node) 1284 g2d_exec_runqueue(g2d); 1285 mutex_unlock(&g2d->runqueue_mutex); 1286 1287 if (runqueue_node->async) 1288 goto out; 1289 1290 wait_for_completion(&runqueue_node->complete); 1291 g2d_free_runqueue_node(g2d, runqueue_node); 1292 1293 out: 1294 return 0; 1295 } 1296 EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl); 1297 1298 static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev) 1299 { 1300 struct g2d_data *g2d; 1301 int ret; 1302 1303 g2d = dev_get_drvdata(dev); 1304 if (!g2d) 1305 return -EFAULT; 1306 1307 /* allocate dma-aware cmdlist buffer. */ 1308 ret = g2d_init_cmdlist(g2d); 1309 if (ret < 0) { 1310 dev_err(dev, "cmdlist init failed\n"); 1311 return ret; 1312 } 1313 1314 ret = drm_iommu_attach_device(drm_dev, dev); 1315 if (ret < 0) { 1316 dev_err(dev, "failed to enable iommu.\n"); 1317 g2d_fini_cmdlist(g2d); 1318 } 1319 1320 return ret; 1321 1322 } 1323 1324 static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev) 1325 { 1326 drm_iommu_detach_device(drm_dev, dev); 1327 } 1328 1329 static int g2d_open(struct drm_device *drm_dev, struct device *dev, 1330 struct drm_file *file) 1331 { 1332 struct drm_exynos_file_private *file_priv = file->driver_priv; 1333 struct exynos_drm_g2d_private *g2d_priv; 1334 1335 g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL); 1336 if (!g2d_priv) 1337 return -ENOMEM; 1338 1339 g2d_priv->dev = dev; 1340 file_priv->g2d_priv = g2d_priv; 1341 1342 INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist); 1343 INIT_LIST_HEAD(&g2d_priv->event_list); 1344 INIT_LIST_HEAD(&g2d_priv->userptr_list); 1345 1346 return 0; 1347 } 1348 1349 static void g2d_close(struct drm_device *drm_dev, struct device *dev, 1350 struct drm_file *file) 1351 { 1352 struct drm_exynos_file_private *file_priv = file->driver_priv; 1353 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 1354 struct g2d_data *g2d; 1355 struct g2d_cmdlist_node *node, *n; 1356 1357 if (!dev) 1358 return; 1359 1360 g2d = dev_get_drvdata(dev); 1361 if (!g2d) 1362 return; 1363 1364 mutex_lock(&g2d->cmdlist_mutex); 1365 list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) { 1366 /* 1367 * unmap all gem objects not completed. 1368 * 1369 * P.S. if current process was terminated forcely then 1370 * there may be some commands in inuse_cmdlist so unmap 1371 * them. 1372 */ 1373 g2d_unmap_cmdlist_gem(g2d, node, file); 1374 list_move_tail(&node->list, &g2d->free_cmdlist); 1375 } 1376 mutex_unlock(&g2d->cmdlist_mutex); 1377 1378 /* release all g2d_userptr in pool. */ 1379 g2d_userptr_free_all(drm_dev, g2d, file); 1380 1381 kfree(file_priv->g2d_priv); 1382 } 1383 1384 static int g2d_probe(struct platform_device *pdev) 1385 { 1386 struct device *dev = &pdev->dev; 1387 struct resource *res; 1388 struct g2d_data *g2d; 1389 struct exynos_drm_subdrv *subdrv; 1390 int ret; 1391 1392 g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL); 1393 if (!g2d) 1394 return -ENOMEM; 1395 1396 g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab", 1397 sizeof(struct g2d_runqueue_node), 0, 0, NULL); 1398 if (!g2d->runqueue_slab) 1399 return -ENOMEM; 1400 1401 g2d->dev = dev; 1402 1403 g2d->g2d_workq = create_singlethread_workqueue("g2d"); 1404 if (!g2d->g2d_workq) { 1405 dev_err(dev, "failed to create workqueue\n"); 1406 ret = -EINVAL; 1407 goto err_destroy_slab; 1408 } 1409 1410 INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker); 1411 INIT_LIST_HEAD(&g2d->free_cmdlist); 1412 INIT_LIST_HEAD(&g2d->runqueue); 1413 1414 mutex_init(&g2d->cmdlist_mutex); 1415 mutex_init(&g2d->runqueue_mutex); 1416 1417 g2d->gate_clk = devm_clk_get(dev, "fimg2d"); 1418 if (IS_ERR(g2d->gate_clk)) { 1419 dev_err(dev, "failed to get gate clock\n"); 1420 ret = PTR_ERR(g2d->gate_clk); 1421 goto err_destroy_workqueue; 1422 } 1423 1424 pm_runtime_enable(dev); 1425 1426 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1427 1428 g2d->regs = devm_ioremap_resource(dev, res); 1429 if (IS_ERR(g2d->regs)) { 1430 ret = PTR_ERR(g2d->regs); 1431 goto err_put_clk; 1432 } 1433 1434 g2d->irq = platform_get_irq(pdev, 0); 1435 if (g2d->irq < 0) { 1436 dev_err(dev, "failed to get irq\n"); 1437 ret = g2d->irq; 1438 goto err_put_clk; 1439 } 1440 1441 ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0, 1442 "drm_g2d", g2d); 1443 if (ret < 0) { 1444 dev_err(dev, "irq request failed\n"); 1445 goto err_put_clk; 1446 } 1447 1448 g2d->max_pool = MAX_POOL; 1449 1450 platform_set_drvdata(pdev, g2d); 1451 1452 subdrv = &g2d->subdrv; 1453 subdrv->dev = dev; 1454 subdrv->probe = g2d_subdrv_probe; 1455 subdrv->remove = g2d_subdrv_remove; 1456 subdrv->open = g2d_open; 1457 subdrv->close = g2d_close; 1458 1459 ret = exynos_drm_subdrv_register(subdrv); 1460 if (ret < 0) { 1461 dev_err(dev, "failed to register drm g2d device\n"); 1462 goto err_put_clk; 1463 } 1464 1465 dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n", 1466 G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER); 1467 1468 return 0; 1469 1470 err_put_clk: 1471 pm_runtime_disable(dev); 1472 err_destroy_workqueue: 1473 destroy_workqueue(g2d->g2d_workq); 1474 err_destroy_slab: 1475 kmem_cache_destroy(g2d->runqueue_slab); 1476 return ret; 1477 } 1478 1479 static int g2d_remove(struct platform_device *pdev) 1480 { 1481 struct g2d_data *g2d = platform_get_drvdata(pdev); 1482 1483 cancel_work_sync(&g2d->runqueue_work); 1484 exynos_drm_subdrv_unregister(&g2d->subdrv); 1485 1486 while (g2d->runqueue_node) { 1487 g2d_free_runqueue_node(g2d, g2d->runqueue_node); 1488 g2d->runqueue_node = g2d_get_runqueue_node(g2d); 1489 } 1490 1491 pm_runtime_disable(&pdev->dev); 1492 1493 g2d_fini_cmdlist(g2d); 1494 destroy_workqueue(g2d->g2d_workq); 1495 kmem_cache_destroy(g2d->runqueue_slab); 1496 1497 return 0; 1498 } 1499 1500 #ifdef CONFIG_PM_SLEEP 1501 static int g2d_suspend(struct device *dev) 1502 { 1503 struct g2d_data *g2d = dev_get_drvdata(dev); 1504 1505 mutex_lock(&g2d->runqueue_mutex); 1506 g2d->suspended = true; 1507 mutex_unlock(&g2d->runqueue_mutex); 1508 1509 while (g2d->runqueue_node) 1510 /* FIXME: good range? */ 1511 usleep_range(500, 1000); 1512 1513 flush_work(&g2d->runqueue_work); 1514 1515 return 0; 1516 } 1517 1518 static int g2d_resume(struct device *dev) 1519 { 1520 struct g2d_data *g2d = dev_get_drvdata(dev); 1521 1522 g2d->suspended = false; 1523 g2d_exec_runqueue(g2d); 1524 1525 return 0; 1526 } 1527 #endif 1528 1529 #ifdef CONFIG_PM 1530 static int g2d_runtime_suspend(struct device *dev) 1531 { 1532 struct g2d_data *g2d = dev_get_drvdata(dev); 1533 1534 clk_disable_unprepare(g2d->gate_clk); 1535 1536 return 0; 1537 } 1538 1539 static int g2d_runtime_resume(struct device *dev) 1540 { 1541 struct g2d_data *g2d = dev_get_drvdata(dev); 1542 int ret; 1543 1544 ret = clk_prepare_enable(g2d->gate_clk); 1545 if (ret < 0) 1546 dev_warn(dev, "failed to enable clock.\n"); 1547 1548 return ret; 1549 } 1550 #endif 1551 1552 static const struct dev_pm_ops g2d_pm_ops = { 1553 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume) 1554 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL) 1555 }; 1556 1557 static const struct of_device_id exynos_g2d_match[] = { 1558 { .compatible = "samsung,exynos5250-g2d" }, 1559 { .compatible = "samsung,exynos4212-g2d" }, 1560 {}, 1561 }; 1562 MODULE_DEVICE_TABLE(of, exynos_g2d_match); 1563 1564 struct platform_driver g2d_driver = { 1565 .probe = g2d_probe, 1566 .remove = g2d_remove, 1567 .driver = { 1568 .name = "s5p-g2d", 1569 .owner = THIS_MODULE, 1570 .pm = &g2d_pm_ops, 1571 .of_match_table = exynos_g2d_match, 1572 }, 1573 }; 1574