1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Samsung Electronics Co.Ltd 4 * Authors: Joonyoung Shim <jy0922.shim@samsung.com> 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/component.h> 9 #include <linux/delay.h> 10 #include <linux/dma-mapping.h> 11 #include <linux/err.h> 12 #include <linux/interrupt.h> 13 #include <linux/io.h> 14 #include <linux/kernel.h> 15 #include <linux/of.h> 16 #include <linux/platform_device.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/slab.h> 19 #include <linux/uaccess.h> 20 #include <linux/workqueue.h> 21 22 #include <drm/drm_file.h> 23 #include <drm/exynos_drm.h> 24 25 #include "exynos_drm_drv.h" 26 #include "exynos_drm_g2d.h" 27 #include "exynos_drm_gem.h" 28 29 #define G2D_HW_MAJOR_VER 4 30 #define G2D_HW_MINOR_VER 1 31 32 /* vaild register range set from user: 0x0104 ~ 0x0880 */ 33 #define G2D_VALID_START 0x0104 34 #define G2D_VALID_END 0x0880 35 36 /* general registers */ 37 #define G2D_SOFT_RESET 0x0000 38 #define G2D_INTEN 0x0004 39 #define G2D_INTC_PEND 0x000C 40 #define G2D_DMA_SFR_BASE_ADDR 0x0080 41 #define G2D_DMA_COMMAND 0x0084 42 #define G2D_DMA_STATUS 0x008C 43 #define G2D_DMA_HOLD_CMD 0x0090 44 45 /* command registers */ 46 #define G2D_BITBLT_START 0x0100 47 48 /* registers for base address */ 49 #define G2D_SRC_BASE_ADDR 0x0304 50 #define G2D_SRC_STRIDE 0x0308 51 #define G2D_SRC_COLOR_MODE 0x030C 52 #define G2D_SRC_LEFT_TOP 0x0310 53 #define G2D_SRC_RIGHT_BOTTOM 0x0314 54 #define G2D_SRC_PLANE2_BASE_ADDR 0x0318 55 #define G2D_DST_BASE_ADDR 0x0404 56 #define G2D_DST_STRIDE 0x0408 57 #define G2D_DST_COLOR_MODE 0x040C 58 #define G2D_DST_LEFT_TOP 0x0410 59 #define G2D_DST_RIGHT_BOTTOM 0x0414 60 #define G2D_DST_PLANE2_BASE_ADDR 0x0418 61 #define G2D_PAT_BASE_ADDR 0x0500 62 #define G2D_MSK_BASE_ADDR 0x0520 63 64 /* G2D_SOFT_RESET */ 65 #define G2D_SFRCLEAR (1 << 1) 66 #define G2D_R (1 << 0) 67 68 /* G2D_INTEN */ 69 #define G2D_INTEN_ACF (1 << 3) 70 #define G2D_INTEN_UCF (1 << 2) 71 #define G2D_INTEN_GCF (1 << 1) 72 #define G2D_INTEN_SCF (1 << 0) 73 74 /* G2D_INTC_PEND */ 75 #define G2D_INTP_ACMD_FIN (1 << 3) 76 #define G2D_INTP_UCMD_FIN (1 << 2) 77 #define G2D_INTP_GCMD_FIN (1 << 1) 78 #define G2D_INTP_SCMD_FIN (1 << 0) 79 80 /* G2D_DMA_COMMAND */ 81 #define G2D_DMA_HALT (1 << 2) 82 #define G2D_DMA_CONTINUE (1 << 1) 83 #define G2D_DMA_START (1 << 0) 84 85 /* G2D_DMA_STATUS */ 86 #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17) 87 #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1) 88 #define G2D_DMA_DONE (1 << 0) 89 #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17 90 91 /* G2D_DMA_HOLD_CMD */ 92 #define G2D_USER_HOLD (1 << 2) 93 #define G2D_LIST_HOLD (1 << 1) 94 #define G2D_BITBLT_HOLD (1 << 0) 95 96 /* G2D_BITBLT_START */ 97 #define G2D_START_CASESEL (1 << 2) 98 #define G2D_START_NHOLT (1 << 1) 99 #define G2D_START_BITBLT (1 << 0) 100 101 /* buffer color format */ 102 #define G2D_FMT_XRGB8888 0 103 #define G2D_FMT_ARGB8888 1 104 #define G2D_FMT_RGB565 2 105 #define G2D_FMT_XRGB1555 3 106 #define G2D_FMT_ARGB1555 4 107 #define G2D_FMT_XRGB4444 5 108 #define G2D_FMT_ARGB4444 6 109 #define G2D_FMT_PACKED_RGB888 7 110 #define G2D_FMT_A8 11 111 #define G2D_FMT_L8 12 112 113 /* buffer valid length */ 114 #define G2D_LEN_MIN 1 115 #define G2D_LEN_MAX 8000 116 117 #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4) 118 #define G2D_CMDLIST_NUM 64 119 #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM) 120 #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2) 121 122 /* maximum buffer pool size of userptr is 64MB as default */ 123 #define MAX_POOL (64 * 1024 * 1024) 124 125 enum { 126 BUF_TYPE_GEM = 1, 127 BUF_TYPE_USERPTR, 128 }; 129 130 enum g2d_reg_type { 131 REG_TYPE_NONE = -1, 132 REG_TYPE_SRC, 133 REG_TYPE_SRC_PLANE2, 134 REG_TYPE_DST, 135 REG_TYPE_DST_PLANE2, 136 REG_TYPE_PAT, 137 REG_TYPE_MSK, 138 MAX_REG_TYPE_NR 139 }; 140 141 enum g2d_flag_bits { 142 /* 143 * If set, suspends the runqueue worker after the currently 144 * processed node is finished. 145 */ 146 G2D_BIT_SUSPEND_RUNQUEUE, 147 /* 148 * If set, indicates that the engine is currently busy. 149 */ 150 G2D_BIT_ENGINE_BUSY, 151 }; 152 153 /* cmdlist data structure */ 154 struct g2d_cmdlist { 155 u32 head; 156 unsigned long data[G2D_CMDLIST_DATA_NUM]; 157 u32 last; /* last data offset */ 158 }; 159 160 /* 161 * A structure of buffer description 162 * 163 * @format: color format 164 * @stride: buffer stride/pitch in bytes 165 * @left_x: the x coordinates of left top corner 166 * @top_y: the y coordinates of left top corner 167 * @right_x: the x coordinates of right bottom corner 168 * @bottom_y: the y coordinates of right bottom corner 169 * 170 */ 171 struct g2d_buf_desc { 172 unsigned int format; 173 unsigned int stride; 174 unsigned int left_x; 175 unsigned int top_y; 176 unsigned int right_x; 177 unsigned int bottom_y; 178 }; 179 180 /* 181 * A structure of buffer information 182 * 183 * @map_nr: manages the number of mapped buffers 184 * @reg_types: stores regitster type in the order of requested command 185 * @handles: stores buffer handle in its reg_type position 186 * @types: stores buffer type in its reg_type position 187 * @descs: stores buffer description in its reg_type position 188 * 189 */ 190 struct g2d_buf_info { 191 unsigned int map_nr; 192 enum g2d_reg_type reg_types[MAX_REG_TYPE_NR]; 193 void *obj[MAX_REG_TYPE_NR]; 194 unsigned int types[MAX_REG_TYPE_NR]; 195 struct g2d_buf_desc descs[MAX_REG_TYPE_NR]; 196 }; 197 198 struct drm_exynos_pending_g2d_event { 199 struct drm_pending_event base; 200 struct drm_exynos_g2d_event event; 201 }; 202 203 struct g2d_cmdlist_userptr { 204 struct list_head list; 205 dma_addr_t dma_addr; 206 unsigned long userptr; 207 unsigned long size; 208 struct page **pages; 209 unsigned int npages; 210 struct sg_table *sgt; 211 atomic_t refcount; 212 bool in_pool; 213 bool out_of_list; 214 }; 215 struct g2d_cmdlist_node { 216 struct list_head list; 217 struct g2d_cmdlist *cmdlist; 218 dma_addr_t dma_addr; 219 struct g2d_buf_info buf_info; 220 221 struct drm_exynos_pending_g2d_event *event; 222 }; 223 224 struct g2d_runqueue_node { 225 struct list_head list; 226 struct list_head run_cmdlist; 227 struct list_head event_list; 228 struct drm_file *filp; 229 pid_t pid; 230 struct completion complete; 231 int async; 232 }; 233 234 struct g2d_data { 235 struct device *dev; 236 void *dma_priv; 237 struct clk *gate_clk; 238 void __iomem *regs; 239 int irq; 240 struct workqueue_struct *g2d_workq; 241 struct work_struct runqueue_work; 242 struct drm_device *drm_dev; 243 unsigned long flags; 244 245 /* cmdlist */ 246 struct g2d_cmdlist_node *cmdlist_node; 247 struct list_head free_cmdlist; 248 struct mutex cmdlist_mutex; 249 dma_addr_t cmdlist_pool; 250 void *cmdlist_pool_virt; 251 unsigned long cmdlist_dma_attrs; 252 253 /* runqueue*/ 254 struct g2d_runqueue_node *runqueue_node; 255 struct list_head runqueue; 256 struct mutex runqueue_mutex; 257 struct kmem_cache *runqueue_slab; 258 259 unsigned long current_pool; 260 unsigned long max_pool; 261 }; 262 263 static inline void g2d_hw_reset(struct g2d_data *g2d) 264 { 265 writel(G2D_R | G2D_SFRCLEAR, g2d->regs + G2D_SOFT_RESET); 266 clear_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags); 267 } 268 269 static int g2d_init_cmdlist(struct g2d_data *g2d) 270 { 271 struct device *dev = g2d->dev; 272 struct g2d_cmdlist_node *node; 273 int nr; 274 int ret; 275 struct g2d_buf_info *buf_info; 276 277 g2d->cmdlist_dma_attrs = DMA_ATTR_WRITE_COMBINE; 278 279 g2d->cmdlist_pool_virt = dma_alloc_attrs(to_dma_dev(g2d->drm_dev), 280 G2D_CMDLIST_POOL_SIZE, 281 &g2d->cmdlist_pool, GFP_KERNEL, 282 g2d->cmdlist_dma_attrs); 283 if (!g2d->cmdlist_pool_virt) { 284 dev_err(dev, "failed to allocate dma memory\n"); 285 return -ENOMEM; 286 } 287 288 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL); 289 if (!node) { 290 ret = -ENOMEM; 291 goto err; 292 } 293 294 for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) { 295 unsigned int i; 296 297 node[nr].cmdlist = 298 g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE; 299 node[nr].dma_addr = 300 g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE; 301 302 buf_info = &node[nr].buf_info; 303 for (i = 0; i < MAX_REG_TYPE_NR; i++) 304 buf_info->reg_types[i] = REG_TYPE_NONE; 305 306 list_add_tail(&node[nr].list, &g2d->free_cmdlist); 307 } 308 309 return 0; 310 311 err: 312 dma_free_attrs(to_dma_dev(g2d->drm_dev), G2D_CMDLIST_POOL_SIZE, 313 g2d->cmdlist_pool_virt, 314 g2d->cmdlist_pool, g2d->cmdlist_dma_attrs); 315 return ret; 316 } 317 318 static void g2d_fini_cmdlist(struct g2d_data *g2d) 319 { 320 kfree(g2d->cmdlist_node); 321 322 if (g2d->cmdlist_pool_virt && g2d->cmdlist_pool) { 323 dma_free_attrs(to_dma_dev(g2d->drm_dev), 324 G2D_CMDLIST_POOL_SIZE, 325 g2d->cmdlist_pool_virt, 326 g2d->cmdlist_pool, g2d->cmdlist_dma_attrs); 327 } 328 } 329 330 static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d) 331 { 332 struct device *dev = g2d->dev; 333 struct g2d_cmdlist_node *node; 334 335 mutex_lock(&g2d->cmdlist_mutex); 336 if (list_empty(&g2d->free_cmdlist)) { 337 dev_err(dev, "there is no free cmdlist\n"); 338 mutex_unlock(&g2d->cmdlist_mutex); 339 return NULL; 340 } 341 342 node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node, 343 list); 344 list_del_init(&node->list); 345 mutex_unlock(&g2d->cmdlist_mutex); 346 347 return node; 348 } 349 350 static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node) 351 { 352 mutex_lock(&g2d->cmdlist_mutex); 353 list_move_tail(&node->list, &g2d->free_cmdlist); 354 mutex_unlock(&g2d->cmdlist_mutex); 355 } 356 357 static void g2d_add_cmdlist_to_inuse(struct drm_exynos_file_private *file_priv, 358 struct g2d_cmdlist_node *node) 359 { 360 struct g2d_cmdlist_node *lnode; 361 362 if (list_empty(&file_priv->inuse_cmdlist)) 363 goto add_to_list; 364 365 /* this links to base address of new cmdlist */ 366 lnode = list_entry(file_priv->inuse_cmdlist.prev, 367 struct g2d_cmdlist_node, list); 368 lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr; 369 370 add_to_list: 371 list_add_tail(&node->list, &file_priv->inuse_cmdlist); 372 373 if (node->event) 374 list_add_tail(&node->event->base.link, &file_priv->event_list); 375 } 376 377 static void g2d_userptr_put_dma_addr(struct g2d_data *g2d, 378 void *obj, 379 bool force) 380 { 381 struct g2d_cmdlist_userptr *g2d_userptr = obj; 382 383 if (!obj) 384 return; 385 386 if (force) 387 goto out; 388 389 atomic_dec(&g2d_userptr->refcount); 390 391 if (atomic_read(&g2d_userptr->refcount) > 0) 392 return; 393 394 if (g2d_userptr->in_pool) 395 return; 396 397 out: 398 dma_unmap_sgtable(to_dma_dev(g2d->drm_dev), g2d_userptr->sgt, 399 DMA_BIDIRECTIONAL, 0); 400 401 unpin_user_pages_dirty_lock(g2d_userptr->pages, g2d_userptr->npages, 402 true); 403 kvfree(g2d_userptr->pages); 404 405 if (!g2d_userptr->out_of_list) 406 list_del_init(&g2d_userptr->list); 407 408 sg_free_table(g2d_userptr->sgt); 409 kfree(g2d_userptr->sgt); 410 kfree(g2d_userptr); 411 } 412 413 static dma_addr_t *g2d_userptr_get_dma_addr(struct g2d_data *g2d, 414 unsigned long userptr, 415 unsigned long size, 416 struct drm_file *filp, 417 void **obj) 418 { 419 struct drm_exynos_file_private *file_priv = filp->driver_priv; 420 struct g2d_cmdlist_userptr *g2d_userptr; 421 struct sg_table *sgt; 422 unsigned long start, end; 423 unsigned int npages, offset; 424 int ret; 425 426 if (!size) { 427 DRM_DEV_ERROR(g2d->dev, "invalid userptr size.\n"); 428 return ERR_PTR(-EINVAL); 429 } 430 431 /* check if userptr already exists in userptr_list. */ 432 list_for_each_entry(g2d_userptr, &file_priv->userptr_list, list) { 433 if (g2d_userptr->userptr == userptr) { 434 /* 435 * also check size because there could be same address 436 * and different size. 437 */ 438 if (g2d_userptr->size == size) { 439 atomic_inc(&g2d_userptr->refcount); 440 *obj = g2d_userptr; 441 442 return &g2d_userptr->dma_addr; 443 } 444 445 /* 446 * at this moment, maybe g2d dma is accessing this 447 * g2d_userptr memory region so just remove this 448 * g2d_userptr object from userptr_list not to be 449 * referred again and also except it the userptr 450 * pool to be released after the dma access completion. 451 */ 452 g2d_userptr->out_of_list = true; 453 g2d_userptr->in_pool = false; 454 list_del_init(&g2d_userptr->list); 455 456 break; 457 } 458 } 459 460 g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL); 461 if (!g2d_userptr) 462 return ERR_PTR(-ENOMEM); 463 464 atomic_set(&g2d_userptr->refcount, 1); 465 g2d_userptr->size = size; 466 467 start = userptr & PAGE_MASK; 468 offset = userptr & ~PAGE_MASK; 469 end = PAGE_ALIGN(userptr + size); 470 npages = (end - start) >> PAGE_SHIFT; 471 g2d_userptr->pages = kvmalloc_array(npages, sizeof(*g2d_userptr->pages), 472 GFP_KERNEL); 473 if (!g2d_userptr->pages) { 474 ret = -ENOMEM; 475 goto err_free; 476 } 477 478 ret = pin_user_pages_fast(start, npages, 479 FOLL_FORCE | FOLL_WRITE | FOLL_LONGTERM, 480 g2d_userptr->pages); 481 if (ret != npages) { 482 DRM_DEV_ERROR(g2d->dev, 483 "failed to get user pages from userptr.\n"); 484 if (ret < 0) 485 goto err_destroy_pages; 486 npages = ret; 487 ret = -EFAULT; 488 goto err_unpin_pages; 489 } 490 g2d_userptr->npages = npages; 491 492 sgt = kzalloc(sizeof(*sgt), GFP_KERNEL); 493 if (!sgt) { 494 ret = -ENOMEM; 495 goto err_unpin_pages; 496 } 497 498 ret = sg_alloc_table_from_pages(sgt, 499 g2d_userptr->pages, 500 npages, offset, size, GFP_KERNEL); 501 if (ret < 0) { 502 DRM_DEV_ERROR(g2d->dev, "failed to get sgt from pages.\n"); 503 goto err_free_sgt; 504 } 505 506 g2d_userptr->sgt = sgt; 507 508 ret = dma_map_sgtable(to_dma_dev(g2d->drm_dev), sgt, 509 DMA_BIDIRECTIONAL, 0); 510 if (ret) { 511 DRM_DEV_ERROR(g2d->dev, "failed to map sgt with dma region.\n"); 512 goto err_sg_free_table; 513 } 514 515 g2d_userptr->dma_addr = sgt->sgl[0].dma_address; 516 g2d_userptr->userptr = userptr; 517 518 list_add_tail(&g2d_userptr->list, &file_priv->userptr_list); 519 520 if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) { 521 g2d->current_pool += npages << PAGE_SHIFT; 522 g2d_userptr->in_pool = true; 523 } 524 525 *obj = g2d_userptr; 526 527 return &g2d_userptr->dma_addr; 528 529 err_sg_free_table: 530 sg_free_table(sgt); 531 532 err_free_sgt: 533 kfree(sgt); 534 535 err_unpin_pages: 536 unpin_user_pages(g2d_userptr->pages, npages); 537 538 err_destroy_pages: 539 kvfree(g2d_userptr->pages); 540 541 err_free: 542 kfree(g2d_userptr); 543 544 return ERR_PTR(ret); 545 } 546 547 static void g2d_userptr_free_all(struct g2d_data *g2d, struct drm_file *filp) 548 { 549 struct drm_exynos_file_private *file_priv = filp->driver_priv; 550 struct g2d_cmdlist_userptr *g2d_userptr, *n; 551 552 list_for_each_entry_safe(g2d_userptr, n, &file_priv->userptr_list, list) 553 if (g2d_userptr->in_pool) 554 g2d_userptr_put_dma_addr(g2d, g2d_userptr, true); 555 556 g2d->current_pool = 0; 557 } 558 559 static enum g2d_reg_type g2d_get_reg_type(struct g2d_data *g2d, int reg_offset) 560 { 561 enum g2d_reg_type reg_type; 562 563 switch (reg_offset) { 564 case G2D_SRC_BASE_ADDR: 565 case G2D_SRC_STRIDE: 566 case G2D_SRC_COLOR_MODE: 567 case G2D_SRC_LEFT_TOP: 568 case G2D_SRC_RIGHT_BOTTOM: 569 reg_type = REG_TYPE_SRC; 570 break; 571 case G2D_SRC_PLANE2_BASE_ADDR: 572 reg_type = REG_TYPE_SRC_PLANE2; 573 break; 574 case G2D_DST_BASE_ADDR: 575 case G2D_DST_STRIDE: 576 case G2D_DST_COLOR_MODE: 577 case G2D_DST_LEFT_TOP: 578 case G2D_DST_RIGHT_BOTTOM: 579 reg_type = REG_TYPE_DST; 580 break; 581 case G2D_DST_PLANE2_BASE_ADDR: 582 reg_type = REG_TYPE_DST_PLANE2; 583 break; 584 case G2D_PAT_BASE_ADDR: 585 reg_type = REG_TYPE_PAT; 586 break; 587 case G2D_MSK_BASE_ADDR: 588 reg_type = REG_TYPE_MSK; 589 break; 590 default: 591 reg_type = REG_TYPE_NONE; 592 DRM_DEV_ERROR(g2d->dev, "Unknown register offset![%d]\n", 593 reg_offset); 594 break; 595 } 596 597 return reg_type; 598 } 599 600 static unsigned long g2d_get_buf_bpp(unsigned int format) 601 { 602 unsigned long bpp; 603 604 switch (format) { 605 case G2D_FMT_XRGB8888: 606 case G2D_FMT_ARGB8888: 607 bpp = 4; 608 break; 609 case G2D_FMT_RGB565: 610 case G2D_FMT_XRGB1555: 611 case G2D_FMT_ARGB1555: 612 case G2D_FMT_XRGB4444: 613 case G2D_FMT_ARGB4444: 614 bpp = 2; 615 break; 616 case G2D_FMT_PACKED_RGB888: 617 bpp = 3; 618 break; 619 default: 620 bpp = 1; 621 break; 622 } 623 624 return bpp; 625 } 626 627 static bool g2d_check_buf_desc_is_valid(struct g2d_data *g2d, 628 struct g2d_buf_desc *buf_desc, 629 enum g2d_reg_type reg_type, 630 unsigned long size) 631 { 632 int width, height; 633 unsigned long bpp, last_pos; 634 635 /* 636 * check source and destination buffers only. 637 * so the others are always valid. 638 */ 639 if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST) 640 return true; 641 642 /* This check also makes sure that right_x > left_x. */ 643 width = (int)buf_desc->right_x - (int)buf_desc->left_x; 644 if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) { 645 DRM_DEV_ERROR(g2d->dev, "width[%d] is out of range!\n", width); 646 return false; 647 } 648 649 /* This check also makes sure that bottom_y > top_y. */ 650 height = (int)buf_desc->bottom_y - (int)buf_desc->top_y; 651 if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) { 652 DRM_DEV_ERROR(g2d->dev, 653 "height[%d] is out of range!\n", height); 654 return false; 655 } 656 657 bpp = g2d_get_buf_bpp(buf_desc->format); 658 659 /* Compute the position of the last byte that the engine accesses. */ 660 last_pos = ((unsigned long)buf_desc->bottom_y - 1) * 661 (unsigned long)buf_desc->stride + 662 (unsigned long)buf_desc->right_x * bpp - 1; 663 664 /* 665 * Since right_x > left_x and bottom_y > top_y we already know 666 * that the first_pos < last_pos (first_pos being the position 667 * of the first byte the engine accesses), it just remains to 668 * check if last_pos is smaller then the buffer size. 669 */ 670 671 if (last_pos >= size) { 672 DRM_DEV_ERROR(g2d->dev, "last engine access position [%lu] " 673 "is out of range [%lu]!\n", last_pos, size); 674 return false; 675 } 676 677 return true; 678 } 679 680 static int g2d_map_cmdlist_gem(struct g2d_data *g2d, 681 struct g2d_cmdlist_node *node, 682 struct drm_device *drm_dev, 683 struct drm_file *file) 684 { 685 struct g2d_cmdlist *cmdlist = node->cmdlist; 686 struct g2d_buf_info *buf_info = &node->buf_info; 687 int offset; 688 int ret; 689 int i; 690 691 for (i = 0; i < buf_info->map_nr; i++) { 692 struct g2d_buf_desc *buf_desc; 693 enum g2d_reg_type reg_type; 694 int reg_pos; 695 unsigned long handle; 696 dma_addr_t *addr; 697 698 reg_pos = cmdlist->last - 2 * (i + 1); 699 700 offset = cmdlist->data[reg_pos]; 701 handle = cmdlist->data[reg_pos + 1]; 702 703 reg_type = g2d_get_reg_type(g2d, offset); 704 if (reg_type == REG_TYPE_NONE) { 705 ret = -EFAULT; 706 goto err; 707 } 708 709 buf_desc = &buf_info->descs[reg_type]; 710 711 if (buf_info->types[reg_type] == BUF_TYPE_GEM) { 712 struct exynos_drm_gem *exynos_gem; 713 714 exynos_gem = exynos_drm_gem_get(file, handle); 715 if (!exynos_gem) { 716 ret = -EFAULT; 717 goto err; 718 } 719 720 if (!g2d_check_buf_desc_is_valid(g2d, buf_desc, 721 reg_type, exynos_gem->size)) { 722 exynos_drm_gem_put(exynos_gem); 723 ret = -EFAULT; 724 goto err; 725 } 726 727 addr = &exynos_gem->dma_addr; 728 buf_info->obj[reg_type] = exynos_gem; 729 } else { 730 struct drm_exynos_g2d_userptr g2d_userptr; 731 732 if (copy_from_user(&g2d_userptr, (void __user *)handle, 733 sizeof(struct drm_exynos_g2d_userptr))) { 734 ret = -EFAULT; 735 goto err; 736 } 737 738 if (!g2d_check_buf_desc_is_valid(g2d, buf_desc, 739 reg_type, 740 g2d_userptr.size)) { 741 ret = -EFAULT; 742 goto err; 743 } 744 745 addr = g2d_userptr_get_dma_addr(g2d, 746 g2d_userptr.userptr, 747 g2d_userptr.size, 748 file, 749 &buf_info->obj[reg_type]); 750 if (IS_ERR(addr)) { 751 ret = -EFAULT; 752 goto err; 753 } 754 } 755 756 cmdlist->data[reg_pos + 1] = *addr; 757 buf_info->reg_types[i] = reg_type; 758 } 759 760 return 0; 761 762 err: 763 buf_info->map_nr = i; 764 return ret; 765 } 766 767 static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d, 768 struct g2d_cmdlist_node *node, 769 struct drm_file *filp) 770 { 771 struct g2d_buf_info *buf_info = &node->buf_info; 772 int i; 773 774 for (i = 0; i < buf_info->map_nr; i++) { 775 struct g2d_buf_desc *buf_desc; 776 enum g2d_reg_type reg_type; 777 void *obj; 778 779 reg_type = buf_info->reg_types[i]; 780 781 buf_desc = &buf_info->descs[reg_type]; 782 obj = buf_info->obj[reg_type]; 783 784 if (buf_info->types[reg_type] == BUF_TYPE_GEM) 785 exynos_drm_gem_put(obj); 786 else 787 g2d_userptr_put_dma_addr(g2d, obj, false); 788 789 buf_info->reg_types[i] = REG_TYPE_NONE; 790 buf_info->obj[reg_type] = NULL; 791 buf_info->types[reg_type] = 0; 792 memset(buf_desc, 0x00, sizeof(*buf_desc)); 793 } 794 795 buf_info->map_nr = 0; 796 } 797 798 static void g2d_dma_start(struct g2d_data *g2d, 799 struct g2d_runqueue_node *runqueue_node) 800 { 801 struct g2d_cmdlist_node *node = 802 list_first_entry(&runqueue_node->run_cmdlist, 803 struct g2d_cmdlist_node, list); 804 805 set_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags); 806 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR); 807 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND); 808 } 809 810 static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d) 811 { 812 struct g2d_runqueue_node *runqueue_node; 813 814 if (list_empty(&g2d->runqueue)) 815 return NULL; 816 817 runqueue_node = list_first_entry(&g2d->runqueue, 818 struct g2d_runqueue_node, list); 819 list_del_init(&runqueue_node->list); 820 return runqueue_node; 821 } 822 823 static void g2d_free_runqueue_node(struct g2d_data *g2d, 824 struct g2d_runqueue_node *runqueue_node) 825 { 826 struct g2d_cmdlist_node *node; 827 828 mutex_lock(&g2d->cmdlist_mutex); 829 /* 830 * commands in run_cmdlist have been completed so unmap all gem 831 * objects in each command node so that they are unreferenced. 832 */ 833 list_for_each_entry(node, &runqueue_node->run_cmdlist, list) 834 g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp); 835 list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist); 836 mutex_unlock(&g2d->cmdlist_mutex); 837 838 kmem_cache_free(g2d->runqueue_slab, runqueue_node); 839 } 840 841 /** 842 * g2d_remove_runqueue_nodes - remove items from the list of runqueue nodes 843 * @g2d: G2D state object 844 * @file: if not zero, only remove items with this DRM file 845 * 846 * Has to be called under runqueue lock. 847 */ 848 static void g2d_remove_runqueue_nodes(struct g2d_data *g2d, struct drm_file *file) 849 { 850 struct g2d_runqueue_node *node, *n; 851 852 if (list_empty(&g2d->runqueue)) 853 return; 854 855 list_for_each_entry_safe(node, n, &g2d->runqueue, list) { 856 if (file && node->filp != file) 857 continue; 858 859 list_del_init(&node->list); 860 g2d_free_runqueue_node(g2d, node); 861 } 862 } 863 864 static void g2d_runqueue_worker(struct work_struct *work) 865 { 866 struct g2d_data *g2d = container_of(work, struct g2d_data, 867 runqueue_work); 868 struct g2d_runqueue_node *runqueue_node; 869 870 /* 871 * The engine is busy and the completion of the current node is going 872 * to poke the runqueue worker, so nothing to do here. 873 */ 874 if (test_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags)) 875 return; 876 877 mutex_lock(&g2d->runqueue_mutex); 878 879 runqueue_node = g2d->runqueue_node; 880 g2d->runqueue_node = NULL; 881 882 if (runqueue_node) { 883 pm_runtime_mark_last_busy(g2d->dev); 884 pm_runtime_put_autosuspend(g2d->dev); 885 886 complete(&runqueue_node->complete); 887 if (runqueue_node->async) 888 g2d_free_runqueue_node(g2d, runqueue_node); 889 } 890 891 if (!test_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags)) { 892 g2d->runqueue_node = g2d_get_runqueue_node(g2d); 893 894 if (g2d->runqueue_node) { 895 int ret; 896 897 ret = pm_runtime_resume_and_get(g2d->dev); 898 if (ret < 0) { 899 dev_err(g2d->dev, "failed to enable G2D device.\n"); 900 return; 901 } 902 903 g2d_dma_start(g2d, g2d->runqueue_node); 904 } 905 } 906 907 mutex_unlock(&g2d->runqueue_mutex); 908 } 909 910 static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no) 911 { 912 struct drm_device *drm_dev = g2d->drm_dev; 913 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node; 914 struct drm_exynos_pending_g2d_event *e; 915 struct timespec64 now; 916 917 if (list_empty(&runqueue_node->event_list)) 918 return; 919 920 e = list_first_entry(&runqueue_node->event_list, 921 struct drm_exynos_pending_g2d_event, base.link); 922 923 ktime_get_ts64(&now); 924 e->event.tv_sec = now.tv_sec; 925 e->event.tv_usec = now.tv_nsec / NSEC_PER_USEC; 926 e->event.cmdlist_no = cmdlist_no; 927 928 drm_send_event(drm_dev, &e->base); 929 } 930 931 static irqreturn_t g2d_irq_handler(int irq, void *dev_id) 932 { 933 struct g2d_data *g2d = dev_id; 934 u32 pending; 935 936 pending = readl_relaxed(g2d->regs + G2D_INTC_PEND); 937 if (pending) 938 writel_relaxed(pending, g2d->regs + G2D_INTC_PEND); 939 940 if (pending & G2D_INTP_GCMD_FIN) { 941 u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS); 942 943 cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >> 944 G2D_DMA_LIST_DONE_COUNT_OFFSET; 945 946 g2d_finish_event(g2d, cmdlist_no); 947 948 writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD); 949 if (!(pending & G2D_INTP_ACMD_FIN)) { 950 writel_relaxed(G2D_DMA_CONTINUE, 951 g2d->regs + G2D_DMA_COMMAND); 952 } 953 } 954 955 if (pending & G2D_INTP_ACMD_FIN) { 956 clear_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags); 957 queue_work(g2d->g2d_workq, &g2d->runqueue_work); 958 } 959 960 return IRQ_HANDLED; 961 } 962 963 /** 964 * g2d_wait_finish - wait for the G2D engine to finish the current runqueue node 965 * @g2d: G2D state object 966 * @file: if not zero, only wait if the current runqueue node belongs 967 * to the DRM file 968 * 969 * Should the engine not become idle after a 100ms timeout, a hardware 970 * reset is issued. 971 */ 972 static void g2d_wait_finish(struct g2d_data *g2d, struct drm_file *file) 973 { 974 struct device *dev = g2d->dev; 975 976 struct g2d_runqueue_node *runqueue_node = NULL; 977 unsigned int tries = 10; 978 979 mutex_lock(&g2d->runqueue_mutex); 980 981 /* If no node is currently processed, we have nothing to do. */ 982 if (!g2d->runqueue_node) 983 goto out; 984 985 runqueue_node = g2d->runqueue_node; 986 987 /* Check if the currently processed item belongs to us. */ 988 if (file && runqueue_node->filp != file) 989 goto out; 990 991 mutex_unlock(&g2d->runqueue_mutex); 992 993 /* Wait for the G2D engine to finish. */ 994 while (tries-- && (g2d->runqueue_node == runqueue_node)) 995 mdelay(10); 996 997 mutex_lock(&g2d->runqueue_mutex); 998 999 if (g2d->runqueue_node != runqueue_node) 1000 goto out; 1001 1002 dev_err(dev, "wait timed out, resetting engine...\n"); 1003 g2d_hw_reset(g2d); 1004 1005 /* 1006 * After the hardware reset of the engine we are going to loose 1007 * the IRQ which triggers the PM runtime put(). 1008 * So do this manually here. 1009 */ 1010 pm_runtime_mark_last_busy(dev); 1011 pm_runtime_put_autosuspend(dev); 1012 1013 complete(&runqueue_node->complete); 1014 if (runqueue_node->async) 1015 g2d_free_runqueue_node(g2d, runqueue_node); 1016 1017 out: 1018 mutex_unlock(&g2d->runqueue_mutex); 1019 } 1020 1021 static int g2d_check_reg_offset(struct g2d_data *g2d, 1022 struct g2d_cmdlist_node *node, 1023 int nr, bool for_addr) 1024 { 1025 struct g2d_cmdlist *cmdlist = node->cmdlist; 1026 int reg_offset; 1027 int index; 1028 int i; 1029 1030 for (i = 0; i < nr; i++) { 1031 struct g2d_buf_info *buf_info = &node->buf_info; 1032 struct g2d_buf_desc *buf_desc; 1033 enum g2d_reg_type reg_type; 1034 unsigned long value; 1035 1036 index = cmdlist->last - 2 * (i + 1); 1037 1038 reg_offset = cmdlist->data[index] & ~0xfffff000; 1039 if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END) 1040 goto err; 1041 if (reg_offset % 4) 1042 goto err; 1043 1044 switch (reg_offset) { 1045 case G2D_SRC_BASE_ADDR: 1046 case G2D_SRC_PLANE2_BASE_ADDR: 1047 case G2D_DST_BASE_ADDR: 1048 case G2D_DST_PLANE2_BASE_ADDR: 1049 case G2D_PAT_BASE_ADDR: 1050 case G2D_MSK_BASE_ADDR: 1051 if (!for_addr) 1052 goto err; 1053 1054 reg_type = g2d_get_reg_type(g2d, reg_offset); 1055 1056 /* check userptr buffer type. */ 1057 if ((cmdlist->data[index] & ~0x7fffffff) >> 31) { 1058 buf_info->types[reg_type] = BUF_TYPE_USERPTR; 1059 cmdlist->data[index] &= ~G2D_BUF_USERPTR; 1060 } else 1061 buf_info->types[reg_type] = BUF_TYPE_GEM; 1062 break; 1063 case G2D_SRC_STRIDE: 1064 case G2D_DST_STRIDE: 1065 if (for_addr) 1066 goto err; 1067 1068 reg_type = g2d_get_reg_type(g2d, reg_offset); 1069 1070 buf_desc = &buf_info->descs[reg_type]; 1071 buf_desc->stride = cmdlist->data[index + 1]; 1072 break; 1073 case G2D_SRC_COLOR_MODE: 1074 case G2D_DST_COLOR_MODE: 1075 if (for_addr) 1076 goto err; 1077 1078 reg_type = g2d_get_reg_type(g2d, reg_offset); 1079 1080 buf_desc = &buf_info->descs[reg_type]; 1081 value = cmdlist->data[index + 1]; 1082 1083 buf_desc->format = value & 0xf; 1084 break; 1085 case G2D_SRC_LEFT_TOP: 1086 case G2D_DST_LEFT_TOP: 1087 if (for_addr) 1088 goto err; 1089 1090 reg_type = g2d_get_reg_type(g2d, reg_offset); 1091 1092 buf_desc = &buf_info->descs[reg_type]; 1093 value = cmdlist->data[index + 1]; 1094 1095 buf_desc->left_x = value & 0x1fff; 1096 buf_desc->top_y = (value & 0x1fff0000) >> 16; 1097 break; 1098 case G2D_SRC_RIGHT_BOTTOM: 1099 case G2D_DST_RIGHT_BOTTOM: 1100 if (for_addr) 1101 goto err; 1102 1103 reg_type = g2d_get_reg_type(g2d, reg_offset); 1104 1105 buf_desc = &buf_info->descs[reg_type]; 1106 value = cmdlist->data[index + 1]; 1107 1108 buf_desc->right_x = value & 0x1fff; 1109 buf_desc->bottom_y = (value & 0x1fff0000) >> 16; 1110 break; 1111 default: 1112 if (for_addr) 1113 goto err; 1114 break; 1115 } 1116 } 1117 1118 return 0; 1119 1120 err: 1121 dev_err(g2d->dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]); 1122 return -EINVAL; 1123 } 1124 1125 /* ioctl functions */ 1126 int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data, 1127 struct drm_file *file) 1128 { 1129 struct drm_exynos_g2d_get_ver *ver = data; 1130 1131 ver->major = G2D_HW_MAJOR_VER; 1132 ver->minor = G2D_HW_MINOR_VER; 1133 1134 return 0; 1135 } 1136 1137 int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data, 1138 struct drm_file *file) 1139 { 1140 struct drm_exynos_file_private *file_priv = file->driver_priv; 1141 struct exynos_drm_private *priv = drm_dev->dev_private; 1142 struct g2d_data *g2d = dev_get_drvdata(priv->g2d_dev); 1143 struct drm_exynos_g2d_set_cmdlist *req = data; 1144 struct drm_exynos_g2d_cmd *cmd; 1145 struct drm_exynos_pending_g2d_event *e; 1146 struct g2d_cmdlist_node *node; 1147 struct g2d_cmdlist *cmdlist; 1148 int size; 1149 int ret; 1150 1151 node = g2d_get_cmdlist(g2d); 1152 if (!node) 1153 return -ENOMEM; 1154 1155 /* 1156 * To avoid an integer overflow for the later size computations, we 1157 * enforce a maximum number of submitted commands here. This limit is 1158 * sufficient for all conceivable usage cases of the G2D. 1159 */ 1160 if (req->cmd_nr > G2D_CMDLIST_DATA_NUM || 1161 req->cmd_buf_nr > G2D_CMDLIST_DATA_NUM) { 1162 dev_err(g2d->dev, "number of submitted G2D commands exceeds limit\n"); 1163 return -EINVAL; 1164 } 1165 1166 node->event = NULL; 1167 1168 if (req->event_type != G2D_EVENT_NOT) { 1169 e = kzalloc(sizeof(*node->event), GFP_KERNEL); 1170 if (!e) { 1171 ret = -ENOMEM; 1172 goto err; 1173 } 1174 1175 e->event.base.type = DRM_EXYNOS_G2D_EVENT; 1176 e->event.base.length = sizeof(e->event); 1177 e->event.user_data = req->user_data; 1178 1179 ret = drm_event_reserve_init(drm_dev, file, &e->base, &e->event.base); 1180 if (ret) { 1181 kfree(e); 1182 goto err; 1183 } 1184 1185 node->event = e; 1186 } 1187 1188 cmdlist = node->cmdlist; 1189 1190 cmdlist->last = 0; 1191 1192 /* 1193 * If don't clear SFR registers, the cmdlist is affected by register 1194 * values of previous cmdlist. G2D hw executes SFR clear command and 1195 * a next command at the same time then the next command is ignored and 1196 * is executed rightly from next next command, so needs a dummy command 1197 * to next command of SFR clear command. 1198 */ 1199 cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET; 1200 cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR; 1201 cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR; 1202 cmdlist->data[cmdlist->last++] = 0; 1203 1204 /* 1205 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG 1206 * and GCF bit should be set to INTEN register if user wants 1207 * G2D interrupt event once current command list execution is 1208 * finished. 1209 * Otherwise only ACF bit should be set to INTEN register so 1210 * that one interrupt is occurred after all command lists 1211 * have been completed. 1212 */ 1213 if (node->event) { 1214 cmdlist->data[cmdlist->last++] = G2D_INTEN; 1215 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF; 1216 cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD; 1217 cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD; 1218 } else { 1219 cmdlist->data[cmdlist->last++] = G2D_INTEN; 1220 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF; 1221 } 1222 1223 /* 1224 * Check the size of cmdlist. The 2 that is added last comes from 1225 * the implicit G2D_BITBLT_START that is appended once we have 1226 * checked all the submitted commands. 1227 */ 1228 size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2; 1229 if (size > G2D_CMDLIST_DATA_NUM) { 1230 dev_err(g2d->dev, "cmdlist size is too big\n"); 1231 ret = -EINVAL; 1232 goto err_free_event; 1233 } 1234 1235 cmd = (struct drm_exynos_g2d_cmd *)(unsigned long)req->cmd; 1236 1237 if (copy_from_user(cmdlist->data + cmdlist->last, 1238 (void __user *)cmd, 1239 sizeof(*cmd) * req->cmd_nr)) { 1240 ret = -EFAULT; 1241 goto err_free_event; 1242 } 1243 cmdlist->last += req->cmd_nr * 2; 1244 1245 ret = g2d_check_reg_offset(g2d, node, req->cmd_nr, false); 1246 if (ret < 0) 1247 goto err_free_event; 1248 1249 node->buf_info.map_nr = req->cmd_buf_nr; 1250 if (req->cmd_buf_nr) { 1251 struct drm_exynos_g2d_cmd *cmd_buf; 1252 1253 cmd_buf = (struct drm_exynos_g2d_cmd *) 1254 (unsigned long)req->cmd_buf; 1255 1256 if (copy_from_user(cmdlist->data + cmdlist->last, 1257 (void __user *)cmd_buf, 1258 sizeof(*cmd_buf) * req->cmd_buf_nr)) { 1259 ret = -EFAULT; 1260 goto err_free_event; 1261 } 1262 cmdlist->last += req->cmd_buf_nr * 2; 1263 1264 ret = g2d_check_reg_offset(g2d, node, req->cmd_buf_nr, true); 1265 if (ret < 0) 1266 goto err_free_event; 1267 1268 ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file); 1269 if (ret < 0) 1270 goto err_unmap; 1271 } 1272 1273 cmdlist->data[cmdlist->last++] = G2D_BITBLT_START; 1274 cmdlist->data[cmdlist->last++] = G2D_START_BITBLT; 1275 1276 /* head */ 1277 cmdlist->head = cmdlist->last / 2; 1278 1279 /* tail */ 1280 cmdlist->data[cmdlist->last] = 0; 1281 1282 g2d_add_cmdlist_to_inuse(file_priv, node); 1283 1284 return 0; 1285 1286 err_unmap: 1287 g2d_unmap_cmdlist_gem(g2d, node, file); 1288 err_free_event: 1289 if (node->event) 1290 drm_event_cancel_free(drm_dev, &node->event->base); 1291 err: 1292 g2d_put_cmdlist(g2d, node); 1293 return ret; 1294 } 1295 1296 int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data, 1297 struct drm_file *file) 1298 { 1299 struct drm_exynos_file_private *file_priv = file->driver_priv; 1300 struct exynos_drm_private *priv = drm_dev->dev_private; 1301 struct g2d_data *g2d = dev_get_drvdata(priv->g2d_dev); 1302 struct drm_exynos_g2d_exec *req = data; 1303 struct g2d_runqueue_node *runqueue_node; 1304 struct list_head *run_cmdlist; 1305 struct list_head *event_list; 1306 1307 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL); 1308 if (!runqueue_node) 1309 return -ENOMEM; 1310 1311 run_cmdlist = &runqueue_node->run_cmdlist; 1312 event_list = &runqueue_node->event_list; 1313 INIT_LIST_HEAD(run_cmdlist); 1314 INIT_LIST_HEAD(event_list); 1315 init_completion(&runqueue_node->complete); 1316 runqueue_node->async = req->async; 1317 1318 list_splice_init(&file_priv->inuse_cmdlist, run_cmdlist); 1319 list_splice_init(&file_priv->event_list, event_list); 1320 1321 if (list_empty(run_cmdlist)) { 1322 dev_err(g2d->dev, "there is no inuse cmdlist\n"); 1323 kmem_cache_free(g2d->runqueue_slab, runqueue_node); 1324 return -EPERM; 1325 } 1326 1327 mutex_lock(&g2d->runqueue_mutex); 1328 runqueue_node->pid = current->pid; 1329 runqueue_node->filp = file; 1330 list_add_tail(&runqueue_node->list, &g2d->runqueue); 1331 mutex_unlock(&g2d->runqueue_mutex); 1332 1333 /* Let the runqueue know that there is work to do. */ 1334 queue_work(g2d->g2d_workq, &g2d->runqueue_work); 1335 1336 if (runqueue_node->async) 1337 goto out; 1338 1339 wait_for_completion(&runqueue_node->complete); 1340 g2d_free_runqueue_node(g2d, runqueue_node); 1341 1342 out: 1343 return 0; 1344 } 1345 1346 int g2d_open(struct drm_device *drm_dev, struct drm_file *file) 1347 { 1348 struct drm_exynos_file_private *file_priv = file->driver_priv; 1349 1350 INIT_LIST_HEAD(&file_priv->inuse_cmdlist); 1351 INIT_LIST_HEAD(&file_priv->event_list); 1352 INIT_LIST_HEAD(&file_priv->userptr_list); 1353 1354 return 0; 1355 } 1356 1357 void g2d_close(struct drm_device *drm_dev, struct drm_file *file) 1358 { 1359 struct drm_exynos_file_private *file_priv = file->driver_priv; 1360 struct exynos_drm_private *priv = drm_dev->dev_private; 1361 struct g2d_data *g2d; 1362 struct g2d_cmdlist_node *node, *n; 1363 1364 if (!priv->g2d_dev) 1365 return; 1366 1367 g2d = dev_get_drvdata(priv->g2d_dev); 1368 1369 /* Remove the runqueue nodes that belong to us. */ 1370 mutex_lock(&g2d->runqueue_mutex); 1371 g2d_remove_runqueue_nodes(g2d, file); 1372 mutex_unlock(&g2d->runqueue_mutex); 1373 1374 /* 1375 * Wait for the runqueue worker to finish its current node. 1376 * After this the engine should no longer be accessing any 1377 * memory belonging to us. 1378 */ 1379 g2d_wait_finish(g2d, file); 1380 1381 /* 1382 * Even after the engine is idle, there might still be stale cmdlists 1383 * (i.e. cmdlisst which we submitted but never executed) around, with 1384 * their corresponding GEM/userptr buffers. 1385 * Properly unmap these buffers here. 1386 */ 1387 mutex_lock(&g2d->cmdlist_mutex); 1388 list_for_each_entry_safe(node, n, &file_priv->inuse_cmdlist, list) { 1389 g2d_unmap_cmdlist_gem(g2d, node, file); 1390 list_move_tail(&node->list, &g2d->free_cmdlist); 1391 } 1392 mutex_unlock(&g2d->cmdlist_mutex); 1393 1394 /* release all g2d_userptr in pool. */ 1395 g2d_userptr_free_all(g2d, file); 1396 } 1397 1398 static int g2d_bind(struct device *dev, struct device *master, void *data) 1399 { 1400 struct g2d_data *g2d = dev_get_drvdata(dev); 1401 struct drm_device *drm_dev = data; 1402 struct exynos_drm_private *priv = drm_dev->dev_private; 1403 int ret; 1404 1405 g2d->drm_dev = drm_dev; 1406 1407 /* allocate dma-aware cmdlist buffer. */ 1408 ret = g2d_init_cmdlist(g2d); 1409 if (ret < 0) { 1410 dev_err(dev, "cmdlist init failed\n"); 1411 return ret; 1412 } 1413 1414 ret = exynos_drm_register_dma(drm_dev, dev, &g2d->dma_priv); 1415 if (ret < 0) { 1416 dev_err(dev, "failed to enable iommu.\n"); 1417 g2d_fini_cmdlist(g2d); 1418 return ret; 1419 } 1420 priv->g2d_dev = dev; 1421 1422 dev_info(dev, "The Exynos G2D (ver %d.%d) successfully registered.\n", 1423 G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER); 1424 return 0; 1425 } 1426 1427 static void g2d_unbind(struct device *dev, struct device *master, void *data) 1428 { 1429 struct g2d_data *g2d = dev_get_drvdata(dev); 1430 struct drm_device *drm_dev = data; 1431 struct exynos_drm_private *priv = drm_dev->dev_private; 1432 1433 /* Suspend operation and wait for engine idle. */ 1434 set_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags); 1435 g2d_wait_finish(g2d, NULL); 1436 priv->g2d_dev = NULL; 1437 1438 cancel_work_sync(&g2d->runqueue_work); 1439 exynos_drm_unregister_dma(g2d->drm_dev, dev, &g2d->dma_priv); 1440 } 1441 1442 static const struct component_ops g2d_component_ops = { 1443 .bind = g2d_bind, 1444 .unbind = g2d_unbind, 1445 }; 1446 1447 static int g2d_probe(struct platform_device *pdev) 1448 { 1449 struct device *dev = &pdev->dev; 1450 struct resource *res; 1451 struct g2d_data *g2d; 1452 int ret; 1453 1454 g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL); 1455 if (!g2d) 1456 return -ENOMEM; 1457 1458 g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab", 1459 sizeof(struct g2d_runqueue_node), 0, 0, NULL); 1460 if (!g2d->runqueue_slab) 1461 return -ENOMEM; 1462 1463 g2d->dev = dev; 1464 1465 g2d->g2d_workq = create_singlethread_workqueue("g2d"); 1466 if (!g2d->g2d_workq) { 1467 dev_err(dev, "failed to create workqueue\n"); 1468 ret = -EINVAL; 1469 goto err_destroy_slab; 1470 } 1471 1472 INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker); 1473 INIT_LIST_HEAD(&g2d->free_cmdlist); 1474 INIT_LIST_HEAD(&g2d->runqueue); 1475 1476 mutex_init(&g2d->cmdlist_mutex); 1477 mutex_init(&g2d->runqueue_mutex); 1478 1479 g2d->gate_clk = devm_clk_get(dev, "fimg2d"); 1480 if (IS_ERR(g2d->gate_clk)) { 1481 dev_err(dev, "failed to get gate clock\n"); 1482 ret = PTR_ERR(g2d->gate_clk); 1483 goto err_destroy_workqueue; 1484 } 1485 1486 pm_runtime_use_autosuspend(dev); 1487 pm_runtime_set_autosuspend_delay(dev, 2000); 1488 pm_runtime_enable(dev); 1489 clear_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags); 1490 clear_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags); 1491 1492 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1493 1494 g2d->regs = devm_ioremap_resource(dev, res); 1495 if (IS_ERR(g2d->regs)) { 1496 ret = PTR_ERR(g2d->regs); 1497 goto err_put_clk; 1498 } 1499 1500 g2d->irq = platform_get_irq(pdev, 0); 1501 if (g2d->irq < 0) { 1502 ret = g2d->irq; 1503 goto err_put_clk; 1504 } 1505 1506 ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0, 1507 "drm_g2d", g2d); 1508 if (ret < 0) { 1509 dev_err(dev, "irq request failed\n"); 1510 goto err_put_clk; 1511 } 1512 1513 g2d->max_pool = MAX_POOL; 1514 1515 platform_set_drvdata(pdev, g2d); 1516 1517 ret = component_add(dev, &g2d_component_ops); 1518 if (ret < 0) { 1519 dev_err(dev, "failed to register drm g2d device\n"); 1520 goto err_put_clk; 1521 } 1522 1523 return 0; 1524 1525 err_put_clk: 1526 pm_runtime_disable(dev); 1527 err_destroy_workqueue: 1528 destroy_workqueue(g2d->g2d_workq); 1529 err_destroy_slab: 1530 kmem_cache_destroy(g2d->runqueue_slab); 1531 return ret; 1532 } 1533 1534 static int g2d_remove(struct platform_device *pdev) 1535 { 1536 struct g2d_data *g2d = platform_get_drvdata(pdev); 1537 1538 component_del(&pdev->dev, &g2d_component_ops); 1539 1540 /* There should be no locking needed here. */ 1541 g2d_remove_runqueue_nodes(g2d, NULL); 1542 1543 pm_runtime_dont_use_autosuspend(&pdev->dev); 1544 pm_runtime_disable(&pdev->dev); 1545 1546 g2d_fini_cmdlist(g2d); 1547 destroy_workqueue(g2d->g2d_workq); 1548 kmem_cache_destroy(g2d->runqueue_slab); 1549 1550 return 0; 1551 } 1552 1553 #ifdef CONFIG_PM_SLEEP 1554 static int g2d_suspend(struct device *dev) 1555 { 1556 struct g2d_data *g2d = dev_get_drvdata(dev); 1557 1558 /* 1559 * Suspend the runqueue worker operation and wait until the G2D 1560 * engine is idle. 1561 */ 1562 set_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags); 1563 g2d_wait_finish(g2d, NULL); 1564 flush_work(&g2d->runqueue_work); 1565 1566 return 0; 1567 } 1568 1569 static int g2d_resume(struct device *dev) 1570 { 1571 struct g2d_data *g2d = dev_get_drvdata(dev); 1572 1573 clear_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags); 1574 queue_work(g2d->g2d_workq, &g2d->runqueue_work); 1575 1576 return 0; 1577 } 1578 #endif 1579 1580 #ifdef CONFIG_PM 1581 static int g2d_runtime_suspend(struct device *dev) 1582 { 1583 struct g2d_data *g2d = dev_get_drvdata(dev); 1584 1585 clk_disable_unprepare(g2d->gate_clk); 1586 1587 return 0; 1588 } 1589 1590 static int g2d_runtime_resume(struct device *dev) 1591 { 1592 struct g2d_data *g2d = dev_get_drvdata(dev); 1593 int ret; 1594 1595 ret = clk_prepare_enable(g2d->gate_clk); 1596 if (ret < 0) 1597 dev_warn(dev, "failed to enable clock.\n"); 1598 1599 return ret; 1600 } 1601 #endif 1602 1603 static const struct dev_pm_ops g2d_pm_ops = { 1604 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume) 1605 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL) 1606 }; 1607 1608 static const struct of_device_id exynos_g2d_match[] = { 1609 { .compatible = "samsung,exynos5250-g2d" }, 1610 { .compatible = "samsung,exynos4212-g2d" }, 1611 {}, 1612 }; 1613 MODULE_DEVICE_TABLE(of, exynos_g2d_match); 1614 1615 struct platform_driver g2d_driver = { 1616 .probe = g2d_probe, 1617 .remove = g2d_remove, 1618 .driver = { 1619 .name = "exynos-drm-g2d", 1620 .owner = THIS_MODULE, 1621 .pm = &g2d_pm_ops, 1622 .of_match_table = exynos_g2d_match, 1623 }, 1624 }; 1625