1 /* 2 * Copyright (C) 2012 Samsung Electronics Co.Ltd 3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundationr 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/clk.h> 12 #include <linux/err.h> 13 #include <linux/interrupt.h> 14 #include <linux/io.h> 15 #include <linux/platform_device.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/slab.h> 18 #include <linux/workqueue.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/dma-attrs.h> 21 #include <linux/of.h> 22 23 #include <drm/drmP.h> 24 #include <drm/exynos_drm.h> 25 #include "exynos_drm_drv.h" 26 #include "exynos_drm_gem.h" 27 #include "exynos_drm_iommu.h" 28 29 #define G2D_HW_MAJOR_VER 4 30 #define G2D_HW_MINOR_VER 1 31 32 /* vaild register range set from user: 0x0104 ~ 0x0880 */ 33 #define G2D_VALID_START 0x0104 34 #define G2D_VALID_END 0x0880 35 36 /* general registers */ 37 #define G2D_SOFT_RESET 0x0000 38 #define G2D_INTEN 0x0004 39 #define G2D_INTC_PEND 0x000C 40 #define G2D_DMA_SFR_BASE_ADDR 0x0080 41 #define G2D_DMA_COMMAND 0x0084 42 #define G2D_DMA_STATUS 0x008C 43 #define G2D_DMA_HOLD_CMD 0x0090 44 45 /* command registers */ 46 #define G2D_BITBLT_START 0x0100 47 48 /* registers for base address */ 49 #define G2D_SRC_BASE_ADDR 0x0304 50 #define G2D_SRC_COLOR_MODE 0x030C 51 #define G2D_SRC_LEFT_TOP 0x0310 52 #define G2D_SRC_RIGHT_BOTTOM 0x0314 53 #define G2D_SRC_PLANE2_BASE_ADDR 0x0318 54 #define G2D_DST_BASE_ADDR 0x0404 55 #define G2D_DST_COLOR_MODE 0x040C 56 #define G2D_DST_LEFT_TOP 0x0410 57 #define G2D_DST_RIGHT_BOTTOM 0x0414 58 #define G2D_DST_PLANE2_BASE_ADDR 0x0418 59 #define G2D_PAT_BASE_ADDR 0x0500 60 #define G2D_MSK_BASE_ADDR 0x0520 61 62 /* G2D_SOFT_RESET */ 63 #define G2D_SFRCLEAR (1 << 1) 64 #define G2D_R (1 << 0) 65 66 /* G2D_INTEN */ 67 #define G2D_INTEN_ACF (1 << 3) 68 #define G2D_INTEN_UCF (1 << 2) 69 #define G2D_INTEN_GCF (1 << 1) 70 #define G2D_INTEN_SCF (1 << 0) 71 72 /* G2D_INTC_PEND */ 73 #define G2D_INTP_ACMD_FIN (1 << 3) 74 #define G2D_INTP_UCMD_FIN (1 << 2) 75 #define G2D_INTP_GCMD_FIN (1 << 1) 76 #define G2D_INTP_SCMD_FIN (1 << 0) 77 78 /* G2D_DMA_COMMAND */ 79 #define G2D_DMA_HALT (1 << 2) 80 #define G2D_DMA_CONTINUE (1 << 1) 81 #define G2D_DMA_START (1 << 0) 82 83 /* G2D_DMA_STATUS */ 84 #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17) 85 #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1) 86 #define G2D_DMA_DONE (1 << 0) 87 #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17 88 89 /* G2D_DMA_HOLD_CMD */ 90 #define G2D_USER_HOLD (1 << 2) 91 #define G2D_LIST_HOLD (1 << 1) 92 #define G2D_BITBLT_HOLD (1 << 0) 93 94 /* G2D_BITBLT_START */ 95 #define G2D_START_CASESEL (1 << 2) 96 #define G2D_START_NHOLT (1 << 1) 97 #define G2D_START_BITBLT (1 << 0) 98 99 /* buffer color format */ 100 #define G2D_FMT_XRGB8888 0 101 #define G2D_FMT_ARGB8888 1 102 #define G2D_FMT_RGB565 2 103 #define G2D_FMT_XRGB1555 3 104 #define G2D_FMT_ARGB1555 4 105 #define G2D_FMT_XRGB4444 5 106 #define G2D_FMT_ARGB4444 6 107 #define G2D_FMT_PACKED_RGB888 7 108 #define G2D_FMT_A8 11 109 #define G2D_FMT_L8 12 110 111 /* buffer valid length */ 112 #define G2D_LEN_MIN 1 113 #define G2D_LEN_MAX 8000 114 115 #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4) 116 #define G2D_CMDLIST_NUM 64 117 #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM) 118 #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2) 119 120 /* maximum buffer pool size of userptr is 64MB as default */ 121 #define MAX_POOL (64 * 1024 * 1024) 122 123 enum { 124 BUF_TYPE_GEM = 1, 125 BUF_TYPE_USERPTR, 126 }; 127 128 enum g2d_reg_type { 129 REG_TYPE_NONE = -1, 130 REG_TYPE_SRC, 131 REG_TYPE_SRC_PLANE2, 132 REG_TYPE_DST, 133 REG_TYPE_DST_PLANE2, 134 REG_TYPE_PAT, 135 REG_TYPE_MSK, 136 MAX_REG_TYPE_NR 137 }; 138 139 /* cmdlist data structure */ 140 struct g2d_cmdlist { 141 u32 head; 142 unsigned long data[G2D_CMDLIST_DATA_NUM]; 143 u32 last; /* last data offset */ 144 }; 145 146 /* 147 * A structure of buffer description 148 * 149 * @format: color format 150 * @left_x: the x coordinates of left top corner 151 * @top_y: the y coordinates of left top corner 152 * @right_x: the x coordinates of right bottom corner 153 * @bottom_y: the y coordinates of right bottom corner 154 * 155 */ 156 struct g2d_buf_desc { 157 unsigned int format; 158 unsigned int left_x; 159 unsigned int top_y; 160 unsigned int right_x; 161 unsigned int bottom_y; 162 }; 163 164 /* 165 * A structure of buffer information 166 * 167 * @map_nr: manages the number of mapped buffers 168 * @reg_types: stores regitster type in the order of requested command 169 * @handles: stores buffer handle in its reg_type position 170 * @types: stores buffer type in its reg_type position 171 * @descs: stores buffer description in its reg_type position 172 * 173 */ 174 struct g2d_buf_info { 175 unsigned int map_nr; 176 enum g2d_reg_type reg_types[MAX_REG_TYPE_NR]; 177 unsigned long handles[MAX_REG_TYPE_NR]; 178 unsigned int types[MAX_REG_TYPE_NR]; 179 struct g2d_buf_desc descs[MAX_REG_TYPE_NR]; 180 }; 181 182 struct drm_exynos_pending_g2d_event { 183 struct drm_pending_event base; 184 struct drm_exynos_g2d_event event; 185 }; 186 187 struct g2d_cmdlist_userptr { 188 struct list_head list; 189 dma_addr_t dma_addr; 190 unsigned long userptr; 191 unsigned long size; 192 struct page **pages; 193 unsigned int npages; 194 struct sg_table *sgt; 195 struct vm_area_struct *vma; 196 atomic_t refcount; 197 bool in_pool; 198 bool out_of_list; 199 }; 200 struct g2d_cmdlist_node { 201 struct list_head list; 202 struct g2d_cmdlist *cmdlist; 203 dma_addr_t dma_addr; 204 struct g2d_buf_info buf_info; 205 206 struct drm_exynos_pending_g2d_event *event; 207 }; 208 209 struct g2d_runqueue_node { 210 struct list_head list; 211 struct list_head run_cmdlist; 212 struct list_head event_list; 213 struct drm_file *filp; 214 pid_t pid; 215 struct completion complete; 216 int async; 217 }; 218 219 struct g2d_data { 220 struct device *dev; 221 struct clk *gate_clk; 222 void __iomem *regs; 223 int irq; 224 struct workqueue_struct *g2d_workq; 225 struct work_struct runqueue_work; 226 struct exynos_drm_subdrv subdrv; 227 bool suspended; 228 229 /* cmdlist */ 230 struct g2d_cmdlist_node *cmdlist_node; 231 struct list_head free_cmdlist; 232 struct mutex cmdlist_mutex; 233 dma_addr_t cmdlist_pool; 234 void *cmdlist_pool_virt; 235 struct dma_attrs cmdlist_dma_attrs; 236 237 /* runqueue*/ 238 struct g2d_runqueue_node *runqueue_node; 239 struct list_head runqueue; 240 struct mutex runqueue_mutex; 241 struct kmem_cache *runqueue_slab; 242 243 unsigned long current_pool; 244 unsigned long max_pool; 245 }; 246 247 static int g2d_init_cmdlist(struct g2d_data *g2d) 248 { 249 struct device *dev = g2d->dev; 250 struct g2d_cmdlist_node *node = g2d->cmdlist_node; 251 struct exynos_drm_subdrv *subdrv = &g2d->subdrv; 252 int nr; 253 int ret; 254 struct g2d_buf_info *buf_info; 255 256 init_dma_attrs(&g2d->cmdlist_dma_attrs); 257 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs); 258 259 g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev, 260 G2D_CMDLIST_POOL_SIZE, 261 &g2d->cmdlist_pool, GFP_KERNEL, 262 &g2d->cmdlist_dma_attrs); 263 if (!g2d->cmdlist_pool_virt) { 264 dev_err(dev, "failed to allocate dma memory\n"); 265 return -ENOMEM; 266 } 267 268 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL); 269 if (!node) { 270 dev_err(dev, "failed to allocate memory\n"); 271 ret = -ENOMEM; 272 goto err; 273 } 274 275 for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) { 276 unsigned int i; 277 278 node[nr].cmdlist = 279 g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE; 280 node[nr].dma_addr = 281 g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE; 282 283 buf_info = &node[nr].buf_info; 284 for (i = 0; i < MAX_REG_TYPE_NR; i++) 285 buf_info->reg_types[i] = REG_TYPE_NONE; 286 287 list_add_tail(&node[nr].list, &g2d->free_cmdlist); 288 } 289 290 return 0; 291 292 err: 293 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE, 294 g2d->cmdlist_pool_virt, 295 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs); 296 return ret; 297 } 298 299 static void g2d_fini_cmdlist(struct g2d_data *g2d) 300 { 301 struct exynos_drm_subdrv *subdrv = &g2d->subdrv; 302 303 kfree(g2d->cmdlist_node); 304 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE, 305 g2d->cmdlist_pool_virt, 306 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs); 307 } 308 309 static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d) 310 { 311 struct device *dev = g2d->dev; 312 struct g2d_cmdlist_node *node; 313 314 mutex_lock(&g2d->cmdlist_mutex); 315 if (list_empty(&g2d->free_cmdlist)) { 316 dev_err(dev, "there is no free cmdlist\n"); 317 mutex_unlock(&g2d->cmdlist_mutex); 318 return NULL; 319 } 320 321 node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node, 322 list); 323 list_del_init(&node->list); 324 mutex_unlock(&g2d->cmdlist_mutex); 325 326 return node; 327 } 328 329 static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node) 330 { 331 mutex_lock(&g2d->cmdlist_mutex); 332 list_move_tail(&node->list, &g2d->free_cmdlist); 333 mutex_unlock(&g2d->cmdlist_mutex); 334 } 335 336 static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv, 337 struct g2d_cmdlist_node *node) 338 { 339 struct g2d_cmdlist_node *lnode; 340 341 if (list_empty(&g2d_priv->inuse_cmdlist)) 342 goto add_to_list; 343 344 /* this links to base address of new cmdlist */ 345 lnode = list_entry(g2d_priv->inuse_cmdlist.prev, 346 struct g2d_cmdlist_node, list); 347 lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr; 348 349 add_to_list: 350 list_add_tail(&node->list, &g2d_priv->inuse_cmdlist); 351 352 if (node->event) 353 list_add_tail(&node->event->base.link, &g2d_priv->event_list); 354 } 355 356 static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev, 357 unsigned long obj, 358 bool force) 359 { 360 struct g2d_cmdlist_userptr *g2d_userptr = 361 (struct g2d_cmdlist_userptr *)obj; 362 363 if (!obj) 364 return; 365 366 if (force) 367 goto out; 368 369 atomic_dec(&g2d_userptr->refcount); 370 371 if (atomic_read(&g2d_userptr->refcount) > 0) 372 return; 373 374 if (g2d_userptr->in_pool) 375 return; 376 377 out: 378 exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt, 379 DMA_BIDIRECTIONAL); 380 381 exynos_gem_put_pages_to_userptr(g2d_userptr->pages, 382 g2d_userptr->npages, 383 g2d_userptr->vma); 384 385 if (!g2d_userptr->out_of_list) 386 list_del_init(&g2d_userptr->list); 387 388 sg_free_table(g2d_userptr->sgt); 389 kfree(g2d_userptr->sgt); 390 391 drm_free_large(g2d_userptr->pages); 392 kfree(g2d_userptr); 393 } 394 395 static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev, 396 unsigned long userptr, 397 unsigned long size, 398 struct drm_file *filp, 399 unsigned long *obj) 400 { 401 struct drm_exynos_file_private *file_priv = filp->driver_priv; 402 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 403 struct g2d_cmdlist_userptr *g2d_userptr; 404 struct g2d_data *g2d; 405 struct page **pages; 406 struct sg_table *sgt; 407 struct vm_area_struct *vma; 408 unsigned long start, end; 409 unsigned int npages, offset; 410 int ret; 411 412 if (!size) { 413 DRM_ERROR("invalid userptr size.\n"); 414 return ERR_PTR(-EINVAL); 415 } 416 417 g2d = dev_get_drvdata(g2d_priv->dev); 418 419 /* check if userptr already exists in userptr_list. */ 420 list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) { 421 if (g2d_userptr->userptr == userptr) { 422 /* 423 * also check size because there could be same address 424 * and different size. 425 */ 426 if (g2d_userptr->size == size) { 427 atomic_inc(&g2d_userptr->refcount); 428 *obj = (unsigned long)g2d_userptr; 429 430 return &g2d_userptr->dma_addr; 431 } 432 433 /* 434 * at this moment, maybe g2d dma is accessing this 435 * g2d_userptr memory region so just remove this 436 * g2d_userptr object from userptr_list not to be 437 * referred again and also except it the userptr 438 * pool to be released after the dma access completion. 439 */ 440 g2d_userptr->out_of_list = true; 441 g2d_userptr->in_pool = false; 442 list_del_init(&g2d_userptr->list); 443 444 break; 445 } 446 } 447 448 g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL); 449 if (!g2d_userptr) { 450 DRM_ERROR("failed to allocate g2d_userptr.\n"); 451 return ERR_PTR(-ENOMEM); 452 } 453 454 atomic_set(&g2d_userptr->refcount, 1); 455 456 start = userptr & PAGE_MASK; 457 offset = userptr & ~PAGE_MASK; 458 end = PAGE_ALIGN(userptr + size); 459 npages = (end - start) >> PAGE_SHIFT; 460 g2d_userptr->npages = npages; 461 462 pages = drm_calloc_large(npages, sizeof(struct page *)); 463 if (!pages) { 464 DRM_ERROR("failed to allocate pages.\n"); 465 ret = -ENOMEM; 466 goto err_free; 467 } 468 469 vma = find_vma(current->mm, userptr); 470 if (!vma) { 471 DRM_ERROR("failed to get vm region.\n"); 472 ret = -EFAULT; 473 goto err_free_pages; 474 } 475 476 if (vma->vm_end < userptr + size) { 477 DRM_ERROR("vma is too small.\n"); 478 ret = -EFAULT; 479 goto err_free_pages; 480 } 481 482 g2d_userptr->vma = exynos_gem_get_vma(vma); 483 if (!g2d_userptr->vma) { 484 DRM_ERROR("failed to copy vma.\n"); 485 ret = -ENOMEM; 486 goto err_free_pages; 487 } 488 489 g2d_userptr->size = size; 490 491 ret = exynos_gem_get_pages_from_userptr(start & PAGE_MASK, 492 npages, pages, vma); 493 if (ret < 0) { 494 DRM_ERROR("failed to get user pages from userptr.\n"); 495 goto err_put_vma; 496 } 497 498 g2d_userptr->pages = pages; 499 500 sgt = kzalloc(sizeof(*sgt), GFP_KERNEL); 501 if (!sgt) { 502 DRM_ERROR("failed to allocate sg table.\n"); 503 ret = -ENOMEM; 504 goto err_free_userptr; 505 } 506 507 ret = sg_alloc_table_from_pages(sgt, pages, npages, offset, 508 size, GFP_KERNEL); 509 if (ret < 0) { 510 DRM_ERROR("failed to get sgt from pages.\n"); 511 goto err_free_sgt; 512 } 513 514 g2d_userptr->sgt = sgt; 515 516 ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt, 517 DMA_BIDIRECTIONAL); 518 if (ret < 0) { 519 DRM_ERROR("failed to map sgt with dma region.\n"); 520 goto err_sg_free_table; 521 } 522 523 g2d_userptr->dma_addr = sgt->sgl[0].dma_address; 524 g2d_userptr->userptr = userptr; 525 526 list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list); 527 528 if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) { 529 g2d->current_pool += npages << PAGE_SHIFT; 530 g2d_userptr->in_pool = true; 531 } 532 533 *obj = (unsigned long)g2d_userptr; 534 535 return &g2d_userptr->dma_addr; 536 537 err_sg_free_table: 538 sg_free_table(sgt); 539 540 err_free_sgt: 541 kfree(sgt); 542 543 err_free_userptr: 544 exynos_gem_put_pages_to_userptr(g2d_userptr->pages, 545 g2d_userptr->npages, 546 g2d_userptr->vma); 547 548 err_put_vma: 549 exynos_gem_put_vma(g2d_userptr->vma); 550 551 err_free_pages: 552 drm_free_large(pages); 553 554 err_free: 555 kfree(g2d_userptr); 556 557 return ERR_PTR(ret); 558 } 559 560 static void g2d_userptr_free_all(struct drm_device *drm_dev, 561 struct g2d_data *g2d, 562 struct drm_file *filp) 563 { 564 struct drm_exynos_file_private *file_priv = filp->driver_priv; 565 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 566 struct g2d_cmdlist_userptr *g2d_userptr, *n; 567 568 list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list) 569 if (g2d_userptr->in_pool) 570 g2d_userptr_put_dma_addr(drm_dev, 571 (unsigned long)g2d_userptr, 572 true); 573 574 g2d->current_pool = 0; 575 } 576 577 static enum g2d_reg_type g2d_get_reg_type(int reg_offset) 578 { 579 enum g2d_reg_type reg_type; 580 581 switch (reg_offset) { 582 case G2D_SRC_BASE_ADDR: 583 case G2D_SRC_COLOR_MODE: 584 case G2D_SRC_LEFT_TOP: 585 case G2D_SRC_RIGHT_BOTTOM: 586 reg_type = REG_TYPE_SRC; 587 break; 588 case G2D_SRC_PLANE2_BASE_ADDR: 589 reg_type = REG_TYPE_SRC_PLANE2; 590 break; 591 case G2D_DST_BASE_ADDR: 592 case G2D_DST_COLOR_MODE: 593 case G2D_DST_LEFT_TOP: 594 case G2D_DST_RIGHT_BOTTOM: 595 reg_type = REG_TYPE_DST; 596 break; 597 case G2D_DST_PLANE2_BASE_ADDR: 598 reg_type = REG_TYPE_DST_PLANE2; 599 break; 600 case G2D_PAT_BASE_ADDR: 601 reg_type = REG_TYPE_PAT; 602 break; 603 case G2D_MSK_BASE_ADDR: 604 reg_type = REG_TYPE_MSK; 605 break; 606 default: 607 reg_type = REG_TYPE_NONE; 608 DRM_ERROR("Unknown register offset![%d]\n", reg_offset); 609 break; 610 }; 611 612 return reg_type; 613 } 614 615 static unsigned long g2d_get_buf_bpp(unsigned int format) 616 { 617 unsigned long bpp; 618 619 switch (format) { 620 case G2D_FMT_XRGB8888: 621 case G2D_FMT_ARGB8888: 622 bpp = 4; 623 break; 624 case G2D_FMT_RGB565: 625 case G2D_FMT_XRGB1555: 626 case G2D_FMT_ARGB1555: 627 case G2D_FMT_XRGB4444: 628 case G2D_FMT_ARGB4444: 629 bpp = 2; 630 break; 631 case G2D_FMT_PACKED_RGB888: 632 bpp = 3; 633 break; 634 default: 635 bpp = 1; 636 break; 637 } 638 639 return bpp; 640 } 641 642 static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc, 643 enum g2d_reg_type reg_type, 644 unsigned long size) 645 { 646 unsigned int width, height; 647 unsigned long area; 648 649 /* 650 * check source and destination buffers only. 651 * so the others are always valid. 652 */ 653 if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST) 654 return true; 655 656 width = buf_desc->right_x - buf_desc->left_x; 657 if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) { 658 DRM_ERROR("width[%u] is out of range!\n", width); 659 return false; 660 } 661 662 height = buf_desc->bottom_y - buf_desc->top_y; 663 if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) { 664 DRM_ERROR("height[%u] is out of range!\n", height); 665 return false; 666 } 667 668 area = (unsigned long)width * (unsigned long)height * 669 g2d_get_buf_bpp(buf_desc->format); 670 if (area > size) { 671 DRM_ERROR("area[%lu] is out of range[%lu]!\n", area, size); 672 return false; 673 } 674 675 return true; 676 } 677 678 static int g2d_map_cmdlist_gem(struct g2d_data *g2d, 679 struct g2d_cmdlist_node *node, 680 struct drm_device *drm_dev, 681 struct drm_file *file) 682 { 683 struct g2d_cmdlist *cmdlist = node->cmdlist; 684 struct g2d_buf_info *buf_info = &node->buf_info; 685 int offset; 686 int ret; 687 int i; 688 689 for (i = 0; i < buf_info->map_nr; i++) { 690 struct g2d_buf_desc *buf_desc; 691 enum g2d_reg_type reg_type; 692 int reg_pos; 693 unsigned long handle; 694 dma_addr_t *addr; 695 696 reg_pos = cmdlist->last - 2 * (i + 1); 697 698 offset = cmdlist->data[reg_pos]; 699 handle = cmdlist->data[reg_pos + 1]; 700 701 reg_type = g2d_get_reg_type(offset); 702 if (reg_type == REG_TYPE_NONE) { 703 ret = -EFAULT; 704 goto err; 705 } 706 707 buf_desc = &buf_info->descs[reg_type]; 708 709 if (buf_info->types[reg_type] == BUF_TYPE_GEM) { 710 unsigned long size; 711 712 size = exynos_drm_gem_get_size(drm_dev, handle, file); 713 if (!size) { 714 ret = -EFAULT; 715 goto err; 716 } 717 718 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type, 719 size)) { 720 ret = -EFAULT; 721 goto err; 722 } 723 724 addr = exynos_drm_gem_get_dma_addr(drm_dev, handle, 725 file); 726 if (IS_ERR(addr)) { 727 ret = -EFAULT; 728 goto err; 729 } 730 } else { 731 struct drm_exynos_g2d_userptr g2d_userptr; 732 733 if (copy_from_user(&g2d_userptr, (void __user *)handle, 734 sizeof(struct drm_exynos_g2d_userptr))) { 735 ret = -EFAULT; 736 goto err; 737 } 738 739 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type, 740 g2d_userptr.size)) { 741 ret = -EFAULT; 742 goto err; 743 } 744 745 addr = g2d_userptr_get_dma_addr(drm_dev, 746 g2d_userptr.userptr, 747 g2d_userptr.size, 748 file, 749 &handle); 750 if (IS_ERR(addr)) { 751 ret = -EFAULT; 752 goto err; 753 } 754 } 755 756 cmdlist->data[reg_pos + 1] = *addr; 757 buf_info->reg_types[i] = reg_type; 758 buf_info->handles[reg_type] = handle; 759 } 760 761 return 0; 762 763 err: 764 buf_info->map_nr = i; 765 return ret; 766 } 767 768 static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d, 769 struct g2d_cmdlist_node *node, 770 struct drm_file *filp) 771 { 772 struct exynos_drm_subdrv *subdrv = &g2d->subdrv; 773 struct g2d_buf_info *buf_info = &node->buf_info; 774 int i; 775 776 for (i = 0; i < buf_info->map_nr; i++) { 777 struct g2d_buf_desc *buf_desc; 778 enum g2d_reg_type reg_type; 779 unsigned long handle; 780 781 reg_type = buf_info->reg_types[i]; 782 783 buf_desc = &buf_info->descs[reg_type]; 784 handle = buf_info->handles[reg_type]; 785 786 if (buf_info->types[reg_type] == BUF_TYPE_GEM) 787 exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle, 788 filp); 789 else 790 g2d_userptr_put_dma_addr(subdrv->drm_dev, handle, 791 false); 792 793 buf_info->reg_types[i] = REG_TYPE_NONE; 794 buf_info->handles[reg_type] = 0; 795 buf_info->types[reg_type] = 0; 796 memset(buf_desc, 0x00, sizeof(*buf_desc)); 797 } 798 799 buf_info->map_nr = 0; 800 } 801 802 static void g2d_dma_start(struct g2d_data *g2d, 803 struct g2d_runqueue_node *runqueue_node) 804 { 805 struct g2d_cmdlist_node *node = 806 list_first_entry(&runqueue_node->run_cmdlist, 807 struct g2d_cmdlist_node, list); 808 int ret; 809 810 ret = pm_runtime_get_sync(g2d->dev); 811 if (ret < 0) { 812 dev_warn(g2d->dev, "failed pm power on.\n"); 813 return; 814 } 815 816 ret = clk_prepare_enable(g2d->gate_clk); 817 if (ret < 0) { 818 dev_warn(g2d->dev, "failed to enable clock.\n"); 819 pm_runtime_put_sync(g2d->dev); 820 return; 821 } 822 823 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR); 824 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND); 825 } 826 827 static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d) 828 { 829 struct g2d_runqueue_node *runqueue_node; 830 831 if (list_empty(&g2d->runqueue)) 832 return NULL; 833 834 runqueue_node = list_first_entry(&g2d->runqueue, 835 struct g2d_runqueue_node, list); 836 list_del_init(&runqueue_node->list); 837 return runqueue_node; 838 } 839 840 static void g2d_free_runqueue_node(struct g2d_data *g2d, 841 struct g2d_runqueue_node *runqueue_node) 842 { 843 struct g2d_cmdlist_node *node; 844 845 if (!runqueue_node) 846 return; 847 848 mutex_lock(&g2d->cmdlist_mutex); 849 /* 850 * commands in run_cmdlist have been completed so unmap all gem 851 * objects in each command node so that they are unreferenced. 852 */ 853 list_for_each_entry(node, &runqueue_node->run_cmdlist, list) 854 g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp); 855 list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist); 856 mutex_unlock(&g2d->cmdlist_mutex); 857 858 kmem_cache_free(g2d->runqueue_slab, runqueue_node); 859 } 860 861 static void g2d_exec_runqueue(struct g2d_data *g2d) 862 { 863 g2d->runqueue_node = g2d_get_runqueue_node(g2d); 864 if (g2d->runqueue_node) 865 g2d_dma_start(g2d, g2d->runqueue_node); 866 } 867 868 static void g2d_runqueue_worker(struct work_struct *work) 869 { 870 struct g2d_data *g2d = container_of(work, struct g2d_data, 871 runqueue_work); 872 873 mutex_lock(&g2d->runqueue_mutex); 874 clk_disable_unprepare(g2d->gate_clk); 875 pm_runtime_put_sync(g2d->dev); 876 877 complete(&g2d->runqueue_node->complete); 878 if (g2d->runqueue_node->async) 879 g2d_free_runqueue_node(g2d, g2d->runqueue_node); 880 881 if (g2d->suspended) 882 g2d->runqueue_node = NULL; 883 else 884 g2d_exec_runqueue(g2d); 885 mutex_unlock(&g2d->runqueue_mutex); 886 } 887 888 static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no) 889 { 890 struct drm_device *drm_dev = g2d->subdrv.drm_dev; 891 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node; 892 struct drm_exynos_pending_g2d_event *e; 893 struct timeval now; 894 unsigned long flags; 895 896 if (list_empty(&runqueue_node->event_list)) 897 return; 898 899 e = list_first_entry(&runqueue_node->event_list, 900 struct drm_exynos_pending_g2d_event, base.link); 901 902 do_gettimeofday(&now); 903 e->event.tv_sec = now.tv_sec; 904 e->event.tv_usec = now.tv_usec; 905 e->event.cmdlist_no = cmdlist_no; 906 907 spin_lock_irqsave(&drm_dev->event_lock, flags); 908 list_move_tail(&e->base.link, &e->base.file_priv->event_list); 909 wake_up_interruptible(&e->base.file_priv->event_wait); 910 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 911 } 912 913 static irqreturn_t g2d_irq_handler(int irq, void *dev_id) 914 { 915 struct g2d_data *g2d = dev_id; 916 u32 pending; 917 918 pending = readl_relaxed(g2d->regs + G2D_INTC_PEND); 919 if (pending) 920 writel_relaxed(pending, g2d->regs + G2D_INTC_PEND); 921 922 if (pending & G2D_INTP_GCMD_FIN) { 923 u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS); 924 925 cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >> 926 G2D_DMA_LIST_DONE_COUNT_OFFSET; 927 928 g2d_finish_event(g2d, cmdlist_no); 929 930 writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD); 931 if (!(pending & G2D_INTP_ACMD_FIN)) { 932 writel_relaxed(G2D_DMA_CONTINUE, 933 g2d->regs + G2D_DMA_COMMAND); 934 } 935 } 936 937 if (pending & G2D_INTP_ACMD_FIN) 938 queue_work(g2d->g2d_workq, &g2d->runqueue_work); 939 940 return IRQ_HANDLED; 941 } 942 943 static int g2d_check_reg_offset(struct device *dev, 944 struct g2d_cmdlist_node *node, 945 int nr, bool for_addr) 946 { 947 struct g2d_cmdlist *cmdlist = node->cmdlist; 948 int reg_offset; 949 int index; 950 int i; 951 952 for (i = 0; i < nr; i++) { 953 struct g2d_buf_info *buf_info = &node->buf_info; 954 struct g2d_buf_desc *buf_desc; 955 enum g2d_reg_type reg_type; 956 unsigned long value; 957 958 index = cmdlist->last - 2 * (i + 1); 959 960 reg_offset = cmdlist->data[index] & ~0xfffff000; 961 if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END) 962 goto err; 963 if (reg_offset % 4) 964 goto err; 965 966 switch (reg_offset) { 967 case G2D_SRC_BASE_ADDR: 968 case G2D_SRC_PLANE2_BASE_ADDR: 969 case G2D_DST_BASE_ADDR: 970 case G2D_DST_PLANE2_BASE_ADDR: 971 case G2D_PAT_BASE_ADDR: 972 case G2D_MSK_BASE_ADDR: 973 if (!for_addr) 974 goto err; 975 976 reg_type = g2d_get_reg_type(reg_offset); 977 if (reg_type == REG_TYPE_NONE) 978 goto err; 979 980 /* check userptr buffer type. */ 981 if ((cmdlist->data[index] & ~0x7fffffff) >> 31) { 982 buf_info->types[reg_type] = BUF_TYPE_USERPTR; 983 cmdlist->data[index] &= ~G2D_BUF_USERPTR; 984 } else 985 buf_info->types[reg_type] = BUF_TYPE_GEM; 986 break; 987 case G2D_SRC_COLOR_MODE: 988 case G2D_DST_COLOR_MODE: 989 if (for_addr) 990 goto err; 991 992 reg_type = g2d_get_reg_type(reg_offset); 993 if (reg_type == REG_TYPE_NONE) 994 goto err; 995 996 buf_desc = &buf_info->descs[reg_type]; 997 value = cmdlist->data[index + 1]; 998 999 buf_desc->format = value & 0xf; 1000 break; 1001 case G2D_SRC_LEFT_TOP: 1002 case G2D_DST_LEFT_TOP: 1003 if (for_addr) 1004 goto err; 1005 1006 reg_type = g2d_get_reg_type(reg_offset); 1007 if (reg_type == REG_TYPE_NONE) 1008 goto err; 1009 1010 buf_desc = &buf_info->descs[reg_type]; 1011 value = cmdlist->data[index + 1]; 1012 1013 buf_desc->left_x = value & 0x1fff; 1014 buf_desc->top_y = (value & 0x1fff0000) >> 16; 1015 break; 1016 case G2D_SRC_RIGHT_BOTTOM: 1017 case G2D_DST_RIGHT_BOTTOM: 1018 if (for_addr) 1019 goto err; 1020 1021 reg_type = g2d_get_reg_type(reg_offset); 1022 if (reg_type == REG_TYPE_NONE) 1023 goto err; 1024 1025 buf_desc = &buf_info->descs[reg_type]; 1026 value = cmdlist->data[index + 1]; 1027 1028 buf_desc->right_x = value & 0x1fff; 1029 buf_desc->bottom_y = (value & 0x1fff0000) >> 16; 1030 break; 1031 default: 1032 if (for_addr) 1033 goto err; 1034 break; 1035 } 1036 } 1037 1038 return 0; 1039 1040 err: 1041 dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]); 1042 return -EINVAL; 1043 } 1044 1045 /* ioctl functions */ 1046 int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data, 1047 struct drm_file *file) 1048 { 1049 struct drm_exynos_g2d_get_ver *ver = data; 1050 1051 ver->major = G2D_HW_MAJOR_VER; 1052 ver->minor = G2D_HW_MINOR_VER; 1053 1054 return 0; 1055 } 1056 EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl); 1057 1058 int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data, 1059 struct drm_file *file) 1060 { 1061 struct drm_exynos_file_private *file_priv = file->driver_priv; 1062 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 1063 struct device *dev = g2d_priv->dev; 1064 struct g2d_data *g2d; 1065 struct drm_exynos_g2d_set_cmdlist *req = data; 1066 struct drm_exynos_g2d_cmd *cmd; 1067 struct drm_exynos_pending_g2d_event *e; 1068 struct g2d_cmdlist_node *node; 1069 struct g2d_cmdlist *cmdlist; 1070 unsigned long flags; 1071 int size; 1072 int ret; 1073 1074 if (!dev) 1075 return -ENODEV; 1076 1077 g2d = dev_get_drvdata(dev); 1078 if (!g2d) 1079 return -EFAULT; 1080 1081 node = g2d_get_cmdlist(g2d); 1082 if (!node) 1083 return -ENOMEM; 1084 1085 node->event = NULL; 1086 1087 if (req->event_type != G2D_EVENT_NOT) { 1088 spin_lock_irqsave(&drm_dev->event_lock, flags); 1089 if (file->event_space < sizeof(e->event)) { 1090 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 1091 ret = -ENOMEM; 1092 goto err; 1093 } 1094 file->event_space -= sizeof(e->event); 1095 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 1096 1097 e = kzalloc(sizeof(*node->event), GFP_KERNEL); 1098 if (!e) { 1099 dev_err(dev, "failed to allocate event\n"); 1100 1101 spin_lock_irqsave(&drm_dev->event_lock, flags); 1102 file->event_space += sizeof(e->event); 1103 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 1104 1105 ret = -ENOMEM; 1106 goto err; 1107 } 1108 1109 e->event.base.type = DRM_EXYNOS_G2D_EVENT; 1110 e->event.base.length = sizeof(e->event); 1111 e->event.user_data = req->user_data; 1112 e->base.event = &e->event.base; 1113 e->base.file_priv = file; 1114 e->base.destroy = (void (*) (struct drm_pending_event *)) kfree; 1115 1116 node->event = e; 1117 } 1118 1119 cmdlist = node->cmdlist; 1120 1121 cmdlist->last = 0; 1122 1123 /* 1124 * If don't clear SFR registers, the cmdlist is affected by register 1125 * values of previous cmdlist. G2D hw executes SFR clear command and 1126 * a next command at the same time then the next command is ignored and 1127 * is executed rightly from next next command, so needs a dummy command 1128 * to next command of SFR clear command. 1129 */ 1130 cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET; 1131 cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR; 1132 cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR; 1133 cmdlist->data[cmdlist->last++] = 0; 1134 1135 /* 1136 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG 1137 * and GCF bit should be set to INTEN register if user wants 1138 * G2D interrupt event once current command list execution is 1139 * finished. 1140 * Otherwise only ACF bit should be set to INTEN register so 1141 * that one interrupt is occured after all command lists 1142 * have been completed. 1143 */ 1144 if (node->event) { 1145 cmdlist->data[cmdlist->last++] = G2D_INTEN; 1146 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF; 1147 cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD; 1148 cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD; 1149 } else { 1150 cmdlist->data[cmdlist->last++] = G2D_INTEN; 1151 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF; 1152 } 1153 1154 /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */ 1155 size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2; 1156 if (size > G2D_CMDLIST_DATA_NUM) { 1157 dev_err(dev, "cmdlist size is too big\n"); 1158 ret = -EINVAL; 1159 goto err_free_event; 1160 } 1161 1162 cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd; 1163 1164 if (copy_from_user(cmdlist->data + cmdlist->last, 1165 (void __user *)cmd, 1166 sizeof(*cmd) * req->cmd_nr)) { 1167 ret = -EFAULT; 1168 goto err_free_event; 1169 } 1170 cmdlist->last += req->cmd_nr * 2; 1171 1172 ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false); 1173 if (ret < 0) 1174 goto err_free_event; 1175 1176 node->buf_info.map_nr = req->cmd_buf_nr; 1177 if (req->cmd_buf_nr) { 1178 struct drm_exynos_g2d_cmd *cmd_buf; 1179 1180 cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf; 1181 1182 if (copy_from_user(cmdlist->data + cmdlist->last, 1183 (void __user *)cmd_buf, 1184 sizeof(*cmd_buf) * req->cmd_buf_nr)) { 1185 ret = -EFAULT; 1186 goto err_free_event; 1187 } 1188 cmdlist->last += req->cmd_buf_nr * 2; 1189 1190 ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true); 1191 if (ret < 0) 1192 goto err_free_event; 1193 1194 ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file); 1195 if (ret < 0) 1196 goto err_unmap; 1197 } 1198 1199 cmdlist->data[cmdlist->last++] = G2D_BITBLT_START; 1200 cmdlist->data[cmdlist->last++] = G2D_START_BITBLT; 1201 1202 /* head */ 1203 cmdlist->head = cmdlist->last / 2; 1204 1205 /* tail */ 1206 cmdlist->data[cmdlist->last] = 0; 1207 1208 g2d_add_cmdlist_to_inuse(g2d_priv, node); 1209 1210 return 0; 1211 1212 err_unmap: 1213 g2d_unmap_cmdlist_gem(g2d, node, file); 1214 err_free_event: 1215 if (node->event) { 1216 spin_lock_irqsave(&drm_dev->event_lock, flags); 1217 file->event_space += sizeof(e->event); 1218 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 1219 kfree(node->event); 1220 } 1221 err: 1222 g2d_put_cmdlist(g2d, node); 1223 return ret; 1224 } 1225 EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl); 1226 1227 int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data, 1228 struct drm_file *file) 1229 { 1230 struct drm_exynos_file_private *file_priv = file->driver_priv; 1231 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 1232 struct device *dev = g2d_priv->dev; 1233 struct g2d_data *g2d; 1234 struct drm_exynos_g2d_exec *req = data; 1235 struct g2d_runqueue_node *runqueue_node; 1236 struct list_head *run_cmdlist; 1237 struct list_head *event_list; 1238 1239 if (!dev) 1240 return -ENODEV; 1241 1242 g2d = dev_get_drvdata(dev); 1243 if (!g2d) 1244 return -EFAULT; 1245 1246 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL); 1247 if (!runqueue_node) { 1248 dev_err(dev, "failed to allocate memory\n"); 1249 return -ENOMEM; 1250 } 1251 run_cmdlist = &runqueue_node->run_cmdlist; 1252 event_list = &runqueue_node->event_list; 1253 INIT_LIST_HEAD(run_cmdlist); 1254 INIT_LIST_HEAD(event_list); 1255 init_completion(&runqueue_node->complete); 1256 runqueue_node->async = req->async; 1257 1258 list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist); 1259 list_splice_init(&g2d_priv->event_list, event_list); 1260 1261 if (list_empty(run_cmdlist)) { 1262 dev_err(dev, "there is no inuse cmdlist\n"); 1263 kmem_cache_free(g2d->runqueue_slab, runqueue_node); 1264 return -EPERM; 1265 } 1266 1267 mutex_lock(&g2d->runqueue_mutex); 1268 runqueue_node->pid = current->pid; 1269 runqueue_node->filp = file; 1270 list_add_tail(&runqueue_node->list, &g2d->runqueue); 1271 if (!g2d->runqueue_node) 1272 g2d_exec_runqueue(g2d); 1273 mutex_unlock(&g2d->runqueue_mutex); 1274 1275 if (runqueue_node->async) 1276 goto out; 1277 1278 wait_for_completion(&runqueue_node->complete); 1279 g2d_free_runqueue_node(g2d, runqueue_node); 1280 1281 out: 1282 return 0; 1283 } 1284 EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl); 1285 1286 static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev) 1287 { 1288 struct g2d_data *g2d; 1289 int ret; 1290 1291 g2d = dev_get_drvdata(dev); 1292 if (!g2d) 1293 return -EFAULT; 1294 1295 /* allocate dma-aware cmdlist buffer. */ 1296 ret = g2d_init_cmdlist(g2d); 1297 if (ret < 0) { 1298 dev_err(dev, "cmdlist init failed\n"); 1299 return ret; 1300 } 1301 1302 if (!is_drm_iommu_supported(drm_dev)) 1303 return 0; 1304 1305 ret = drm_iommu_attach_device(drm_dev, dev); 1306 if (ret < 0) { 1307 dev_err(dev, "failed to enable iommu.\n"); 1308 g2d_fini_cmdlist(g2d); 1309 } 1310 1311 return ret; 1312 1313 } 1314 1315 static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev) 1316 { 1317 if (!is_drm_iommu_supported(drm_dev)) 1318 return; 1319 1320 drm_iommu_detach_device(drm_dev, dev); 1321 } 1322 1323 static int g2d_open(struct drm_device *drm_dev, struct device *dev, 1324 struct drm_file *file) 1325 { 1326 struct drm_exynos_file_private *file_priv = file->driver_priv; 1327 struct exynos_drm_g2d_private *g2d_priv; 1328 1329 g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL); 1330 if (!g2d_priv) { 1331 dev_err(dev, "failed to allocate g2d private data\n"); 1332 return -ENOMEM; 1333 } 1334 1335 g2d_priv->dev = dev; 1336 file_priv->g2d_priv = g2d_priv; 1337 1338 INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist); 1339 INIT_LIST_HEAD(&g2d_priv->event_list); 1340 INIT_LIST_HEAD(&g2d_priv->userptr_list); 1341 1342 return 0; 1343 } 1344 1345 static void g2d_close(struct drm_device *drm_dev, struct device *dev, 1346 struct drm_file *file) 1347 { 1348 struct drm_exynos_file_private *file_priv = file->driver_priv; 1349 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; 1350 struct g2d_data *g2d; 1351 struct g2d_cmdlist_node *node, *n; 1352 1353 if (!dev) 1354 return; 1355 1356 g2d = dev_get_drvdata(dev); 1357 if (!g2d) 1358 return; 1359 1360 mutex_lock(&g2d->cmdlist_mutex); 1361 list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) { 1362 /* 1363 * unmap all gem objects not completed. 1364 * 1365 * P.S. if current process was terminated forcely then 1366 * there may be some commands in inuse_cmdlist so unmap 1367 * them. 1368 */ 1369 g2d_unmap_cmdlist_gem(g2d, node, file); 1370 list_move_tail(&node->list, &g2d->free_cmdlist); 1371 } 1372 mutex_unlock(&g2d->cmdlist_mutex); 1373 1374 /* release all g2d_userptr in pool. */ 1375 g2d_userptr_free_all(drm_dev, g2d, file); 1376 1377 kfree(file_priv->g2d_priv); 1378 } 1379 1380 static int g2d_probe(struct platform_device *pdev) 1381 { 1382 struct device *dev = &pdev->dev; 1383 struct resource *res; 1384 struct g2d_data *g2d; 1385 struct exynos_drm_subdrv *subdrv; 1386 int ret; 1387 1388 g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL); 1389 if (!g2d) { 1390 dev_err(dev, "failed to allocate driver data\n"); 1391 return -ENOMEM; 1392 } 1393 1394 g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab", 1395 sizeof(struct g2d_runqueue_node), 0, 0, NULL); 1396 if (!g2d->runqueue_slab) 1397 return -ENOMEM; 1398 1399 g2d->dev = dev; 1400 1401 g2d->g2d_workq = create_singlethread_workqueue("g2d"); 1402 if (!g2d->g2d_workq) { 1403 dev_err(dev, "failed to create workqueue\n"); 1404 ret = -EINVAL; 1405 goto err_destroy_slab; 1406 } 1407 1408 INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker); 1409 INIT_LIST_HEAD(&g2d->free_cmdlist); 1410 INIT_LIST_HEAD(&g2d->runqueue); 1411 1412 mutex_init(&g2d->cmdlist_mutex); 1413 mutex_init(&g2d->runqueue_mutex); 1414 1415 g2d->gate_clk = devm_clk_get(dev, "fimg2d"); 1416 if (IS_ERR(g2d->gate_clk)) { 1417 dev_err(dev, "failed to get gate clock\n"); 1418 ret = PTR_ERR(g2d->gate_clk); 1419 goto err_destroy_workqueue; 1420 } 1421 1422 pm_runtime_enable(dev); 1423 1424 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1425 1426 g2d->regs = devm_ioremap_resource(dev, res); 1427 if (IS_ERR(g2d->regs)) { 1428 ret = PTR_ERR(g2d->regs); 1429 goto err_put_clk; 1430 } 1431 1432 g2d->irq = platform_get_irq(pdev, 0); 1433 if (g2d->irq < 0) { 1434 dev_err(dev, "failed to get irq\n"); 1435 ret = g2d->irq; 1436 goto err_put_clk; 1437 } 1438 1439 ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0, 1440 "drm_g2d", g2d); 1441 if (ret < 0) { 1442 dev_err(dev, "irq request failed\n"); 1443 goto err_put_clk; 1444 } 1445 1446 g2d->max_pool = MAX_POOL; 1447 1448 platform_set_drvdata(pdev, g2d); 1449 1450 subdrv = &g2d->subdrv; 1451 subdrv->dev = dev; 1452 subdrv->probe = g2d_subdrv_probe; 1453 subdrv->remove = g2d_subdrv_remove; 1454 subdrv->open = g2d_open; 1455 subdrv->close = g2d_close; 1456 1457 ret = exynos_drm_subdrv_register(subdrv); 1458 if (ret < 0) { 1459 dev_err(dev, "failed to register drm g2d device\n"); 1460 goto err_put_clk; 1461 } 1462 1463 dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n", 1464 G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER); 1465 1466 return 0; 1467 1468 err_put_clk: 1469 pm_runtime_disable(dev); 1470 err_destroy_workqueue: 1471 destroy_workqueue(g2d->g2d_workq); 1472 err_destroy_slab: 1473 kmem_cache_destroy(g2d->runqueue_slab); 1474 return ret; 1475 } 1476 1477 static int g2d_remove(struct platform_device *pdev) 1478 { 1479 struct g2d_data *g2d = platform_get_drvdata(pdev); 1480 1481 cancel_work_sync(&g2d->runqueue_work); 1482 exynos_drm_subdrv_unregister(&g2d->subdrv); 1483 1484 while (g2d->runqueue_node) { 1485 g2d_free_runqueue_node(g2d, g2d->runqueue_node); 1486 g2d->runqueue_node = g2d_get_runqueue_node(g2d); 1487 } 1488 1489 pm_runtime_disable(&pdev->dev); 1490 1491 g2d_fini_cmdlist(g2d); 1492 destroy_workqueue(g2d->g2d_workq); 1493 kmem_cache_destroy(g2d->runqueue_slab); 1494 1495 return 0; 1496 } 1497 1498 #ifdef CONFIG_PM_SLEEP 1499 static int g2d_suspend(struct device *dev) 1500 { 1501 struct g2d_data *g2d = dev_get_drvdata(dev); 1502 1503 mutex_lock(&g2d->runqueue_mutex); 1504 g2d->suspended = true; 1505 mutex_unlock(&g2d->runqueue_mutex); 1506 1507 while (g2d->runqueue_node) 1508 /* FIXME: good range? */ 1509 usleep_range(500, 1000); 1510 1511 flush_work(&g2d->runqueue_work); 1512 1513 return 0; 1514 } 1515 1516 static int g2d_resume(struct device *dev) 1517 { 1518 struct g2d_data *g2d = dev_get_drvdata(dev); 1519 1520 g2d->suspended = false; 1521 g2d_exec_runqueue(g2d); 1522 1523 return 0; 1524 } 1525 #endif 1526 1527 static SIMPLE_DEV_PM_OPS(g2d_pm_ops, g2d_suspend, g2d_resume); 1528 1529 #ifdef CONFIG_OF 1530 static const struct of_device_id exynos_g2d_match[] = { 1531 { .compatible = "samsung,exynos5250-g2d" }, 1532 {}, 1533 }; 1534 #endif 1535 1536 struct platform_driver g2d_driver = { 1537 .probe = g2d_probe, 1538 .remove = g2d_remove, 1539 .driver = { 1540 .name = "s5p-g2d", 1541 .owner = THIS_MODULE, 1542 .pm = &g2d_pm_ops, 1543 .of_match_table = of_match_ptr(exynos_g2d_match), 1544 }, 1545 }; 1546