1 /*
2  * Copyright (C) 2012 Samsung Electronics Co.Ltd
3  * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundationr
8  */
9 
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/clk.h>
13 #include <linux/err.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/slab.h>
19 #include <linux/workqueue.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/dma-attrs.h>
22 #include <linux/of.h>
23 
24 #include <drm/drmP.h>
25 #include <drm/exynos_drm.h>
26 #include "exynos_drm_drv.h"
27 #include "exynos_drm_gem.h"
28 #include "exynos_drm_iommu.h"
29 
30 #define G2D_HW_MAJOR_VER		4
31 #define G2D_HW_MINOR_VER		1
32 
33 /* vaild register range set from user: 0x0104 ~ 0x0880 */
34 #define G2D_VALID_START			0x0104
35 #define G2D_VALID_END			0x0880
36 
37 /* general registers */
38 #define G2D_SOFT_RESET			0x0000
39 #define G2D_INTEN			0x0004
40 #define G2D_INTC_PEND			0x000C
41 #define G2D_DMA_SFR_BASE_ADDR		0x0080
42 #define G2D_DMA_COMMAND			0x0084
43 #define G2D_DMA_STATUS			0x008C
44 #define G2D_DMA_HOLD_CMD		0x0090
45 
46 /* command registers */
47 #define G2D_BITBLT_START		0x0100
48 
49 /* registers for base address */
50 #define G2D_SRC_BASE_ADDR		0x0304
51 #define G2D_SRC_COLOR_MODE		0x030C
52 #define G2D_SRC_LEFT_TOP		0x0310
53 #define G2D_SRC_RIGHT_BOTTOM		0x0314
54 #define G2D_SRC_PLANE2_BASE_ADDR	0x0318
55 #define G2D_DST_BASE_ADDR		0x0404
56 #define G2D_DST_COLOR_MODE		0x040C
57 #define G2D_DST_LEFT_TOP		0x0410
58 #define G2D_DST_RIGHT_BOTTOM		0x0414
59 #define G2D_DST_PLANE2_BASE_ADDR	0x0418
60 #define G2D_PAT_BASE_ADDR		0x0500
61 #define G2D_MSK_BASE_ADDR		0x0520
62 
63 /* G2D_SOFT_RESET */
64 #define G2D_SFRCLEAR			(1 << 1)
65 #define G2D_R				(1 << 0)
66 
67 /* G2D_INTEN */
68 #define G2D_INTEN_ACF			(1 << 3)
69 #define G2D_INTEN_UCF			(1 << 2)
70 #define G2D_INTEN_GCF			(1 << 1)
71 #define G2D_INTEN_SCF			(1 << 0)
72 
73 /* G2D_INTC_PEND */
74 #define G2D_INTP_ACMD_FIN		(1 << 3)
75 #define G2D_INTP_UCMD_FIN		(1 << 2)
76 #define G2D_INTP_GCMD_FIN		(1 << 1)
77 #define G2D_INTP_SCMD_FIN		(1 << 0)
78 
79 /* G2D_DMA_COMMAND */
80 #define G2D_DMA_HALT			(1 << 2)
81 #define G2D_DMA_CONTINUE		(1 << 1)
82 #define G2D_DMA_START			(1 << 0)
83 
84 /* G2D_DMA_STATUS */
85 #define G2D_DMA_LIST_DONE_COUNT		(0xFF << 17)
86 #define G2D_DMA_BITBLT_DONE_COUNT	(0xFFFF << 1)
87 #define G2D_DMA_DONE			(1 << 0)
88 #define G2D_DMA_LIST_DONE_COUNT_OFFSET	17
89 
90 /* G2D_DMA_HOLD_CMD */
91 #define G2D_USER_HOLD			(1 << 2)
92 #define G2D_LIST_HOLD			(1 << 1)
93 #define G2D_BITBLT_HOLD			(1 << 0)
94 
95 /* G2D_BITBLT_START */
96 #define G2D_START_CASESEL		(1 << 2)
97 #define G2D_START_NHOLT			(1 << 1)
98 #define G2D_START_BITBLT		(1 << 0)
99 
100 /* buffer color format */
101 #define G2D_FMT_XRGB8888		0
102 #define G2D_FMT_ARGB8888		1
103 #define G2D_FMT_RGB565			2
104 #define G2D_FMT_XRGB1555		3
105 #define G2D_FMT_ARGB1555		4
106 #define G2D_FMT_XRGB4444		5
107 #define G2D_FMT_ARGB4444		6
108 #define G2D_FMT_PACKED_RGB888		7
109 #define G2D_FMT_A8			11
110 #define G2D_FMT_L8			12
111 
112 /* buffer valid length */
113 #define G2D_LEN_MIN			1
114 #define G2D_LEN_MAX			8000
115 
116 #define G2D_CMDLIST_SIZE		(PAGE_SIZE / 4)
117 #define G2D_CMDLIST_NUM			64
118 #define G2D_CMDLIST_POOL_SIZE		(G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
119 #define G2D_CMDLIST_DATA_NUM		(G2D_CMDLIST_SIZE / sizeof(u32) - 2)
120 
121 /* maximum buffer pool size of userptr is 64MB as default */
122 #define MAX_POOL		(64 * 1024 * 1024)
123 
124 enum {
125 	BUF_TYPE_GEM = 1,
126 	BUF_TYPE_USERPTR,
127 };
128 
129 enum g2d_reg_type {
130 	REG_TYPE_NONE = -1,
131 	REG_TYPE_SRC,
132 	REG_TYPE_SRC_PLANE2,
133 	REG_TYPE_DST,
134 	REG_TYPE_DST_PLANE2,
135 	REG_TYPE_PAT,
136 	REG_TYPE_MSK,
137 	MAX_REG_TYPE_NR
138 };
139 
140 /* cmdlist data structure */
141 struct g2d_cmdlist {
142 	u32		head;
143 	unsigned long	data[G2D_CMDLIST_DATA_NUM];
144 	u32		last;	/* last data offset */
145 };
146 
147 /*
148  * A structure of buffer description
149  *
150  * @format: color format
151  * @left_x: the x coordinates of left top corner
152  * @top_y: the y coordinates of left top corner
153  * @right_x: the x coordinates of right bottom corner
154  * @bottom_y: the y coordinates of right bottom corner
155  *
156  */
157 struct g2d_buf_desc {
158 	unsigned int	format;
159 	unsigned int	left_x;
160 	unsigned int	top_y;
161 	unsigned int	right_x;
162 	unsigned int	bottom_y;
163 };
164 
165 /*
166  * A structure of buffer information
167  *
168  * @map_nr: manages the number of mapped buffers
169  * @reg_types: stores regitster type in the order of requested command
170  * @handles: stores buffer handle in its reg_type position
171  * @types: stores buffer type in its reg_type position
172  * @descs: stores buffer description in its reg_type position
173  *
174  */
175 struct g2d_buf_info {
176 	unsigned int		map_nr;
177 	enum g2d_reg_type	reg_types[MAX_REG_TYPE_NR];
178 	unsigned long		handles[MAX_REG_TYPE_NR];
179 	unsigned int		types[MAX_REG_TYPE_NR];
180 	struct g2d_buf_desc	descs[MAX_REG_TYPE_NR];
181 };
182 
183 struct drm_exynos_pending_g2d_event {
184 	struct drm_pending_event	base;
185 	struct drm_exynos_g2d_event	event;
186 };
187 
188 struct g2d_cmdlist_userptr {
189 	struct list_head	list;
190 	dma_addr_t		dma_addr;
191 	unsigned long		userptr;
192 	unsigned long		size;
193 	struct page		**pages;
194 	unsigned int		npages;
195 	struct sg_table		*sgt;
196 	struct vm_area_struct	*vma;
197 	atomic_t		refcount;
198 	bool			in_pool;
199 	bool			out_of_list;
200 };
201 struct g2d_cmdlist_node {
202 	struct list_head	list;
203 	struct g2d_cmdlist	*cmdlist;
204 	dma_addr_t		dma_addr;
205 	struct g2d_buf_info	buf_info;
206 
207 	struct drm_exynos_pending_g2d_event	*event;
208 };
209 
210 struct g2d_runqueue_node {
211 	struct list_head	list;
212 	struct list_head	run_cmdlist;
213 	struct list_head	event_list;
214 	struct drm_file		*filp;
215 	pid_t			pid;
216 	struct completion	complete;
217 	int			async;
218 };
219 
220 struct g2d_data {
221 	struct device			*dev;
222 	struct clk			*gate_clk;
223 	void __iomem			*regs;
224 	int				irq;
225 	struct workqueue_struct		*g2d_workq;
226 	struct work_struct		runqueue_work;
227 	struct exynos_drm_subdrv	subdrv;
228 	bool				suspended;
229 
230 	/* cmdlist */
231 	struct g2d_cmdlist_node		*cmdlist_node;
232 	struct list_head		free_cmdlist;
233 	struct mutex			cmdlist_mutex;
234 	dma_addr_t			cmdlist_pool;
235 	void				*cmdlist_pool_virt;
236 	struct dma_attrs		cmdlist_dma_attrs;
237 
238 	/* runqueue*/
239 	struct g2d_runqueue_node	*runqueue_node;
240 	struct list_head		runqueue;
241 	struct mutex			runqueue_mutex;
242 	struct kmem_cache		*runqueue_slab;
243 
244 	unsigned long			current_pool;
245 	unsigned long			max_pool;
246 };
247 
248 static int g2d_init_cmdlist(struct g2d_data *g2d)
249 {
250 	struct device *dev = g2d->dev;
251 	struct g2d_cmdlist_node *node = g2d->cmdlist_node;
252 	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
253 	int nr;
254 	int ret;
255 	struct g2d_buf_info *buf_info;
256 
257 	init_dma_attrs(&g2d->cmdlist_dma_attrs);
258 	dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
259 
260 	g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev,
261 						G2D_CMDLIST_POOL_SIZE,
262 						&g2d->cmdlist_pool, GFP_KERNEL,
263 						&g2d->cmdlist_dma_attrs);
264 	if (!g2d->cmdlist_pool_virt) {
265 		dev_err(dev, "failed to allocate dma memory\n");
266 		return -ENOMEM;
267 	}
268 
269 	node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
270 	if (!node) {
271 		dev_err(dev, "failed to allocate memory\n");
272 		ret = -ENOMEM;
273 		goto err;
274 	}
275 
276 	for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
277 		unsigned int i;
278 
279 		node[nr].cmdlist =
280 			g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
281 		node[nr].dma_addr =
282 			g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
283 
284 		buf_info = &node[nr].buf_info;
285 		for (i = 0; i < MAX_REG_TYPE_NR; i++)
286 			buf_info->reg_types[i] = REG_TYPE_NONE;
287 
288 		list_add_tail(&node[nr].list, &g2d->free_cmdlist);
289 	}
290 
291 	return 0;
292 
293 err:
294 	dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
295 			g2d->cmdlist_pool_virt,
296 			g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
297 	return ret;
298 }
299 
300 static void g2d_fini_cmdlist(struct g2d_data *g2d)
301 {
302 	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
303 
304 	kfree(g2d->cmdlist_node);
305 	dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
306 			g2d->cmdlist_pool_virt,
307 			g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
308 }
309 
310 static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
311 {
312 	struct device *dev = g2d->dev;
313 	struct g2d_cmdlist_node *node;
314 
315 	mutex_lock(&g2d->cmdlist_mutex);
316 	if (list_empty(&g2d->free_cmdlist)) {
317 		dev_err(dev, "there is no free cmdlist\n");
318 		mutex_unlock(&g2d->cmdlist_mutex);
319 		return NULL;
320 	}
321 
322 	node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
323 				list);
324 	list_del_init(&node->list);
325 	mutex_unlock(&g2d->cmdlist_mutex);
326 
327 	return node;
328 }
329 
330 static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
331 {
332 	mutex_lock(&g2d->cmdlist_mutex);
333 	list_move_tail(&node->list, &g2d->free_cmdlist);
334 	mutex_unlock(&g2d->cmdlist_mutex);
335 }
336 
337 static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
338 				     struct g2d_cmdlist_node *node)
339 {
340 	struct g2d_cmdlist_node *lnode;
341 
342 	if (list_empty(&g2d_priv->inuse_cmdlist))
343 		goto add_to_list;
344 
345 	/* this links to base address of new cmdlist */
346 	lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
347 				struct g2d_cmdlist_node, list);
348 	lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
349 
350 add_to_list:
351 	list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
352 
353 	if (node->event)
354 		list_add_tail(&node->event->base.link, &g2d_priv->event_list);
355 }
356 
357 static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
358 					unsigned long obj,
359 					bool force)
360 {
361 	struct g2d_cmdlist_userptr *g2d_userptr =
362 					(struct g2d_cmdlist_userptr *)obj;
363 
364 	if (!obj)
365 		return;
366 
367 	if (force)
368 		goto out;
369 
370 	atomic_dec(&g2d_userptr->refcount);
371 
372 	if (atomic_read(&g2d_userptr->refcount) > 0)
373 		return;
374 
375 	if (g2d_userptr->in_pool)
376 		return;
377 
378 out:
379 	exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt,
380 					DMA_BIDIRECTIONAL);
381 
382 	exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
383 					g2d_userptr->npages,
384 					g2d_userptr->vma);
385 
386 	if (!g2d_userptr->out_of_list)
387 		list_del_init(&g2d_userptr->list);
388 
389 	sg_free_table(g2d_userptr->sgt);
390 	kfree(g2d_userptr->sgt);
391 	g2d_userptr->sgt = NULL;
392 
393 	kfree(g2d_userptr->pages);
394 	g2d_userptr->pages = NULL;
395 	kfree(g2d_userptr);
396 	g2d_userptr = NULL;
397 }
398 
399 static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
400 					unsigned long userptr,
401 					unsigned long size,
402 					struct drm_file *filp,
403 					unsigned long *obj)
404 {
405 	struct drm_exynos_file_private *file_priv = filp->driver_priv;
406 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
407 	struct g2d_cmdlist_userptr *g2d_userptr;
408 	struct g2d_data *g2d;
409 	struct page **pages;
410 	struct sg_table	*sgt;
411 	struct vm_area_struct *vma;
412 	unsigned long start, end;
413 	unsigned int npages, offset;
414 	int ret;
415 
416 	if (!size) {
417 		DRM_ERROR("invalid userptr size.\n");
418 		return ERR_PTR(-EINVAL);
419 	}
420 
421 	g2d = dev_get_drvdata(g2d_priv->dev);
422 
423 	/* check if userptr already exists in userptr_list. */
424 	list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
425 		if (g2d_userptr->userptr == userptr) {
426 			/*
427 			 * also check size because there could be same address
428 			 * and different size.
429 			 */
430 			if (g2d_userptr->size == size) {
431 				atomic_inc(&g2d_userptr->refcount);
432 				*obj = (unsigned long)g2d_userptr;
433 
434 				return &g2d_userptr->dma_addr;
435 			}
436 
437 			/*
438 			 * at this moment, maybe g2d dma is accessing this
439 			 * g2d_userptr memory region so just remove this
440 			 * g2d_userptr object from userptr_list not to be
441 			 * referred again and also except it the userptr
442 			 * pool to be released after the dma access completion.
443 			 */
444 			g2d_userptr->out_of_list = true;
445 			g2d_userptr->in_pool = false;
446 			list_del_init(&g2d_userptr->list);
447 
448 			break;
449 		}
450 	}
451 
452 	g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
453 	if (!g2d_userptr) {
454 		DRM_ERROR("failed to allocate g2d_userptr.\n");
455 		return ERR_PTR(-ENOMEM);
456 	}
457 
458 	atomic_set(&g2d_userptr->refcount, 1);
459 
460 	start = userptr & PAGE_MASK;
461 	offset = userptr & ~PAGE_MASK;
462 	end = PAGE_ALIGN(userptr + size);
463 	npages = (end - start) >> PAGE_SHIFT;
464 	g2d_userptr->npages = npages;
465 
466 	pages = kzalloc(npages * sizeof(struct page *), GFP_KERNEL);
467 	if (!pages) {
468 		DRM_ERROR("failed to allocate pages.\n");
469 		kfree(g2d_userptr);
470 		return ERR_PTR(-ENOMEM);
471 	}
472 
473 	vma = find_vma(current->mm, userptr);
474 	if (!vma) {
475 		DRM_ERROR("failed to get vm region.\n");
476 		ret = -EFAULT;
477 		goto err_free_pages;
478 	}
479 
480 	if (vma->vm_end < userptr + size) {
481 		DRM_ERROR("vma is too small.\n");
482 		ret = -EFAULT;
483 		goto err_free_pages;
484 	}
485 
486 	g2d_userptr->vma = exynos_gem_get_vma(vma);
487 	if (!g2d_userptr->vma) {
488 		DRM_ERROR("failed to copy vma.\n");
489 		ret = -ENOMEM;
490 		goto err_free_pages;
491 	}
492 
493 	g2d_userptr->size = size;
494 
495 	ret = exynos_gem_get_pages_from_userptr(start & PAGE_MASK,
496 						npages, pages, vma);
497 	if (ret < 0) {
498 		DRM_ERROR("failed to get user pages from userptr.\n");
499 		goto err_put_vma;
500 	}
501 
502 	g2d_userptr->pages = pages;
503 
504 	sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
505 	if (!sgt) {
506 		DRM_ERROR("failed to allocate sg table.\n");
507 		ret = -ENOMEM;
508 		goto err_free_userptr;
509 	}
510 
511 	ret = sg_alloc_table_from_pages(sgt, pages, npages, offset,
512 					size, GFP_KERNEL);
513 	if (ret < 0) {
514 		DRM_ERROR("failed to get sgt from pages.\n");
515 		goto err_free_sgt;
516 	}
517 
518 	g2d_userptr->sgt = sgt;
519 
520 	ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt,
521 						DMA_BIDIRECTIONAL);
522 	if (ret < 0) {
523 		DRM_ERROR("failed to map sgt with dma region.\n");
524 		goto err_sg_free_table;
525 	}
526 
527 	g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
528 	g2d_userptr->userptr = userptr;
529 
530 	list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
531 
532 	if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
533 		g2d->current_pool += npages << PAGE_SHIFT;
534 		g2d_userptr->in_pool = true;
535 	}
536 
537 	*obj = (unsigned long)g2d_userptr;
538 
539 	return &g2d_userptr->dma_addr;
540 
541 err_sg_free_table:
542 	sg_free_table(sgt);
543 
544 err_free_sgt:
545 	kfree(sgt);
546 	sgt = NULL;
547 
548 err_free_userptr:
549 	exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
550 					g2d_userptr->npages,
551 					g2d_userptr->vma);
552 
553 err_put_vma:
554 	exynos_gem_put_vma(g2d_userptr->vma);
555 
556 err_free_pages:
557 	kfree(pages);
558 	kfree(g2d_userptr);
559 	pages = NULL;
560 	g2d_userptr = NULL;
561 
562 	return ERR_PTR(ret);
563 }
564 
565 static void g2d_userptr_free_all(struct drm_device *drm_dev,
566 					struct g2d_data *g2d,
567 					struct drm_file *filp)
568 {
569 	struct drm_exynos_file_private *file_priv = filp->driver_priv;
570 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
571 	struct g2d_cmdlist_userptr *g2d_userptr, *n;
572 
573 	list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
574 		if (g2d_userptr->in_pool)
575 			g2d_userptr_put_dma_addr(drm_dev,
576 						(unsigned long)g2d_userptr,
577 						true);
578 
579 	g2d->current_pool = 0;
580 }
581 
582 static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
583 {
584 	enum g2d_reg_type reg_type;
585 
586 	switch (reg_offset) {
587 	case G2D_SRC_BASE_ADDR:
588 	case G2D_SRC_COLOR_MODE:
589 	case G2D_SRC_LEFT_TOP:
590 	case G2D_SRC_RIGHT_BOTTOM:
591 		reg_type = REG_TYPE_SRC;
592 		break;
593 	case G2D_SRC_PLANE2_BASE_ADDR:
594 		reg_type = REG_TYPE_SRC_PLANE2;
595 		break;
596 	case G2D_DST_BASE_ADDR:
597 	case G2D_DST_COLOR_MODE:
598 	case G2D_DST_LEFT_TOP:
599 	case G2D_DST_RIGHT_BOTTOM:
600 		reg_type = REG_TYPE_DST;
601 		break;
602 	case G2D_DST_PLANE2_BASE_ADDR:
603 		reg_type = REG_TYPE_DST_PLANE2;
604 		break;
605 	case G2D_PAT_BASE_ADDR:
606 		reg_type = REG_TYPE_PAT;
607 		break;
608 	case G2D_MSK_BASE_ADDR:
609 		reg_type = REG_TYPE_MSK;
610 		break;
611 	default:
612 		reg_type = REG_TYPE_NONE;
613 		DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
614 		break;
615 	};
616 
617 	return reg_type;
618 }
619 
620 static unsigned long g2d_get_buf_bpp(unsigned int format)
621 {
622 	unsigned long bpp;
623 
624 	switch (format) {
625 	case G2D_FMT_XRGB8888:
626 	case G2D_FMT_ARGB8888:
627 		bpp = 4;
628 		break;
629 	case G2D_FMT_RGB565:
630 	case G2D_FMT_XRGB1555:
631 	case G2D_FMT_ARGB1555:
632 	case G2D_FMT_XRGB4444:
633 	case G2D_FMT_ARGB4444:
634 		bpp = 2;
635 		break;
636 	case G2D_FMT_PACKED_RGB888:
637 		bpp = 3;
638 		break;
639 	default:
640 		bpp = 1;
641 		break;
642 	}
643 
644 	return bpp;
645 }
646 
647 static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
648 						enum g2d_reg_type reg_type,
649 						unsigned long size)
650 {
651 	unsigned int width, height;
652 	unsigned long area;
653 
654 	/*
655 	 * check source and destination buffers only.
656 	 * so the others are always valid.
657 	 */
658 	if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
659 		return true;
660 
661 	width = buf_desc->right_x - buf_desc->left_x;
662 	if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
663 		DRM_ERROR("width[%u] is out of range!\n", width);
664 		return false;
665 	}
666 
667 	height = buf_desc->bottom_y - buf_desc->top_y;
668 	if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
669 		DRM_ERROR("height[%u] is out of range!\n", height);
670 		return false;
671 	}
672 
673 	area = (unsigned long)width * (unsigned long)height *
674 					g2d_get_buf_bpp(buf_desc->format);
675 	if (area > size) {
676 		DRM_ERROR("area[%lu] is out of range[%lu]!\n", area, size);
677 		return false;
678 	}
679 
680 	return true;
681 }
682 
683 static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
684 				struct g2d_cmdlist_node *node,
685 				struct drm_device *drm_dev,
686 				struct drm_file *file)
687 {
688 	struct g2d_cmdlist *cmdlist = node->cmdlist;
689 	struct g2d_buf_info *buf_info = &node->buf_info;
690 	int offset;
691 	int ret;
692 	int i;
693 
694 	for (i = 0; i < buf_info->map_nr; i++) {
695 		struct g2d_buf_desc *buf_desc;
696 		enum g2d_reg_type reg_type;
697 		int reg_pos;
698 		unsigned long handle;
699 		dma_addr_t *addr;
700 
701 		reg_pos = cmdlist->last - 2 * (i + 1);
702 
703 		offset = cmdlist->data[reg_pos];
704 		handle = cmdlist->data[reg_pos + 1];
705 
706 		reg_type = g2d_get_reg_type(offset);
707 		if (reg_type == REG_TYPE_NONE) {
708 			ret = -EFAULT;
709 			goto err;
710 		}
711 
712 		buf_desc = &buf_info->descs[reg_type];
713 
714 		if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
715 			unsigned long size;
716 
717 			size = exynos_drm_gem_get_size(drm_dev, handle, file);
718 			if (!size) {
719 				ret = -EFAULT;
720 				goto err;
721 			}
722 
723 			if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
724 									size)) {
725 				ret = -EFAULT;
726 				goto err;
727 			}
728 
729 			addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
730 								file);
731 			if (IS_ERR(addr)) {
732 				ret = -EFAULT;
733 				goto err;
734 			}
735 		} else {
736 			struct drm_exynos_g2d_userptr g2d_userptr;
737 
738 			if (copy_from_user(&g2d_userptr, (void __user *)handle,
739 				sizeof(struct drm_exynos_g2d_userptr))) {
740 				ret = -EFAULT;
741 				goto err;
742 			}
743 
744 			if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
745 							g2d_userptr.size)) {
746 				ret = -EFAULT;
747 				goto err;
748 			}
749 
750 			addr = g2d_userptr_get_dma_addr(drm_dev,
751 							g2d_userptr.userptr,
752 							g2d_userptr.size,
753 							file,
754 							&handle);
755 			if (IS_ERR(addr)) {
756 				ret = -EFAULT;
757 				goto err;
758 			}
759 		}
760 
761 		cmdlist->data[reg_pos + 1] = *addr;
762 		buf_info->reg_types[i] = reg_type;
763 		buf_info->handles[reg_type] = handle;
764 	}
765 
766 	return 0;
767 
768 err:
769 	buf_info->map_nr = i;
770 	return ret;
771 }
772 
773 static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
774 				  struct g2d_cmdlist_node *node,
775 				  struct drm_file *filp)
776 {
777 	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
778 	struct g2d_buf_info *buf_info = &node->buf_info;
779 	int i;
780 
781 	for (i = 0; i < buf_info->map_nr; i++) {
782 		struct g2d_buf_desc *buf_desc;
783 		enum g2d_reg_type reg_type;
784 		unsigned long handle;
785 
786 		reg_type = buf_info->reg_types[i];
787 
788 		buf_desc = &buf_info->descs[reg_type];
789 		handle = buf_info->handles[reg_type];
790 
791 		if (buf_info->types[reg_type] == BUF_TYPE_GEM)
792 			exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
793 							filp);
794 		else
795 			g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
796 							false);
797 
798 		buf_info->reg_types[i] = REG_TYPE_NONE;
799 		buf_info->handles[reg_type] = 0;
800 		buf_info->types[reg_type] = 0;
801 		memset(buf_desc, 0x00, sizeof(*buf_desc));
802 	}
803 
804 	buf_info->map_nr = 0;
805 }
806 
807 static void g2d_dma_start(struct g2d_data *g2d,
808 			  struct g2d_runqueue_node *runqueue_node)
809 {
810 	struct g2d_cmdlist_node *node =
811 				list_first_entry(&runqueue_node->run_cmdlist,
812 						struct g2d_cmdlist_node, list);
813 
814 	pm_runtime_get_sync(g2d->dev);
815 	clk_enable(g2d->gate_clk);
816 
817 	writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
818 	writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
819 }
820 
821 static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
822 {
823 	struct g2d_runqueue_node *runqueue_node;
824 
825 	if (list_empty(&g2d->runqueue))
826 		return NULL;
827 
828 	runqueue_node = list_first_entry(&g2d->runqueue,
829 					 struct g2d_runqueue_node, list);
830 	list_del_init(&runqueue_node->list);
831 	return runqueue_node;
832 }
833 
834 static void g2d_free_runqueue_node(struct g2d_data *g2d,
835 				   struct g2d_runqueue_node *runqueue_node)
836 {
837 	struct g2d_cmdlist_node *node;
838 
839 	if (!runqueue_node)
840 		return;
841 
842 	mutex_lock(&g2d->cmdlist_mutex);
843 	/*
844 	 * commands in run_cmdlist have been completed so unmap all gem
845 	 * objects in each command node so that they are unreferenced.
846 	 */
847 	list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
848 		g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
849 	list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
850 	mutex_unlock(&g2d->cmdlist_mutex);
851 
852 	kmem_cache_free(g2d->runqueue_slab, runqueue_node);
853 }
854 
855 static void g2d_exec_runqueue(struct g2d_data *g2d)
856 {
857 	g2d->runqueue_node = g2d_get_runqueue_node(g2d);
858 	if (g2d->runqueue_node)
859 		g2d_dma_start(g2d, g2d->runqueue_node);
860 }
861 
862 static void g2d_runqueue_worker(struct work_struct *work)
863 {
864 	struct g2d_data *g2d = container_of(work, struct g2d_data,
865 					    runqueue_work);
866 
867 	mutex_lock(&g2d->runqueue_mutex);
868 	clk_disable(g2d->gate_clk);
869 	pm_runtime_put_sync(g2d->dev);
870 
871 	complete(&g2d->runqueue_node->complete);
872 	if (g2d->runqueue_node->async)
873 		g2d_free_runqueue_node(g2d, g2d->runqueue_node);
874 
875 	if (g2d->suspended)
876 		g2d->runqueue_node = NULL;
877 	else
878 		g2d_exec_runqueue(g2d);
879 	mutex_unlock(&g2d->runqueue_mutex);
880 }
881 
882 static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
883 {
884 	struct drm_device *drm_dev = g2d->subdrv.drm_dev;
885 	struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
886 	struct drm_exynos_pending_g2d_event *e;
887 	struct timeval now;
888 	unsigned long flags;
889 
890 	if (list_empty(&runqueue_node->event_list))
891 		return;
892 
893 	e = list_first_entry(&runqueue_node->event_list,
894 			     struct drm_exynos_pending_g2d_event, base.link);
895 
896 	do_gettimeofday(&now);
897 	e->event.tv_sec = now.tv_sec;
898 	e->event.tv_usec = now.tv_usec;
899 	e->event.cmdlist_no = cmdlist_no;
900 
901 	spin_lock_irqsave(&drm_dev->event_lock, flags);
902 	list_move_tail(&e->base.link, &e->base.file_priv->event_list);
903 	wake_up_interruptible(&e->base.file_priv->event_wait);
904 	spin_unlock_irqrestore(&drm_dev->event_lock, flags);
905 }
906 
907 static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
908 {
909 	struct g2d_data *g2d = dev_id;
910 	u32 pending;
911 
912 	pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
913 	if (pending)
914 		writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
915 
916 	if (pending & G2D_INTP_GCMD_FIN) {
917 		u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
918 
919 		cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
920 						G2D_DMA_LIST_DONE_COUNT_OFFSET;
921 
922 		g2d_finish_event(g2d, cmdlist_no);
923 
924 		writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
925 		if (!(pending & G2D_INTP_ACMD_FIN)) {
926 			writel_relaxed(G2D_DMA_CONTINUE,
927 					g2d->regs + G2D_DMA_COMMAND);
928 		}
929 	}
930 
931 	if (pending & G2D_INTP_ACMD_FIN)
932 		queue_work(g2d->g2d_workq, &g2d->runqueue_work);
933 
934 	return IRQ_HANDLED;
935 }
936 
937 static int g2d_check_reg_offset(struct device *dev,
938 				struct g2d_cmdlist_node *node,
939 				int nr, bool for_addr)
940 {
941 	struct g2d_cmdlist *cmdlist = node->cmdlist;
942 	int reg_offset;
943 	int index;
944 	int i;
945 
946 	for (i = 0; i < nr; i++) {
947 		struct g2d_buf_info *buf_info = &node->buf_info;
948 		struct g2d_buf_desc *buf_desc;
949 		enum g2d_reg_type reg_type;
950 		unsigned long value;
951 
952 		index = cmdlist->last - 2 * (i + 1);
953 
954 		reg_offset = cmdlist->data[index] & ~0xfffff000;
955 		if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
956 			goto err;
957 		if (reg_offset % 4)
958 			goto err;
959 
960 		switch (reg_offset) {
961 		case G2D_SRC_BASE_ADDR:
962 		case G2D_SRC_PLANE2_BASE_ADDR:
963 		case G2D_DST_BASE_ADDR:
964 		case G2D_DST_PLANE2_BASE_ADDR:
965 		case G2D_PAT_BASE_ADDR:
966 		case G2D_MSK_BASE_ADDR:
967 			if (!for_addr)
968 				goto err;
969 
970 			reg_type = g2d_get_reg_type(reg_offset);
971 			if (reg_type == REG_TYPE_NONE)
972 				goto err;
973 
974 			/* check userptr buffer type. */
975 			if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
976 				buf_info->types[reg_type] = BUF_TYPE_USERPTR;
977 				cmdlist->data[index] &= ~G2D_BUF_USERPTR;
978 			} else
979 				buf_info->types[reg_type] = BUF_TYPE_GEM;
980 			break;
981 		case G2D_SRC_COLOR_MODE:
982 		case G2D_DST_COLOR_MODE:
983 			if (for_addr)
984 				goto err;
985 
986 			reg_type = g2d_get_reg_type(reg_offset);
987 			if (reg_type == REG_TYPE_NONE)
988 				goto err;
989 
990 			buf_desc = &buf_info->descs[reg_type];
991 			value = cmdlist->data[index + 1];
992 
993 			buf_desc->format = value & 0xf;
994 			break;
995 		case G2D_SRC_LEFT_TOP:
996 		case G2D_DST_LEFT_TOP:
997 			if (for_addr)
998 				goto err;
999 
1000 			reg_type = g2d_get_reg_type(reg_offset);
1001 			if (reg_type == REG_TYPE_NONE)
1002 				goto err;
1003 
1004 			buf_desc = &buf_info->descs[reg_type];
1005 			value = cmdlist->data[index + 1];
1006 
1007 			buf_desc->left_x = value & 0x1fff;
1008 			buf_desc->top_y = (value & 0x1fff0000) >> 16;
1009 			break;
1010 		case G2D_SRC_RIGHT_BOTTOM:
1011 		case G2D_DST_RIGHT_BOTTOM:
1012 			if (for_addr)
1013 				goto err;
1014 
1015 			reg_type = g2d_get_reg_type(reg_offset);
1016 			if (reg_type == REG_TYPE_NONE)
1017 				goto err;
1018 
1019 			buf_desc = &buf_info->descs[reg_type];
1020 			value = cmdlist->data[index + 1];
1021 
1022 			buf_desc->right_x = value & 0x1fff;
1023 			buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
1024 			break;
1025 		default:
1026 			if (for_addr)
1027 				goto err;
1028 			break;
1029 		}
1030 	}
1031 
1032 	return 0;
1033 
1034 err:
1035 	dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
1036 	return -EINVAL;
1037 }
1038 
1039 /* ioctl functions */
1040 int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1041 			     struct drm_file *file)
1042 {
1043 	struct drm_exynos_g2d_get_ver *ver = data;
1044 
1045 	ver->major = G2D_HW_MAJOR_VER;
1046 	ver->minor = G2D_HW_MINOR_VER;
1047 
1048 	return 0;
1049 }
1050 EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl);
1051 
1052 int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1053 				 struct drm_file *file)
1054 {
1055 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1056 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1057 	struct device *dev = g2d_priv->dev;
1058 	struct g2d_data *g2d;
1059 	struct drm_exynos_g2d_set_cmdlist *req = data;
1060 	struct drm_exynos_g2d_cmd *cmd;
1061 	struct drm_exynos_pending_g2d_event *e;
1062 	struct g2d_cmdlist_node *node;
1063 	struct g2d_cmdlist *cmdlist;
1064 	unsigned long flags;
1065 	int size;
1066 	int ret;
1067 
1068 	if (!dev)
1069 		return -ENODEV;
1070 
1071 	g2d = dev_get_drvdata(dev);
1072 	if (!g2d)
1073 		return -EFAULT;
1074 
1075 	node = g2d_get_cmdlist(g2d);
1076 	if (!node)
1077 		return -ENOMEM;
1078 
1079 	node->event = NULL;
1080 
1081 	if (req->event_type != G2D_EVENT_NOT) {
1082 		spin_lock_irqsave(&drm_dev->event_lock, flags);
1083 		if (file->event_space < sizeof(e->event)) {
1084 			spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1085 			ret = -ENOMEM;
1086 			goto err;
1087 		}
1088 		file->event_space -= sizeof(e->event);
1089 		spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1090 
1091 		e = kzalloc(sizeof(*node->event), GFP_KERNEL);
1092 		if (!e) {
1093 			dev_err(dev, "failed to allocate event\n");
1094 
1095 			spin_lock_irqsave(&drm_dev->event_lock, flags);
1096 			file->event_space += sizeof(e->event);
1097 			spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1098 
1099 			ret = -ENOMEM;
1100 			goto err;
1101 		}
1102 
1103 		e->event.base.type = DRM_EXYNOS_G2D_EVENT;
1104 		e->event.base.length = sizeof(e->event);
1105 		e->event.user_data = req->user_data;
1106 		e->base.event = &e->event.base;
1107 		e->base.file_priv = file;
1108 		e->base.destroy = (void (*) (struct drm_pending_event *)) kfree;
1109 
1110 		node->event = e;
1111 	}
1112 
1113 	cmdlist = node->cmdlist;
1114 
1115 	cmdlist->last = 0;
1116 
1117 	/*
1118 	 * If don't clear SFR registers, the cmdlist is affected by register
1119 	 * values of previous cmdlist. G2D hw executes SFR clear command and
1120 	 * a next command at the same time then the next command is ignored and
1121 	 * is executed rightly from next next command, so needs a dummy command
1122 	 * to next command of SFR clear command.
1123 	 */
1124 	cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
1125 	cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
1126 	cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
1127 	cmdlist->data[cmdlist->last++] = 0;
1128 
1129 	/*
1130 	 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1131 	 * and GCF bit should be set to INTEN register if user wants
1132 	 * G2D interrupt event once current command list execution is
1133 	 * finished.
1134 	 * Otherwise only ACF bit should be set to INTEN register so
1135 	 * that one interrupt is occured after all command lists
1136 	 * have been completed.
1137 	 */
1138 	if (node->event) {
1139 		cmdlist->data[cmdlist->last++] = G2D_INTEN;
1140 		cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
1141 		cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
1142 		cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
1143 	} else {
1144 		cmdlist->data[cmdlist->last++] = G2D_INTEN;
1145 		cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
1146 	}
1147 
1148 	/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
1149 	size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
1150 	if (size > G2D_CMDLIST_DATA_NUM) {
1151 		dev_err(dev, "cmdlist size is too big\n");
1152 		ret = -EINVAL;
1153 		goto err_free_event;
1154 	}
1155 
1156 	cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd;
1157 
1158 	if (copy_from_user(cmdlist->data + cmdlist->last,
1159 				(void __user *)cmd,
1160 				sizeof(*cmd) * req->cmd_nr)) {
1161 		ret = -EFAULT;
1162 		goto err_free_event;
1163 	}
1164 	cmdlist->last += req->cmd_nr * 2;
1165 
1166 	ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
1167 	if (ret < 0)
1168 		goto err_free_event;
1169 
1170 	node->buf_info.map_nr = req->cmd_buf_nr;
1171 	if (req->cmd_buf_nr) {
1172 		struct drm_exynos_g2d_cmd *cmd_buf;
1173 
1174 		cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf;
1175 
1176 		if (copy_from_user(cmdlist->data + cmdlist->last,
1177 					(void __user *)cmd_buf,
1178 					sizeof(*cmd_buf) * req->cmd_buf_nr)) {
1179 			ret = -EFAULT;
1180 			goto err_free_event;
1181 		}
1182 		cmdlist->last += req->cmd_buf_nr * 2;
1183 
1184 		ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
1185 		if (ret < 0)
1186 			goto err_free_event;
1187 
1188 		ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
1189 		if (ret < 0)
1190 			goto err_unmap;
1191 	}
1192 
1193 	cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
1194 	cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
1195 
1196 	/* head */
1197 	cmdlist->head = cmdlist->last / 2;
1198 
1199 	/* tail */
1200 	cmdlist->data[cmdlist->last] = 0;
1201 
1202 	g2d_add_cmdlist_to_inuse(g2d_priv, node);
1203 
1204 	return 0;
1205 
1206 err_unmap:
1207 	g2d_unmap_cmdlist_gem(g2d, node, file);
1208 err_free_event:
1209 	if (node->event) {
1210 		spin_lock_irqsave(&drm_dev->event_lock, flags);
1211 		file->event_space += sizeof(e->event);
1212 		spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1213 		kfree(node->event);
1214 	}
1215 err:
1216 	g2d_put_cmdlist(g2d, node);
1217 	return ret;
1218 }
1219 EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl);
1220 
1221 int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1222 			  struct drm_file *file)
1223 {
1224 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1225 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1226 	struct device *dev = g2d_priv->dev;
1227 	struct g2d_data *g2d;
1228 	struct drm_exynos_g2d_exec *req = data;
1229 	struct g2d_runqueue_node *runqueue_node;
1230 	struct list_head *run_cmdlist;
1231 	struct list_head *event_list;
1232 
1233 	if (!dev)
1234 		return -ENODEV;
1235 
1236 	g2d = dev_get_drvdata(dev);
1237 	if (!g2d)
1238 		return -EFAULT;
1239 
1240 	runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
1241 	if (!runqueue_node) {
1242 		dev_err(dev, "failed to allocate memory\n");
1243 		return -ENOMEM;
1244 	}
1245 	run_cmdlist = &runqueue_node->run_cmdlist;
1246 	event_list = &runqueue_node->event_list;
1247 	INIT_LIST_HEAD(run_cmdlist);
1248 	INIT_LIST_HEAD(event_list);
1249 	init_completion(&runqueue_node->complete);
1250 	runqueue_node->async = req->async;
1251 
1252 	list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
1253 	list_splice_init(&g2d_priv->event_list, event_list);
1254 
1255 	if (list_empty(run_cmdlist)) {
1256 		dev_err(dev, "there is no inuse cmdlist\n");
1257 		kmem_cache_free(g2d->runqueue_slab, runqueue_node);
1258 		return -EPERM;
1259 	}
1260 
1261 	mutex_lock(&g2d->runqueue_mutex);
1262 	runqueue_node->pid = current->pid;
1263 	runqueue_node->filp = file;
1264 	list_add_tail(&runqueue_node->list, &g2d->runqueue);
1265 	if (!g2d->runqueue_node)
1266 		g2d_exec_runqueue(g2d);
1267 	mutex_unlock(&g2d->runqueue_mutex);
1268 
1269 	if (runqueue_node->async)
1270 		goto out;
1271 
1272 	wait_for_completion(&runqueue_node->complete);
1273 	g2d_free_runqueue_node(g2d, runqueue_node);
1274 
1275 out:
1276 	return 0;
1277 }
1278 EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl);
1279 
1280 static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1281 {
1282 	struct g2d_data *g2d;
1283 	int ret;
1284 
1285 	g2d = dev_get_drvdata(dev);
1286 	if (!g2d)
1287 		return -EFAULT;
1288 
1289 	/* allocate dma-aware cmdlist buffer. */
1290 	ret = g2d_init_cmdlist(g2d);
1291 	if (ret < 0) {
1292 		dev_err(dev, "cmdlist init failed\n");
1293 		return ret;
1294 	}
1295 
1296 	if (!is_drm_iommu_supported(drm_dev))
1297 		return 0;
1298 
1299 	ret = drm_iommu_attach_device(drm_dev, dev);
1300 	if (ret < 0) {
1301 		dev_err(dev, "failed to enable iommu.\n");
1302 		g2d_fini_cmdlist(g2d);
1303 	}
1304 
1305 	return ret;
1306 
1307 }
1308 
1309 static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
1310 {
1311 	if (!is_drm_iommu_supported(drm_dev))
1312 		return;
1313 
1314 	drm_iommu_detach_device(drm_dev, dev);
1315 }
1316 
1317 static int g2d_open(struct drm_device *drm_dev, struct device *dev,
1318 			struct drm_file *file)
1319 {
1320 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1321 	struct exynos_drm_g2d_private *g2d_priv;
1322 
1323 	g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
1324 	if (!g2d_priv) {
1325 		dev_err(dev, "failed to allocate g2d private data\n");
1326 		return -ENOMEM;
1327 	}
1328 
1329 	g2d_priv->dev = dev;
1330 	file_priv->g2d_priv = g2d_priv;
1331 
1332 	INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
1333 	INIT_LIST_HEAD(&g2d_priv->event_list);
1334 	INIT_LIST_HEAD(&g2d_priv->userptr_list);
1335 
1336 	return 0;
1337 }
1338 
1339 static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1340 			struct drm_file *file)
1341 {
1342 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1343 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1344 	struct g2d_data *g2d;
1345 	struct g2d_cmdlist_node *node, *n;
1346 
1347 	if (!dev)
1348 		return;
1349 
1350 	g2d = dev_get_drvdata(dev);
1351 	if (!g2d)
1352 		return;
1353 
1354 	mutex_lock(&g2d->cmdlist_mutex);
1355 	list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
1356 		/*
1357 		 * unmap all gem objects not completed.
1358 		 *
1359 		 * P.S. if current process was terminated forcely then
1360 		 * there may be some commands in inuse_cmdlist so unmap
1361 		 * them.
1362 		 */
1363 		g2d_unmap_cmdlist_gem(g2d, node, file);
1364 		list_move_tail(&node->list, &g2d->free_cmdlist);
1365 	}
1366 	mutex_unlock(&g2d->cmdlist_mutex);
1367 
1368 	/* release all g2d_userptr in pool. */
1369 	g2d_userptr_free_all(drm_dev, g2d, file);
1370 
1371 	kfree(file_priv->g2d_priv);
1372 }
1373 
1374 static int g2d_probe(struct platform_device *pdev)
1375 {
1376 	struct device *dev = &pdev->dev;
1377 	struct resource *res;
1378 	struct g2d_data *g2d;
1379 	struct exynos_drm_subdrv *subdrv;
1380 	int ret;
1381 
1382 	g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL);
1383 	if (!g2d) {
1384 		dev_err(dev, "failed to allocate driver data\n");
1385 		return -ENOMEM;
1386 	}
1387 
1388 	g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1389 			sizeof(struct g2d_runqueue_node), 0, 0, NULL);
1390 	if (!g2d->runqueue_slab)
1391 		return -ENOMEM;
1392 
1393 	g2d->dev = dev;
1394 
1395 	g2d->g2d_workq = create_singlethread_workqueue("g2d");
1396 	if (!g2d->g2d_workq) {
1397 		dev_err(dev, "failed to create workqueue\n");
1398 		ret = -EINVAL;
1399 		goto err_destroy_slab;
1400 	}
1401 
1402 	INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1403 	INIT_LIST_HEAD(&g2d->free_cmdlist);
1404 	INIT_LIST_HEAD(&g2d->runqueue);
1405 
1406 	mutex_init(&g2d->cmdlist_mutex);
1407 	mutex_init(&g2d->runqueue_mutex);
1408 
1409 	g2d->gate_clk = devm_clk_get(dev, "fimg2d");
1410 	if (IS_ERR(g2d->gate_clk)) {
1411 		dev_err(dev, "failed to get gate clock\n");
1412 		ret = PTR_ERR(g2d->gate_clk);
1413 		goto err_destroy_workqueue;
1414 	}
1415 
1416 	pm_runtime_enable(dev);
1417 
1418 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1419 
1420 	g2d->regs = devm_ioremap_resource(dev, res);
1421 	if (IS_ERR(g2d->regs)) {
1422 		ret = PTR_ERR(g2d->regs);
1423 		goto err_put_clk;
1424 	}
1425 
1426 	g2d->irq = platform_get_irq(pdev, 0);
1427 	if (g2d->irq < 0) {
1428 		dev_err(dev, "failed to get irq\n");
1429 		ret = g2d->irq;
1430 		goto err_put_clk;
1431 	}
1432 
1433 	ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0,
1434 								"drm_g2d", g2d);
1435 	if (ret < 0) {
1436 		dev_err(dev, "irq request failed\n");
1437 		goto err_put_clk;
1438 	}
1439 
1440 	g2d->max_pool = MAX_POOL;
1441 
1442 	platform_set_drvdata(pdev, g2d);
1443 
1444 	subdrv = &g2d->subdrv;
1445 	subdrv->dev = dev;
1446 	subdrv->probe = g2d_subdrv_probe;
1447 	subdrv->remove = g2d_subdrv_remove;
1448 	subdrv->open = g2d_open;
1449 	subdrv->close = g2d_close;
1450 
1451 	ret = exynos_drm_subdrv_register(subdrv);
1452 	if (ret < 0) {
1453 		dev_err(dev, "failed to register drm g2d device\n");
1454 		goto err_put_clk;
1455 	}
1456 
1457 	dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
1458 			G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1459 
1460 	return 0;
1461 
1462 err_put_clk:
1463 	pm_runtime_disable(dev);
1464 err_destroy_workqueue:
1465 	destroy_workqueue(g2d->g2d_workq);
1466 err_destroy_slab:
1467 	kmem_cache_destroy(g2d->runqueue_slab);
1468 	return ret;
1469 }
1470 
1471 static int g2d_remove(struct platform_device *pdev)
1472 {
1473 	struct g2d_data *g2d = platform_get_drvdata(pdev);
1474 
1475 	cancel_work_sync(&g2d->runqueue_work);
1476 	exynos_drm_subdrv_unregister(&g2d->subdrv);
1477 
1478 	while (g2d->runqueue_node) {
1479 		g2d_free_runqueue_node(g2d, g2d->runqueue_node);
1480 		g2d->runqueue_node = g2d_get_runqueue_node(g2d);
1481 	}
1482 
1483 	pm_runtime_disable(&pdev->dev);
1484 
1485 	g2d_fini_cmdlist(g2d);
1486 	destroy_workqueue(g2d->g2d_workq);
1487 	kmem_cache_destroy(g2d->runqueue_slab);
1488 
1489 	return 0;
1490 }
1491 
1492 #ifdef CONFIG_PM_SLEEP
1493 static int g2d_suspend(struct device *dev)
1494 {
1495 	struct g2d_data *g2d = dev_get_drvdata(dev);
1496 
1497 	mutex_lock(&g2d->runqueue_mutex);
1498 	g2d->suspended = true;
1499 	mutex_unlock(&g2d->runqueue_mutex);
1500 
1501 	while (g2d->runqueue_node)
1502 		/* FIXME: good range? */
1503 		usleep_range(500, 1000);
1504 
1505 	flush_work(&g2d->runqueue_work);
1506 
1507 	return 0;
1508 }
1509 
1510 static int g2d_resume(struct device *dev)
1511 {
1512 	struct g2d_data *g2d = dev_get_drvdata(dev);
1513 
1514 	g2d->suspended = false;
1515 	g2d_exec_runqueue(g2d);
1516 
1517 	return 0;
1518 }
1519 #endif
1520 
1521 static SIMPLE_DEV_PM_OPS(g2d_pm_ops, g2d_suspend, g2d_resume);
1522 
1523 #ifdef CONFIG_OF
1524 static const struct of_device_id exynos_g2d_match[] = {
1525 	{ .compatible = "samsung,exynos5250-g2d" },
1526 	{},
1527 };
1528 MODULE_DEVICE_TABLE(of, exynos_g2d_match);
1529 #endif
1530 
1531 struct platform_driver g2d_driver = {
1532 	.probe		= g2d_probe,
1533 	.remove		= g2d_remove,
1534 	.driver		= {
1535 		.name	= "s5p-g2d",
1536 		.owner	= THIS_MODULE,
1537 		.pm	= &g2d_pm_ops,
1538 		.of_match_table = of_match_ptr(exynos_g2d_match),
1539 	},
1540 };
1541