11c248b7dSInki Dae /* exynos_drm_fimd.c 21c248b7dSInki Dae * 31c248b7dSInki Dae * Copyright (C) 2011 Samsung Electronics Co.Ltd 41c248b7dSInki Dae * Authors: 51c248b7dSInki Dae * Joonyoung Shim <jy0922.shim@samsung.com> 61c248b7dSInki Dae * Inki Dae <inki.dae@samsung.com> 71c248b7dSInki Dae * 81c248b7dSInki Dae * This program is free software; you can redistribute it and/or modify it 91c248b7dSInki Dae * under the terms of the GNU General Public License as published by the 101c248b7dSInki Dae * Free Software Foundation; either version 2 of the License, or (at your 111c248b7dSInki Dae * option) any later version. 121c248b7dSInki Dae * 131c248b7dSInki Dae */ 14760285e7SDavid Howells #include <drm/drmP.h> 151c248b7dSInki Dae 161c248b7dSInki Dae #include <linux/kernel.h> 171c248b7dSInki Dae #include <linux/module.h> 181c248b7dSInki Dae #include <linux/platform_device.h> 191c248b7dSInki Dae #include <linux/clk.h> 20cb91f6a0SJoonyoung Shim #include <linux/pm_runtime.h> 211c248b7dSInki Dae 225a213a55SLeela Krishna Amudala #include <video/samsung_fimd.h> 231c248b7dSInki Dae #include <drm/exynos_drm.h> 241c248b7dSInki Dae 251c248b7dSInki Dae #include "exynos_drm_drv.h" 261c248b7dSInki Dae #include "exynos_drm_fbdev.h" 271c248b7dSInki Dae #include "exynos_drm_crtc.h" 28bcc5cd1cSInki Dae #include "exynos_drm_iommu.h" 291c248b7dSInki Dae 301c248b7dSInki Dae /* 311c248b7dSInki Dae * FIMD is stand for Fully Interactive Mobile Display and 321c248b7dSInki Dae * as a display controller, it transfers contents drawn on memory 331c248b7dSInki Dae * to a LCD Panel through Display Interfaces such as RGB or 341c248b7dSInki Dae * CPU Interface. 351c248b7dSInki Dae */ 361c248b7dSInki Dae 371c248b7dSInki Dae /* position control register for hardware window 0, 2 ~ 4.*/ 381c248b7dSInki Dae #define VIDOSD_A(win) (VIDOSD_BASE + 0x00 + (win) * 16) 391c248b7dSInki Dae #define VIDOSD_B(win) (VIDOSD_BASE + 0x04 + (win) * 16) 401c248b7dSInki Dae /* size control register for hardware window 0. */ 411c248b7dSInki Dae #define VIDOSD_C_SIZE_W0 (VIDOSD_BASE + 0x08) 421c248b7dSInki Dae /* alpha control register for hardware window 1 ~ 4. */ 431c248b7dSInki Dae #define VIDOSD_C(win) (VIDOSD_BASE + 0x18 + (win) * 16) 441c248b7dSInki Dae /* size control register for hardware window 1 ~ 4. */ 451c248b7dSInki Dae #define VIDOSD_D(win) (VIDOSD_BASE + 0x0C + (win) * 16) 461c248b7dSInki Dae 471c248b7dSInki Dae #define VIDWx_BUF_START(win, buf) (VIDW_BUF_START(buf) + (win) * 8) 481c248b7dSInki Dae #define VIDWx_BUF_END(win, buf) (VIDW_BUF_END(buf) + (win) * 8) 491c248b7dSInki Dae #define VIDWx_BUF_SIZE(win, buf) (VIDW_BUF_SIZE(buf) + (win) * 4) 501c248b7dSInki Dae 511c248b7dSInki Dae /* color key control register for hardware window 1 ~ 4. */ 521c248b7dSInki Dae #define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + (x * 8)) 531c248b7dSInki Dae /* color key value register for hardware window 1 ~ 4. */ 541c248b7dSInki Dae #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + (x * 8)) 551c248b7dSInki Dae 561c248b7dSInki Dae /* FIMD has totally five hardware windows. */ 571c248b7dSInki Dae #define WINDOWS_NR 5 581c248b7dSInki Dae 591c248b7dSInki Dae #define get_fimd_context(dev) platform_get_drvdata(to_platform_device(dev)) 601c248b7dSInki Dae 61e2e13389SLeela Krishna Amudala struct fimd_driver_data { 62e2e13389SLeela Krishna Amudala unsigned int timing_base; 63e2e13389SLeela Krishna Amudala }; 64e2e13389SLeela Krishna Amudala 656ecf18f9SSachin Kamat static struct fimd_driver_data exynos4_fimd_driver_data = { 66e2e13389SLeela Krishna Amudala .timing_base = 0x0, 67e2e13389SLeela Krishna Amudala }; 68e2e13389SLeela Krishna Amudala 696ecf18f9SSachin Kamat static struct fimd_driver_data exynos5_fimd_driver_data = { 70e2e13389SLeela Krishna Amudala .timing_base = 0x20000, 71e2e13389SLeela Krishna Amudala }; 72e2e13389SLeela Krishna Amudala 731c248b7dSInki Dae struct fimd_win_data { 741c248b7dSInki Dae unsigned int offset_x; 751c248b7dSInki Dae unsigned int offset_y; 7619c8b834SInki Dae unsigned int ovl_width; 7719c8b834SInki Dae unsigned int ovl_height; 7819c8b834SInki Dae unsigned int fb_width; 7919c8b834SInki Dae unsigned int fb_height; 801c248b7dSInki Dae unsigned int bpp; 812c871127SInki Dae dma_addr_t dma_addr; 821c248b7dSInki Dae void __iomem *vaddr; 831c248b7dSInki Dae unsigned int buf_offsize; 841c248b7dSInki Dae unsigned int line_size; /* bytes */ 85ec05da95SInki Dae bool enabled; 86db7e55aeSPrathyush K bool resume; 871c248b7dSInki Dae }; 881c248b7dSInki Dae 891c248b7dSInki Dae struct fimd_context { 901c248b7dSInki Dae struct exynos_drm_subdrv subdrv; 911c248b7dSInki Dae int irq; 921c248b7dSInki Dae struct drm_crtc *crtc; 931c248b7dSInki Dae struct clk *bus_clk; 941c248b7dSInki Dae struct clk *lcd_clk; 951c248b7dSInki Dae void __iomem *regs; 961c248b7dSInki Dae struct fimd_win_data win_data[WINDOWS_NR]; 971c248b7dSInki Dae unsigned int clkdiv; 981c248b7dSInki Dae unsigned int default_win; 991c248b7dSInki Dae unsigned long irq_flags; 1001c248b7dSInki Dae u32 vidcon0; 1011c248b7dSInki Dae u32 vidcon1; 102cb91f6a0SJoonyoung Shim bool suspended; 103c32b06efSInki Dae struct mutex lock; 10401ce113cSPrathyush K wait_queue_head_t wait_vsync_queue; 10501ce113cSPrathyush K atomic_t wait_vsync_event; 1061c248b7dSInki Dae 107607c50d4SEun-Chul Kim struct exynos_drm_panel_info *panel; 1081c248b7dSInki Dae }; 1091c248b7dSInki Dae 110e2e13389SLeela Krishna Amudala static inline struct fimd_driver_data *drm_fimd_get_driver_data( 111e2e13389SLeela Krishna Amudala struct platform_device *pdev) 112e2e13389SLeela Krishna Amudala { 113e2e13389SLeela Krishna Amudala return (struct fimd_driver_data *) 114e2e13389SLeela Krishna Amudala platform_get_device_id(pdev)->driver_data; 115e2e13389SLeela Krishna Amudala } 116e2e13389SLeela Krishna Amudala 1171c248b7dSInki Dae static bool fimd_display_is_connected(struct device *dev) 1181c248b7dSInki Dae { 1191c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1201c248b7dSInki Dae 1211c248b7dSInki Dae /* TODO. */ 1221c248b7dSInki Dae 1231c248b7dSInki Dae return true; 1241c248b7dSInki Dae } 1251c248b7dSInki Dae 126607c50d4SEun-Chul Kim static void *fimd_get_panel(struct device *dev) 1271c248b7dSInki Dae { 1281c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 1291c248b7dSInki Dae 1301c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1311c248b7dSInki Dae 132607c50d4SEun-Chul Kim return ctx->panel; 1331c248b7dSInki Dae } 1341c248b7dSInki Dae 1351c248b7dSInki Dae static int fimd_check_timing(struct device *dev, void *timing) 1361c248b7dSInki Dae { 1371c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1381c248b7dSInki Dae 1391c248b7dSInki Dae /* TODO. */ 1401c248b7dSInki Dae 1411c248b7dSInki Dae return 0; 1421c248b7dSInki Dae } 1431c248b7dSInki Dae 1441c248b7dSInki Dae static int fimd_display_power_on(struct device *dev, int mode) 1451c248b7dSInki Dae { 1461c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1471c248b7dSInki Dae 148ec05da95SInki Dae /* TODO */ 1491c248b7dSInki Dae 1501c248b7dSInki Dae return 0; 1511c248b7dSInki Dae } 1521c248b7dSInki Dae 15374ccc539SInki Dae static struct exynos_drm_display_ops fimd_display_ops = { 1541c248b7dSInki Dae .type = EXYNOS_DISPLAY_TYPE_LCD, 1551c248b7dSInki Dae .is_connected = fimd_display_is_connected, 156607c50d4SEun-Chul Kim .get_panel = fimd_get_panel, 1571c248b7dSInki Dae .check_timing = fimd_check_timing, 1581c248b7dSInki Dae .power_on = fimd_display_power_on, 1591c248b7dSInki Dae }; 1601c248b7dSInki Dae 161ec05da95SInki Dae static void fimd_dpms(struct device *subdrv_dev, int mode) 162ec05da95SInki Dae { 163c32b06efSInki Dae struct fimd_context *ctx = get_fimd_context(subdrv_dev); 164c32b06efSInki Dae 165ec05da95SInki Dae DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode); 166ec05da95SInki Dae 167c32b06efSInki Dae mutex_lock(&ctx->lock); 168c32b06efSInki Dae 169cb91f6a0SJoonyoung Shim switch (mode) { 170cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_ON: 171c32b06efSInki Dae /* 172c32b06efSInki Dae * enable fimd hardware only if suspended status. 173c32b06efSInki Dae * 174c32b06efSInki Dae * P.S. fimd_dpms function would be called at booting time so 175c32b06efSInki Dae * clk_enable could be called double time. 176c32b06efSInki Dae */ 177c32b06efSInki Dae if (ctx->suspended) 178cb91f6a0SJoonyoung Shim pm_runtime_get_sync(subdrv_dev); 179cb91f6a0SJoonyoung Shim break; 180cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_STANDBY: 181cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_SUSPEND: 182cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_OFF: 183373af0c0SInki Dae if (!ctx->suspended) 184cb91f6a0SJoonyoung Shim pm_runtime_put_sync(subdrv_dev); 185cb91f6a0SJoonyoung Shim break; 186cb91f6a0SJoonyoung Shim default: 187cb91f6a0SJoonyoung Shim DRM_DEBUG_KMS("unspecified mode %d\n", mode); 188cb91f6a0SJoonyoung Shim break; 189cb91f6a0SJoonyoung Shim } 190c32b06efSInki Dae 191c32b06efSInki Dae mutex_unlock(&ctx->lock); 192ec05da95SInki Dae } 193ec05da95SInki Dae 194ec05da95SInki Dae static void fimd_apply(struct device *subdrv_dev) 195ec05da95SInki Dae { 196ec05da95SInki Dae struct fimd_context *ctx = get_fimd_context(subdrv_dev); 197677e84c1SJoonyoung Shim struct exynos_drm_manager *mgr = ctx->subdrv.manager; 198ec05da95SInki Dae struct exynos_drm_manager_ops *mgr_ops = mgr->ops; 199ec05da95SInki Dae struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops; 200ec05da95SInki Dae struct fimd_win_data *win_data; 201864ee9e6SJoonyoung Shim int i; 202ec05da95SInki Dae 203ec05da95SInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 204ec05da95SInki Dae 205864ee9e6SJoonyoung Shim for (i = 0; i < WINDOWS_NR; i++) { 206864ee9e6SJoonyoung Shim win_data = &ctx->win_data[i]; 207ec05da95SInki Dae if (win_data->enabled && (ovl_ops && ovl_ops->commit)) 208864ee9e6SJoonyoung Shim ovl_ops->commit(subdrv_dev, i); 209864ee9e6SJoonyoung Shim } 210ec05da95SInki Dae 211ec05da95SInki Dae if (mgr_ops && mgr_ops->commit) 212ec05da95SInki Dae mgr_ops->commit(subdrv_dev); 213ec05da95SInki Dae } 214ec05da95SInki Dae 2151c248b7dSInki Dae static void fimd_commit(struct device *dev) 2161c248b7dSInki Dae { 2171c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 218607c50d4SEun-Chul Kim struct exynos_drm_panel_info *panel = ctx->panel; 219607c50d4SEun-Chul Kim struct fb_videomode *timing = &panel->timing; 220e2e13389SLeela Krishna Amudala struct fimd_driver_data *driver_data; 221e2e13389SLeela Krishna Amudala struct platform_device *pdev = to_platform_device(dev); 2221c248b7dSInki Dae u32 val; 2231c248b7dSInki Dae 224e2e13389SLeela Krishna Amudala driver_data = drm_fimd_get_driver_data(pdev); 225e30d4bcfSInki Dae if (ctx->suspended) 226e30d4bcfSInki Dae return; 227e30d4bcfSInki Dae 2281c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 2291c248b7dSInki Dae 2301c248b7dSInki Dae /* setup polarity values from machine code. */ 231e2e13389SLeela Krishna Amudala writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1); 2321c248b7dSInki Dae 2331c248b7dSInki Dae /* setup vertical timing values. */ 2341c248b7dSInki Dae val = VIDTCON0_VBPD(timing->upper_margin - 1) | 2351c248b7dSInki Dae VIDTCON0_VFPD(timing->lower_margin - 1) | 2361c248b7dSInki Dae VIDTCON0_VSPW(timing->vsync_len - 1); 237e2e13389SLeela Krishna Amudala writel(val, ctx->regs + driver_data->timing_base + VIDTCON0); 2381c248b7dSInki Dae 2391c248b7dSInki Dae /* setup horizontal timing values. */ 2401c248b7dSInki Dae val = VIDTCON1_HBPD(timing->left_margin - 1) | 2411c248b7dSInki Dae VIDTCON1_HFPD(timing->right_margin - 1) | 2421c248b7dSInki Dae VIDTCON1_HSPW(timing->hsync_len - 1); 243e2e13389SLeela Krishna Amudala writel(val, ctx->regs + driver_data->timing_base + VIDTCON1); 2441c248b7dSInki Dae 2451c248b7dSInki Dae /* setup horizontal and vertical display size. */ 2461c248b7dSInki Dae val = VIDTCON2_LINEVAL(timing->yres - 1) | 2471c248b7dSInki Dae VIDTCON2_HOZVAL(timing->xres - 1); 248e2e13389SLeela Krishna Amudala writel(val, ctx->regs + driver_data->timing_base + VIDTCON2); 2491c248b7dSInki Dae 2501c248b7dSInki Dae /* setup clock source, clock divider, enable dma. */ 2511c248b7dSInki Dae val = ctx->vidcon0; 2521c248b7dSInki Dae val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR); 2531c248b7dSInki Dae 2541c248b7dSInki Dae if (ctx->clkdiv > 1) 2551c248b7dSInki Dae val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR; 2561c248b7dSInki Dae else 2571c248b7dSInki Dae val &= ~VIDCON0_CLKDIR; /* 1:1 clock */ 2581c248b7dSInki Dae 2591c248b7dSInki Dae /* 2601c248b7dSInki Dae * fields of register with prefix '_F' would be updated 2611c248b7dSInki Dae * at vsync(same as dma start) 2621c248b7dSInki Dae */ 2631c248b7dSInki Dae val |= VIDCON0_ENVID | VIDCON0_ENVID_F; 2641c248b7dSInki Dae writel(val, ctx->regs + VIDCON0); 2651c248b7dSInki Dae } 2661c248b7dSInki Dae 2671c248b7dSInki Dae static int fimd_enable_vblank(struct device *dev) 2681c248b7dSInki Dae { 2691c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 2701c248b7dSInki Dae u32 val; 2711c248b7dSInki Dae 2721c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 2731c248b7dSInki Dae 274cb91f6a0SJoonyoung Shim if (ctx->suspended) 275cb91f6a0SJoonyoung Shim return -EPERM; 276cb91f6a0SJoonyoung Shim 2771c248b7dSInki Dae if (!test_and_set_bit(0, &ctx->irq_flags)) { 2781c248b7dSInki Dae val = readl(ctx->regs + VIDINTCON0); 2791c248b7dSInki Dae 2801c248b7dSInki Dae val |= VIDINTCON0_INT_ENABLE; 2811c248b7dSInki Dae val |= VIDINTCON0_INT_FRAME; 2821c248b7dSInki Dae 2831c248b7dSInki Dae val &= ~VIDINTCON0_FRAMESEL0_MASK; 2841c248b7dSInki Dae val |= VIDINTCON0_FRAMESEL0_VSYNC; 2851c248b7dSInki Dae val &= ~VIDINTCON0_FRAMESEL1_MASK; 2861c248b7dSInki Dae val |= VIDINTCON0_FRAMESEL1_NONE; 2871c248b7dSInki Dae 2881c248b7dSInki Dae writel(val, ctx->regs + VIDINTCON0); 2891c248b7dSInki Dae } 2901c248b7dSInki Dae 2911c248b7dSInki Dae return 0; 2921c248b7dSInki Dae } 2931c248b7dSInki Dae 2941c248b7dSInki Dae static void fimd_disable_vblank(struct device *dev) 2951c248b7dSInki Dae { 2961c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 2971c248b7dSInki Dae u32 val; 2981c248b7dSInki Dae 2991c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 3001c248b7dSInki Dae 301cb91f6a0SJoonyoung Shim if (ctx->suspended) 302cb91f6a0SJoonyoung Shim return; 303cb91f6a0SJoonyoung Shim 3041c248b7dSInki Dae if (test_and_clear_bit(0, &ctx->irq_flags)) { 3051c248b7dSInki Dae val = readl(ctx->regs + VIDINTCON0); 3061c248b7dSInki Dae 3071c248b7dSInki Dae val &= ~VIDINTCON0_INT_FRAME; 3081c248b7dSInki Dae val &= ~VIDINTCON0_INT_ENABLE; 3091c248b7dSInki Dae 3101c248b7dSInki Dae writel(val, ctx->regs + VIDINTCON0); 3111c248b7dSInki Dae } 3121c248b7dSInki Dae } 3131c248b7dSInki Dae 31407033970SPrathyush K static void fimd_wait_for_vblank(struct device *dev) 31507033970SPrathyush K { 31607033970SPrathyush K struct fimd_context *ctx = get_fimd_context(dev); 31707033970SPrathyush K 31801ce113cSPrathyush K if (ctx->suspended) 31901ce113cSPrathyush K return; 32001ce113cSPrathyush K 32101ce113cSPrathyush K atomic_set(&ctx->wait_vsync_event, 1); 32201ce113cSPrathyush K 32301ce113cSPrathyush K /* 32401ce113cSPrathyush K * wait for FIMD to signal VSYNC interrupt or return after 32501ce113cSPrathyush K * timeout which is set to 50ms (refresh rate of 20). 32601ce113cSPrathyush K */ 32701ce113cSPrathyush K if (!wait_event_timeout(ctx->wait_vsync_queue, 32801ce113cSPrathyush K !atomic_read(&ctx->wait_vsync_event), 32901ce113cSPrathyush K DRM_HZ/20)) 33007033970SPrathyush K DRM_DEBUG_KMS("vblank wait timed out.\n"); 33107033970SPrathyush K } 33207033970SPrathyush K 3331c248b7dSInki Dae static struct exynos_drm_manager_ops fimd_manager_ops = { 334ec05da95SInki Dae .dpms = fimd_dpms, 335ec05da95SInki Dae .apply = fimd_apply, 3361c248b7dSInki Dae .commit = fimd_commit, 3371c248b7dSInki Dae .enable_vblank = fimd_enable_vblank, 3381c248b7dSInki Dae .disable_vblank = fimd_disable_vblank, 33907033970SPrathyush K .wait_for_vblank = fimd_wait_for_vblank, 3401c248b7dSInki Dae }; 3411c248b7dSInki Dae 3421c248b7dSInki Dae static void fimd_win_mode_set(struct device *dev, 3431c248b7dSInki Dae struct exynos_drm_overlay *overlay) 3441c248b7dSInki Dae { 3451c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 3461c248b7dSInki Dae struct fimd_win_data *win_data; 347864ee9e6SJoonyoung Shim int win; 34819c8b834SInki Dae unsigned long offset; 3491c248b7dSInki Dae 3501c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 3511c248b7dSInki Dae 3521c248b7dSInki Dae if (!overlay) { 3531c248b7dSInki Dae dev_err(dev, "overlay is NULL\n"); 3541c248b7dSInki Dae return; 3551c248b7dSInki Dae } 3561c248b7dSInki Dae 357864ee9e6SJoonyoung Shim win = overlay->zpos; 358864ee9e6SJoonyoung Shim if (win == DEFAULT_ZPOS) 359864ee9e6SJoonyoung Shim win = ctx->default_win; 360864ee9e6SJoonyoung Shim 361864ee9e6SJoonyoung Shim if (win < 0 || win > WINDOWS_NR) 362864ee9e6SJoonyoung Shim return; 363864ee9e6SJoonyoung Shim 36419c8b834SInki Dae offset = overlay->fb_x * (overlay->bpp >> 3); 36519c8b834SInki Dae offset += overlay->fb_y * overlay->pitch; 36619c8b834SInki Dae 36719c8b834SInki Dae DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch); 36819c8b834SInki Dae 369864ee9e6SJoonyoung Shim win_data = &ctx->win_data[win]; 3701c248b7dSInki Dae 37119c8b834SInki Dae win_data->offset_x = overlay->crtc_x; 37219c8b834SInki Dae win_data->offset_y = overlay->crtc_y; 37319c8b834SInki Dae win_data->ovl_width = overlay->crtc_width; 37419c8b834SInki Dae win_data->ovl_height = overlay->crtc_height; 37519c8b834SInki Dae win_data->fb_width = overlay->fb_width; 37619c8b834SInki Dae win_data->fb_height = overlay->fb_height; 377229d3534SSeung-Woo Kim win_data->dma_addr = overlay->dma_addr[0] + offset; 378229d3534SSeung-Woo Kim win_data->vaddr = overlay->vaddr[0] + offset; 3791c248b7dSInki Dae win_data->bpp = overlay->bpp; 38019c8b834SInki Dae win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) * 38119c8b834SInki Dae (overlay->bpp >> 3); 38219c8b834SInki Dae win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3); 38319c8b834SInki Dae 38419c8b834SInki Dae DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n", 38519c8b834SInki Dae win_data->offset_x, win_data->offset_y); 38619c8b834SInki Dae DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n", 38719c8b834SInki Dae win_data->ovl_width, win_data->ovl_height); 38819c8b834SInki Dae DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n", 3892c871127SInki Dae (unsigned long)win_data->dma_addr, 39019c8b834SInki Dae (unsigned long)win_data->vaddr); 39119c8b834SInki Dae DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n", 39219c8b834SInki Dae overlay->fb_width, overlay->crtc_width); 3931c248b7dSInki Dae } 3941c248b7dSInki Dae 3951c248b7dSInki Dae static void fimd_win_set_pixfmt(struct device *dev, unsigned int win) 3961c248b7dSInki Dae { 3971c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 3981c248b7dSInki Dae struct fimd_win_data *win_data = &ctx->win_data[win]; 3991c248b7dSInki Dae unsigned long val; 4001c248b7dSInki Dae 4011c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 4021c248b7dSInki Dae 4031c248b7dSInki Dae val = WINCONx_ENWIN; 4041c248b7dSInki Dae 4051c248b7dSInki Dae switch (win_data->bpp) { 4061c248b7dSInki Dae case 1: 4071c248b7dSInki Dae val |= WINCON0_BPPMODE_1BPP; 4081c248b7dSInki Dae val |= WINCONx_BITSWP; 4091c248b7dSInki Dae val |= WINCONx_BURSTLEN_4WORD; 4101c248b7dSInki Dae break; 4111c248b7dSInki Dae case 2: 4121c248b7dSInki Dae val |= WINCON0_BPPMODE_2BPP; 4131c248b7dSInki Dae val |= WINCONx_BITSWP; 4141c248b7dSInki Dae val |= WINCONx_BURSTLEN_8WORD; 4151c248b7dSInki Dae break; 4161c248b7dSInki Dae case 4: 4171c248b7dSInki Dae val |= WINCON0_BPPMODE_4BPP; 4181c248b7dSInki Dae val |= WINCONx_BITSWP; 4191c248b7dSInki Dae val |= WINCONx_BURSTLEN_8WORD; 4201c248b7dSInki Dae break; 4211c248b7dSInki Dae case 8: 4221c248b7dSInki Dae val |= WINCON0_BPPMODE_8BPP_PALETTE; 4231c248b7dSInki Dae val |= WINCONx_BURSTLEN_8WORD; 4241c248b7dSInki Dae val |= WINCONx_BYTSWP; 4251c248b7dSInki Dae break; 4261c248b7dSInki Dae case 16: 4271c248b7dSInki Dae val |= WINCON0_BPPMODE_16BPP_565; 4281c248b7dSInki Dae val |= WINCONx_HAWSWP; 4291c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 4301c248b7dSInki Dae break; 4311c248b7dSInki Dae case 24: 4321c248b7dSInki Dae val |= WINCON0_BPPMODE_24BPP_888; 4331c248b7dSInki Dae val |= WINCONx_WSWP; 4341c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 4351c248b7dSInki Dae break; 4361c248b7dSInki Dae case 32: 4371c248b7dSInki Dae val |= WINCON1_BPPMODE_28BPP_A4888 4381c248b7dSInki Dae | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL; 4391c248b7dSInki Dae val |= WINCONx_WSWP; 4401c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 4411c248b7dSInki Dae break; 4421c248b7dSInki Dae default: 4431c248b7dSInki Dae DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n"); 4441c248b7dSInki Dae 4451c248b7dSInki Dae val |= WINCON0_BPPMODE_24BPP_888; 4461c248b7dSInki Dae val |= WINCONx_WSWP; 4471c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 4481c248b7dSInki Dae break; 4491c248b7dSInki Dae } 4501c248b7dSInki Dae 4511c248b7dSInki Dae DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp); 4521c248b7dSInki Dae 4531c248b7dSInki Dae writel(val, ctx->regs + WINCON(win)); 4541c248b7dSInki Dae } 4551c248b7dSInki Dae 4561c248b7dSInki Dae static void fimd_win_set_colkey(struct device *dev, unsigned int win) 4571c248b7dSInki Dae { 4581c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 4591c248b7dSInki Dae unsigned int keycon0 = 0, keycon1 = 0; 4601c248b7dSInki Dae 4611c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 4621c248b7dSInki Dae 4631c248b7dSInki Dae keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F | 4641c248b7dSInki Dae WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0); 4651c248b7dSInki Dae 4661c248b7dSInki Dae keycon1 = WxKEYCON1_COLVAL(0xffffffff); 4671c248b7dSInki Dae 4681c248b7dSInki Dae writel(keycon0, ctx->regs + WKEYCON0_BASE(win)); 4691c248b7dSInki Dae writel(keycon1, ctx->regs + WKEYCON1_BASE(win)); 4701c248b7dSInki Dae } 4711c248b7dSInki Dae 472864ee9e6SJoonyoung Shim static void fimd_win_commit(struct device *dev, int zpos) 4731c248b7dSInki Dae { 4741c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 4751c248b7dSInki Dae struct fimd_win_data *win_data; 476864ee9e6SJoonyoung Shim int win = zpos; 4771c248b7dSInki Dae unsigned long val, alpha, size; 4781c248b7dSInki Dae 4791c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 4801c248b7dSInki Dae 481e30d4bcfSInki Dae if (ctx->suspended) 482e30d4bcfSInki Dae return; 483e30d4bcfSInki Dae 484864ee9e6SJoonyoung Shim if (win == DEFAULT_ZPOS) 485864ee9e6SJoonyoung Shim win = ctx->default_win; 486864ee9e6SJoonyoung Shim 4871c248b7dSInki Dae if (win < 0 || win > WINDOWS_NR) 4881c248b7dSInki Dae return; 4891c248b7dSInki Dae 4901c248b7dSInki Dae win_data = &ctx->win_data[win]; 4911c248b7dSInki Dae 4921c248b7dSInki Dae /* 4931c248b7dSInki Dae * SHADOWCON register is used for enabling timing. 4941c248b7dSInki Dae * 4951c248b7dSInki Dae * for example, once only width value of a register is set, 4961c248b7dSInki Dae * if the dma is started then fimd hardware could malfunction so 4971c248b7dSInki Dae * with protect window setting, the register fields with prefix '_F' 4981c248b7dSInki Dae * wouldn't be updated at vsync also but updated once unprotect window 4991c248b7dSInki Dae * is set. 5001c248b7dSInki Dae */ 5011c248b7dSInki Dae 5021c248b7dSInki Dae /* protect windows */ 5031c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 5041c248b7dSInki Dae val |= SHADOWCON_WINx_PROTECT(win); 5051c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 5061c248b7dSInki Dae 5071c248b7dSInki Dae /* buffer start address */ 5082c871127SInki Dae val = (unsigned long)win_data->dma_addr; 5091c248b7dSInki Dae writel(val, ctx->regs + VIDWx_BUF_START(win, 0)); 5101c248b7dSInki Dae 5111c248b7dSInki Dae /* buffer end address */ 51219c8b834SInki Dae size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3); 5132c871127SInki Dae val = (unsigned long)(win_data->dma_addr + size); 5141c248b7dSInki Dae writel(val, ctx->regs + VIDWx_BUF_END(win, 0)); 5151c248b7dSInki Dae 5161c248b7dSInki Dae DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n", 5172c871127SInki Dae (unsigned long)win_data->dma_addr, val, size); 51819c8b834SInki Dae DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n", 51919c8b834SInki Dae win_data->ovl_width, win_data->ovl_height); 5201c248b7dSInki Dae 5211c248b7dSInki Dae /* buffer size */ 5221c248b7dSInki Dae val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) | 5231c248b7dSInki Dae VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size); 5241c248b7dSInki Dae writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0)); 5251c248b7dSInki Dae 5261c248b7dSInki Dae /* OSD position */ 5271c248b7dSInki Dae val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) | 5281c248b7dSInki Dae VIDOSDxA_TOPLEFT_Y(win_data->offset_y); 5291c248b7dSInki Dae writel(val, ctx->regs + VIDOSD_A(win)); 5301c248b7dSInki Dae 53119c8b834SInki Dae val = VIDOSDxB_BOTRIGHT_X(win_data->offset_x + 53219c8b834SInki Dae win_data->ovl_width - 1) | 53319c8b834SInki Dae VIDOSDxB_BOTRIGHT_Y(win_data->offset_y + 53419c8b834SInki Dae win_data->ovl_height - 1); 5351c248b7dSInki Dae writel(val, ctx->regs + VIDOSD_B(win)); 5361c248b7dSInki Dae 53719c8b834SInki Dae DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n", 5381c248b7dSInki Dae win_data->offset_x, win_data->offset_y, 53919c8b834SInki Dae win_data->offset_x + win_data->ovl_width - 1, 54019c8b834SInki Dae win_data->offset_y + win_data->ovl_height - 1); 5411c248b7dSInki Dae 5421c248b7dSInki Dae /* hardware window 0 doesn't support alpha channel. */ 5431c248b7dSInki Dae if (win != 0) { 5441c248b7dSInki Dae /* OSD alpha */ 5451c248b7dSInki Dae alpha = VIDISD14C_ALPHA1_R(0xf) | 5461c248b7dSInki Dae VIDISD14C_ALPHA1_G(0xf) | 5471c248b7dSInki Dae VIDISD14C_ALPHA1_B(0xf); 5481c248b7dSInki Dae 5491c248b7dSInki Dae writel(alpha, ctx->regs + VIDOSD_C(win)); 5501c248b7dSInki Dae } 5511c248b7dSInki Dae 5521c248b7dSInki Dae /* OSD size */ 5531c248b7dSInki Dae if (win != 3 && win != 4) { 5541c248b7dSInki Dae u32 offset = VIDOSD_D(win); 5551c248b7dSInki Dae if (win == 0) 5561c248b7dSInki Dae offset = VIDOSD_C_SIZE_W0; 55719c8b834SInki Dae val = win_data->ovl_width * win_data->ovl_height; 5581c248b7dSInki Dae writel(val, ctx->regs + offset); 5591c248b7dSInki Dae 5601c248b7dSInki Dae DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val); 5611c248b7dSInki Dae } 5621c248b7dSInki Dae 5631c248b7dSInki Dae fimd_win_set_pixfmt(dev, win); 5641c248b7dSInki Dae 5651c248b7dSInki Dae /* hardware window 0 doesn't support color key. */ 5661c248b7dSInki Dae if (win != 0) 5671c248b7dSInki Dae fimd_win_set_colkey(dev, win); 5681c248b7dSInki Dae 569ec05da95SInki Dae /* wincon */ 570ec05da95SInki Dae val = readl(ctx->regs + WINCON(win)); 571ec05da95SInki Dae val |= WINCONx_ENWIN; 572ec05da95SInki Dae writel(val, ctx->regs + WINCON(win)); 573ec05da95SInki Dae 5741c248b7dSInki Dae /* Enable DMA channel and unprotect windows */ 5751c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 5761c248b7dSInki Dae val |= SHADOWCON_CHx_ENABLE(win); 5771c248b7dSInki Dae val &= ~SHADOWCON_WINx_PROTECT(win); 5781c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 579ec05da95SInki Dae 580ec05da95SInki Dae win_data->enabled = true; 5811c248b7dSInki Dae } 5821c248b7dSInki Dae 583864ee9e6SJoonyoung Shim static void fimd_win_disable(struct device *dev, int zpos) 5841c248b7dSInki Dae { 5851c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 586ec05da95SInki Dae struct fimd_win_data *win_data; 587864ee9e6SJoonyoung Shim int win = zpos; 5881c248b7dSInki Dae u32 val; 5891c248b7dSInki Dae 5901c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 5911c248b7dSInki Dae 592864ee9e6SJoonyoung Shim if (win == DEFAULT_ZPOS) 593864ee9e6SJoonyoung Shim win = ctx->default_win; 594864ee9e6SJoonyoung Shim 5951c248b7dSInki Dae if (win < 0 || win > WINDOWS_NR) 5961c248b7dSInki Dae return; 5971c248b7dSInki Dae 598ec05da95SInki Dae win_data = &ctx->win_data[win]; 599ec05da95SInki Dae 600db7e55aeSPrathyush K if (ctx->suspended) { 601db7e55aeSPrathyush K /* do not resume this window*/ 602db7e55aeSPrathyush K win_data->resume = false; 603db7e55aeSPrathyush K return; 604db7e55aeSPrathyush K } 605db7e55aeSPrathyush K 6061c248b7dSInki Dae /* protect windows */ 6071c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 6081c248b7dSInki Dae val |= SHADOWCON_WINx_PROTECT(win); 6091c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 6101c248b7dSInki Dae 6111c248b7dSInki Dae /* wincon */ 6121c248b7dSInki Dae val = readl(ctx->regs + WINCON(win)); 6131c248b7dSInki Dae val &= ~WINCONx_ENWIN; 6141c248b7dSInki Dae writel(val, ctx->regs + WINCON(win)); 6151c248b7dSInki Dae 6161c248b7dSInki Dae /* unprotect windows */ 6171c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 6181c248b7dSInki Dae val &= ~SHADOWCON_CHx_ENABLE(win); 6191c248b7dSInki Dae val &= ~SHADOWCON_WINx_PROTECT(win); 6201c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 621ec05da95SInki Dae 622ec05da95SInki Dae win_data->enabled = false; 6231c248b7dSInki Dae } 6241c248b7dSInki Dae 6251c248b7dSInki Dae static struct exynos_drm_overlay_ops fimd_overlay_ops = { 6261c248b7dSInki Dae .mode_set = fimd_win_mode_set, 6271c248b7dSInki Dae .commit = fimd_win_commit, 6281c248b7dSInki Dae .disable = fimd_win_disable, 6291c248b7dSInki Dae }; 6301c248b7dSInki Dae 631677e84c1SJoonyoung Shim static struct exynos_drm_manager fimd_manager = { 632677e84c1SJoonyoung Shim .pipe = -1, 633677e84c1SJoonyoung Shim .ops = &fimd_manager_ops, 634677e84c1SJoonyoung Shim .overlay_ops = &fimd_overlay_ops, 635677e84c1SJoonyoung Shim .display_ops = &fimd_display_ops, 636677e84c1SJoonyoung Shim }; 637677e84c1SJoonyoung Shim 6381c248b7dSInki Dae static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc) 6391c248b7dSInki Dae { 6401c248b7dSInki Dae struct exynos_drm_private *dev_priv = drm_dev->dev_private; 6411c248b7dSInki Dae struct drm_pending_vblank_event *e, *t; 6421c248b7dSInki Dae struct timeval now; 6431c248b7dSInki Dae unsigned long flags; 6441c248b7dSInki Dae 6451c248b7dSInki Dae spin_lock_irqsave(&drm_dev->event_lock, flags); 6461c248b7dSInki Dae 6471c248b7dSInki Dae list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list, 6481c248b7dSInki Dae base.link) { 649a88cab2bSInki Dae /* if event's pipe isn't same as crtc then ignore it. */ 650ccf4d883SInki Dae if (crtc != e->pipe) 651ccf4d883SInki Dae continue; 652ccf4d883SInki Dae 6531c248b7dSInki Dae do_gettimeofday(&now); 6541c248b7dSInki Dae e->event.sequence = 0; 6551c248b7dSInki Dae e->event.tv_sec = now.tv_sec; 6561c248b7dSInki Dae e->event.tv_usec = now.tv_usec; 6571c248b7dSInki Dae 6581c248b7dSInki Dae list_move_tail(&e->base.link, &e->base.file_priv->event_list); 6591c248b7dSInki Dae wake_up_interruptible(&e->base.file_priv->event_wait); 660e1f48ee5SImre Deak drm_vblank_put(drm_dev, crtc); 6611c248b7dSInki Dae } 6621c248b7dSInki Dae 6631c248b7dSInki Dae spin_unlock_irqrestore(&drm_dev->event_lock, flags); 6641c248b7dSInki Dae } 6651c248b7dSInki Dae 6661c248b7dSInki Dae static irqreturn_t fimd_irq_handler(int irq, void *dev_id) 6671c248b7dSInki Dae { 6681c248b7dSInki Dae struct fimd_context *ctx = (struct fimd_context *)dev_id; 6691c248b7dSInki Dae struct exynos_drm_subdrv *subdrv = &ctx->subdrv; 6701c248b7dSInki Dae struct drm_device *drm_dev = subdrv->drm_dev; 671677e84c1SJoonyoung Shim struct exynos_drm_manager *manager = subdrv->manager; 6721c248b7dSInki Dae u32 val; 6731c248b7dSInki Dae 6741c248b7dSInki Dae val = readl(ctx->regs + VIDINTCON1); 6751c248b7dSInki Dae 6761c248b7dSInki Dae if (val & VIDINTCON1_INT_FRAME) 6771c248b7dSInki Dae /* VSYNC interrupt */ 6781c248b7dSInki Dae writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1); 6791c248b7dSInki Dae 680ec05da95SInki Dae /* check the crtc is detached already from encoder */ 681ec05da95SInki Dae if (manager->pipe < 0) 682ec05da95SInki Dae goto out; 683483b88f8SInki Dae 6841c248b7dSInki Dae drm_handle_vblank(drm_dev, manager->pipe); 6851c248b7dSInki Dae fimd_finish_pageflip(drm_dev, manager->pipe); 6861c248b7dSInki Dae 68701ce113cSPrathyush K /* set wait vsync event to zero and wake up queue. */ 68801ce113cSPrathyush K if (atomic_read(&ctx->wait_vsync_event)) { 68901ce113cSPrathyush K atomic_set(&ctx->wait_vsync_event, 0); 69001ce113cSPrathyush K DRM_WAKEUP(&ctx->wait_vsync_queue); 69101ce113cSPrathyush K } 692ec05da95SInki Dae out: 6931c248b7dSInki Dae return IRQ_HANDLED; 6941c248b7dSInki Dae } 6951c248b7dSInki Dae 69641c24346SInki Dae static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev) 6971c248b7dSInki Dae { 6981c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 6991c248b7dSInki Dae 7001c248b7dSInki Dae /* 7011c248b7dSInki Dae * enable drm irq mode. 7021c248b7dSInki Dae * - with irq_enabled = 1, we can use the vblank feature. 7031c248b7dSInki Dae * 7041c248b7dSInki Dae * P.S. note that we wouldn't use drm irq handler but 7051c248b7dSInki Dae * just specific driver own one instead because 7061c248b7dSInki Dae * drm framework supports only one irq handler. 7071c248b7dSInki Dae */ 7081c248b7dSInki Dae drm_dev->irq_enabled = 1; 7091c248b7dSInki Dae 710ec05da95SInki Dae /* 711ec05da95SInki Dae * with vblank_disable_allowed = 1, vblank interrupt will be disabled 712ec05da95SInki Dae * by drm timer once a current process gives up ownership of 713ec05da95SInki Dae * vblank event.(after drm_vblank_put function is called) 714ec05da95SInki Dae */ 715ec05da95SInki Dae drm_dev->vblank_disable_allowed = 1; 716ec05da95SInki Dae 717bcc5cd1cSInki Dae /* attach this sub driver to iommu mapping if supported. */ 718bcc5cd1cSInki Dae if (is_drm_iommu_supported(drm_dev)) 719bcc5cd1cSInki Dae drm_iommu_attach_device(drm_dev, dev); 720bcc5cd1cSInki Dae 7211c248b7dSInki Dae return 0; 7221c248b7dSInki Dae } 7231c248b7dSInki Dae 72429cb6025SInki Dae static void fimd_subdrv_remove(struct drm_device *drm_dev, struct device *dev) 7251c248b7dSInki Dae { 7261c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 7271c248b7dSInki Dae 728bcc5cd1cSInki Dae /* detach this sub driver from iommu mapping if supported. */ 729bcc5cd1cSInki Dae if (is_drm_iommu_supported(drm_dev)) 730bcc5cd1cSInki Dae drm_iommu_detach_device(drm_dev, dev); 7311c248b7dSInki Dae } 7321c248b7dSInki Dae 7331c248b7dSInki Dae static int fimd_calc_clkdiv(struct fimd_context *ctx, 7341c248b7dSInki Dae struct fb_videomode *timing) 7351c248b7dSInki Dae { 7361c248b7dSInki Dae unsigned long clk = clk_get_rate(ctx->lcd_clk); 7371c248b7dSInki Dae u32 retrace; 7381c248b7dSInki Dae u32 clkdiv; 7391c248b7dSInki Dae u32 best_framerate = 0; 7401c248b7dSInki Dae u32 framerate; 7411c248b7dSInki Dae 7421c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 7431c248b7dSInki Dae 7441c248b7dSInki Dae retrace = timing->left_margin + timing->hsync_len + 7451c248b7dSInki Dae timing->right_margin + timing->xres; 7461c248b7dSInki Dae retrace *= timing->upper_margin + timing->vsync_len + 7471c248b7dSInki Dae timing->lower_margin + timing->yres; 7481c248b7dSInki Dae 7491c248b7dSInki Dae /* default framerate is 60Hz */ 7501c248b7dSInki Dae if (!timing->refresh) 7511c248b7dSInki Dae timing->refresh = 60; 7521c248b7dSInki Dae 7531c248b7dSInki Dae clk /= retrace; 7541c248b7dSInki Dae 7551c248b7dSInki Dae for (clkdiv = 1; clkdiv < 0x100; clkdiv++) { 7561c248b7dSInki Dae int tmp; 7571c248b7dSInki Dae 7581c248b7dSInki Dae /* get best framerate */ 7591c248b7dSInki Dae framerate = clk / clkdiv; 7601c248b7dSInki Dae tmp = timing->refresh - framerate; 7611c248b7dSInki Dae if (tmp < 0) { 7621c248b7dSInki Dae best_framerate = framerate; 7631c248b7dSInki Dae continue; 7641c248b7dSInki Dae } else { 7651c248b7dSInki Dae if (!best_framerate) 7661c248b7dSInki Dae best_framerate = framerate; 7671c248b7dSInki Dae else if (tmp < (best_framerate - framerate)) 7681c248b7dSInki Dae best_framerate = framerate; 7691c248b7dSInki Dae break; 7701c248b7dSInki Dae } 7711c248b7dSInki Dae } 7721c248b7dSInki Dae 7731c248b7dSInki Dae return clkdiv; 7741c248b7dSInki Dae } 7751c248b7dSInki Dae 7761c248b7dSInki Dae static void fimd_clear_win(struct fimd_context *ctx, int win) 7771c248b7dSInki Dae { 7781c248b7dSInki Dae u32 val; 7791c248b7dSInki Dae 7801c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 7811c248b7dSInki Dae 7821c248b7dSInki Dae writel(0, ctx->regs + WINCON(win)); 7831c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_A(win)); 7841c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_B(win)); 7851c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_C(win)); 7861c248b7dSInki Dae 7871c248b7dSInki Dae if (win == 1 || win == 2) 7881c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_D(win)); 7891c248b7dSInki Dae 7901c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 7911c248b7dSInki Dae val &= ~SHADOWCON_WINx_PROTECT(win); 7921c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 7931c248b7dSInki Dae } 7941c248b7dSInki Dae 7955d55393aSInki Dae static int fimd_clock(struct fimd_context *ctx, bool enable) 796373af0c0SInki Dae { 797373af0c0SInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 798373af0c0SInki Dae 799373af0c0SInki Dae if (enable) { 800373af0c0SInki Dae int ret; 801373af0c0SInki Dae 802373af0c0SInki Dae ret = clk_enable(ctx->bus_clk); 803373af0c0SInki Dae if (ret < 0) 804373af0c0SInki Dae return ret; 805373af0c0SInki Dae 806373af0c0SInki Dae ret = clk_enable(ctx->lcd_clk); 807373af0c0SInki Dae if (ret < 0) { 808373af0c0SInki Dae clk_disable(ctx->bus_clk); 809373af0c0SInki Dae return ret; 810373af0c0SInki Dae } 8115d55393aSInki Dae } else { 8125d55393aSInki Dae clk_disable(ctx->lcd_clk); 8135d55393aSInki Dae clk_disable(ctx->bus_clk); 8145d55393aSInki Dae } 8155d55393aSInki Dae 8165d55393aSInki Dae return 0; 8175d55393aSInki Dae } 8185d55393aSInki Dae 819db7e55aeSPrathyush K static void fimd_window_suspend(struct device *dev) 820db7e55aeSPrathyush K { 821db7e55aeSPrathyush K struct fimd_context *ctx = get_fimd_context(dev); 822db7e55aeSPrathyush K struct fimd_win_data *win_data; 823db7e55aeSPrathyush K int i; 824db7e55aeSPrathyush K 825db7e55aeSPrathyush K for (i = 0; i < WINDOWS_NR; i++) { 826db7e55aeSPrathyush K win_data = &ctx->win_data[i]; 827db7e55aeSPrathyush K win_data->resume = win_data->enabled; 828db7e55aeSPrathyush K fimd_win_disable(dev, i); 829db7e55aeSPrathyush K } 830db7e55aeSPrathyush K fimd_wait_for_vblank(dev); 831db7e55aeSPrathyush K } 832db7e55aeSPrathyush K 833db7e55aeSPrathyush K static void fimd_window_resume(struct device *dev) 834db7e55aeSPrathyush K { 835db7e55aeSPrathyush K struct fimd_context *ctx = get_fimd_context(dev); 836db7e55aeSPrathyush K struct fimd_win_data *win_data; 837db7e55aeSPrathyush K int i; 838db7e55aeSPrathyush K 839db7e55aeSPrathyush K for (i = 0; i < WINDOWS_NR; i++) { 840db7e55aeSPrathyush K win_data = &ctx->win_data[i]; 841db7e55aeSPrathyush K win_data->enabled = win_data->resume; 842db7e55aeSPrathyush K win_data->resume = false; 843db7e55aeSPrathyush K } 844db7e55aeSPrathyush K } 845db7e55aeSPrathyush K 8465d55393aSInki Dae static int fimd_activate(struct fimd_context *ctx, bool enable) 8475d55393aSInki Dae { 848db7e55aeSPrathyush K struct device *dev = ctx->subdrv.dev; 8495d55393aSInki Dae if (enable) { 8505d55393aSInki Dae int ret; 8515d55393aSInki Dae 8525d55393aSInki Dae ret = fimd_clock(ctx, true); 8535d55393aSInki Dae if (ret < 0) 8545d55393aSInki Dae return ret; 855373af0c0SInki Dae 856373af0c0SInki Dae ctx->suspended = false; 857373af0c0SInki Dae 858373af0c0SInki Dae /* if vblank was enabled status, enable it again. */ 859373af0c0SInki Dae if (test_and_clear_bit(0, &ctx->irq_flags)) 860373af0c0SInki Dae fimd_enable_vblank(dev); 861db7e55aeSPrathyush K 862db7e55aeSPrathyush K fimd_window_resume(dev); 863373af0c0SInki Dae } else { 864db7e55aeSPrathyush K fimd_window_suspend(dev); 865db7e55aeSPrathyush K 8665d55393aSInki Dae fimd_clock(ctx, false); 867373af0c0SInki Dae ctx->suspended = true; 868373af0c0SInki Dae } 869373af0c0SInki Dae 870373af0c0SInki Dae return 0; 871373af0c0SInki Dae } 872373af0c0SInki Dae 8731c248b7dSInki Dae static int __devinit fimd_probe(struct platform_device *pdev) 8741c248b7dSInki Dae { 8751c248b7dSInki Dae struct device *dev = &pdev->dev; 8761c248b7dSInki Dae struct fimd_context *ctx; 8771c248b7dSInki Dae struct exynos_drm_subdrv *subdrv; 8781c248b7dSInki Dae struct exynos_drm_fimd_pdata *pdata; 879607c50d4SEun-Chul Kim struct exynos_drm_panel_info *panel; 8801c248b7dSInki Dae struct resource *res; 8811c248b7dSInki Dae int win; 8821c248b7dSInki Dae int ret = -EINVAL; 8831c248b7dSInki Dae 8841c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 8851c248b7dSInki Dae 8861c248b7dSInki Dae pdata = pdev->dev.platform_data; 8871c248b7dSInki Dae if (!pdata) { 8881c248b7dSInki Dae dev_err(dev, "no platform data specified\n"); 8891c248b7dSInki Dae return -EINVAL; 8901c248b7dSInki Dae } 8911c248b7dSInki Dae 892607c50d4SEun-Chul Kim panel = &pdata->panel; 893607c50d4SEun-Chul Kim if (!panel) { 894607c50d4SEun-Chul Kim dev_err(dev, "panel is null.\n"); 8951c248b7dSInki Dae return -EINVAL; 8961c248b7dSInki Dae } 8971c248b7dSInki Dae 898edc57266SSachin Kamat ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); 8991c248b7dSInki Dae if (!ctx) 9001c248b7dSInki Dae return -ENOMEM; 9011c248b7dSInki Dae 902a4d8de5fSSachin Kamat ctx->bus_clk = devm_clk_get(dev, "fimd"); 9031c248b7dSInki Dae if (IS_ERR(ctx->bus_clk)) { 9041c248b7dSInki Dae dev_err(dev, "failed to get bus clock\n"); 905a4d8de5fSSachin Kamat return PTR_ERR(ctx->bus_clk); 9061c248b7dSInki Dae } 9071c248b7dSInki Dae 908a4d8de5fSSachin Kamat ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd"); 9091c248b7dSInki Dae if (IS_ERR(ctx->lcd_clk)) { 9101c248b7dSInki Dae dev_err(dev, "failed to get lcd clock\n"); 911a4d8de5fSSachin Kamat return PTR_ERR(ctx->lcd_clk); 9121c248b7dSInki Dae } 9131c248b7dSInki Dae 9141c248b7dSInki Dae res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 9151c248b7dSInki Dae 916edc57266SSachin Kamat ctx->regs = devm_request_and_ioremap(&pdev->dev, res); 9171c248b7dSInki Dae if (!ctx->regs) { 9181c248b7dSInki Dae dev_err(dev, "failed to map registers\n"); 919a4d8de5fSSachin Kamat return -ENXIO; 9201c248b7dSInki Dae } 9211c248b7dSInki Dae 9221c248b7dSInki Dae res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 9231c248b7dSInki Dae if (!res) { 9241c248b7dSInki Dae dev_err(dev, "irq request failed.\n"); 925a4d8de5fSSachin Kamat return -ENXIO; 9261c248b7dSInki Dae } 9271c248b7dSInki Dae 9281c248b7dSInki Dae ctx->irq = res->start; 9291c248b7dSInki Dae 930edc57266SSachin Kamat ret = devm_request_irq(&pdev->dev, ctx->irq, fimd_irq_handler, 931edc57266SSachin Kamat 0, "drm_fimd", ctx); 932edc57266SSachin Kamat if (ret) { 9331c248b7dSInki Dae dev_err(dev, "irq request failed.\n"); 934a4d8de5fSSachin Kamat return ret; 9351c248b7dSInki Dae } 9361c248b7dSInki Dae 9371c248b7dSInki Dae ctx->vidcon0 = pdata->vidcon0; 9381c248b7dSInki Dae ctx->vidcon1 = pdata->vidcon1; 9391c248b7dSInki Dae ctx->default_win = pdata->default_win; 940607c50d4SEun-Chul Kim ctx->panel = panel; 94101ce113cSPrathyush K DRM_INIT_WAITQUEUE(&ctx->wait_vsync_queue); 94201ce113cSPrathyush K atomic_set(&ctx->wait_vsync_event, 0); 9431c248b7dSInki Dae 9441c248b7dSInki Dae subdrv = &ctx->subdrv; 9451c248b7dSInki Dae 946677e84c1SJoonyoung Shim subdrv->dev = dev; 947677e84c1SJoonyoung Shim subdrv->manager = &fimd_manager; 9481c248b7dSInki Dae subdrv->probe = fimd_subdrv_probe; 9491c248b7dSInki Dae subdrv->remove = fimd_subdrv_remove; 9501c248b7dSInki Dae 951c32b06efSInki Dae mutex_init(&ctx->lock); 952c32b06efSInki Dae 9531c248b7dSInki Dae platform_set_drvdata(pdev, ctx); 954c32b06efSInki Dae 955c32b06efSInki Dae pm_runtime_enable(dev); 956c32b06efSInki Dae pm_runtime_get_sync(dev); 957c32b06efSInki Dae 9580d8ce3aeSMarek Szyprowski ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing); 9590d8ce3aeSMarek Szyprowski panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv; 9600d8ce3aeSMarek Szyprowski 9610d8ce3aeSMarek Szyprowski DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n", 9620d8ce3aeSMarek Szyprowski panel->timing.pixclock, ctx->clkdiv); 9630d8ce3aeSMarek Szyprowski 964c32b06efSInki Dae for (win = 0; win < WINDOWS_NR; win++) 965c32b06efSInki Dae fimd_clear_win(ctx, win); 966c32b06efSInki Dae 9671c248b7dSInki Dae exynos_drm_subdrv_register(subdrv); 9681c248b7dSInki Dae 9691c248b7dSInki Dae return 0; 9701c248b7dSInki Dae } 9711c248b7dSInki Dae 9721c248b7dSInki Dae static int __devexit fimd_remove(struct platform_device *pdev) 9731c248b7dSInki Dae { 974cb91f6a0SJoonyoung Shim struct device *dev = &pdev->dev; 9751c248b7dSInki Dae struct fimd_context *ctx = platform_get_drvdata(pdev); 9761c248b7dSInki Dae 9771c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 9781c248b7dSInki Dae 9791c248b7dSInki Dae exynos_drm_subdrv_unregister(&ctx->subdrv); 9801c248b7dSInki Dae 981cb91f6a0SJoonyoung Shim if (ctx->suspended) 982cb91f6a0SJoonyoung Shim goto out; 983cb91f6a0SJoonyoung Shim 9841c248b7dSInki Dae clk_disable(ctx->lcd_clk); 9851c248b7dSInki Dae clk_disable(ctx->bus_clk); 986cb91f6a0SJoonyoung Shim 987cb91f6a0SJoonyoung Shim pm_runtime_set_suspended(dev); 988cb91f6a0SJoonyoung Shim pm_runtime_put_sync(dev); 989cb91f6a0SJoonyoung Shim 990cb91f6a0SJoonyoung Shim out: 991cb91f6a0SJoonyoung Shim pm_runtime_disable(dev); 992cb91f6a0SJoonyoung Shim 9931c248b7dSInki Dae return 0; 9941c248b7dSInki Dae } 9951c248b7dSInki Dae 996e30d4bcfSInki Dae #ifdef CONFIG_PM_SLEEP 997e30d4bcfSInki Dae static int fimd_suspend(struct device *dev) 998e30d4bcfSInki Dae { 999373af0c0SInki Dae struct fimd_context *ctx = get_fimd_context(dev); 1000e30d4bcfSInki Dae 1001373af0c0SInki Dae /* 1002373af0c0SInki Dae * do not use pm_runtime_suspend(). if pm_runtime_suspend() is 1003373af0c0SInki Dae * called here, an error would be returned by that interface 1004373af0c0SInki Dae * because the usage_count of pm runtime is more than 1. 1005373af0c0SInki Dae */ 10065d55393aSInki Dae if (!pm_runtime_suspended(dev)) 10075d55393aSInki Dae return fimd_activate(ctx, false); 10085d55393aSInki Dae 10095d55393aSInki Dae return 0; 1010e30d4bcfSInki Dae } 1011e30d4bcfSInki Dae 1012e30d4bcfSInki Dae static int fimd_resume(struct device *dev) 1013e30d4bcfSInki Dae { 1014373af0c0SInki Dae struct fimd_context *ctx = get_fimd_context(dev); 1015e30d4bcfSInki Dae 1016373af0c0SInki Dae /* 1017373af0c0SInki Dae * if entered to sleep when lcd panel was on, the usage_count 1018373af0c0SInki Dae * of pm runtime would still be 1 so in this case, fimd driver 1019373af0c0SInki Dae * should be on directly not drawing on pm runtime interface. 1020373af0c0SInki Dae */ 10215d55393aSInki Dae if (pm_runtime_suspended(dev)) { 10225d55393aSInki Dae int ret; 10235d55393aSInki Dae 10245d55393aSInki Dae ret = fimd_activate(ctx, true); 10255d55393aSInki Dae if (ret < 0) 10265d55393aSInki Dae return ret; 10275d55393aSInki Dae 10285d55393aSInki Dae /* 10295d55393aSInki Dae * in case of dpms on(standby), fimd_apply function will 10305d55393aSInki Dae * be called by encoder's dpms callback to update fimd's 10315d55393aSInki Dae * registers but in case of sleep wakeup, it's not. 10325d55393aSInki Dae * so fimd_apply function should be called at here. 10335d55393aSInki Dae */ 10345d55393aSInki Dae fimd_apply(dev); 10355d55393aSInki Dae } 1036e30d4bcfSInki Dae 1037e30d4bcfSInki Dae return 0; 1038e30d4bcfSInki Dae } 1039e30d4bcfSInki Dae #endif 1040e30d4bcfSInki Dae 1041cb91f6a0SJoonyoung Shim #ifdef CONFIG_PM_RUNTIME 1042cb91f6a0SJoonyoung Shim static int fimd_runtime_suspend(struct device *dev) 1043cb91f6a0SJoonyoung Shim { 1044cb91f6a0SJoonyoung Shim struct fimd_context *ctx = get_fimd_context(dev); 1045cb91f6a0SJoonyoung Shim 1046cb91f6a0SJoonyoung Shim DRM_DEBUG_KMS("%s\n", __FILE__); 1047cb91f6a0SJoonyoung Shim 10485d55393aSInki Dae return fimd_activate(ctx, false); 1049cb91f6a0SJoonyoung Shim } 1050cb91f6a0SJoonyoung Shim 1051cb91f6a0SJoonyoung Shim static int fimd_runtime_resume(struct device *dev) 1052cb91f6a0SJoonyoung Shim { 1053cb91f6a0SJoonyoung Shim struct fimd_context *ctx = get_fimd_context(dev); 1054cb91f6a0SJoonyoung Shim 1055cb91f6a0SJoonyoung Shim DRM_DEBUG_KMS("%s\n", __FILE__); 1056cb91f6a0SJoonyoung Shim 10575d55393aSInki Dae return fimd_activate(ctx, true); 1058cb91f6a0SJoonyoung Shim } 1059cb91f6a0SJoonyoung Shim #endif 1060cb91f6a0SJoonyoung Shim 1061e2e13389SLeela Krishna Amudala static struct platform_device_id fimd_driver_ids[] = { 1062e2e13389SLeela Krishna Amudala { 1063e2e13389SLeela Krishna Amudala .name = "exynos4-fb", 1064e2e13389SLeela Krishna Amudala .driver_data = (unsigned long)&exynos4_fimd_driver_data, 1065e2e13389SLeela Krishna Amudala }, { 1066e2e13389SLeela Krishna Amudala .name = "exynos5-fb", 1067e2e13389SLeela Krishna Amudala .driver_data = (unsigned long)&exynos5_fimd_driver_data, 1068e2e13389SLeela Krishna Amudala }, 1069e2e13389SLeela Krishna Amudala {}, 1070e2e13389SLeela Krishna Amudala }; 1071e2e13389SLeela Krishna Amudala MODULE_DEVICE_TABLE(platform, fimd_driver_ids); 1072e2e13389SLeela Krishna Amudala 1073cb91f6a0SJoonyoung Shim static const struct dev_pm_ops fimd_pm_ops = { 1074e30d4bcfSInki Dae SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume) 1075cb91f6a0SJoonyoung Shim SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL) 1076cb91f6a0SJoonyoung Shim }; 1077cb91f6a0SJoonyoung Shim 1078132a5b91SJoonyoung Shim struct platform_driver fimd_driver = { 10791c248b7dSInki Dae .probe = fimd_probe, 10801c248b7dSInki Dae .remove = __devexit_p(fimd_remove), 1081e2e13389SLeela Krishna Amudala .id_table = fimd_driver_ids, 10821c248b7dSInki Dae .driver = { 10831c248b7dSInki Dae .name = "exynos4-fb", 10841c248b7dSInki Dae .owner = THIS_MODULE, 1085cb91f6a0SJoonyoung Shim .pm = &fimd_pm_ops, 10861c248b7dSInki Dae }, 10871c248b7dSInki Dae }; 1088