11c248b7dSInki Dae /* exynos_drm_fimd.c 21c248b7dSInki Dae * 31c248b7dSInki Dae * Copyright (C) 2011 Samsung Electronics Co.Ltd 41c248b7dSInki Dae * Authors: 51c248b7dSInki Dae * Joonyoung Shim <jy0922.shim@samsung.com> 61c248b7dSInki Dae * Inki Dae <inki.dae@samsung.com> 71c248b7dSInki Dae * 81c248b7dSInki Dae * This program is free software; you can redistribute it and/or modify it 91c248b7dSInki Dae * under the terms of the GNU General Public License as published by the 101c248b7dSInki Dae * Free Software Foundation; either version 2 of the License, or (at your 111c248b7dSInki Dae * option) any later version. 121c248b7dSInki Dae * 131c248b7dSInki Dae */ 14760285e7SDavid Howells #include <drm/drmP.h> 151c248b7dSInki Dae 161c248b7dSInki Dae #include <linux/kernel.h> 171c248b7dSInki Dae #include <linux/module.h> 181c248b7dSInki Dae #include <linux/platform_device.h> 191c248b7dSInki Dae #include <linux/clk.h> 20d636ead8SJoonyoung Shim #include <linux/of_device.h> 21cb91f6a0SJoonyoung Shim #include <linux/pm_runtime.h> 221c248b7dSInki Dae 237f4596f4SVikas Sajjan #include <video/of_display_timing.h> 245a213a55SLeela Krishna Amudala #include <video/samsung_fimd.h> 251c248b7dSInki Dae #include <drm/exynos_drm.h> 261c248b7dSInki Dae 271c248b7dSInki Dae #include "exynos_drm_drv.h" 281c248b7dSInki Dae #include "exynos_drm_fbdev.h" 291c248b7dSInki Dae #include "exynos_drm_crtc.h" 30bcc5cd1cSInki Dae #include "exynos_drm_iommu.h" 311c248b7dSInki Dae 321c248b7dSInki Dae /* 331c248b7dSInki Dae * FIMD is stand for Fully Interactive Mobile Display and 341c248b7dSInki Dae * as a display controller, it transfers contents drawn on memory 351c248b7dSInki Dae * to a LCD Panel through Display Interfaces such as RGB or 361c248b7dSInki Dae * CPU Interface. 371c248b7dSInki Dae */ 381c248b7dSInki Dae 391c248b7dSInki Dae /* position control register for hardware window 0, 2 ~ 4.*/ 401c248b7dSInki Dae #define VIDOSD_A(win) (VIDOSD_BASE + 0x00 + (win) * 16) 411c248b7dSInki Dae #define VIDOSD_B(win) (VIDOSD_BASE + 0x04 + (win) * 16) 420f10cf14SLeela Krishna Amudala /* 430f10cf14SLeela Krishna Amudala * size control register for hardware windows 0 and alpha control register 440f10cf14SLeela Krishna Amudala * for hardware windows 1 ~ 4 450f10cf14SLeela Krishna Amudala */ 460f10cf14SLeela Krishna Amudala #define VIDOSD_C(win) (VIDOSD_BASE + 0x08 + (win) * 16) 470f10cf14SLeela Krishna Amudala /* size control register for hardware windows 1 ~ 2. */ 481c248b7dSInki Dae #define VIDOSD_D(win) (VIDOSD_BASE + 0x0C + (win) * 16) 491c248b7dSInki Dae 501c248b7dSInki Dae #define VIDWx_BUF_START(win, buf) (VIDW_BUF_START(buf) + (win) * 8) 511c248b7dSInki Dae #define VIDWx_BUF_END(win, buf) (VIDW_BUF_END(buf) + (win) * 8) 521c248b7dSInki Dae #define VIDWx_BUF_SIZE(win, buf) (VIDW_BUF_SIZE(buf) + (win) * 4) 531c248b7dSInki Dae 541c248b7dSInki Dae /* color key control register for hardware window 1 ~ 4. */ 550f10cf14SLeela Krishna Amudala #define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + ((x - 1) * 8)) 561c248b7dSInki Dae /* color key value register for hardware window 1 ~ 4. */ 570f10cf14SLeela Krishna Amudala #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8)) 581c248b7dSInki Dae 591c248b7dSInki Dae /* FIMD has totally five hardware windows. */ 601c248b7dSInki Dae #define WINDOWS_NR 5 611c248b7dSInki Dae 621c248b7dSInki Dae #define get_fimd_context(dev) platform_get_drvdata(to_platform_device(dev)) 631c248b7dSInki Dae 64e2e13389SLeela Krishna Amudala struct fimd_driver_data { 65e2e13389SLeela Krishna Amudala unsigned int timing_base; 66e2e13389SLeela Krishna Amudala }; 67e2e13389SLeela Krishna Amudala 686ecf18f9SSachin Kamat static struct fimd_driver_data exynos4_fimd_driver_data = { 69e2e13389SLeela Krishna Amudala .timing_base = 0x0, 70e2e13389SLeela Krishna Amudala }; 71e2e13389SLeela Krishna Amudala 726ecf18f9SSachin Kamat static struct fimd_driver_data exynos5_fimd_driver_data = { 73e2e13389SLeela Krishna Amudala .timing_base = 0x20000, 74e2e13389SLeela Krishna Amudala }; 75e2e13389SLeela Krishna Amudala 761c248b7dSInki Dae struct fimd_win_data { 771c248b7dSInki Dae unsigned int offset_x; 781c248b7dSInki Dae unsigned int offset_y; 7919c8b834SInki Dae unsigned int ovl_width; 8019c8b834SInki Dae unsigned int ovl_height; 8119c8b834SInki Dae unsigned int fb_width; 8219c8b834SInki Dae unsigned int fb_height; 831c248b7dSInki Dae unsigned int bpp; 842c871127SInki Dae dma_addr_t dma_addr; 851c248b7dSInki Dae unsigned int buf_offsize; 861c248b7dSInki Dae unsigned int line_size; /* bytes */ 87ec05da95SInki Dae bool enabled; 88db7e55aeSPrathyush K bool resume; 891c248b7dSInki Dae }; 901c248b7dSInki Dae 911c248b7dSInki Dae struct fimd_context { 921c248b7dSInki Dae struct exynos_drm_subdrv subdrv; 931c248b7dSInki Dae int irq; 941c248b7dSInki Dae struct drm_crtc *crtc; 951c248b7dSInki Dae struct clk *bus_clk; 961c248b7dSInki Dae struct clk *lcd_clk; 971c248b7dSInki Dae void __iomem *regs; 981c248b7dSInki Dae struct fimd_win_data win_data[WINDOWS_NR]; 991c248b7dSInki Dae unsigned int clkdiv; 1001c248b7dSInki Dae unsigned int default_win; 1011c248b7dSInki Dae unsigned long irq_flags; 1021c248b7dSInki Dae u32 vidcon0; 1031c248b7dSInki Dae u32 vidcon1; 104cb91f6a0SJoonyoung Shim bool suspended; 105c32b06efSInki Dae struct mutex lock; 10601ce113cSPrathyush K wait_queue_head_t wait_vsync_queue; 10701ce113cSPrathyush K atomic_t wait_vsync_event; 1081c248b7dSInki Dae 109607c50d4SEun-Chul Kim struct exynos_drm_panel_info *panel; 1101c248b7dSInki Dae }; 1111c248b7dSInki Dae 112d636ead8SJoonyoung Shim #ifdef CONFIG_OF 113d636ead8SJoonyoung Shim static const struct of_device_id fimd_driver_dt_match[] = { 1145830daf8SVikas Sajjan { .compatible = "samsung,exynos4210-fimd", 115d636ead8SJoonyoung Shim .data = &exynos4_fimd_driver_data }, 1165830daf8SVikas Sajjan { .compatible = "samsung,exynos5250-fimd", 117d636ead8SJoonyoung Shim .data = &exynos5_fimd_driver_data }, 118d636ead8SJoonyoung Shim {}, 119d636ead8SJoonyoung Shim }; 120d636ead8SJoonyoung Shim MODULE_DEVICE_TABLE(of, fimd_driver_dt_match); 121d636ead8SJoonyoung Shim #endif 122d636ead8SJoonyoung Shim 123e2e13389SLeela Krishna Amudala static inline struct fimd_driver_data *drm_fimd_get_driver_data( 124e2e13389SLeela Krishna Amudala struct platform_device *pdev) 125e2e13389SLeela Krishna Amudala { 126d636ead8SJoonyoung Shim #ifdef CONFIG_OF 127d636ead8SJoonyoung Shim const struct of_device_id *of_id = 128d636ead8SJoonyoung Shim of_match_device(fimd_driver_dt_match, &pdev->dev); 129d636ead8SJoonyoung Shim 130d636ead8SJoonyoung Shim if (of_id) 131d636ead8SJoonyoung Shim return (struct fimd_driver_data *)of_id->data; 132d636ead8SJoonyoung Shim #endif 133d636ead8SJoonyoung Shim 134e2e13389SLeela Krishna Amudala return (struct fimd_driver_data *) 135e2e13389SLeela Krishna Amudala platform_get_device_id(pdev)->driver_data; 136e2e13389SLeela Krishna Amudala } 137e2e13389SLeela Krishna Amudala 1381c248b7dSInki Dae static bool fimd_display_is_connected(struct device *dev) 1391c248b7dSInki Dae { 1401c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1411c248b7dSInki Dae 1421c248b7dSInki Dae /* TODO. */ 1431c248b7dSInki Dae 1441c248b7dSInki Dae return true; 1451c248b7dSInki Dae } 1461c248b7dSInki Dae 147607c50d4SEun-Chul Kim static void *fimd_get_panel(struct device *dev) 1481c248b7dSInki Dae { 1491c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 1501c248b7dSInki Dae 1511c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1521c248b7dSInki Dae 153607c50d4SEun-Chul Kim return ctx->panel; 1541c248b7dSInki Dae } 1551c248b7dSInki Dae 1561c248b7dSInki Dae static int fimd_check_timing(struct device *dev, void *timing) 1571c248b7dSInki Dae { 1581c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1591c248b7dSInki Dae 1601c248b7dSInki Dae /* TODO. */ 1611c248b7dSInki Dae 1621c248b7dSInki Dae return 0; 1631c248b7dSInki Dae } 1641c248b7dSInki Dae 1651c248b7dSInki Dae static int fimd_display_power_on(struct device *dev, int mode) 1661c248b7dSInki Dae { 1671c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1681c248b7dSInki Dae 169ec05da95SInki Dae /* TODO */ 1701c248b7dSInki Dae 1711c248b7dSInki Dae return 0; 1721c248b7dSInki Dae } 1731c248b7dSInki Dae 17474ccc539SInki Dae static struct exynos_drm_display_ops fimd_display_ops = { 1751c248b7dSInki Dae .type = EXYNOS_DISPLAY_TYPE_LCD, 1761c248b7dSInki Dae .is_connected = fimd_display_is_connected, 177607c50d4SEun-Chul Kim .get_panel = fimd_get_panel, 1781c248b7dSInki Dae .check_timing = fimd_check_timing, 1791c248b7dSInki Dae .power_on = fimd_display_power_on, 1801c248b7dSInki Dae }; 1811c248b7dSInki Dae 182ec05da95SInki Dae static void fimd_dpms(struct device *subdrv_dev, int mode) 183ec05da95SInki Dae { 184c32b06efSInki Dae struct fimd_context *ctx = get_fimd_context(subdrv_dev); 185c32b06efSInki Dae 186ec05da95SInki Dae DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode); 187ec05da95SInki Dae 188c32b06efSInki Dae mutex_lock(&ctx->lock); 189c32b06efSInki Dae 190cb91f6a0SJoonyoung Shim switch (mode) { 191cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_ON: 192c32b06efSInki Dae /* 193c32b06efSInki Dae * enable fimd hardware only if suspended status. 194c32b06efSInki Dae * 195c32b06efSInki Dae * P.S. fimd_dpms function would be called at booting time so 196c32b06efSInki Dae * clk_enable could be called double time. 197c32b06efSInki Dae */ 198c32b06efSInki Dae if (ctx->suspended) 199cb91f6a0SJoonyoung Shim pm_runtime_get_sync(subdrv_dev); 200cb91f6a0SJoonyoung Shim break; 201cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_STANDBY: 202cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_SUSPEND: 203cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_OFF: 204373af0c0SInki Dae if (!ctx->suspended) 205cb91f6a0SJoonyoung Shim pm_runtime_put_sync(subdrv_dev); 206cb91f6a0SJoonyoung Shim break; 207cb91f6a0SJoonyoung Shim default: 208cb91f6a0SJoonyoung Shim DRM_DEBUG_KMS("unspecified mode %d\n", mode); 209cb91f6a0SJoonyoung Shim break; 210cb91f6a0SJoonyoung Shim } 211c32b06efSInki Dae 212c32b06efSInki Dae mutex_unlock(&ctx->lock); 213ec05da95SInki Dae } 214ec05da95SInki Dae 215ec05da95SInki Dae static void fimd_apply(struct device *subdrv_dev) 216ec05da95SInki Dae { 217ec05da95SInki Dae struct fimd_context *ctx = get_fimd_context(subdrv_dev); 218677e84c1SJoonyoung Shim struct exynos_drm_manager *mgr = ctx->subdrv.manager; 219ec05da95SInki Dae struct exynos_drm_manager_ops *mgr_ops = mgr->ops; 220ec05da95SInki Dae struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops; 221ec05da95SInki Dae struct fimd_win_data *win_data; 222864ee9e6SJoonyoung Shim int i; 223ec05da95SInki Dae 224ec05da95SInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 225ec05da95SInki Dae 226864ee9e6SJoonyoung Shim for (i = 0; i < WINDOWS_NR; i++) { 227864ee9e6SJoonyoung Shim win_data = &ctx->win_data[i]; 228ec05da95SInki Dae if (win_data->enabled && (ovl_ops && ovl_ops->commit)) 229864ee9e6SJoonyoung Shim ovl_ops->commit(subdrv_dev, i); 230864ee9e6SJoonyoung Shim } 231ec05da95SInki Dae 232ec05da95SInki Dae if (mgr_ops && mgr_ops->commit) 233ec05da95SInki Dae mgr_ops->commit(subdrv_dev); 234ec05da95SInki Dae } 235ec05da95SInki Dae 2361c248b7dSInki Dae static void fimd_commit(struct device *dev) 2371c248b7dSInki Dae { 2381c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 239607c50d4SEun-Chul Kim struct exynos_drm_panel_info *panel = ctx->panel; 240607c50d4SEun-Chul Kim struct fb_videomode *timing = &panel->timing; 241e2e13389SLeela Krishna Amudala struct fimd_driver_data *driver_data; 242e2e13389SLeela Krishna Amudala struct platform_device *pdev = to_platform_device(dev); 2431c248b7dSInki Dae u32 val; 2441c248b7dSInki Dae 245e2e13389SLeela Krishna Amudala driver_data = drm_fimd_get_driver_data(pdev); 246e30d4bcfSInki Dae if (ctx->suspended) 247e30d4bcfSInki Dae return; 248e30d4bcfSInki Dae 2491c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 2501c248b7dSInki Dae 2511c248b7dSInki Dae /* setup polarity values from machine code. */ 252e2e13389SLeela Krishna Amudala writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1); 2531c248b7dSInki Dae 2541c248b7dSInki Dae /* setup vertical timing values. */ 2551c248b7dSInki Dae val = VIDTCON0_VBPD(timing->upper_margin - 1) | 2561c248b7dSInki Dae VIDTCON0_VFPD(timing->lower_margin - 1) | 2571c248b7dSInki Dae VIDTCON0_VSPW(timing->vsync_len - 1); 258e2e13389SLeela Krishna Amudala writel(val, ctx->regs + driver_data->timing_base + VIDTCON0); 2591c248b7dSInki Dae 2601c248b7dSInki Dae /* setup horizontal timing values. */ 2611c248b7dSInki Dae val = VIDTCON1_HBPD(timing->left_margin - 1) | 2621c248b7dSInki Dae VIDTCON1_HFPD(timing->right_margin - 1) | 2631c248b7dSInki Dae VIDTCON1_HSPW(timing->hsync_len - 1); 264e2e13389SLeela Krishna Amudala writel(val, ctx->regs + driver_data->timing_base + VIDTCON1); 2651c248b7dSInki Dae 2661c248b7dSInki Dae /* setup horizontal and vertical display size. */ 2671c248b7dSInki Dae val = VIDTCON2_LINEVAL(timing->yres - 1) | 268ca555e5aSJoonyoung Shim VIDTCON2_HOZVAL(timing->xres - 1) | 269ca555e5aSJoonyoung Shim VIDTCON2_LINEVAL_E(timing->yres - 1) | 270ca555e5aSJoonyoung Shim VIDTCON2_HOZVAL_E(timing->xres - 1); 271e2e13389SLeela Krishna Amudala writel(val, ctx->regs + driver_data->timing_base + VIDTCON2); 2721c248b7dSInki Dae 2731c248b7dSInki Dae /* setup clock source, clock divider, enable dma. */ 2741c248b7dSInki Dae val = ctx->vidcon0; 2751c248b7dSInki Dae val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR); 2761c248b7dSInki Dae 2771c248b7dSInki Dae if (ctx->clkdiv > 1) 2781c248b7dSInki Dae val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR; 2791c248b7dSInki Dae else 2801c248b7dSInki Dae val &= ~VIDCON0_CLKDIR; /* 1:1 clock */ 2811c248b7dSInki Dae 2821c248b7dSInki Dae /* 2831c248b7dSInki Dae * fields of register with prefix '_F' would be updated 2841c248b7dSInki Dae * at vsync(same as dma start) 2851c248b7dSInki Dae */ 2861c248b7dSInki Dae val |= VIDCON0_ENVID | VIDCON0_ENVID_F; 2871c248b7dSInki Dae writel(val, ctx->regs + VIDCON0); 2881c248b7dSInki Dae } 2891c248b7dSInki Dae 2901c248b7dSInki Dae static int fimd_enable_vblank(struct device *dev) 2911c248b7dSInki Dae { 2921c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 2931c248b7dSInki Dae u32 val; 2941c248b7dSInki Dae 2951c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 2961c248b7dSInki Dae 297cb91f6a0SJoonyoung Shim if (ctx->suspended) 298cb91f6a0SJoonyoung Shim return -EPERM; 299cb91f6a0SJoonyoung Shim 3001c248b7dSInki Dae if (!test_and_set_bit(0, &ctx->irq_flags)) { 3011c248b7dSInki Dae val = readl(ctx->regs + VIDINTCON0); 3021c248b7dSInki Dae 3031c248b7dSInki Dae val |= VIDINTCON0_INT_ENABLE; 3041c248b7dSInki Dae val |= VIDINTCON0_INT_FRAME; 3051c248b7dSInki Dae 3061c248b7dSInki Dae val &= ~VIDINTCON0_FRAMESEL0_MASK; 3071c248b7dSInki Dae val |= VIDINTCON0_FRAMESEL0_VSYNC; 3081c248b7dSInki Dae val &= ~VIDINTCON0_FRAMESEL1_MASK; 3091c248b7dSInki Dae val |= VIDINTCON0_FRAMESEL1_NONE; 3101c248b7dSInki Dae 3111c248b7dSInki Dae writel(val, ctx->regs + VIDINTCON0); 3121c248b7dSInki Dae } 3131c248b7dSInki Dae 3141c248b7dSInki Dae return 0; 3151c248b7dSInki Dae } 3161c248b7dSInki Dae 3171c248b7dSInki Dae static void fimd_disable_vblank(struct device *dev) 3181c248b7dSInki Dae { 3191c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 3201c248b7dSInki Dae u32 val; 3211c248b7dSInki Dae 3221c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 3231c248b7dSInki Dae 324cb91f6a0SJoonyoung Shim if (ctx->suspended) 325cb91f6a0SJoonyoung Shim return; 326cb91f6a0SJoonyoung Shim 3271c248b7dSInki Dae if (test_and_clear_bit(0, &ctx->irq_flags)) { 3281c248b7dSInki Dae val = readl(ctx->regs + VIDINTCON0); 3291c248b7dSInki Dae 3301c248b7dSInki Dae val &= ~VIDINTCON0_INT_FRAME; 3311c248b7dSInki Dae val &= ~VIDINTCON0_INT_ENABLE; 3321c248b7dSInki Dae 3331c248b7dSInki Dae writel(val, ctx->regs + VIDINTCON0); 3341c248b7dSInki Dae } 3351c248b7dSInki Dae } 3361c248b7dSInki Dae 33707033970SPrathyush K static void fimd_wait_for_vblank(struct device *dev) 33807033970SPrathyush K { 33907033970SPrathyush K struct fimd_context *ctx = get_fimd_context(dev); 34007033970SPrathyush K 34101ce113cSPrathyush K if (ctx->suspended) 34201ce113cSPrathyush K return; 34301ce113cSPrathyush K 34401ce113cSPrathyush K atomic_set(&ctx->wait_vsync_event, 1); 34501ce113cSPrathyush K 34601ce113cSPrathyush K /* 34701ce113cSPrathyush K * wait for FIMD to signal VSYNC interrupt or return after 34801ce113cSPrathyush K * timeout which is set to 50ms (refresh rate of 20). 34901ce113cSPrathyush K */ 35001ce113cSPrathyush K if (!wait_event_timeout(ctx->wait_vsync_queue, 35101ce113cSPrathyush K !atomic_read(&ctx->wait_vsync_event), 35201ce113cSPrathyush K DRM_HZ/20)) 35307033970SPrathyush K DRM_DEBUG_KMS("vblank wait timed out.\n"); 35407033970SPrathyush K } 35507033970SPrathyush K 3561c248b7dSInki Dae static struct exynos_drm_manager_ops fimd_manager_ops = { 357ec05da95SInki Dae .dpms = fimd_dpms, 358ec05da95SInki Dae .apply = fimd_apply, 3591c248b7dSInki Dae .commit = fimd_commit, 3601c248b7dSInki Dae .enable_vblank = fimd_enable_vblank, 3611c248b7dSInki Dae .disable_vblank = fimd_disable_vblank, 36207033970SPrathyush K .wait_for_vblank = fimd_wait_for_vblank, 3631c248b7dSInki Dae }; 3641c248b7dSInki Dae 3651c248b7dSInki Dae static void fimd_win_mode_set(struct device *dev, 3661c248b7dSInki Dae struct exynos_drm_overlay *overlay) 3671c248b7dSInki Dae { 3681c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 3691c248b7dSInki Dae struct fimd_win_data *win_data; 370864ee9e6SJoonyoung Shim int win; 37119c8b834SInki Dae unsigned long offset; 3721c248b7dSInki Dae 3731c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 3741c248b7dSInki Dae 3751c248b7dSInki Dae if (!overlay) { 3761c248b7dSInki Dae dev_err(dev, "overlay is NULL\n"); 3771c248b7dSInki Dae return; 3781c248b7dSInki Dae } 3791c248b7dSInki Dae 380864ee9e6SJoonyoung Shim win = overlay->zpos; 381864ee9e6SJoonyoung Shim if (win == DEFAULT_ZPOS) 382864ee9e6SJoonyoung Shim win = ctx->default_win; 383864ee9e6SJoonyoung Shim 384864ee9e6SJoonyoung Shim if (win < 0 || win > WINDOWS_NR) 385864ee9e6SJoonyoung Shim return; 386864ee9e6SJoonyoung Shim 38719c8b834SInki Dae offset = overlay->fb_x * (overlay->bpp >> 3); 38819c8b834SInki Dae offset += overlay->fb_y * overlay->pitch; 38919c8b834SInki Dae 39019c8b834SInki Dae DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch); 39119c8b834SInki Dae 392864ee9e6SJoonyoung Shim win_data = &ctx->win_data[win]; 3931c248b7dSInki Dae 39419c8b834SInki Dae win_data->offset_x = overlay->crtc_x; 39519c8b834SInki Dae win_data->offset_y = overlay->crtc_y; 39619c8b834SInki Dae win_data->ovl_width = overlay->crtc_width; 39719c8b834SInki Dae win_data->ovl_height = overlay->crtc_height; 39819c8b834SInki Dae win_data->fb_width = overlay->fb_width; 39919c8b834SInki Dae win_data->fb_height = overlay->fb_height; 400229d3534SSeung-Woo Kim win_data->dma_addr = overlay->dma_addr[0] + offset; 4011c248b7dSInki Dae win_data->bpp = overlay->bpp; 40219c8b834SInki Dae win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) * 40319c8b834SInki Dae (overlay->bpp >> 3); 40419c8b834SInki Dae win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3); 40519c8b834SInki Dae 40619c8b834SInki Dae DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n", 40719c8b834SInki Dae win_data->offset_x, win_data->offset_y); 40819c8b834SInki Dae DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n", 40919c8b834SInki Dae win_data->ovl_width, win_data->ovl_height); 410ddd8e959SYoungJun Cho DRM_DEBUG_KMS("paddr = 0x%lx\n", (unsigned long)win_data->dma_addr); 41119c8b834SInki Dae DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n", 41219c8b834SInki Dae overlay->fb_width, overlay->crtc_width); 4131c248b7dSInki Dae } 4141c248b7dSInki Dae 4151c248b7dSInki Dae static void fimd_win_set_pixfmt(struct device *dev, unsigned int win) 4161c248b7dSInki Dae { 4171c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 4181c248b7dSInki Dae struct fimd_win_data *win_data = &ctx->win_data[win]; 4191c248b7dSInki Dae unsigned long val; 4201c248b7dSInki Dae 4211c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 4221c248b7dSInki Dae 4231c248b7dSInki Dae val = WINCONx_ENWIN; 4241c248b7dSInki Dae 4251c248b7dSInki Dae switch (win_data->bpp) { 4261c248b7dSInki Dae case 1: 4271c248b7dSInki Dae val |= WINCON0_BPPMODE_1BPP; 4281c248b7dSInki Dae val |= WINCONx_BITSWP; 4291c248b7dSInki Dae val |= WINCONx_BURSTLEN_4WORD; 4301c248b7dSInki Dae break; 4311c248b7dSInki Dae case 2: 4321c248b7dSInki Dae val |= WINCON0_BPPMODE_2BPP; 4331c248b7dSInki Dae val |= WINCONx_BITSWP; 4341c248b7dSInki Dae val |= WINCONx_BURSTLEN_8WORD; 4351c248b7dSInki Dae break; 4361c248b7dSInki Dae case 4: 4371c248b7dSInki Dae val |= WINCON0_BPPMODE_4BPP; 4381c248b7dSInki Dae val |= WINCONx_BITSWP; 4391c248b7dSInki Dae val |= WINCONx_BURSTLEN_8WORD; 4401c248b7dSInki Dae break; 4411c248b7dSInki Dae case 8: 4421c248b7dSInki Dae val |= WINCON0_BPPMODE_8BPP_PALETTE; 4431c248b7dSInki Dae val |= WINCONx_BURSTLEN_8WORD; 4441c248b7dSInki Dae val |= WINCONx_BYTSWP; 4451c248b7dSInki Dae break; 4461c248b7dSInki Dae case 16: 4471c248b7dSInki Dae val |= WINCON0_BPPMODE_16BPP_565; 4481c248b7dSInki Dae val |= WINCONx_HAWSWP; 4491c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 4501c248b7dSInki Dae break; 4511c248b7dSInki Dae case 24: 4521c248b7dSInki Dae val |= WINCON0_BPPMODE_24BPP_888; 4531c248b7dSInki Dae val |= WINCONx_WSWP; 4541c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 4551c248b7dSInki Dae break; 4561c248b7dSInki Dae case 32: 4571c248b7dSInki Dae val |= WINCON1_BPPMODE_28BPP_A4888 4581c248b7dSInki Dae | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL; 4591c248b7dSInki Dae val |= WINCONx_WSWP; 4601c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 4611c248b7dSInki Dae break; 4621c248b7dSInki Dae default: 4631c248b7dSInki Dae DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n"); 4641c248b7dSInki Dae 4651c248b7dSInki Dae val |= WINCON0_BPPMODE_24BPP_888; 4661c248b7dSInki Dae val |= WINCONx_WSWP; 4671c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 4681c248b7dSInki Dae break; 4691c248b7dSInki Dae } 4701c248b7dSInki Dae 4711c248b7dSInki Dae DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp); 4721c248b7dSInki Dae 4731c248b7dSInki Dae writel(val, ctx->regs + WINCON(win)); 4741c248b7dSInki Dae } 4751c248b7dSInki Dae 4761c248b7dSInki Dae static void fimd_win_set_colkey(struct device *dev, unsigned int win) 4771c248b7dSInki Dae { 4781c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 4791c248b7dSInki Dae unsigned int keycon0 = 0, keycon1 = 0; 4801c248b7dSInki Dae 4811c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 4821c248b7dSInki Dae 4831c248b7dSInki Dae keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F | 4841c248b7dSInki Dae WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0); 4851c248b7dSInki Dae 4861c248b7dSInki Dae keycon1 = WxKEYCON1_COLVAL(0xffffffff); 4871c248b7dSInki Dae 4881c248b7dSInki Dae writel(keycon0, ctx->regs + WKEYCON0_BASE(win)); 4891c248b7dSInki Dae writel(keycon1, ctx->regs + WKEYCON1_BASE(win)); 4901c248b7dSInki Dae } 4911c248b7dSInki Dae 492864ee9e6SJoonyoung Shim static void fimd_win_commit(struct device *dev, int zpos) 4931c248b7dSInki Dae { 4941c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 4951c248b7dSInki Dae struct fimd_win_data *win_data; 496864ee9e6SJoonyoung Shim int win = zpos; 4971c248b7dSInki Dae unsigned long val, alpha, size; 498f56aad3aSJoonyoung Shim unsigned int last_x; 499f56aad3aSJoonyoung Shim unsigned int last_y; 5001c248b7dSInki Dae 5011c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 5021c248b7dSInki Dae 503e30d4bcfSInki Dae if (ctx->suspended) 504e30d4bcfSInki Dae return; 505e30d4bcfSInki Dae 506864ee9e6SJoonyoung Shim if (win == DEFAULT_ZPOS) 507864ee9e6SJoonyoung Shim win = ctx->default_win; 508864ee9e6SJoonyoung Shim 5091c248b7dSInki Dae if (win < 0 || win > WINDOWS_NR) 5101c248b7dSInki Dae return; 5111c248b7dSInki Dae 5121c248b7dSInki Dae win_data = &ctx->win_data[win]; 5131c248b7dSInki Dae 5141c248b7dSInki Dae /* 5151c248b7dSInki Dae * SHADOWCON register is used for enabling timing. 5161c248b7dSInki Dae * 5171c248b7dSInki Dae * for example, once only width value of a register is set, 5181c248b7dSInki Dae * if the dma is started then fimd hardware could malfunction so 5191c248b7dSInki Dae * with protect window setting, the register fields with prefix '_F' 5201c248b7dSInki Dae * wouldn't be updated at vsync also but updated once unprotect window 5211c248b7dSInki Dae * is set. 5221c248b7dSInki Dae */ 5231c248b7dSInki Dae 5241c248b7dSInki Dae /* protect windows */ 5251c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 5261c248b7dSInki Dae val |= SHADOWCON_WINx_PROTECT(win); 5271c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 5281c248b7dSInki Dae 5291c248b7dSInki Dae /* buffer start address */ 5302c871127SInki Dae val = (unsigned long)win_data->dma_addr; 5311c248b7dSInki Dae writel(val, ctx->regs + VIDWx_BUF_START(win, 0)); 5321c248b7dSInki Dae 5331c248b7dSInki Dae /* buffer end address */ 53419c8b834SInki Dae size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3); 5352c871127SInki Dae val = (unsigned long)(win_data->dma_addr + size); 5361c248b7dSInki Dae writel(val, ctx->regs + VIDWx_BUF_END(win, 0)); 5371c248b7dSInki Dae 5381c248b7dSInki Dae DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n", 5392c871127SInki Dae (unsigned long)win_data->dma_addr, val, size); 54019c8b834SInki Dae DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n", 54119c8b834SInki Dae win_data->ovl_width, win_data->ovl_height); 5421c248b7dSInki Dae 5431c248b7dSInki Dae /* buffer size */ 5441c248b7dSInki Dae val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) | 545ca555e5aSJoonyoung Shim VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size) | 546ca555e5aSJoonyoung Shim VIDW_BUF_SIZE_OFFSET_E(win_data->buf_offsize) | 547ca555e5aSJoonyoung Shim VIDW_BUF_SIZE_PAGEWIDTH_E(win_data->line_size); 5481c248b7dSInki Dae writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0)); 5491c248b7dSInki Dae 5501c248b7dSInki Dae /* OSD position */ 5511c248b7dSInki Dae val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) | 552ca555e5aSJoonyoung Shim VIDOSDxA_TOPLEFT_Y(win_data->offset_y) | 553ca555e5aSJoonyoung Shim VIDOSDxA_TOPLEFT_X_E(win_data->offset_x) | 554ca555e5aSJoonyoung Shim VIDOSDxA_TOPLEFT_Y_E(win_data->offset_y); 5551c248b7dSInki Dae writel(val, ctx->regs + VIDOSD_A(win)); 5561c248b7dSInki Dae 557f56aad3aSJoonyoung Shim last_x = win_data->offset_x + win_data->ovl_width; 558f56aad3aSJoonyoung Shim if (last_x) 559f56aad3aSJoonyoung Shim last_x--; 560f56aad3aSJoonyoung Shim last_y = win_data->offset_y + win_data->ovl_height; 561f56aad3aSJoonyoung Shim if (last_y) 562f56aad3aSJoonyoung Shim last_y--; 563f56aad3aSJoonyoung Shim 564ca555e5aSJoonyoung Shim val = VIDOSDxB_BOTRIGHT_X(last_x) | VIDOSDxB_BOTRIGHT_Y(last_y) | 565ca555e5aSJoonyoung Shim VIDOSDxB_BOTRIGHT_X_E(last_x) | VIDOSDxB_BOTRIGHT_Y_E(last_y); 566ca555e5aSJoonyoung Shim 5671c248b7dSInki Dae writel(val, ctx->regs + VIDOSD_B(win)); 5681c248b7dSInki Dae 56919c8b834SInki Dae DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n", 570f56aad3aSJoonyoung Shim win_data->offset_x, win_data->offset_y, last_x, last_y); 5711c248b7dSInki Dae 5721c248b7dSInki Dae /* hardware window 0 doesn't support alpha channel. */ 5731c248b7dSInki Dae if (win != 0) { 5741c248b7dSInki Dae /* OSD alpha */ 5751c248b7dSInki Dae alpha = VIDISD14C_ALPHA1_R(0xf) | 5761c248b7dSInki Dae VIDISD14C_ALPHA1_G(0xf) | 5771c248b7dSInki Dae VIDISD14C_ALPHA1_B(0xf); 5781c248b7dSInki Dae 5791c248b7dSInki Dae writel(alpha, ctx->regs + VIDOSD_C(win)); 5801c248b7dSInki Dae } 5811c248b7dSInki Dae 5821c248b7dSInki Dae /* OSD size */ 5831c248b7dSInki Dae if (win != 3 && win != 4) { 5841c248b7dSInki Dae u32 offset = VIDOSD_D(win); 5851c248b7dSInki Dae if (win == 0) 5860f10cf14SLeela Krishna Amudala offset = VIDOSD_C(win); 58719c8b834SInki Dae val = win_data->ovl_width * win_data->ovl_height; 5881c248b7dSInki Dae writel(val, ctx->regs + offset); 5891c248b7dSInki Dae 5901c248b7dSInki Dae DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val); 5911c248b7dSInki Dae } 5921c248b7dSInki Dae 5931c248b7dSInki Dae fimd_win_set_pixfmt(dev, win); 5941c248b7dSInki Dae 5951c248b7dSInki Dae /* hardware window 0 doesn't support color key. */ 5961c248b7dSInki Dae if (win != 0) 5971c248b7dSInki Dae fimd_win_set_colkey(dev, win); 5981c248b7dSInki Dae 599ec05da95SInki Dae /* wincon */ 600ec05da95SInki Dae val = readl(ctx->regs + WINCON(win)); 601ec05da95SInki Dae val |= WINCONx_ENWIN; 602ec05da95SInki Dae writel(val, ctx->regs + WINCON(win)); 603ec05da95SInki Dae 6041c248b7dSInki Dae /* Enable DMA channel and unprotect windows */ 6051c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 6061c248b7dSInki Dae val |= SHADOWCON_CHx_ENABLE(win); 6071c248b7dSInki Dae val &= ~SHADOWCON_WINx_PROTECT(win); 6081c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 609ec05da95SInki Dae 610ec05da95SInki Dae win_data->enabled = true; 6111c248b7dSInki Dae } 6121c248b7dSInki Dae 613864ee9e6SJoonyoung Shim static void fimd_win_disable(struct device *dev, int zpos) 6141c248b7dSInki Dae { 6151c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 616ec05da95SInki Dae struct fimd_win_data *win_data; 617864ee9e6SJoonyoung Shim int win = zpos; 6181c248b7dSInki Dae u32 val; 6191c248b7dSInki Dae 6201c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 6211c248b7dSInki Dae 622864ee9e6SJoonyoung Shim if (win == DEFAULT_ZPOS) 623864ee9e6SJoonyoung Shim win = ctx->default_win; 624864ee9e6SJoonyoung Shim 6251c248b7dSInki Dae if (win < 0 || win > WINDOWS_NR) 6261c248b7dSInki Dae return; 6271c248b7dSInki Dae 628ec05da95SInki Dae win_data = &ctx->win_data[win]; 629ec05da95SInki Dae 630db7e55aeSPrathyush K if (ctx->suspended) { 631db7e55aeSPrathyush K /* do not resume this window*/ 632db7e55aeSPrathyush K win_data->resume = false; 633db7e55aeSPrathyush K return; 634db7e55aeSPrathyush K } 635db7e55aeSPrathyush K 6361c248b7dSInki Dae /* protect windows */ 6371c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 6381c248b7dSInki Dae val |= SHADOWCON_WINx_PROTECT(win); 6391c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 6401c248b7dSInki Dae 6411c248b7dSInki Dae /* wincon */ 6421c248b7dSInki Dae val = readl(ctx->regs + WINCON(win)); 6431c248b7dSInki Dae val &= ~WINCONx_ENWIN; 6441c248b7dSInki Dae writel(val, ctx->regs + WINCON(win)); 6451c248b7dSInki Dae 6461c248b7dSInki Dae /* unprotect windows */ 6471c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 6481c248b7dSInki Dae val &= ~SHADOWCON_CHx_ENABLE(win); 6491c248b7dSInki Dae val &= ~SHADOWCON_WINx_PROTECT(win); 6501c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 651ec05da95SInki Dae 652ec05da95SInki Dae win_data->enabled = false; 6531c248b7dSInki Dae } 6541c248b7dSInki Dae 6551c248b7dSInki Dae static struct exynos_drm_overlay_ops fimd_overlay_ops = { 6561c248b7dSInki Dae .mode_set = fimd_win_mode_set, 6571c248b7dSInki Dae .commit = fimd_win_commit, 6581c248b7dSInki Dae .disable = fimd_win_disable, 6591c248b7dSInki Dae }; 6601c248b7dSInki Dae 661677e84c1SJoonyoung Shim static struct exynos_drm_manager fimd_manager = { 662677e84c1SJoonyoung Shim .pipe = -1, 663677e84c1SJoonyoung Shim .ops = &fimd_manager_ops, 664677e84c1SJoonyoung Shim .overlay_ops = &fimd_overlay_ops, 665677e84c1SJoonyoung Shim .display_ops = &fimd_display_ops, 666677e84c1SJoonyoung Shim }; 667677e84c1SJoonyoung Shim 6681c248b7dSInki Dae static irqreturn_t fimd_irq_handler(int irq, void *dev_id) 6691c248b7dSInki Dae { 6701c248b7dSInki Dae struct fimd_context *ctx = (struct fimd_context *)dev_id; 6711c248b7dSInki Dae struct exynos_drm_subdrv *subdrv = &ctx->subdrv; 6721c248b7dSInki Dae struct drm_device *drm_dev = subdrv->drm_dev; 673677e84c1SJoonyoung Shim struct exynos_drm_manager *manager = subdrv->manager; 6741c248b7dSInki Dae u32 val; 6751c248b7dSInki Dae 6761c248b7dSInki Dae val = readl(ctx->regs + VIDINTCON1); 6771c248b7dSInki Dae 6781c248b7dSInki Dae if (val & VIDINTCON1_INT_FRAME) 6791c248b7dSInki Dae /* VSYNC interrupt */ 6801c248b7dSInki Dae writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1); 6811c248b7dSInki Dae 682ec05da95SInki Dae /* check the crtc is detached already from encoder */ 683ec05da95SInki Dae if (manager->pipe < 0) 684ec05da95SInki Dae goto out; 685483b88f8SInki Dae 6861c248b7dSInki Dae drm_handle_vblank(drm_dev, manager->pipe); 687663d8766SRahul Sharma exynos_drm_crtc_finish_pageflip(drm_dev, manager->pipe); 6881c248b7dSInki Dae 68901ce113cSPrathyush K /* set wait vsync event to zero and wake up queue. */ 69001ce113cSPrathyush K if (atomic_read(&ctx->wait_vsync_event)) { 69101ce113cSPrathyush K atomic_set(&ctx->wait_vsync_event, 0); 69201ce113cSPrathyush K DRM_WAKEUP(&ctx->wait_vsync_queue); 69301ce113cSPrathyush K } 694ec05da95SInki Dae out: 6951c248b7dSInki Dae return IRQ_HANDLED; 6961c248b7dSInki Dae } 6971c248b7dSInki Dae 69841c24346SInki Dae static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev) 6991c248b7dSInki Dae { 7001c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 7011c248b7dSInki Dae 7021c248b7dSInki Dae /* 7031c248b7dSInki Dae * enable drm irq mode. 7041c248b7dSInki Dae * - with irq_enabled = 1, we can use the vblank feature. 7051c248b7dSInki Dae * 7061c248b7dSInki Dae * P.S. note that we wouldn't use drm irq handler but 7071c248b7dSInki Dae * just specific driver own one instead because 7081c248b7dSInki Dae * drm framework supports only one irq handler. 7091c248b7dSInki Dae */ 7101c248b7dSInki Dae drm_dev->irq_enabled = 1; 7111c248b7dSInki Dae 712ec05da95SInki Dae /* 713ec05da95SInki Dae * with vblank_disable_allowed = 1, vblank interrupt will be disabled 714ec05da95SInki Dae * by drm timer once a current process gives up ownership of 715ec05da95SInki Dae * vblank event.(after drm_vblank_put function is called) 716ec05da95SInki Dae */ 717ec05da95SInki Dae drm_dev->vblank_disable_allowed = 1; 718ec05da95SInki Dae 719bcc5cd1cSInki Dae /* attach this sub driver to iommu mapping if supported. */ 720bcc5cd1cSInki Dae if (is_drm_iommu_supported(drm_dev)) 721bcc5cd1cSInki Dae drm_iommu_attach_device(drm_dev, dev); 722bcc5cd1cSInki Dae 7231c248b7dSInki Dae return 0; 7241c248b7dSInki Dae } 7251c248b7dSInki Dae 72629cb6025SInki Dae static void fimd_subdrv_remove(struct drm_device *drm_dev, struct device *dev) 7271c248b7dSInki Dae { 7281c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 7291c248b7dSInki Dae 730bcc5cd1cSInki Dae /* detach this sub driver from iommu mapping if supported. */ 731bcc5cd1cSInki Dae if (is_drm_iommu_supported(drm_dev)) 732bcc5cd1cSInki Dae drm_iommu_detach_device(drm_dev, dev); 7331c248b7dSInki Dae } 7341c248b7dSInki Dae 7351c248b7dSInki Dae static int fimd_calc_clkdiv(struct fimd_context *ctx, 7361c248b7dSInki Dae struct fb_videomode *timing) 7371c248b7dSInki Dae { 7381c248b7dSInki Dae unsigned long clk = clk_get_rate(ctx->lcd_clk); 7391c248b7dSInki Dae u32 retrace; 7401c248b7dSInki Dae u32 clkdiv; 7411c248b7dSInki Dae u32 best_framerate = 0; 7421c248b7dSInki Dae u32 framerate; 7431c248b7dSInki Dae 7441c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 7451c248b7dSInki Dae 7461c248b7dSInki Dae retrace = timing->left_margin + timing->hsync_len + 7471c248b7dSInki Dae timing->right_margin + timing->xres; 7481c248b7dSInki Dae retrace *= timing->upper_margin + timing->vsync_len + 7491c248b7dSInki Dae timing->lower_margin + timing->yres; 7501c248b7dSInki Dae 7511c248b7dSInki Dae /* default framerate is 60Hz */ 7521c248b7dSInki Dae if (!timing->refresh) 7531c248b7dSInki Dae timing->refresh = 60; 7541c248b7dSInki Dae 7551c248b7dSInki Dae clk /= retrace; 7561c248b7dSInki Dae 7571c248b7dSInki Dae for (clkdiv = 1; clkdiv < 0x100; clkdiv++) { 7581c248b7dSInki Dae int tmp; 7591c248b7dSInki Dae 7601c248b7dSInki Dae /* get best framerate */ 7611c248b7dSInki Dae framerate = clk / clkdiv; 7621c248b7dSInki Dae tmp = timing->refresh - framerate; 7631c248b7dSInki Dae if (tmp < 0) { 7641c248b7dSInki Dae best_framerate = framerate; 7651c248b7dSInki Dae continue; 7661c248b7dSInki Dae } else { 7671c248b7dSInki Dae if (!best_framerate) 7681c248b7dSInki Dae best_framerate = framerate; 7691c248b7dSInki Dae else if (tmp < (best_framerate - framerate)) 7701c248b7dSInki Dae best_framerate = framerate; 7711c248b7dSInki Dae break; 7721c248b7dSInki Dae } 7731c248b7dSInki Dae } 7741c248b7dSInki Dae 7751c248b7dSInki Dae return clkdiv; 7761c248b7dSInki Dae } 7771c248b7dSInki Dae 7781c248b7dSInki Dae static void fimd_clear_win(struct fimd_context *ctx, int win) 7791c248b7dSInki Dae { 7801c248b7dSInki Dae u32 val; 7811c248b7dSInki Dae 7821c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 7831c248b7dSInki Dae 7841c248b7dSInki Dae writel(0, ctx->regs + WINCON(win)); 7851c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_A(win)); 7861c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_B(win)); 7871c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_C(win)); 7881c248b7dSInki Dae 7891c248b7dSInki Dae if (win == 1 || win == 2) 7901c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_D(win)); 7911c248b7dSInki Dae 7921c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 7931c248b7dSInki Dae val &= ~SHADOWCON_WINx_PROTECT(win); 7941c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 7951c248b7dSInki Dae } 7961c248b7dSInki Dae 7975d55393aSInki Dae static int fimd_clock(struct fimd_context *ctx, bool enable) 798373af0c0SInki Dae { 799373af0c0SInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 800373af0c0SInki Dae 801373af0c0SInki Dae if (enable) { 802373af0c0SInki Dae int ret; 803373af0c0SInki Dae 80411963a63SVikas Sajjan ret = clk_prepare_enable(ctx->bus_clk); 805373af0c0SInki Dae if (ret < 0) 806373af0c0SInki Dae return ret; 807373af0c0SInki Dae 80811963a63SVikas Sajjan ret = clk_prepare_enable(ctx->lcd_clk); 809373af0c0SInki Dae if (ret < 0) { 81011963a63SVikas Sajjan clk_disable_unprepare(ctx->bus_clk); 811373af0c0SInki Dae return ret; 812373af0c0SInki Dae } 8135d55393aSInki Dae } else { 81411963a63SVikas Sajjan clk_disable_unprepare(ctx->lcd_clk); 81511963a63SVikas Sajjan clk_disable_unprepare(ctx->bus_clk); 8165d55393aSInki Dae } 8175d55393aSInki Dae 8185d55393aSInki Dae return 0; 8195d55393aSInki Dae } 8205d55393aSInki Dae 821db7e55aeSPrathyush K static void fimd_window_suspend(struct device *dev) 822db7e55aeSPrathyush K { 823db7e55aeSPrathyush K struct fimd_context *ctx = get_fimd_context(dev); 824db7e55aeSPrathyush K struct fimd_win_data *win_data; 825db7e55aeSPrathyush K int i; 826db7e55aeSPrathyush K 827db7e55aeSPrathyush K for (i = 0; i < WINDOWS_NR; i++) { 828db7e55aeSPrathyush K win_data = &ctx->win_data[i]; 829db7e55aeSPrathyush K win_data->resume = win_data->enabled; 830db7e55aeSPrathyush K fimd_win_disable(dev, i); 831db7e55aeSPrathyush K } 832db7e55aeSPrathyush K fimd_wait_for_vblank(dev); 833db7e55aeSPrathyush K } 834db7e55aeSPrathyush K 835db7e55aeSPrathyush K static void fimd_window_resume(struct device *dev) 836db7e55aeSPrathyush K { 837db7e55aeSPrathyush K struct fimd_context *ctx = get_fimd_context(dev); 838db7e55aeSPrathyush K struct fimd_win_data *win_data; 839db7e55aeSPrathyush K int i; 840db7e55aeSPrathyush K 841db7e55aeSPrathyush K for (i = 0; i < WINDOWS_NR; i++) { 842db7e55aeSPrathyush K win_data = &ctx->win_data[i]; 843db7e55aeSPrathyush K win_data->enabled = win_data->resume; 844db7e55aeSPrathyush K win_data->resume = false; 845db7e55aeSPrathyush K } 846db7e55aeSPrathyush K } 847db7e55aeSPrathyush K 8485d55393aSInki Dae static int fimd_activate(struct fimd_context *ctx, bool enable) 8495d55393aSInki Dae { 850db7e55aeSPrathyush K struct device *dev = ctx->subdrv.dev; 8515d55393aSInki Dae if (enable) { 8525d55393aSInki Dae int ret; 8535d55393aSInki Dae 8545d55393aSInki Dae ret = fimd_clock(ctx, true); 8555d55393aSInki Dae if (ret < 0) 8565d55393aSInki Dae return ret; 857373af0c0SInki Dae 858373af0c0SInki Dae ctx->suspended = false; 859373af0c0SInki Dae 860373af0c0SInki Dae /* if vblank was enabled status, enable it again. */ 861373af0c0SInki Dae if (test_and_clear_bit(0, &ctx->irq_flags)) 862373af0c0SInki Dae fimd_enable_vblank(dev); 863db7e55aeSPrathyush K 864db7e55aeSPrathyush K fimd_window_resume(dev); 865373af0c0SInki Dae } else { 866db7e55aeSPrathyush K fimd_window_suspend(dev); 867db7e55aeSPrathyush K 8685d55393aSInki Dae fimd_clock(ctx, false); 869373af0c0SInki Dae ctx->suspended = true; 870373af0c0SInki Dae } 871373af0c0SInki Dae 872373af0c0SInki Dae return 0; 873373af0c0SInki Dae } 874373af0c0SInki Dae 87556550d94SGreg Kroah-Hartman static int fimd_probe(struct platform_device *pdev) 8761c248b7dSInki Dae { 8771c248b7dSInki Dae struct device *dev = &pdev->dev; 8781c248b7dSInki Dae struct fimd_context *ctx; 8791c248b7dSInki Dae struct exynos_drm_subdrv *subdrv; 8801c248b7dSInki Dae struct exynos_drm_fimd_pdata *pdata; 881607c50d4SEun-Chul Kim struct exynos_drm_panel_info *panel; 8821c248b7dSInki Dae struct resource *res; 8831c248b7dSInki Dae int win; 8841c248b7dSInki Dae int ret = -EINVAL; 8851c248b7dSInki Dae 8861c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 8871c248b7dSInki Dae 888d873ab99SSeung-Woo Kim if (dev->of_node) { 8897f4596f4SVikas Sajjan pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 8907f4596f4SVikas Sajjan if (!pdata) { 8917f4596f4SVikas Sajjan DRM_ERROR("memory allocation for pdata failed\n"); 8927f4596f4SVikas Sajjan return -ENOMEM; 8937f4596f4SVikas Sajjan } 8947f4596f4SVikas Sajjan 8957f4596f4SVikas Sajjan ret = of_get_fb_videomode(dev->of_node, &pdata->panel.timing, 8967f4596f4SVikas Sajjan OF_USE_NATIVE_MODE); 8977f4596f4SVikas Sajjan if (ret) { 8987f4596f4SVikas Sajjan DRM_ERROR("failed: of_get_fb_videomode() : %d\n", ret); 8997f4596f4SVikas Sajjan return ret; 9007f4596f4SVikas Sajjan } 9017f4596f4SVikas Sajjan } else { 902d873ab99SSeung-Woo Kim pdata = dev->platform_data; 9031c248b7dSInki Dae if (!pdata) { 9047f4596f4SVikas Sajjan DRM_ERROR("no platform data specified\n"); 9051c248b7dSInki Dae return -EINVAL; 9061c248b7dSInki Dae } 9077f4596f4SVikas Sajjan } 9081c248b7dSInki Dae 909607c50d4SEun-Chul Kim panel = &pdata->panel; 910607c50d4SEun-Chul Kim if (!panel) { 911607c50d4SEun-Chul Kim dev_err(dev, "panel is null.\n"); 9121c248b7dSInki Dae return -EINVAL; 9131c248b7dSInki Dae } 9141c248b7dSInki Dae 915d873ab99SSeung-Woo Kim ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); 9161c248b7dSInki Dae if (!ctx) 9171c248b7dSInki Dae return -ENOMEM; 9181c248b7dSInki Dae 919a4d8de5fSSachin Kamat ctx->bus_clk = devm_clk_get(dev, "fimd"); 9201c248b7dSInki Dae if (IS_ERR(ctx->bus_clk)) { 9211c248b7dSInki Dae dev_err(dev, "failed to get bus clock\n"); 922a4d8de5fSSachin Kamat return PTR_ERR(ctx->bus_clk); 9231c248b7dSInki Dae } 9241c248b7dSInki Dae 925a4d8de5fSSachin Kamat ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd"); 9261c248b7dSInki Dae if (IS_ERR(ctx->lcd_clk)) { 9271c248b7dSInki Dae dev_err(dev, "failed to get lcd clock\n"); 928a4d8de5fSSachin Kamat return PTR_ERR(ctx->lcd_clk); 9291c248b7dSInki Dae } 9301c248b7dSInki Dae 9311c248b7dSInki Dae res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 9321c248b7dSInki Dae 933d873ab99SSeung-Woo Kim ctx->regs = devm_ioremap_resource(dev, res); 934d4ed6025SThierry Reding if (IS_ERR(ctx->regs)) 935d4ed6025SThierry Reding return PTR_ERR(ctx->regs); 9361c248b7dSInki Dae 9371977e6d8SVikas Sajjan res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "vsync"); 9381c248b7dSInki Dae if (!res) { 9391c248b7dSInki Dae dev_err(dev, "irq request failed.\n"); 940a4d8de5fSSachin Kamat return -ENXIO; 9411c248b7dSInki Dae } 9421c248b7dSInki Dae 9431c248b7dSInki Dae ctx->irq = res->start; 9441c248b7dSInki Dae 945d873ab99SSeung-Woo Kim ret = devm_request_irq(dev, ctx->irq, fimd_irq_handler, 946edc57266SSachin Kamat 0, "drm_fimd", ctx); 947edc57266SSachin Kamat if (ret) { 9481c248b7dSInki Dae dev_err(dev, "irq request failed.\n"); 949a4d8de5fSSachin Kamat return ret; 9501c248b7dSInki Dae } 9511c248b7dSInki Dae 9521c248b7dSInki Dae ctx->vidcon0 = pdata->vidcon0; 9531c248b7dSInki Dae ctx->vidcon1 = pdata->vidcon1; 9541c248b7dSInki Dae ctx->default_win = pdata->default_win; 955607c50d4SEun-Chul Kim ctx->panel = panel; 95601ce113cSPrathyush K DRM_INIT_WAITQUEUE(&ctx->wait_vsync_queue); 95701ce113cSPrathyush K atomic_set(&ctx->wait_vsync_event, 0); 9581c248b7dSInki Dae 9591c248b7dSInki Dae subdrv = &ctx->subdrv; 9601c248b7dSInki Dae 961677e84c1SJoonyoung Shim subdrv->dev = dev; 962677e84c1SJoonyoung Shim subdrv->manager = &fimd_manager; 9631c248b7dSInki Dae subdrv->probe = fimd_subdrv_probe; 9641c248b7dSInki Dae subdrv->remove = fimd_subdrv_remove; 9651c248b7dSInki Dae 966c32b06efSInki Dae mutex_init(&ctx->lock); 967c32b06efSInki Dae 9681c248b7dSInki Dae platform_set_drvdata(pdev, ctx); 969c32b06efSInki Dae 970c32b06efSInki Dae pm_runtime_enable(dev); 971c32b06efSInki Dae pm_runtime_get_sync(dev); 972c32b06efSInki Dae 9730d8ce3aeSMarek Szyprowski ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing); 9740d8ce3aeSMarek Szyprowski panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv; 9750d8ce3aeSMarek Szyprowski 9760d8ce3aeSMarek Szyprowski DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n", 9770d8ce3aeSMarek Szyprowski panel->timing.pixclock, ctx->clkdiv); 9780d8ce3aeSMarek Szyprowski 979c32b06efSInki Dae for (win = 0; win < WINDOWS_NR; win++) 980c32b06efSInki Dae fimd_clear_win(ctx, win); 981c32b06efSInki Dae 9821c248b7dSInki Dae exynos_drm_subdrv_register(subdrv); 9831c248b7dSInki Dae 9841c248b7dSInki Dae return 0; 9851c248b7dSInki Dae } 9861c248b7dSInki Dae 98756550d94SGreg Kroah-Hartman static int fimd_remove(struct platform_device *pdev) 9881c248b7dSInki Dae { 989cb91f6a0SJoonyoung Shim struct device *dev = &pdev->dev; 9901c248b7dSInki Dae struct fimd_context *ctx = platform_get_drvdata(pdev); 9911c248b7dSInki Dae 9921c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 9931c248b7dSInki Dae 9941c248b7dSInki Dae exynos_drm_subdrv_unregister(&ctx->subdrv); 9951c248b7dSInki Dae 996cb91f6a0SJoonyoung Shim if (ctx->suspended) 997cb91f6a0SJoonyoung Shim goto out; 998cb91f6a0SJoonyoung Shim 999cb91f6a0SJoonyoung Shim pm_runtime_set_suspended(dev); 1000cb91f6a0SJoonyoung Shim pm_runtime_put_sync(dev); 1001cb91f6a0SJoonyoung Shim 1002cb91f6a0SJoonyoung Shim out: 1003cb91f6a0SJoonyoung Shim pm_runtime_disable(dev); 1004cb91f6a0SJoonyoung Shim 10051c248b7dSInki Dae return 0; 10061c248b7dSInki Dae } 10071c248b7dSInki Dae 1008e30d4bcfSInki Dae #ifdef CONFIG_PM_SLEEP 1009e30d4bcfSInki Dae static int fimd_suspend(struct device *dev) 1010e30d4bcfSInki Dae { 1011373af0c0SInki Dae struct fimd_context *ctx = get_fimd_context(dev); 1012e30d4bcfSInki Dae 1013373af0c0SInki Dae /* 1014373af0c0SInki Dae * do not use pm_runtime_suspend(). if pm_runtime_suspend() is 1015373af0c0SInki Dae * called here, an error would be returned by that interface 1016373af0c0SInki Dae * because the usage_count of pm runtime is more than 1. 1017373af0c0SInki Dae */ 10185d55393aSInki Dae if (!pm_runtime_suspended(dev)) 10195d55393aSInki Dae return fimd_activate(ctx, false); 10205d55393aSInki Dae 10215d55393aSInki Dae return 0; 1022e30d4bcfSInki Dae } 1023e30d4bcfSInki Dae 1024e30d4bcfSInki Dae static int fimd_resume(struct device *dev) 1025e30d4bcfSInki Dae { 1026373af0c0SInki Dae struct fimd_context *ctx = get_fimd_context(dev); 1027e30d4bcfSInki Dae 1028373af0c0SInki Dae /* 1029373af0c0SInki Dae * if entered to sleep when lcd panel was on, the usage_count 1030373af0c0SInki Dae * of pm runtime would still be 1 so in this case, fimd driver 1031373af0c0SInki Dae * should be on directly not drawing on pm runtime interface. 1032373af0c0SInki Dae */ 103328998afaSPrathyush K if (!pm_runtime_suspended(dev)) { 10345d55393aSInki Dae int ret; 10355d55393aSInki Dae 10365d55393aSInki Dae ret = fimd_activate(ctx, true); 10375d55393aSInki Dae if (ret < 0) 10385d55393aSInki Dae return ret; 10395d55393aSInki Dae 10405d55393aSInki Dae /* 10415d55393aSInki Dae * in case of dpms on(standby), fimd_apply function will 10425d55393aSInki Dae * be called by encoder's dpms callback to update fimd's 10435d55393aSInki Dae * registers but in case of sleep wakeup, it's not. 10445d55393aSInki Dae * so fimd_apply function should be called at here. 10455d55393aSInki Dae */ 10465d55393aSInki Dae fimd_apply(dev); 10475d55393aSInki Dae } 1048e30d4bcfSInki Dae 1049e30d4bcfSInki Dae return 0; 1050e30d4bcfSInki Dae } 1051e30d4bcfSInki Dae #endif 1052e30d4bcfSInki Dae 1053cb91f6a0SJoonyoung Shim #ifdef CONFIG_PM_RUNTIME 1054cb91f6a0SJoonyoung Shim static int fimd_runtime_suspend(struct device *dev) 1055cb91f6a0SJoonyoung Shim { 1056cb91f6a0SJoonyoung Shim struct fimd_context *ctx = get_fimd_context(dev); 1057cb91f6a0SJoonyoung Shim 1058cb91f6a0SJoonyoung Shim DRM_DEBUG_KMS("%s\n", __FILE__); 1059cb91f6a0SJoonyoung Shim 10605d55393aSInki Dae return fimd_activate(ctx, false); 1061cb91f6a0SJoonyoung Shim } 1062cb91f6a0SJoonyoung Shim 1063cb91f6a0SJoonyoung Shim static int fimd_runtime_resume(struct device *dev) 1064cb91f6a0SJoonyoung Shim { 1065cb91f6a0SJoonyoung Shim struct fimd_context *ctx = get_fimd_context(dev); 1066cb91f6a0SJoonyoung Shim 1067cb91f6a0SJoonyoung Shim DRM_DEBUG_KMS("%s\n", __FILE__); 1068cb91f6a0SJoonyoung Shim 10695d55393aSInki Dae return fimd_activate(ctx, true); 1070cb91f6a0SJoonyoung Shim } 1071cb91f6a0SJoonyoung Shim #endif 1072cb91f6a0SJoonyoung Shim 1073e2e13389SLeela Krishna Amudala static struct platform_device_id fimd_driver_ids[] = { 1074e2e13389SLeela Krishna Amudala { 1075e2e13389SLeela Krishna Amudala .name = "exynos4-fb", 1076e2e13389SLeela Krishna Amudala .driver_data = (unsigned long)&exynos4_fimd_driver_data, 1077e2e13389SLeela Krishna Amudala }, { 1078e2e13389SLeela Krishna Amudala .name = "exynos5-fb", 1079e2e13389SLeela Krishna Amudala .driver_data = (unsigned long)&exynos5_fimd_driver_data, 1080e2e13389SLeela Krishna Amudala }, 1081e2e13389SLeela Krishna Amudala {}, 1082e2e13389SLeela Krishna Amudala }; 1083e2e13389SLeela Krishna Amudala MODULE_DEVICE_TABLE(platform, fimd_driver_ids); 1084e2e13389SLeela Krishna Amudala 1085cb91f6a0SJoonyoung Shim static const struct dev_pm_ops fimd_pm_ops = { 1086e30d4bcfSInki Dae SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume) 1087cb91f6a0SJoonyoung Shim SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL) 1088cb91f6a0SJoonyoung Shim }; 1089cb91f6a0SJoonyoung Shim 1090132a5b91SJoonyoung Shim struct platform_driver fimd_driver = { 10911c248b7dSInki Dae .probe = fimd_probe, 109256550d94SGreg Kroah-Hartman .remove = fimd_remove, 1093e2e13389SLeela Krishna Amudala .id_table = fimd_driver_ids, 10941c248b7dSInki Dae .driver = { 10951c248b7dSInki Dae .name = "exynos4-fb", 10961c248b7dSInki Dae .owner = THIS_MODULE, 1097cb91f6a0SJoonyoung Shim .pm = &fimd_pm_ops, 1098d636ead8SJoonyoung Shim .of_match_table = of_match_ptr(fimd_driver_dt_match), 10991c248b7dSInki Dae }, 11001c248b7dSInki Dae }; 1101