11c248b7dSInki Dae /* exynos_drm_fimd.c 21c248b7dSInki Dae * 31c248b7dSInki Dae * Copyright (C) 2011 Samsung Electronics Co.Ltd 41c248b7dSInki Dae * Authors: 51c248b7dSInki Dae * Joonyoung Shim <jy0922.shim@samsung.com> 61c248b7dSInki Dae * Inki Dae <inki.dae@samsung.com> 71c248b7dSInki Dae * 81c248b7dSInki Dae * This program is free software; you can redistribute it and/or modify it 91c248b7dSInki Dae * under the terms of the GNU General Public License as published by the 101c248b7dSInki Dae * Free Software Foundation; either version 2 of the License, or (at your 111c248b7dSInki Dae * option) any later version. 121c248b7dSInki Dae * 131c248b7dSInki Dae */ 141c248b7dSInki Dae #include "drmP.h" 151c248b7dSInki Dae 161c248b7dSInki Dae #include <linux/kernel.h> 171c248b7dSInki Dae #include <linux/module.h> 181c248b7dSInki Dae #include <linux/platform_device.h> 191c248b7dSInki Dae #include <linux/clk.h> 20cb91f6a0SJoonyoung Shim #include <linux/pm_runtime.h> 211c248b7dSInki Dae 221c248b7dSInki Dae #include <drm/exynos_drm.h> 231c248b7dSInki Dae #include <plat/regs-fb-v4.h> 241c248b7dSInki Dae 251c248b7dSInki Dae #include "exynos_drm_drv.h" 261c248b7dSInki Dae #include "exynos_drm_fbdev.h" 271c248b7dSInki Dae #include "exynos_drm_crtc.h" 281c248b7dSInki Dae 291c248b7dSInki Dae /* 301c248b7dSInki Dae * FIMD is stand for Fully Interactive Mobile Display and 311c248b7dSInki Dae * as a display controller, it transfers contents drawn on memory 321c248b7dSInki Dae * to a LCD Panel through Display Interfaces such as RGB or 331c248b7dSInki Dae * CPU Interface. 341c248b7dSInki Dae */ 351c248b7dSInki Dae 361c248b7dSInki Dae /* position control register for hardware window 0, 2 ~ 4.*/ 371c248b7dSInki Dae #define VIDOSD_A(win) (VIDOSD_BASE + 0x00 + (win) * 16) 381c248b7dSInki Dae #define VIDOSD_B(win) (VIDOSD_BASE + 0x04 + (win) * 16) 391c248b7dSInki Dae /* size control register for hardware window 0. */ 401c248b7dSInki Dae #define VIDOSD_C_SIZE_W0 (VIDOSD_BASE + 0x08) 411c248b7dSInki Dae /* alpha control register for hardware window 1 ~ 4. */ 421c248b7dSInki Dae #define VIDOSD_C(win) (VIDOSD_BASE + 0x18 + (win) * 16) 431c248b7dSInki Dae /* size control register for hardware window 1 ~ 4. */ 441c248b7dSInki Dae #define VIDOSD_D(win) (VIDOSD_BASE + 0x0C + (win) * 16) 451c248b7dSInki Dae 461c248b7dSInki Dae #define VIDWx_BUF_START(win, buf) (VIDW_BUF_START(buf) + (win) * 8) 471c248b7dSInki Dae #define VIDWx_BUF_END(win, buf) (VIDW_BUF_END(buf) + (win) * 8) 481c248b7dSInki Dae #define VIDWx_BUF_SIZE(win, buf) (VIDW_BUF_SIZE(buf) + (win) * 4) 491c248b7dSInki Dae 501c248b7dSInki Dae /* color key control register for hardware window 1 ~ 4. */ 511c248b7dSInki Dae #define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + (x * 8)) 521c248b7dSInki Dae /* color key value register for hardware window 1 ~ 4. */ 531c248b7dSInki Dae #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + (x * 8)) 541c248b7dSInki Dae 551c248b7dSInki Dae /* FIMD has totally five hardware windows. */ 561c248b7dSInki Dae #define WINDOWS_NR 5 571c248b7dSInki Dae 581c248b7dSInki Dae #define get_fimd_context(dev) platform_get_drvdata(to_platform_device(dev)) 591c248b7dSInki Dae 601c248b7dSInki Dae struct fimd_win_data { 611c248b7dSInki Dae unsigned int offset_x; 621c248b7dSInki Dae unsigned int offset_y; 6319c8b834SInki Dae unsigned int ovl_width; 6419c8b834SInki Dae unsigned int ovl_height; 6519c8b834SInki Dae unsigned int fb_width; 6619c8b834SInki Dae unsigned int fb_height; 671c248b7dSInki Dae unsigned int bpp; 682c871127SInki Dae dma_addr_t dma_addr; 691c248b7dSInki Dae void __iomem *vaddr; 701c248b7dSInki Dae unsigned int buf_offsize; 711c248b7dSInki Dae unsigned int line_size; /* bytes */ 72ec05da95SInki Dae bool enabled; 731c248b7dSInki Dae }; 741c248b7dSInki Dae 751c248b7dSInki Dae struct fimd_context { 761c248b7dSInki Dae struct exynos_drm_subdrv subdrv; 771c248b7dSInki Dae int irq; 781c248b7dSInki Dae struct drm_crtc *crtc; 791c248b7dSInki Dae struct clk *bus_clk; 801c248b7dSInki Dae struct clk *lcd_clk; 811c248b7dSInki Dae struct resource *regs_res; 821c248b7dSInki Dae void __iomem *regs; 831c248b7dSInki Dae struct fimd_win_data win_data[WINDOWS_NR]; 841c248b7dSInki Dae unsigned int clkdiv; 851c248b7dSInki Dae unsigned int default_win; 861c248b7dSInki Dae unsigned long irq_flags; 871c248b7dSInki Dae u32 vidcon0; 881c248b7dSInki Dae u32 vidcon1; 89cb91f6a0SJoonyoung Shim bool suspended; 90c32b06efSInki Dae struct mutex lock; 911c248b7dSInki Dae 92607c50d4SEun-Chul Kim struct exynos_drm_panel_info *panel; 931c248b7dSInki Dae }; 941c248b7dSInki Dae 951c248b7dSInki Dae static bool fimd_display_is_connected(struct device *dev) 961c248b7dSInki Dae { 971c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 981c248b7dSInki Dae 991c248b7dSInki Dae /* TODO. */ 1001c248b7dSInki Dae 1011c248b7dSInki Dae return true; 1021c248b7dSInki Dae } 1031c248b7dSInki Dae 104607c50d4SEun-Chul Kim static void *fimd_get_panel(struct device *dev) 1051c248b7dSInki Dae { 1061c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 1071c248b7dSInki Dae 1081c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1091c248b7dSInki Dae 110607c50d4SEun-Chul Kim return ctx->panel; 1111c248b7dSInki Dae } 1121c248b7dSInki Dae 1131c248b7dSInki Dae static int fimd_check_timing(struct device *dev, void *timing) 1141c248b7dSInki Dae { 1151c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1161c248b7dSInki Dae 1171c248b7dSInki Dae /* TODO. */ 1181c248b7dSInki Dae 1191c248b7dSInki Dae return 0; 1201c248b7dSInki Dae } 1211c248b7dSInki Dae 1221c248b7dSInki Dae static int fimd_display_power_on(struct device *dev, int mode) 1231c248b7dSInki Dae { 1241c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 1251c248b7dSInki Dae 126ec05da95SInki Dae /* TODO */ 1271c248b7dSInki Dae 1281c248b7dSInki Dae return 0; 1291c248b7dSInki Dae } 1301c248b7dSInki Dae 13174ccc539SInki Dae static struct exynos_drm_display_ops fimd_display_ops = { 1321c248b7dSInki Dae .type = EXYNOS_DISPLAY_TYPE_LCD, 1331c248b7dSInki Dae .is_connected = fimd_display_is_connected, 134607c50d4SEun-Chul Kim .get_panel = fimd_get_panel, 1351c248b7dSInki Dae .check_timing = fimd_check_timing, 1361c248b7dSInki Dae .power_on = fimd_display_power_on, 1371c248b7dSInki Dae }; 1381c248b7dSInki Dae 139ec05da95SInki Dae static void fimd_dpms(struct device *subdrv_dev, int mode) 140ec05da95SInki Dae { 141c32b06efSInki Dae struct fimd_context *ctx = get_fimd_context(subdrv_dev); 142c32b06efSInki Dae 143ec05da95SInki Dae DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode); 144ec05da95SInki Dae 145c32b06efSInki Dae mutex_lock(&ctx->lock); 146c32b06efSInki Dae 147cb91f6a0SJoonyoung Shim switch (mode) { 148cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_ON: 149c32b06efSInki Dae /* 150c32b06efSInki Dae * enable fimd hardware only if suspended status. 151c32b06efSInki Dae * 152c32b06efSInki Dae * P.S. fimd_dpms function would be called at booting time so 153c32b06efSInki Dae * clk_enable could be called double time. 154c32b06efSInki Dae */ 155c32b06efSInki Dae if (ctx->suspended) 156cb91f6a0SJoonyoung Shim pm_runtime_get_sync(subdrv_dev); 157cb91f6a0SJoonyoung Shim break; 158cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_STANDBY: 159cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_SUSPEND: 160cb91f6a0SJoonyoung Shim case DRM_MODE_DPMS_OFF: 161373af0c0SInki Dae if (!ctx->suspended) 162cb91f6a0SJoonyoung Shim pm_runtime_put_sync(subdrv_dev); 163cb91f6a0SJoonyoung Shim break; 164cb91f6a0SJoonyoung Shim default: 165cb91f6a0SJoonyoung Shim DRM_DEBUG_KMS("unspecified mode %d\n", mode); 166cb91f6a0SJoonyoung Shim break; 167cb91f6a0SJoonyoung Shim } 168c32b06efSInki Dae 169c32b06efSInki Dae mutex_unlock(&ctx->lock); 170ec05da95SInki Dae } 171ec05da95SInki Dae 172ec05da95SInki Dae static void fimd_apply(struct device *subdrv_dev) 173ec05da95SInki Dae { 174ec05da95SInki Dae struct fimd_context *ctx = get_fimd_context(subdrv_dev); 175ec05da95SInki Dae struct exynos_drm_manager *mgr = &ctx->subdrv.manager; 176ec05da95SInki Dae struct exynos_drm_manager_ops *mgr_ops = mgr->ops; 177ec05da95SInki Dae struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops; 178ec05da95SInki Dae struct fimd_win_data *win_data; 179864ee9e6SJoonyoung Shim int i; 180ec05da95SInki Dae 181ec05da95SInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 182ec05da95SInki Dae 183864ee9e6SJoonyoung Shim for (i = 0; i < WINDOWS_NR; i++) { 184864ee9e6SJoonyoung Shim win_data = &ctx->win_data[i]; 185ec05da95SInki Dae if (win_data->enabled && (ovl_ops && ovl_ops->commit)) 186864ee9e6SJoonyoung Shim ovl_ops->commit(subdrv_dev, i); 187864ee9e6SJoonyoung Shim } 188ec05da95SInki Dae 189ec05da95SInki Dae if (mgr_ops && mgr_ops->commit) 190ec05da95SInki Dae mgr_ops->commit(subdrv_dev); 191ec05da95SInki Dae } 192ec05da95SInki Dae 1931c248b7dSInki Dae static void fimd_commit(struct device *dev) 1941c248b7dSInki Dae { 1951c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 196607c50d4SEun-Chul Kim struct exynos_drm_panel_info *panel = ctx->panel; 197607c50d4SEun-Chul Kim struct fb_videomode *timing = &panel->timing; 1981c248b7dSInki Dae u32 val; 1991c248b7dSInki Dae 200e30d4bcfSInki Dae if (ctx->suspended) 201e30d4bcfSInki Dae return; 202e30d4bcfSInki Dae 2031c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 2041c248b7dSInki Dae 2051c248b7dSInki Dae /* setup polarity values from machine code. */ 2061c248b7dSInki Dae writel(ctx->vidcon1, ctx->regs + VIDCON1); 2071c248b7dSInki Dae 2081c248b7dSInki Dae /* setup vertical timing values. */ 2091c248b7dSInki Dae val = VIDTCON0_VBPD(timing->upper_margin - 1) | 2101c248b7dSInki Dae VIDTCON0_VFPD(timing->lower_margin - 1) | 2111c248b7dSInki Dae VIDTCON0_VSPW(timing->vsync_len - 1); 2121c248b7dSInki Dae writel(val, ctx->regs + VIDTCON0); 2131c248b7dSInki Dae 2141c248b7dSInki Dae /* setup horizontal timing values. */ 2151c248b7dSInki Dae val = VIDTCON1_HBPD(timing->left_margin - 1) | 2161c248b7dSInki Dae VIDTCON1_HFPD(timing->right_margin - 1) | 2171c248b7dSInki Dae VIDTCON1_HSPW(timing->hsync_len - 1); 2181c248b7dSInki Dae writel(val, ctx->regs + VIDTCON1); 2191c248b7dSInki Dae 2201c248b7dSInki Dae /* setup horizontal and vertical display size. */ 2211c248b7dSInki Dae val = VIDTCON2_LINEVAL(timing->yres - 1) | 2221c248b7dSInki Dae VIDTCON2_HOZVAL(timing->xres - 1); 2231c248b7dSInki Dae writel(val, ctx->regs + VIDTCON2); 2241c248b7dSInki Dae 2251c248b7dSInki Dae /* setup clock source, clock divider, enable dma. */ 2261c248b7dSInki Dae val = ctx->vidcon0; 2271c248b7dSInki Dae val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR); 2281c248b7dSInki Dae 2291c248b7dSInki Dae if (ctx->clkdiv > 1) 2301c248b7dSInki Dae val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR; 2311c248b7dSInki Dae else 2321c248b7dSInki Dae val &= ~VIDCON0_CLKDIR; /* 1:1 clock */ 2331c248b7dSInki Dae 2341c248b7dSInki Dae /* 2351c248b7dSInki Dae * fields of register with prefix '_F' would be updated 2361c248b7dSInki Dae * at vsync(same as dma start) 2371c248b7dSInki Dae */ 2381c248b7dSInki Dae val |= VIDCON0_ENVID | VIDCON0_ENVID_F; 2391c248b7dSInki Dae writel(val, ctx->regs + VIDCON0); 2401c248b7dSInki Dae } 2411c248b7dSInki Dae 2421c248b7dSInki Dae static int fimd_enable_vblank(struct device *dev) 2431c248b7dSInki Dae { 2441c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 2451c248b7dSInki Dae u32 val; 2461c248b7dSInki Dae 2471c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 2481c248b7dSInki Dae 249cb91f6a0SJoonyoung Shim if (ctx->suspended) 250cb91f6a0SJoonyoung Shim return -EPERM; 251cb91f6a0SJoonyoung Shim 2521c248b7dSInki Dae if (!test_and_set_bit(0, &ctx->irq_flags)) { 2531c248b7dSInki Dae val = readl(ctx->regs + VIDINTCON0); 2541c248b7dSInki Dae 2551c248b7dSInki Dae val |= VIDINTCON0_INT_ENABLE; 2561c248b7dSInki Dae val |= VIDINTCON0_INT_FRAME; 2571c248b7dSInki Dae 2581c248b7dSInki Dae val &= ~VIDINTCON0_FRAMESEL0_MASK; 2591c248b7dSInki Dae val |= VIDINTCON0_FRAMESEL0_VSYNC; 2601c248b7dSInki Dae val &= ~VIDINTCON0_FRAMESEL1_MASK; 2611c248b7dSInki Dae val |= VIDINTCON0_FRAMESEL1_NONE; 2621c248b7dSInki Dae 2631c248b7dSInki Dae writel(val, ctx->regs + VIDINTCON0); 2641c248b7dSInki Dae } 2651c248b7dSInki Dae 2661c248b7dSInki Dae return 0; 2671c248b7dSInki Dae } 2681c248b7dSInki Dae 2691c248b7dSInki Dae static void fimd_disable_vblank(struct device *dev) 2701c248b7dSInki Dae { 2711c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 2721c248b7dSInki Dae u32 val; 2731c248b7dSInki Dae 2741c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 2751c248b7dSInki Dae 276cb91f6a0SJoonyoung Shim if (ctx->suspended) 277cb91f6a0SJoonyoung Shim return; 278cb91f6a0SJoonyoung Shim 2791c248b7dSInki Dae if (test_and_clear_bit(0, &ctx->irq_flags)) { 2801c248b7dSInki Dae val = readl(ctx->regs + VIDINTCON0); 2811c248b7dSInki Dae 2821c248b7dSInki Dae val &= ~VIDINTCON0_INT_FRAME; 2831c248b7dSInki Dae val &= ~VIDINTCON0_INT_ENABLE; 2841c248b7dSInki Dae 2851c248b7dSInki Dae writel(val, ctx->regs + VIDINTCON0); 2861c248b7dSInki Dae } 2871c248b7dSInki Dae } 2881c248b7dSInki Dae 2891c248b7dSInki Dae static struct exynos_drm_manager_ops fimd_manager_ops = { 290ec05da95SInki Dae .dpms = fimd_dpms, 291ec05da95SInki Dae .apply = fimd_apply, 2921c248b7dSInki Dae .commit = fimd_commit, 2931c248b7dSInki Dae .enable_vblank = fimd_enable_vblank, 2941c248b7dSInki Dae .disable_vblank = fimd_disable_vblank, 2951c248b7dSInki Dae }; 2961c248b7dSInki Dae 2971c248b7dSInki Dae static void fimd_win_mode_set(struct device *dev, 2981c248b7dSInki Dae struct exynos_drm_overlay *overlay) 2991c248b7dSInki Dae { 3001c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 3011c248b7dSInki Dae struct fimd_win_data *win_data; 302864ee9e6SJoonyoung Shim int win; 30319c8b834SInki Dae unsigned long offset; 3041c248b7dSInki Dae 3051c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 3061c248b7dSInki Dae 3071c248b7dSInki Dae if (!overlay) { 3081c248b7dSInki Dae dev_err(dev, "overlay is NULL\n"); 3091c248b7dSInki Dae return; 3101c248b7dSInki Dae } 3111c248b7dSInki Dae 312864ee9e6SJoonyoung Shim win = overlay->zpos; 313864ee9e6SJoonyoung Shim if (win == DEFAULT_ZPOS) 314864ee9e6SJoonyoung Shim win = ctx->default_win; 315864ee9e6SJoonyoung Shim 316864ee9e6SJoonyoung Shim if (win < 0 || win > WINDOWS_NR) 317864ee9e6SJoonyoung Shim return; 318864ee9e6SJoonyoung Shim 31919c8b834SInki Dae offset = overlay->fb_x * (overlay->bpp >> 3); 32019c8b834SInki Dae offset += overlay->fb_y * overlay->pitch; 32119c8b834SInki Dae 32219c8b834SInki Dae DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch); 32319c8b834SInki Dae 324864ee9e6SJoonyoung Shim win_data = &ctx->win_data[win]; 3251c248b7dSInki Dae 32619c8b834SInki Dae win_data->offset_x = overlay->crtc_x; 32719c8b834SInki Dae win_data->offset_y = overlay->crtc_y; 32819c8b834SInki Dae win_data->ovl_width = overlay->crtc_width; 32919c8b834SInki Dae win_data->ovl_height = overlay->crtc_height; 33019c8b834SInki Dae win_data->fb_width = overlay->fb_width; 33119c8b834SInki Dae win_data->fb_height = overlay->fb_height; 332229d3534SSeung-Woo Kim win_data->dma_addr = overlay->dma_addr[0] + offset; 333229d3534SSeung-Woo Kim win_data->vaddr = overlay->vaddr[0] + offset; 3341c248b7dSInki Dae win_data->bpp = overlay->bpp; 33519c8b834SInki Dae win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) * 33619c8b834SInki Dae (overlay->bpp >> 3); 33719c8b834SInki Dae win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3); 33819c8b834SInki Dae 33919c8b834SInki Dae DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n", 34019c8b834SInki Dae win_data->offset_x, win_data->offset_y); 34119c8b834SInki Dae DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n", 34219c8b834SInki Dae win_data->ovl_width, win_data->ovl_height); 34319c8b834SInki Dae DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n", 3442c871127SInki Dae (unsigned long)win_data->dma_addr, 34519c8b834SInki Dae (unsigned long)win_data->vaddr); 34619c8b834SInki Dae DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n", 34719c8b834SInki Dae overlay->fb_width, overlay->crtc_width); 3481c248b7dSInki Dae } 3491c248b7dSInki Dae 3501c248b7dSInki Dae static void fimd_win_set_pixfmt(struct device *dev, unsigned int win) 3511c248b7dSInki Dae { 3521c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 3531c248b7dSInki Dae struct fimd_win_data *win_data = &ctx->win_data[win]; 3541c248b7dSInki Dae unsigned long val; 3551c248b7dSInki Dae 3561c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 3571c248b7dSInki Dae 3581c248b7dSInki Dae val = WINCONx_ENWIN; 3591c248b7dSInki Dae 3601c248b7dSInki Dae switch (win_data->bpp) { 3611c248b7dSInki Dae case 1: 3621c248b7dSInki Dae val |= WINCON0_BPPMODE_1BPP; 3631c248b7dSInki Dae val |= WINCONx_BITSWP; 3641c248b7dSInki Dae val |= WINCONx_BURSTLEN_4WORD; 3651c248b7dSInki Dae break; 3661c248b7dSInki Dae case 2: 3671c248b7dSInki Dae val |= WINCON0_BPPMODE_2BPP; 3681c248b7dSInki Dae val |= WINCONx_BITSWP; 3691c248b7dSInki Dae val |= WINCONx_BURSTLEN_8WORD; 3701c248b7dSInki Dae break; 3711c248b7dSInki Dae case 4: 3721c248b7dSInki Dae val |= WINCON0_BPPMODE_4BPP; 3731c248b7dSInki Dae val |= WINCONx_BITSWP; 3741c248b7dSInki Dae val |= WINCONx_BURSTLEN_8WORD; 3751c248b7dSInki Dae break; 3761c248b7dSInki Dae case 8: 3771c248b7dSInki Dae val |= WINCON0_BPPMODE_8BPP_PALETTE; 3781c248b7dSInki Dae val |= WINCONx_BURSTLEN_8WORD; 3791c248b7dSInki Dae val |= WINCONx_BYTSWP; 3801c248b7dSInki Dae break; 3811c248b7dSInki Dae case 16: 3821c248b7dSInki Dae val |= WINCON0_BPPMODE_16BPP_565; 3831c248b7dSInki Dae val |= WINCONx_HAWSWP; 3841c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 3851c248b7dSInki Dae break; 3861c248b7dSInki Dae case 24: 3871c248b7dSInki Dae val |= WINCON0_BPPMODE_24BPP_888; 3881c248b7dSInki Dae val |= WINCONx_WSWP; 3891c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 3901c248b7dSInki Dae break; 3911c248b7dSInki Dae case 32: 3921c248b7dSInki Dae val |= WINCON1_BPPMODE_28BPP_A4888 3931c248b7dSInki Dae | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL; 3941c248b7dSInki Dae val |= WINCONx_WSWP; 3951c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 3961c248b7dSInki Dae break; 3971c248b7dSInki Dae default: 3981c248b7dSInki Dae DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n"); 3991c248b7dSInki Dae 4001c248b7dSInki Dae val |= WINCON0_BPPMODE_24BPP_888; 4011c248b7dSInki Dae val |= WINCONx_WSWP; 4021c248b7dSInki Dae val |= WINCONx_BURSTLEN_16WORD; 4031c248b7dSInki Dae break; 4041c248b7dSInki Dae } 4051c248b7dSInki Dae 4061c248b7dSInki Dae DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp); 4071c248b7dSInki Dae 4081c248b7dSInki Dae writel(val, ctx->regs + WINCON(win)); 4091c248b7dSInki Dae } 4101c248b7dSInki Dae 4111c248b7dSInki Dae static void fimd_win_set_colkey(struct device *dev, unsigned int win) 4121c248b7dSInki Dae { 4131c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 4141c248b7dSInki Dae unsigned int keycon0 = 0, keycon1 = 0; 4151c248b7dSInki Dae 4161c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 4171c248b7dSInki Dae 4181c248b7dSInki Dae keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F | 4191c248b7dSInki Dae WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0); 4201c248b7dSInki Dae 4211c248b7dSInki Dae keycon1 = WxKEYCON1_COLVAL(0xffffffff); 4221c248b7dSInki Dae 4231c248b7dSInki Dae writel(keycon0, ctx->regs + WKEYCON0_BASE(win)); 4241c248b7dSInki Dae writel(keycon1, ctx->regs + WKEYCON1_BASE(win)); 4251c248b7dSInki Dae } 4261c248b7dSInki Dae 427864ee9e6SJoonyoung Shim static void fimd_win_commit(struct device *dev, int zpos) 4281c248b7dSInki Dae { 4291c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 4301c248b7dSInki Dae struct fimd_win_data *win_data; 431864ee9e6SJoonyoung Shim int win = zpos; 4321c248b7dSInki Dae unsigned long val, alpha, size; 4331c248b7dSInki Dae 4341c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 4351c248b7dSInki Dae 436e30d4bcfSInki Dae if (ctx->suspended) 437e30d4bcfSInki Dae return; 438e30d4bcfSInki Dae 439864ee9e6SJoonyoung Shim if (win == DEFAULT_ZPOS) 440864ee9e6SJoonyoung Shim win = ctx->default_win; 441864ee9e6SJoonyoung Shim 4421c248b7dSInki Dae if (win < 0 || win > WINDOWS_NR) 4431c248b7dSInki Dae return; 4441c248b7dSInki Dae 4451c248b7dSInki Dae win_data = &ctx->win_data[win]; 4461c248b7dSInki Dae 4471c248b7dSInki Dae /* 4481c248b7dSInki Dae * SHADOWCON register is used for enabling timing. 4491c248b7dSInki Dae * 4501c248b7dSInki Dae * for example, once only width value of a register is set, 4511c248b7dSInki Dae * if the dma is started then fimd hardware could malfunction so 4521c248b7dSInki Dae * with protect window setting, the register fields with prefix '_F' 4531c248b7dSInki Dae * wouldn't be updated at vsync also but updated once unprotect window 4541c248b7dSInki Dae * is set. 4551c248b7dSInki Dae */ 4561c248b7dSInki Dae 4571c248b7dSInki Dae /* protect windows */ 4581c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 4591c248b7dSInki Dae val |= SHADOWCON_WINx_PROTECT(win); 4601c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 4611c248b7dSInki Dae 4621c248b7dSInki Dae /* buffer start address */ 4632c871127SInki Dae val = (unsigned long)win_data->dma_addr; 4641c248b7dSInki Dae writel(val, ctx->regs + VIDWx_BUF_START(win, 0)); 4651c248b7dSInki Dae 4661c248b7dSInki Dae /* buffer end address */ 46719c8b834SInki Dae size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3); 4682c871127SInki Dae val = (unsigned long)(win_data->dma_addr + size); 4691c248b7dSInki Dae writel(val, ctx->regs + VIDWx_BUF_END(win, 0)); 4701c248b7dSInki Dae 4711c248b7dSInki Dae DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n", 4722c871127SInki Dae (unsigned long)win_data->dma_addr, val, size); 47319c8b834SInki Dae DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n", 47419c8b834SInki Dae win_data->ovl_width, win_data->ovl_height); 4751c248b7dSInki Dae 4761c248b7dSInki Dae /* buffer size */ 4771c248b7dSInki Dae val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) | 4781c248b7dSInki Dae VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size); 4791c248b7dSInki Dae writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0)); 4801c248b7dSInki Dae 4811c248b7dSInki Dae /* OSD position */ 4821c248b7dSInki Dae val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) | 4831c248b7dSInki Dae VIDOSDxA_TOPLEFT_Y(win_data->offset_y); 4841c248b7dSInki Dae writel(val, ctx->regs + VIDOSD_A(win)); 4851c248b7dSInki Dae 48619c8b834SInki Dae val = VIDOSDxB_BOTRIGHT_X(win_data->offset_x + 48719c8b834SInki Dae win_data->ovl_width - 1) | 48819c8b834SInki Dae VIDOSDxB_BOTRIGHT_Y(win_data->offset_y + 48919c8b834SInki Dae win_data->ovl_height - 1); 4901c248b7dSInki Dae writel(val, ctx->regs + VIDOSD_B(win)); 4911c248b7dSInki Dae 49219c8b834SInki Dae DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n", 4931c248b7dSInki Dae win_data->offset_x, win_data->offset_y, 49419c8b834SInki Dae win_data->offset_x + win_data->ovl_width - 1, 49519c8b834SInki Dae win_data->offset_y + win_data->ovl_height - 1); 4961c248b7dSInki Dae 4971c248b7dSInki Dae /* hardware window 0 doesn't support alpha channel. */ 4981c248b7dSInki Dae if (win != 0) { 4991c248b7dSInki Dae /* OSD alpha */ 5001c248b7dSInki Dae alpha = VIDISD14C_ALPHA1_R(0xf) | 5011c248b7dSInki Dae VIDISD14C_ALPHA1_G(0xf) | 5021c248b7dSInki Dae VIDISD14C_ALPHA1_B(0xf); 5031c248b7dSInki Dae 5041c248b7dSInki Dae writel(alpha, ctx->regs + VIDOSD_C(win)); 5051c248b7dSInki Dae } 5061c248b7dSInki Dae 5071c248b7dSInki Dae /* OSD size */ 5081c248b7dSInki Dae if (win != 3 && win != 4) { 5091c248b7dSInki Dae u32 offset = VIDOSD_D(win); 5101c248b7dSInki Dae if (win == 0) 5111c248b7dSInki Dae offset = VIDOSD_C_SIZE_W0; 51219c8b834SInki Dae val = win_data->ovl_width * win_data->ovl_height; 5131c248b7dSInki Dae writel(val, ctx->regs + offset); 5141c248b7dSInki Dae 5151c248b7dSInki Dae DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val); 5161c248b7dSInki Dae } 5171c248b7dSInki Dae 5181c248b7dSInki Dae fimd_win_set_pixfmt(dev, win); 5191c248b7dSInki Dae 5201c248b7dSInki Dae /* hardware window 0 doesn't support color key. */ 5211c248b7dSInki Dae if (win != 0) 5221c248b7dSInki Dae fimd_win_set_colkey(dev, win); 5231c248b7dSInki Dae 524ec05da95SInki Dae /* wincon */ 525ec05da95SInki Dae val = readl(ctx->regs + WINCON(win)); 526ec05da95SInki Dae val |= WINCONx_ENWIN; 527ec05da95SInki Dae writel(val, ctx->regs + WINCON(win)); 528ec05da95SInki Dae 5291c248b7dSInki Dae /* Enable DMA channel and unprotect windows */ 5301c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 5311c248b7dSInki Dae val |= SHADOWCON_CHx_ENABLE(win); 5321c248b7dSInki Dae val &= ~SHADOWCON_WINx_PROTECT(win); 5331c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 534ec05da95SInki Dae 535ec05da95SInki Dae win_data->enabled = true; 5361c248b7dSInki Dae } 5371c248b7dSInki Dae 538864ee9e6SJoonyoung Shim static void fimd_win_disable(struct device *dev, int zpos) 5391c248b7dSInki Dae { 5401c248b7dSInki Dae struct fimd_context *ctx = get_fimd_context(dev); 541ec05da95SInki Dae struct fimd_win_data *win_data; 542864ee9e6SJoonyoung Shim int win = zpos; 5431c248b7dSInki Dae u32 val; 5441c248b7dSInki Dae 5451c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 5461c248b7dSInki Dae 547864ee9e6SJoonyoung Shim if (win == DEFAULT_ZPOS) 548864ee9e6SJoonyoung Shim win = ctx->default_win; 549864ee9e6SJoonyoung Shim 5501c248b7dSInki Dae if (win < 0 || win > WINDOWS_NR) 5511c248b7dSInki Dae return; 5521c248b7dSInki Dae 553ec05da95SInki Dae win_data = &ctx->win_data[win]; 554ec05da95SInki Dae 5551c248b7dSInki Dae /* protect windows */ 5561c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 5571c248b7dSInki Dae val |= SHADOWCON_WINx_PROTECT(win); 5581c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 5591c248b7dSInki Dae 5601c248b7dSInki Dae /* wincon */ 5611c248b7dSInki Dae val = readl(ctx->regs + WINCON(win)); 5621c248b7dSInki Dae val &= ~WINCONx_ENWIN; 5631c248b7dSInki Dae writel(val, ctx->regs + WINCON(win)); 5641c248b7dSInki Dae 5651c248b7dSInki Dae /* unprotect windows */ 5661c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 5671c248b7dSInki Dae val &= ~SHADOWCON_CHx_ENABLE(win); 5681c248b7dSInki Dae val &= ~SHADOWCON_WINx_PROTECT(win); 5691c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 570ec05da95SInki Dae 571ec05da95SInki Dae win_data->enabled = false; 5721c248b7dSInki Dae } 5731c248b7dSInki Dae 5741c248b7dSInki Dae static struct exynos_drm_overlay_ops fimd_overlay_ops = { 5751c248b7dSInki Dae .mode_set = fimd_win_mode_set, 5761c248b7dSInki Dae .commit = fimd_win_commit, 5771c248b7dSInki Dae .disable = fimd_win_disable, 5781c248b7dSInki Dae }; 5791c248b7dSInki Dae 5801c248b7dSInki Dae static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc) 5811c248b7dSInki Dae { 5821c248b7dSInki Dae struct exynos_drm_private *dev_priv = drm_dev->dev_private; 5831c248b7dSInki Dae struct drm_pending_vblank_event *e, *t; 5841c248b7dSInki Dae struct timeval now; 5851c248b7dSInki Dae unsigned long flags; 586ccf4d883SInki Dae bool is_checked = false; 5871c248b7dSInki Dae 5881c248b7dSInki Dae spin_lock_irqsave(&drm_dev->event_lock, flags); 5891c248b7dSInki Dae 5901c248b7dSInki Dae list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list, 5911c248b7dSInki Dae base.link) { 592a88cab2bSInki Dae /* if event's pipe isn't same as crtc then ignore it. */ 593ccf4d883SInki Dae if (crtc != e->pipe) 594ccf4d883SInki Dae continue; 595ccf4d883SInki Dae 596ccf4d883SInki Dae is_checked = true; 597ccf4d883SInki Dae 5981c248b7dSInki Dae do_gettimeofday(&now); 5991c248b7dSInki Dae e->event.sequence = 0; 6001c248b7dSInki Dae e->event.tv_sec = now.tv_sec; 6011c248b7dSInki Dae e->event.tv_usec = now.tv_usec; 6021c248b7dSInki Dae 6031c248b7dSInki Dae list_move_tail(&e->base.link, &e->base.file_priv->event_list); 6041c248b7dSInki Dae wake_up_interruptible(&e->base.file_priv->event_wait); 6051c248b7dSInki Dae } 6061c248b7dSInki Dae 607ec05da95SInki Dae if (is_checked) { 608039129b0SInki Dae /* 609039129b0SInki Dae * call drm_vblank_put only in case that drm_vblank_get was 610039129b0SInki Dae * called. 611039129b0SInki Dae */ 612039129b0SInki Dae if (atomic_read(&drm_dev->vblank_refcount[crtc]) > 0) 6131c248b7dSInki Dae drm_vblank_put(drm_dev, crtc); 6141c248b7dSInki Dae 615ec05da95SInki Dae /* 616ec05da95SInki Dae * don't off vblank if vblank_disable_allowed is 1, 617ec05da95SInki Dae * because vblank would be off by timer handler. 618ec05da95SInki Dae */ 619ec05da95SInki Dae if (!drm_dev->vblank_disable_allowed) 620ec05da95SInki Dae drm_vblank_off(drm_dev, crtc); 621ec05da95SInki Dae } 622ec05da95SInki Dae 6231c248b7dSInki Dae spin_unlock_irqrestore(&drm_dev->event_lock, flags); 6241c248b7dSInki Dae } 6251c248b7dSInki Dae 6261c248b7dSInki Dae static irqreturn_t fimd_irq_handler(int irq, void *dev_id) 6271c248b7dSInki Dae { 6281c248b7dSInki Dae struct fimd_context *ctx = (struct fimd_context *)dev_id; 6291c248b7dSInki Dae struct exynos_drm_subdrv *subdrv = &ctx->subdrv; 6301c248b7dSInki Dae struct drm_device *drm_dev = subdrv->drm_dev; 6311c248b7dSInki Dae struct exynos_drm_manager *manager = &subdrv->manager; 6321c248b7dSInki Dae u32 val; 6331c248b7dSInki Dae 6341c248b7dSInki Dae val = readl(ctx->regs + VIDINTCON1); 6351c248b7dSInki Dae 6361c248b7dSInki Dae if (val & VIDINTCON1_INT_FRAME) 6371c248b7dSInki Dae /* VSYNC interrupt */ 6381c248b7dSInki Dae writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1); 6391c248b7dSInki Dae 640ec05da95SInki Dae /* check the crtc is detached already from encoder */ 641ec05da95SInki Dae if (manager->pipe < 0) 642ec05da95SInki Dae goto out; 643483b88f8SInki Dae 6441c248b7dSInki Dae drm_handle_vblank(drm_dev, manager->pipe); 6451c248b7dSInki Dae fimd_finish_pageflip(drm_dev, manager->pipe); 6461c248b7dSInki Dae 647ec05da95SInki Dae out: 6481c248b7dSInki Dae return IRQ_HANDLED; 6491c248b7dSInki Dae } 6501c248b7dSInki Dae 65141c24346SInki Dae static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev) 6521c248b7dSInki Dae { 6531c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 6541c248b7dSInki Dae 6551c248b7dSInki Dae /* 6561c248b7dSInki Dae * enable drm irq mode. 6571c248b7dSInki Dae * - with irq_enabled = 1, we can use the vblank feature. 6581c248b7dSInki Dae * 6591c248b7dSInki Dae * P.S. note that we wouldn't use drm irq handler but 6601c248b7dSInki Dae * just specific driver own one instead because 6611c248b7dSInki Dae * drm framework supports only one irq handler. 6621c248b7dSInki Dae */ 6631c248b7dSInki Dae drm_dev->irq_enabled = 1; 6641c248b7dSInki Dae 665ec05da95SInki Dae /* 666ec05da95SInki Dae * with vblank_disable_allowed = 1, vblank interrupt will be disabled 667ec05da95SInki Dae * by drm timer once a current process gives up ownership of 668ec05da95SInki Dae * vblank event.(after drm_vblank_put function is called) 669ec05da95SInki Dae */ 670ec05da95SInki Dae drm_dev->vblank_disable_allowed = 1; 671ec05da95SInki Dae 6721c248b7dSInki Dae return 0; 6731c248b7dSInki Dae } 6741c248b7dSInki Dae 6751c248b7dSInki Dae static void fimd_subdrv_remove(struct drm_device *drm_dev) 6761c248b7dSInki Dae { 6771c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 6781c248b7dSInki Dae 6791c248b7dSInki Dae /* TODO. */ 6801c248b7dSInki Dae } 6811c248b7dSInki Dae 6821c248b7dSInki Dae static int fimd_calc_clkdiv(struct fimd_context *ctx, 6831c248b7dSInki Dae struct fb_videomode *timing) 6841c248b7dSInki Dae { 6851c248b7dSInki Dae unsigned long clk = clk_get_rate(ctx->lcd_clk); 6861c248b7dSInki Dae u32 retrace; 6871c248b7dSInki Dae u32 clkdiv; 6881c248b7dSInki Dae u32 best_framerate = 0; 6891c248b7dSInki Dae u32 framerate; 6901c248b7dSInki Dae 6911c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 6921c248b7dSInki Dae 6931c248b7dSInki Dae retrace = timing->left_margin + timing->hsync_len + 6941c248b7dSInki Dae timing->right_margin + timing->xres; 6951c248b7dSInki Dae retrace *= timing->upper_margin + timing->vsync_len + 6961c248b7dSInki Dae timing->lower_margin + timing->yres; 6971c248b7dSInki Dae 6981c248b7dSInki Dae /* default framerate is 60Hz */ 6991c248b7dSInki Dae if (!timing->refresh) 7001c248b7dSInki Dae timing->refresh = 60; 7011c248b7dSInki Dae 7021c248b7dSInki Dae clk /= retrace; 7031c248b7dSInki Dae 7041c248b7dSInki Dae for (clkdiv = 1; clkdiv < 0x100; clkdiv++) { 7051c248b7dSInki Dae int tmp; 7061c248b7dSInki Dae 7071c248b7dSInki Dae /* get best framerate */ 7081c248b7dSInki Dae framerate = clk / clkdiv; 7091c248b7dSInki Dae tmp = timing->refresh - framerate; 7101c248b7dSInki Dae if (tmp < 0) { 7111c248b7dSInki Dae best_framerate = framerate; 7121c248b7dSInki Dae continue; 7131c248b7dSInki Dae } else { 7141c248b7dSInki Dae if (!best_framerate) 7151c248b7dSInki Dae best_framerate = framerate; 7161c248b7dSInki Dae else if (tmp < (best_framerate - framerate)) 7171c248b7dSInki Dae best_framerate = framerate; 7181c248b7dSInki Dae break; 7191c248b7dSInki Dae } 7201c248b7dSInki Dae } 7211c248b7dSInki Dae 7221c248b7dSInki Dae return clkdiv; 7231c248b7dSInki Dae } 7241c248b7dSInki Dae 7251c248b7dSInki Dae static void fimd_clear_win(struct fimd_context *ctx, int win) 7261c248b7dSInki Dae { 7271c248b7dSInki Dae u32 val; 7281c248b7dSInki Dae 7291c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 7301c248b7dSInki Dae 7311c248b7dSInki Dae writel(0, ctx->regs + WINCON(win)); 7321c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_A(win)); 7331c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_B(win)); 7341c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_C(win)); 7351c248b7dSInki Dae 7361c248b7dSInki Dae if (win == 1 || win == 2) 7371c248b7dSInki Dae writel(0, ctx->regs + VIDOSD_D(win)); 7381c248b7dSInki Dae 7391c248b7dSInki Dae val = readl(ctx->regs + SHADOWCON); 7401c248b7dSInki Dae val &= ~SHADOWCON_WINx_PROTECT(win); 7411c248b7dSInki Dae writel(val, ctx->regs + SHADOWCON); 7421c248b7dSInki Dae } 7431c248b7dSInki Dae 744373af0c0SInki Dae static int fimd_power_on(struct fimd_context *ctx, bool enable) 745373af0c0SInki Dae { 746373af0c0SInki Dae struct exynos_drm_subdrv *subdrv = &ctx->subdrv; 747373af0c0SInki Dae struct device *dev = subdrv->manager.dev; 748373af0c0SInki Dae 749373af0c0SInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 750373af0c0SInki Dae 751373af0c0SInki Dae if (enable != false && enable != true) 752373af0c0SInki Dae return -EINVAL; 753373af0c0SInki Dae 754373af0c0SInki Dae if (enable) { 755373af0c0SInki Dae int ret; 756373af0c0SInki Dae 757373af0c0SInki Dae ret = clk_enable(ctx->bus_clk); 758373af0c0SInki Dae if (ret < 0) 759373af0c0SInki Dae return ret; 760373af0c0SInki Dae 761373af0c0SInki Dae ret = clk_enable(ctx->lcd_clk); 762373af0c0SInki Dae if (ret < 0) { 763373af0c0SInki Dae clk_disable(ctx->bus_clk); 764373af0c0SInki Dae return ret; 765373af0c0SInki Dae } 766373af0c0SInki Dae 767373af0c0SInki Dae ctx->suspended = false; 768373af0c0SInki Dae 769373af0c0SInki Dae /* if vblank was enabled status, enable it again. */ 770373af0c0SInki Dae if (test_and_clear_bit(0, &ctx->irq_flags)) 771373af0c0SInki Dae fimd_enable_vblank(dev); 772373af0c0SInki Dae 773373af0c0SInki Dae fimd_apply(dev); 774373af0c0SInki Dae } else { 775373af0c0SInki Dae clk_disable(ctx->lcd_clk); 776373af0c0SInki Dae clk_disable(ctx->bus_clk); 777373af0c0SInki Dae 778373af0c0SInki Dae ctx->suspended = true; 779373af0c0SInki Dae } 780373af0c0SInki Dae 781373af0c0SInki Dae return 0; 782373af0c0SInki Dae } 783373af0c0SInki Dae 7841c248b7dSInki Dae static int __devinit fimd_probe(struct platform_device *pdev) 7851c248b7dSInki Dae { 7861c248b7dSInki Dae struct device *dev = &pdev->dev; 7871c248b7dSInki Dae struct fimd_context *ctx; 7881c248b7dSInki Dae struct exynos_drm_subdrv *subdrv; 7891c248b7dSInki Dae struct exynos_drm_fimd_pdata *pdata; 790607c50d4SEun-Chul Kim struct exynos_drm_panel_info *panel; 7911c248b7dSInki Dae struct resource *res; 7921c248b7dSInki Dae int win; 7931c248b7dSInki Dae int ret = -EINVAL; 7941c248b7dSInki Dae 7951c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 7961c248b7dSInki Dae 7971c248b7dSInki Dae pdata = pdev->dev.platform_data; 7981c248b7dSInki Dae if (!pdata) { 7991c248b7dSInki Dae dev_err(dev, "no platform data specified\n"); 8001c248b7dSInki Dae return -EINVAL; 8011c248b7dSInki Dae } 8021c248b7dSInki Dae 803607c50d4SEun-Chul Kim panel = &pdata->panel; 804607c50d4SEun-Chul Kim if (!panel) { 805607c50d4SEun-Chul Kim dev_err(dev, "panel is null.\n"); 8061c248b7dSInki Dae return -EINVAL; 8071c248b7dSInki Dae } 8081c248b7dSInki Dae 8091c248b7dSInki Dae ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 8101c248b7dSInki Dae if (!ctx) 8111c248b7dSInki Dae return -ENOMEM; 8121c248b7dSInki Dae 8131c248b7dSInki Dae ctx->bus_clk = clk_get(dev, "fimd"); 8141c248b7dSInki Dae if (IS_ERR(ctx->bus_clk)) { 8151c248b7dSInki Dae dev_err(dev, "failed to get bus clock\n"); 8161c248b7dSInki Dae ret = PTR_ERR(ctx->bus_clk); 8171c248b7dSInki Dae goto err_clk_get; 8181c248b7dSInki Dae } 8191c248b7dSInki Dae 8201c248b7dSInki Dae clk_enable(ctx->bus_clk); 8211c248b7dSInki Dae 8221c248b7dSInki Dae ctx->lcd_clk = clk_get(dev, "sclk_fimd"); 8231c248b7dSInki Dae if (IS_ERR(ctx->lcd_clk)) { 8241c248b7dSInki Dae dev_err(dev, "failed to get lcd clock\n"); 8251c248b7dSInki Dae ret = PTR_ERR(ctx->lcd_clk); 8261c248b7dSInki Dae goto err_bus_clk; 8271c248b7dSInki Dae } 8281c248b7dSInki Dae 8291c248b7dSInki Dae clk_enable(ctx->lcd_clk); 8301c248b7dSInki Dae 8311c248b7dSInki Dae res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 8321c248b7dSInki Dae if (!res) { 8331c248b7dSInki Dae dev_err(dev, "failed to find registers\n"); 8341c248b7dSInki Dae ret = -ENOENT; 8351c248b7dSInki Dae goto err_clk; 8361c248b7dSInki Dae } 8371c248b7dSInki Dae 8381c248b7dSInki Dae ctx->regs_res = request_mem_region(res->start, resource_size(res), 8391c248b7dSInki Dae dev_name(dev)); 8401c248b7dSInki Dae if (!ctx->regs_res) { 8411c248b7dSInki Dae dev_err(dev, "failed to claim register region\n"); 8421c248b7dSInki Dae ret = -ENOENT; 8431c248b7dSInki Dae goto err_clk; 8441c248b7dSInki Dae } 8451c248b7dSInki Dae 8461c248b7dSInki Dae ctx->regs = ioremap(res->start, resource_size(res)); 8471c248b7dSInki Dae if (!ctx->regs) { 8481c248b7dSInki Dae dev_err(dev, "failed to map registers\n"); 8491c248b7dSInki Dae ret = -ENXIO; 8501c248b7dSInki Dae goto err_req_region_io; 8511c248b7dSInki Dae } 8521c248b7dSInki Dae 8531c248b7dSInki Dae res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 8541c248b7dSInki Dae if (!res) { 8551c248b7dSInki Dae dev_err(dev, "irq request failed.\n"); 8561c248b7dSInki Dae goto err_req_region_irq; 8571c248b7dSInki Dae } 8581c248b7dSInki Dae 8591c248b7dSInki Dae ctx->irq = res->start; 8601c248b7dSInki Dae 8611c248b7dSInki Dae ret = request_irq(ctx->irq, fimd_irq_handler, 0, "drm_fimd", ctx); 8621c248b7dSInki Dae if (ret < 0) { 8631c248b7dSInki Dae dev_err(dev, "irq request failed.\n"); 8641c248b7dSInki Dae goto err_req_irq; 8651c248b7dSInki Dae } 8661c248b7dSInki Dae 867607c50d4SEun-Chul Kim ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing); 8681c248b7dSInki Dae ctx->vidcon0 = pdata->vidcon0; 8691c248b7dSInki Dae ctx->vidcon1 = pdata->vidcon1; 8701c248b7dSInki Dae ctx->default_win = pdata->default_win; 871607c50d4SEun-Chul Kim ctx->panel = panel; 8721c248b7dSInki Dae 873607c50d4SEun-Chul Kim panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv; 8741c248b7dSInki Dae 8751c248b7dSInki Dae DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n", 876607c50d4SEun-Chul Kim panel->timing.pixclock, ctx->clkdiv); 8771c248b7dSInki Dae 8781c248b7dSInki Dae subdrv = &ctx->subdrv; 8791c248b7dSInki Dae 8801c248b7dSInki Dae subdrv->probe = fimd_subdrv_probe; 8811c248b7dSInki Dae subdrv->remove = fimd_subdrv_remove; 8821c248b7dSInki Dae subdrv->manager.pipe = -1; 8831c248b7dSInki Dae subdrv->manager.ops = &fimd_manager_ops; 8841c248b7dSInki Dae subdrv->manager.overlay_ops = &fimd_overlay_ops; 88574ccc539SInki Dae subdrv->manager.display_ops = &fimd_display_ops; 8861c248b7dSInki Dae subdrv->manager.dev = dev; 8871c248b7dSInki Dae 888c32b06efSInki Dae mutex_init(&ctx->lock); 889c32b06efSInki Dae 8901c248b7dSInki Dae platform_set_drvdata(pdev, ctx); 891c32b06efSInki Dae 892c32b06efSInki Dae pm_runtime_set_active(dev); 893c32b06efSInki Dae pm_runtime_enable(dev); 894c32b06efSInki Dae pm_runtime_get_sync(dev); 895c32b06efSInki Dae 896c32b06efSInki Dae for (win = 0; win < WINDOWS_NR; win++) 897c32b06efSInki Dae fimd_clear_win(ctx, win); 898c32b06efSInki Dae 8991c248b7dSInki Dae exynos_drm_subdrv_register(subdrv); 9001c248b7dSInki Dae 9011c248b7dSInki Dae return 0; 9021c248b7dSInki Dae 9031c248b7dSInki Dae err_req_irq: 9041c248b7dSInki Dae err_req_region_irq: 9051c248b7dSInki Dae iounmap(ctx->regs); 9061c248b7dSInki Dae 9071c248b7dSInki Dae err_req_region_io: 9081c248b7dSInki Dae release_resource(ctx->regs_res); 9091c248b7dSInki Dae kfree(ctx->regs_res); 9101c248b7dSInki Dae 9111c248b7dSInki Dae err_clk: 9121c248b7dSInki Dae clk_disable(ctx->lcd_clk); 9131c248b7dSInki Dae clk_put(ctx->lcd_clk); 9141c248b7dSInki Dae 9151c248b7dSInki Dae err_bus_clk: 9161c248b7dSInki Dae clk_disable(ctx->bus_clk); 9171c248b7dSInki Dae clk_put(ctx->bus_clk); 9181c248b7dSInki Dae 9191c248b7dSInki Dae err_clk_get: 9201c248b7dSInki Dae kfree(ctx); 9211c248b7dSInki Dae return ret; 9221c248b7dSInki Dae } 9231c248b7dSInki Dae 9241c248b7dSInki Dae static int __devexit fimd_remove(struct platform_device *pdev) 9251c248b7dSInki Dae { 926cb91f6a0SJoonyoung Shim struct device *dev = &pdev->dev; 9271c248b7dSInki Dae struct fimd_context *ctx = platform_get_drvdata(pdev); 9281c248b7dSInki Dae 9291c248b7dSInki Dae DRM_DEBUG_KMS("%s\n", __FILE__); 9301c248b7dSInki Dae 9311c248b7dSInki Dae exynos_drm_subdrv_unregister(&ctx->subdrv); 9321c248b7dSInki Dae 933cb91f6a0SJoonyoung Shim if (ctx->suspended) 934cb91f6a0SJoonyoung Shim goto out; 935cb91f6a0SJoonyoung Shim 9361c248b7dSInki Dae clk_disable(ctx->lcd_clk); 9371c248b7dSInki Dae clk_disable(ctx->bus_clk); 938cb91f6a0SJoonyoung Shim 939cb91f6a0SJoonyoung Shim pm_runtime_set_suspended(dev); 940cb91f6a0SJoonyoung Shim pm_runtime_put_sync(dev); 941cb91f6a0SJoonyoung Shim 942cb91f6a0SJoonyoung Shim out: 943cb91f6a0SJoonyoung Shim pm_runtime_disable(dev); 944cb91f6a0SJoonyoung Shim 9451c248b7dSInki Dae clk_put(ctx->lcd_clk); 9461c248b7dSInki Dae clk_put(ctx->bus_clk); 9471c248b7dSInki Dae 9481c248b7dSInki Dae iounmap(ctx->regs); 9491c248b7dSInki Dae release_resource(ctx->regs_res); 9501c248b7dSInki Dae kfree(ctx->regs_res); 9511c248b7dSInki Dae free_irq(ctx->irq, ctx); 9521c248b7dSInki Dae 9531c248b7dSInki Dae kfree(ctx); 9541c248b7dSInki Dae 9551c248b7dSInki Dae return 0; 9561c248b7dSInki Dae } 9571c248b7dSInki Dae 958e30d4bcfSInki Dae #ifdef CONFIG_PM_SLEEP 959e30d4bcfSInki Dae static int fimd_suspend(struct device *dev) 960e30d4bcfSInki Dae { 961373af0c0SInki Dae struct fimd_context *ctx = get_fimd_context(dev); 962e30d4bcfSInki Dae 963e30d4bcfSInki Dae if (pm_runtime_suspended(dev)) 964e30d4bcfSInki Dae return 0; 965e30d4bcfSInki Dae 966373af0c0SInki Dae /* 967373af0c0SInki Dae * do not use pm_runtime_suspend(). if pm_runtime_suspend() is 968373af0c0SInki Dae * called here, an error would be returned by that interface 969373af0c0SInki Dae * because the usage_count of pm runtime is more than 1. 970373af0c0SInki Dae */ 971373af0c0SInki Dae return fimd_power_on(ctx, false); 972e30d4bcfSInki Dae } 973e30d4bcfSInki Dae 974e30d4bcfSInki Dae static int fimd_resume(struct device *dev) 975e30d4bcfSInki Dae { 976373af0c0SInki Dae struct fimd_context *ctx = get_fimd_context(dev); 977e30d4bcfSInki Dae 978373af0c0SInki Dae /* 979373af0c0SInki Dae * if entered to sleep when lcd panel was on, the usage_count 980373af0c0SInki Dae * of pm runtime would still be 1 so in this case, fimd driver 981373af0c0SInki Dae * should be on directly not drawing on pm runtime interface. 982373af0c0SInki Dae */ 983373af0c0SInki Dae if (!pm_runtime_suspended(dev)) 984373af0c0SInki Dae return fimd_power_on(ctx, true); 985e30d4bcfSInki Dae 986e30d4bcfSInki Dae return 0; 987e30d4bcfSInki Dae } 988e30d4bcfSInki Dae #endif 989e30d4bcfSInki Dae 990cb91f6a0SJoonyoung Shim #ifdef CONFIG_PM_RUNTIME 991cb91f6a0SJoonyoung Shim static int fimd_runtime_suspend(struct device *dev) 992cb91f6a0SJoonyoung Shim { 993cb91f6a0SJoonyoung Shim struct fimd_context *ctx = get_fimd_context(dev); 994cb91f6a0SJoonyoung Shim 995cb91f6a0SJoonyoung Shim DRM_DEBUG_KMS("%s\n", __FILE__); 996cb91f6a0SJoonyoung Shim 997373af0c0SInki Dae return fimd_power_on(ctx, false); 998cb91f6a0SJoonyoung Shim } 999cb91f6a0SJoonyoung Shim 1000cb91f6a0SJoonyoung Shim static int fimd_runtime_resume(struct device *dev) 1001cb91f6a0SJoonyoung Shim { 1002cb91f6a0SJoonyoung Shim struct fimd_context *ctx = get_fimd_context(dev); 1003cb91f6a0SJoonyoung Shim 1004cb91f6a0SJoonyoung Shim DRM_DEBUG_KMS("%s\n", __FILE__); 1005cb91f6a0SJoonyoung Shim 1006373af0c0SInki Dae return fimd_power_on(ctx, true); 1007cb91f6a0SJoonyoung Shim } 1008cb91f6a0SJoonyoung Shim #endif 1009cb91f6a0SJoonyoung Shim 1010cb91f6a0SJoonyoung Shim static const struct dev_pm_ops fimd_pm_ops = { 1011e30d4bcfSInki Dae SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume) 1012cb91f6a0SJoonyoung Shim SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL) 1013cb91f6a0SJoonyoung Shim }; 1014cb91f6a0SJoonyoung Shim 10151c248b7dSInki Dae static struct platform_driver fimd_driver = { 10161c248b7dSInki Dae .probe = fimd_probe, 10171c248b7dSInki Dae .remove = __devexit_p(fimd_remove), 10181c248b7dSInki Dae .driver = { 10191c248b7dSInki Dae .name = "exynos4-fb", 10201c248b7dSInki Dae .owner = THIS_MODULE, 1021cb91f6a0SJoonyoung Shim .pm = &fimd_pm_ops, 10221c248b7dSInki Dae }, 10231c248b7dSInki Dae }; 10241c248b7dSInki Dae 10251c248b7dSInki Dae static int __init fimd_init(void) 10261c248b7dSInki Dae { 10271c248b7dSInki Dae return platform_driver_register(&fimd_driver); 10281c248b7dSInki Dae } 10291c248b7dSInki Dae 10301c248b7dSInki Dae static void __exit fimd_exit(void) 10311c248b7dSInki Dae { 10321c248b7dSInki Dae platform_driver_unregister(&fimd_driver); 10331c248b7dSInki Dae } 10341c248b7dSInki Dae 10351c248b7dSInki Dae module_init(fimd_init); 10361c248b7dSInki Dae module_exit(fimd_exit); 10371c248b7dSInki Dae 10381c248b7dSInki Dae MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>"); 10391c248b7dSInki Dae MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>"); 10401c248b7dSInki Dae MODULE_DESCRIPTION("Samsung DRM FIMD Driver"); 10411c248b7dSInki Dae MODULE_LICENSE("GPL"); 1042