1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* exynos_drm_drv.h 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 5 * Authors: 6 * Inki Dae <inki.dae@samsung.com> 7 * Joonyoung Shim <jy0922.shim@samsung.com> 8 * Seung-Woo Kim <sw0312.kim@samsung.com> 9 */ 10 11 #ifndef _EXYNOS_DRM_DRV_H_ 12 #define _EXYNOS_DRM_DRV_H_ 13 14 #include <drm/drmP.h> 15 #include <linux/module.h> 16 17 #define MAX_CRTC 3 18 #define MAX_PLANE 5 19 #define MAX_FB_BUFFER 4 20 21 #define DEFAULT_WIN 0 22 23 #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base) 24 #define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base) 25 26 /* this enumerates display type. */ 27 enum exynos_drm_output_type { 28 EXYNOS_DISPLAY_TYPE_NONE, 29 /* RGB or CPU Interface. */ 30 EXYNOS_DISPLAY_TYPE_LCD, 31 /* HDMI Interface. */ 32 EXYNOS_DISPLAY_TYPE_HDMI, 33 /* Virtual Display Interface. */ 34 EXYNOS_DISPLAY_TYPE_VIDI, 35 }; 36 37 struct exynos_drm_rect { 38 unsigned int x, y; 39 unsigned int w, h; 40 }; 41 42 /* 43 * Exynos drm plane state structure. 44 * 45 * @base: plane_state object (contains drm_framebuffer pointer) 46 * @src: rectangle of the source image data to be displayed (clipped to 47 * visible part). 48 * @crtc: rectangle of the target image position on hardware screen 49 * (clipped to visible part). 50 * @h_ratio: horizontal scaling ratio, 16.16 fixed point 51 * @v_ratio: vertical scaling ratio, 16.16 fixed point 52 * 53 * this structure consists plane state data that will be applied to hardware 54 * specific overlay info. 55 */ 56 57 struct exynos_drm_plane_state { 58 struct drm_plane_state base; 59 struct exynos_drm_rect crtc; 60 struct exynos_drm_rect src; 61 unsigned int h_ratio; 62 unsigned int v_ratio; 63 }; 64 65 static inline struct exynos_drm_plane_state * 66 to_exynos_plane_state(struct drm_plane_state *state) 67 { 68 return container_of(state, struct exynos_drm_plane_state, base); 69 } 70 71 /* 72 * Exynos drm common overlay structure. 73 * 74 * @base: plane object 75 * @index: hardware index of the overlay layer 76 * 77 * this structure is common to exynos SoC and its contents would be copied 78 * to hardware specific overlay info. 79 */ 80 81 struct exynos_drm_plane { 82 struct drm_plane base; 83 const struct exynos_drm_plane_config *config; 84 unsigned int index; 85 }; 86 87 #define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0) 88 #define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1) 89 #define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2) 90 #define EXYNOS_DRM_PLANE_CAP_TILE (1 << 3) 91 #define EXYNOS_DRM_PLANE_CAP_PIX_BLEND (1 << 4) 92 #define EXYNOS_DRM_PLANE_CAP_WIN_BLEND (1 << 5) 93 94 /* 95 * Exynos DRM plane configuration structure. 96 * 97 * @zpos: initial z-position of the plane. 98 * @type: type of the plane (primary, cursor or overlay). 99 * @pixel_formats: supported pixel formats. 100 * @num_pixel_formats: number of elements in 'pixel_formats'. 101 * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*) 102 */ 103 104 struct exynos_drm_plane_config { 105 unsigned int zpos; 106 enum drm_plane_type type; 107 const uint32_t *pixel_formats; 108 unsigned int num_pixel_formats; 109 unsigned int capabilities; 110 }; 111 112 /* 113 * Exynos drm crtc ops 114 * 115 * @enable: enable the device 116 * @disable: disable the device 117 * @enable_vblank: specific driver callback for enabling vblank interrupt. 118 * @disable_vblank: specific driver callback for disabling vblank interrupt. 119 * @mode_valid: specific driver callback for mode validation 120 * @atomic_check: validate state 121 * @atomic_begin: prepare device to receive an update 122 * @atomic_flush: mark the end of device update 123 * @update_plane: apply hardware specific overlay data to registers. 124 * @disable_plane: disable hardware specific overlay. 125 * @te_handler: trigger to transfer video image at the tearing effect 126 * synchronization signal if there is a page flip request. 127 */ 128 struct exynos_drm_crtc; 129 struct exynos_drm_crtc_ops { 130 void (*enable)(struct exynos_drm_crtc *crtc); 131 void (*disable)(struct exynos_drm_crtc *crtc); 132 int (*enable_vblank)(struct exynos_drm_crtc *crtc); 133 void (*disable_vblank)(struct exynos_drm_crtc *crtc); 134 enum drm_mode_status (*mode_valid)(struct exynos_drm_crtc *crtc, 135 const struct drm_display_mode *mode); 136 bool (*mode_fixup)(struct exynos_drm_crtc *crtc, 137 const struct drm_display_mode *mode, 138 struct drm_display_mode *adjusted_mode); 139 int (*atomic_check)(struct exynos_drm_crtc *crtc, 140 struct drm_crtc_state *state); 141 void (*atomic_begin)(struct exynos_drm_crtc *crtc); 142 void (*update_plane)(struct exynos_drm_crtc *crtc, 143 struct exynos_drm_plane *plane); 144 void (*disable_plane)(struct exynos_drm_crtc *crtc, 145 struct exynos_drm_plane *plane); 146 void (*atomic_flush)(struct exynos_drm_crtc *crtc); 147 void (*te_handler)(struct exynos_drm_crtc *crtc); 148 }; 149 150 struct exynos_drm_clk { 151 void (*enable)(struct exynos_drm_clk *clk, bool enable); 152 }; 153 154 /* 155 * Exynos specific crtc structure. 156 * 157 * @base: crtc object. 158 * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI. 159 * @ops: pointer to callbacks for exynos drm specific functionality 160 * @ctx: A pointer to the crtc's implementation specific context 161 * @pipe_clk: A pointer to the crtc's pipeline clock. 162 */ 163 struct exynos_drm_crtc { 164 struct drm_crtc base; 165 enum exynos_drm_output_type type; 166 const struct exynos_drm_crtc_ops *ops; 167 void *ctx; 168 struct exynos_drm_clk *pipe_clk; 169 bool i80_mode : 1; 170 }; 171 172 static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc, 173 bool enable) 174 { 175 if (crtc->pipe_clk) 176 crtc->pipe_clk->enable(crtc->pipe_clk, enable); 177 } 178 179 struct drm_exynos_file_private { 180 /* for g2d api */ 181 struct list_head inuse_cmdlist; 182 struct list_head event_list; 183 struct list_head userptr_list; 184 }; 185 186 /* 187 * Exynos drm private structure. 188 * 189 * @pending: the crtcs that have pending updates to finish 190 * @lock: protect access to @pending 191 * @wait: wait an atomic commit to finish 192 */ 193 struct exynos_drm_private { 194 struct drm_fb_helper *fb_helper; 195 196 struct device *g2d_dev; 197 struct device *dma_dev; 198 void *mapping; 199 200 /* for atomic commit */ 201 u32 pending; 202 spinlock_t lock; 203 wait_queue_head_t wait; 204 }; 205 206 static inline struct device *to_dma_dev(struct drm_device *dev) 207 { 208 struct exynos_drm_private *priv = dev->dev_private; 209 210 return priv->dma_dev; 211 } 212 213 static inline bool is_drm_iommu_supported(struct drm_device *drm_dev) 214 { 215 struct exynos_drm_private *priv = drm_dev->dev_private; 216 217 return priv->mapping ? true : false; 218 } 219 220 int exynos_drm_register_dma(struct drm_device *drm, struct device *dev); 221 void exynos_drm_unregister_dma(struct drm_device *drm, struct device *dev); 222 void exynos_drm_cleanup_dma(struct drm_device *drm); 223 224 #ifdef CONFIG_DRM_EXYNOS_DPI 225 struct drm_encoder *exynos_dpi_probe(struct device *dev); 226 int exynos_dpi_remove(struct drm_encoder *encoder); 227 int exynos_dpi_bind(struct drm_device *dev, struct drm_encoder *encoder); 228 #else 229 static inline struct drm_encoder * 230 exynos_dpi_probe(struct device *dev) { return NULL; } 231 static inline int exynos_dpi_remove(struct drm_encoder *encoder) 232 { 233 return 0; 234 } 235 static inline int exynos_dpi_bind(struct drm_device *dev, 236 struct drm_encoder *encoder) 237 { 238 return 0; 239 } 240 #endif 241 242 #ifdef CONFIG_DRM_EXYNOS_FIMC 243 int exynos_drm_check_fimc_device(struct device *dev); 244 #else 245 static inline int exynos_drm_check_fimc_device(struct device *dev) 246 { 247 return 0; 248 } 249 #endif 250 251 int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state, 252 bool nonblock); 253 254 255 extern struct platform_driver fimd_driver; 256 extern struct platform_driver exynos5433_decon_driver; 257 extern struct platform_driver decon_driver; 258 extern struct platform_driver dp_driver; 259 extern struct platform_driver dsi_driver; 260 extern struct platform_driver mixer_driver; 261 extern struct platform_driver hdmi_driver; 262 extern struct platform_driver vidi_driver; 263 extern struct platform_driver g2d_driver; 264 extern struct platform_driver fimc_driver; 265 extern struct platform_driver rotator_driver; 266 extern struct platform_driver scaler_driver; 267 extern struct platform_driver gsc_driver; 268 extern struct platform_driver mic_driver; 269 #endif 270