12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 296976c3dSAjay Kumar /* drivers/gpu/drm/exynos/exynos7_drm_decon.c 396976c3dSAjay Kumar * 496976c3dSAjay Kumar * Copyright (C) 2014 Samsung Electronics Co.Ltd 596976c3dSAjay Kumar * Authors: 696976c3dSAjay Kumar * Akshu Agarwal <akshua@gmail.com> 796976c3dSAjay Kumar * Ajay Kumar <ajaykumar.rs@samsung.com> 896976c3dSAjay Kumar */ 996976c3dSAjay Kumar 1096976c3dSAjay Kumar #include <linux/clk.h> 1196976c3dSAjay Kumar #include <linux/component.h> 1296976c3dSAjay Kumar #include <linux/kernel.h> 1396976c3dSAjay Kumar #include <linux/of.h> 1496976c3dSAjay Kumar #include <linux/of_address.h> 1596976c3dSAjay Kumar #include <linux/of_device.h> 1696976c3dSAjay Kumar #include <linux/platform_device.h> 1796976c3dSAjay Kumar #include <linux/pm_runtime.h> 1896976c3dSAjay Kumar 1996976c3dSAjay Kumar #include <video/of_display_timing.h> 2096976c3dSAjay Kumar #include <video/of_videomode.h> 2196976c3dSAjay Kumar 222bda34d7SSam Ravnborg #include <drm/drm_fourcc.h> 232bda34d7SSam Ravnborg #include <drm/drm_vblank.h> 242bda34d7SSam Ravnborg #include <drm/exynos_drm.h> 252bda34d7SSam Ravnborg 2696976c3dSAjay Kumar #include "exynos_drm_crtc.h" 2796976c3dSAjay Kumar #include "exynos_drm_drv.h" 280488f50eSMarek Szyprowski #include "exynos_drm_fb.h" 292bda34d7SSam Ravnborg #include "exynos_drm_plane.h" 304f52e550SKrzysztof Kozlowski #include "regs-decon7.h" 3196976c3dSAjay Kumar 3296976c3dSAjay Kumar /* 3396976c3dSAjay Kumar * DECON stands for Display and Enhancement controller. 3496976c3dSAjay Kumar */ 3596976c3dSAjay Kumar 3696976c3dSAjay Kumar #define MIN_FB_WIDTH_FOR_16WORD_BURST 128 3796976c3dSAjay Kumar 3896976c3dSAjay Kumar #define WINDOWS_NR 2 3996976c3dSAjay Kumar 4096976c3dSAjay Kumar struct decon_context { 4196976c3dSAjay Kumar struct device *dev; 4296976c3dSAjay Kumar struct drm_device *drm_dev; 4307dc3678SMarek Szyprowski void *dma_priv; 4496976c3dSAjay Kumar struct exynos_drm_crtc *crtc; 457ee14cdcSGustavo Padovan struct exynos_drm_plane planes[WINDOWS_NR]; 46fd2d2fc2SMarek Szyprowski struct exynos_drm_plane_config configs[WINDOWS_NR]; 4796976c3dSAjay Kumar struct clk *pclk; 4896976c3dSAjay Kumar struct clk *aclk; 4996976c3dSAjay Kumar struct clk *eclk; 5096976c3dSAjay Kumar struct clk *vclk; 5196976c3dSAjay Kumar void __iomem *regs; 5296976c3dSAjay Kumar unsigned long irq_flags; 5396976c3dSAjay Kumar bool i80_if; 5496976c3dSAjay Kumar bool suspended; 5596976c3dSAjay Kumar wait_queue_head_t wait_vsync_queue; 5696976c3dSAjay Kumar atomic_t wait_vsync_event; 5796976c3dSAjay Kumar 582b8376c8SGustavo Padovan struct drm_encoder *encoder; 5996976c3dSAjay Kumar }; 6096976c3dSAjay Kumar 6196976c3dSAjay Kumar static const struct of_device_id decon_driver_dt_match[] = { 6296976c3dSAjay Kumar {.compatible = "samsung,exynos7-decon"}, 6396976c3dSAjay Kumar {}, 6496976c3dSAjay Kumar }; 6596976c3dSAjay Kumar MODULE_DEVICE_TABLE(of, decon_driver_dt_match); 6696976c3dSAjay Kumar 67fbbb1e1aSMarek Szyprowski static const uint32_t decon_formats[] = { 68fbbb1e1aSMarek Szyprowski DRM_FORMAT_RGB565, 69fbbb1e1aSMarek Szyprowski DRM_FORMAT_XRGB8888, 70fbbb1e1aSMarek Szyprowski DRM_FORMAT_XBGR8888, 71fbbb1e1aSMarek Szyprowski DRM_FORMAT_RGBX8888, 72fbbb1e1aSMarek Szyprowski DRM_FORMAT_BGRX8888, 73fbbb1e1aSMarek Szyprowski DRM_FORMAT_ARGB8888, 74fbbb1e1aSMarek Szyprowski DRM_FORMAT_ABGR8888, 75fbbb1e1aSMarek Szyprowski DRM_FORMAT_RGBA8888, 76fbbb1e1aSMarek Szyprowski DRM_FORMAT_BGRA8888, 77fbbb1e1aSMarek Szyprowski }; 78fbbb1e1aSMarek Szyprowski 79fd2d2fc2SMarek Szyprowski static const enum drm_plane_type decon_win_types[WINDOWS_NR] = { 80fd2d2fc2SMarek Szyprowski DRM_PLANE_TYPE_PRIMARY, 81fd2d2fc2SMarek Szyprowski DRM_PLANE_TYPE_CURSOR, 82fd2d2fc2SMarek Szyprowski }; 83fd2d2fc2SMarek Szyprowski 8496976c3dSAjay Kumar static void decon_wait_for_vblank(struct exynos_drm_crtc *crtc) 8596976c3dSAjay Kumar { 8696976c3dSAjay Kumar struct decon_context *ctx = crtc->ctx; 8796976c3dSAjay Kumar 8896976c3dSAjay Kumar if (ctx->suspended) 8996976c3dSAjay Kumar return; 9096976c3dSAjay Kumar 9196976c3dSAjay Kumar atomic_set(&ctx->wait_vsync_event, 1); 9296976c3dSAjay Kumar 9396976c3dSAjay Kumar /* 9496976c3dSAjay Kumar * wait for DECON to signal VSYNC interrupt or return after 9596976c3dSAjay Kumar * timeout which is set to 50ms (refresh rate of 20). 9696976c3dSAjay Kumar */ 9796976c3dSAjay Kumar if (!wait_event_timeout(ctx->wait_vsync_queue, 9896976c3dSAjay Kumar !atomic_read(&ctx->wait_vsync_event), 9996976c3dSAjay Kumar HZ/20)) 1006be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "vblank wait timed out.\n"); 10196976c3dSAjay Kumar } 10296976c3dSAjay Kumar 103fc2e013fSHyungwon Hwang static void decon_clear_channels(struct exynos_drm_crtc *crtc) 10496976c3dSAjay Kumar { 105fc2e013fSHyungwon Hwang struct decon_context *ctx = crtc->ctx; 1065b1d5bc6STobias Jakobi unsigned int win, ch_enabled = 0; 10796976c3dSAjay Kumar 10896976c3dSAjay Kumar /* Check if any channel is enabled. */ 10996976c3dSAjay Kumar for (win = 0; win < WINDOWS_NR; win++) { 11096976c3dSAjay Kumar u32 val = readl(ctx->regs + WINCON(win)); 11196976c3dSAjay Kumar 11296976c3dSAjay Kumar if (val & WINCONx_ENWIN) { 11396976c3dSAjay Kumar val &= ~WINCONx_ENWIN; 11496976c3dSAjay Kumar writel(val, ctx->regs + WINCON(win)); 11596976c3dSAjay Kumar ch_enabled = 1; 11696976c3dSAjay Kumar } 11796976c3dSAjay Kumar } 11896976c3dSAjay Kumar 11996976c3dSAjay Kumar /* Wait for vsync, as disable channel takes effect at next vsync */ 120681c801eSGustavo Padovan if (ch_enabled) 12196976c3dSAjay Kumar decon_wait_for_vblank(ctx->crtc); 12296976c3dSAjay Kumar } 12396976c3dSAjay Kumar 12496976c3dSAjay Kumar static int decon_ctx_initialize(struct decon_context *ctx, 12596976c3dSAjay Kumar struct drm_device *drm_dev) 12696976c3dSAjay Kumar { 12796976c3dSAjay Kumar ctx->drm_dev = drm_dev; 12896976c3dSAjay Kumar 129eb7a3fc7SJoonyoung Shim decon_clear_channels(ctx->crtc); 130eb7a3fc7SJoonyoung Shim 13107dc3678SMarek Szyprowski return exynos_drm_register_dma(drm_dev, ctx->dev, &ctx->dma_priv); 13296976c3dSAjay Kumar } 13396976c3dSAjay Kumar 13496976c3dSAjay Kumar static void decon_ctx_remove(struct decon_context *ctx) 13596976c3dSAjay Kumar { 13696976c3dSAjay Kumar /* detach this sub driver from iommu mapping if supported. */ 13707dc3678SMarek Szyprowski exynos_drm_unregister_dma(ctx->drm_dev, ctx->dev, &ctx->dma_priv); 13896976c3dSAjay Kumar } 13996976c3dSAjay Kumar 14096976c3dSAjay Kumar static u32 decon_calc_clkdiv(struct decon_context *ctx, 14196976c3dSAjay Kumar const struct drm_display_mode *mode) 14296976c3dSAjay Kumar { 14396976c3dSAjay Kumar unsigned long ideal_clk = mode->htotal * mode->vtotal * mode->vrefresh; 14496976c3dSAjay Kumar u32 clkdiv; 14596976c3dSAjay Kumar 14696976c3dSAjay Kumar /* Find the clock divider value that gets us closest to ideal_clk */ 14796976c3dSAjay Kumar clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->vclk), ideal_clk); 14896976c3dSAjay Kumar 14996976c3dSAjay Kumar return (clkdiv < 0x100) ? clkdiv : 0xff; 15096976c3dSAjay Kumar } 15196976c3dSAjay Kumar 15296976c3dSAjay Kumar static void decon_commit(struct exynos_drm_crtc *crtc) 15396976c3dSAjay Kumar { 15496976c3dSAjay Kumar struct decon_context *ctx = crtc->ctx; 155020e79deSJoonyoung Shim struct drm_display_mode *mode = &crtc->base.state->adjusted_mode; 15696976c3dSAjay Kumar u32 val, clkdiv; 15796976c3dSAjay Kumar 15896976c3dSAjay Kumar if (ctx->suspended) 15996976c3dSAjay Kumar return; 16096976c3dSAjay Kumar 16196976c3dSAjay Kumar /* nothing to do if we haven't set the mode yet */ 16296976c3dSAjay Kumar if (mode->htotal == 0 || mode->vtotal == 0) 16396976c3dSAjay Kumar return; 16496976c3dSAjay Kumar 16596976c3dSAjay Kumar if (!ctx->i80_if) { 16696976c3dSAjay Kumar int vsync_len, vbpd, vfpd, hsync_len, hbpd, hfpd; 16796976c3dSAjay Kumar /* setup vertical timing values. */ 16896976c3dSAjay Kumar vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; 16996976c3dSAjay Kumar vbpd = mode->crtc_vtotal - mode->crtc_vsync_end; 17096976c3dSAjay Kumar vfpd = mode->crtc_vsync_start - mode->crtc_vdisplay; 17196976c3dSAjay Kumar 17296976c3dSAjay Kumar val = VIDTCON0_VBPD(vbpd - 1) | VIDTCON0_VFPD(vfpd - 1); 17396976c3dSAjay Kumar writel(val, ctx->regs + VIDTCON0); 17496976c3dSAjay Kumar 17596976c3dSAjay Kumar val = VIDTCON1_VSPW(vsync_len - 1); 17696976c3dSAjay Kumar writel(val, ctx->regs + VIDTCON1); 17796976c3dSAjay Kumar 17896976c3dSAjay Kumar /* setup horizontal timing values. */ 17996976c3dSAjay Kumar hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; 18096976c3dSAjay Kumar hbpd = mode->crtc_htotal - mode->crtc_hsync_end; 18196976c3dSAjay Kumar hfpd = mode->crtc_hsync_start - mode->crtc_hdisplay; 18296976c3dSAjay Kumar 18396976c3dSAjay Kumar /* setup horizontal timing values. */ 18496976c3dSAjay Kumar val = VIDTCON2_HBPD(hbpd - 1) | VIDTCON2_HFPD(hfpd - 1); 18596976c3dSAjay Kumar writel(val, ctx->regs + VIDTCON2); 18696976c3dSAjay Kumar 18796976c3dSAjay Kumar val = VIDTCON3_HSPW(hsync_len - 1); 18896976c3dSAjay Kumar writel(val, ctx->regs + VIDTCON3); 18996976c3dSAjay Kumar } 19096976c3dSAjay Kumar 19196976c3dSAjay Kumar /* setup horizontal and vertical display size. */ 19296976c3dSAjay Kumar val = VIDTCON4_LINEVAL(mode->vdisplay - 1) | 19396976c3dSAjay Kumar VIDTCON4_HOZVAL(mode->hdisplay - 1); 19496976c3dSAjay Kumar writel(val, ctx->regs + VIDTCON4); 19596976c3dSAjay Kumar 19696976c3dSAjay Kumar writel(mode->vdisplay - 1, ctx->regs + LINECNT_OP_THRESHOLD); 19796976c3dSAjay Kumar 19896976c3dSAjay Kumar /* 19996976c3dSAjay Kumar * fields of register with prefix '_F' would be updated 20096976c3dSAjay Kumar * at vsync(same as dma start) 20196976c3dSAjay Kumar */ 20296976c3dSAjay Kumar val = VIDCON0_ENVID | VIDCON0_ENVID_F; 20396976c3dSAjay Kumar writel(val, ctx->regs + VIDCON0); 20496976c3dSAjay Kumar 20596976c3dSAjay Kumar clkdiv = decon_calc_clkdiv(ctx, mode); 20696976c3dSAjay Kumar if (clkdiv > 1) { 20796976c3dSAjay Kumar val = VCLKCON1_CLKVAL_NUM_VCLK(clkdiv - 1); 20896976c3dSAjay Kumar writel(val, ctx->regs + VCLKCON1); 20996976c3dSAjay Kumar writel(val, ctx->regs + VCLKCON2); 21096976c3dSAjay Kumar } 21196976c3dSAjay Kumar 21296976c3dSAjay Kumar val = readl(ctx->regs + DECON_UPDATE); 21396976c3dSAjay Kumar val |= DECON_UPDATE_STANDALONE_F; 21496976c3dSAjay Kumar writel(val, ctx->regs + DECON_UPDATE); 21596976c3dSAjay Kumar } 21696976c3dSAjay Kumar 21796976c3dSAjay Kumar static int decon_enable_vblank(struct exynos_drm_crtc *crtc) 21896976c3dSAjay Kumar { 21996976c3dSAjay Kumar struct decon_context *ctx = crtc->ctx; 22096976c3dSAjay Kumar u32 val; 22196976c3dSAjay Kumar 22296976c3dSAjay Kumar if (ctx->suspended) 22396976c3dSAjay Kumar return -EPERM; 22496976c3dSAjay Kumar 22596976c3dSAjay Kumar if (!test_and_set_bit(0, &ctx->irq_flags)) { 22696976c3dSAjay Kumar val = readl(ctx->regs + VIDINTCON0); 22796976c3dSAjay Kumar 22896976c3dSAjay Kumar val |= VIDINTCON0_INT_ENABLE; 22996976c3dSAjay Kumar 23096976c3dSAjay Kumar if (!ctx->i80_if) { 23196976c3dSAjay Kumar val |= VIDINTCON0_INT_FRAME; 23296976c3dSAjay Kumar val &= ~VIDINTCON0_FRAMESEL0_MASK; 23396976c3dSAjay Kumar val |= VIDINTCON0_FRAMESEL0_VSYNC; 23496976c3dSAjay Kumar } 23596976c3dSAjay Kumar 23696976c3dSAjay Kumar writel(val, ctx->regs + VIDINTCON0); 23796976c3dSAjay Kumar } 23896976c3dSAjay Kumar 23996976c3dSAjay Kumar return 0; 24096976c3dSAjay Kumar } 24196976c3dSAjay Kumar 24296976c3dSAjay Kumar static void decon_disable_vblank(struct exynos_drm_crtc *crtc) 24396976c3dSAjay Kumar { 24496976c3dSAjay Kumar struct decon_context *ctx = crtc->ctx; 24596976c3dSAjay Kumar u32 val; 24696976c3dSAjay Kumar 24796976c3dSAjay Kumar if (ctx->suspended) 24896976c3dSAjay Kumar return; 24996976c3dSAjay Kumar 25096976c3dSAjay Kumar if (test_and_clear_bit(0, &ctx->irq_flags)) { 25196976c3dSAjay Kumar val = readl(ctx->regs + VIDINTCON0); 25296976c3dSAjay Kumar 25396976c3dSAjay Kumar val &= ~VIDINTCON0_INT_ENABLE; 25496976c3dSAjay Kumar if (!ctx->i80_if) 25596976c3dSAjay Kumar val &= ~VIDINTCON0_INT_FRAME; 25696976c3dSAjay Kumar 25796976c3dSAjay Kumar writel(val, ctx->regs + VIDINTCON0); 25896976c3dSAjay Kumar } 25996976c3dSAjay Kumar } 26096976c3dSAjay Kumar 2612eeb2e5eSGustavo Padovan static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win, 2622eeb2e5eSGustavo Padovan struct drm_framebuffer *fb) 26396976c3dSAjay Kumar { 26496976c3dSAjay Kumar unsigned long val; 2657ee14cdcSGustavo Padovan int padding; 26696976c3dSAjay Kumar 26796976c3dSAjay Kumar val = readl(ctx->regs + WINCON(win)); 26896976c3dSAjay Kumar val &= ~WINCONx_BPPMODE_MASK; 26996976c3dSAjay Kumar 270438b74a5SVille Syrjälä switch (fb->format->format) { 27196976c3dSAjay Kumar case DRM_FORMAT_RGB565: 27296976c3dSAjay Kumar val |= WINCONx_BPPMODE_16BPP_565; 27396976c3dSAjay Kumar val |= WINCONx_BURSTLEN_16WORD; 27496976c3dSAjay Kumar break; 27596976c3dSAjay Kumar case DRM_FORMAT_XRGB8888: 27696976c3dSAjay Kumar val |= WINCONx_BPPMODE_24BPP_xRGB; 27796976c3dSAjay Kumar val |= WINCONx_BURSTLEN_16WORD; 27896976c3dSAjay Kumar break; 27996976c3dSAjay Kumar case DRM_FORMAT_XBGR8888: 28096976c3dSAjay Kumar val |= WINCONx_BPPMODE_24BPP_xBGR; 28196976c3dSAjay Kumar val |= WINCONx_BURSTLEN_16WORD; 28296976c3dSAjay Kumar break; 28396976c3dSAjay Kumar case DRM_FORMAT_RGBX8888: 28496976c3dSAjay Kumar val |= WINCONx_BPPMODE_24BPP_RGBx; 28596976c3dSAjay Kumar val |= WINCONx_BURSTLEN_16WORD; 28696976c3dSAjay Kumar break; 28796976c3dSAjay Kumar case DRM_FORMAT_BGRX8888: 28896976c3dSAjay Kumar val |= WINCONx_BPPMODE_24BPP_BGRx; 28996976c3dSAjay Kumar val |= WINCONx_BURSTLEN_16WORD; 29096976c3dSAjay Kumar break; 29196976c3dSAjay Kumar case DRM_FORMAT_ARGB8888: 29296976c3dSAjay Kumar val |= WINCONx_BPPMODE_32BPP_ARGB | WINCONx_BLD_PIX | 29396976c3dSAjay Kumar WINCONx_ALPHA_SEL; 29496976c3dSAjay Kumar val |= WINCONx_BURSTLEN_16WORD; 29596976c3dSAjay Kumar break; 29696976c3dSAjay Kumar case DRM_FORMAT_ABGR8888: 29796976c3dSAjay Kumar val |= WINCONx_BPPMODE_32BPP_ABGR | WINCONx_BLD_PIX | 29896976c3dSAjay Kumar WINCONx_ALPHA_SEL; 29996976c3dSAjay Kumar val |= WINCONx_BURSTLEN_16WORD; 30096976c3dSAjay Kumar break; 30196976c3dSAjay Kumar case DRM_FORMAT_RGBA8888: 30296976c3dSAjay Kumar val |= WINCONx_BPPMODE_32BPP_RGBA | WINCONx_BLD_PIX | 30396976c3dSAjay Kumar WINCONx_ALPHA_SEL; 30496976c3dSAjay Kumar val |= WINCONx_BURSTLEN_16WORD; 30596976c3dSAjay Kumar break; 30696976c3dSAjay Kumar case DRM_FORMAT_BGRA8888: 3075b7b1b7fSTobias Jakobi default: 30896976c3dSAjay Kumar val |= WINCONx_BPPMODE_32BPP_BGRA | WINCONx_BLD_PIX | 30996976c3dSAjay Kumar WINCONx_ALPHA_SEL; 31096976c3dSAjay Kumar val |= WINCONx_BURSTLEN_16WORD; 31196976c3dSAjay Kumar break; 31296976c3dSAjay Kumar } 31396976c3dSAjay Kumar 3146be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "cpp = %d\n", fb->format->cpp[0]); 31596976c3dSAjay Kumar 31696976c3dSAjay Kumar /* 31796976c3dSAjay Kumar * In case of exynos, setting dma-burst to 16Word causes permanent 31896976c3dSAjay Kumar * tearing for very small buffers, e.g. cursor buffer. Burst Mode 31996976c3dSAjay Kumar * switching which is based on plane size is not recommended as 32096976c3dSAjay Kumar * plane size varies a lot towards the end of the screen and rapid 32196976c3dSAjay Kumar * movement causes unstable DMA which results into iommu crash/tear. 32296976c3dSAjay Kumar */ 32396976c3dSAjay Kumar 324272725c7SVille Syrjälä padding = (fb->pitches[0] / fb->format->cpp[0]) - fb->width; 3252eeb2e5eSGustavo Padovan if (fb->width + padding < MIN_FB_WIDTH_FOR_16WORD_BURST) { 32696976c3dSAjay Kumar val &= ~WINCONx_BURSTLEN_MASK; 32796976c3dSAjay Kumar val |= WINCONx_BURSTLEN_8WORD; 32896976c3dSAjay Kumar } 32996976c3dSAjay Kumar 33096976c3dSAjay Kumar writel(val, ctx->regs + WINCON(win)); 33196976c3dSAjay Kumar } 33296976c3dSAjay Kumar 33396976c3dSAjay Kumar static void decon_win_set_colkey(struct decon_context *ctx, unsigned int win) 33496976c3dSAjay Kumar { 33596976c3dSAjay Kumar unsigned int keycon0 = 0, keycon1 = 0; 33696976c3dSAjay Kumar 33796976c3dSAjay Kumar keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F | 33896976c3dSAjay Kumar WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0); 33996976c3dSAjay Kumar 34096976c3dSAjay Kumar keycon1 = WxKEYCON1_COLVAL(0xffffffff); 34196976c3dSAjay Kumar 34296976c3dSAjay Kumar writel(keycon0, ctx->regs + WKEYCON0_BASE(win)); 34396976c3dSAjay Kumar writel(keycon1, ctx->regs + WKEYCON1_BASE(win)); 34496976c3dSAjay Kumar } 34596976c3dSAjay Kumar 34696976c3dSAjay Kumar /** 34796976c3dSAjay Kumar * shadow_protect_win() - disable updating values from shadow registers at vsync 34896976c3dSAjay Kumar * 34996976c3dSAjay Kumar * @win: window to protect registers for 35096976c3dSAjay Kumar * @protect: 1 to protect (disable updates) 35196976c3dSAjay Kumar */ 35296976c3dSAjay Kumar static void decon_shadow_protect_win(struct decon_context *ctx, 3536e2a3b66SGustavo Padovan unsigned int win, bool protect) 35496976c3dSAjay Kumar { 35596976c3dSAjay Kumar u32 bits, val; 35696976c3dSAjay Kumar 35796976c3dSAjay Kumar bits = SHADOWCON_WINx_PROTECT(win); 35896976c3dSAjay Kumar 35996976c3dSAjay Kumar val = readl(ctx->regs + SHADOWCON); 36096976c3dSAjay Kumar if (protect) 36196976c3dSAjay Kumar val |= bits; 36296976c3dSAjay Kumar else 36396976c3dSAjay Kumar val &= ~bits; 36496976c3dSAjay Kumar writel(val, ctx->regs + SHADOWCON); 36596976c3dSAjay Kumar } 36696976c3dSAjay Kumar 367d29c2c14SMarek Szyprowski static void decon_atomic_begin(struct exynos_drm_crtc *crtc) 368cc5a7b35SHyungwon Hwang { 369cc5a7b35SHyungwon Hwang struct decon_context *ctx = crtc->ctx; 370d29c2c14SMarek Szyprowski int i; 371cc5a7b35SHyungwon Hwang 372cc5a7b35SHyungwon Hwang if (ctx->suspended) 373cc5a7b35SHyungwon Hwang return; 374cc5a7b35SHyungwon Hwang 375d29c2c14SMarek Szyprowski for (i = 0; i < WINDOWS_NR; i++) 376d29c2c14SMarek Szyprowski decon_shadow_protect_win(ctx, i, true); 377cc5a7b35SHyungwon Hwang } 378cc5a7b35SHyungwon Hwang 3791e1d1393SGustavo Padovan static void decon_update_plane(struct exynos_drm_crtc *crtc, 3801e1d1393SGustavo Padovan struct exynos_drm_plane *plane) 38196976c3dSAjay Kumar { 3820114f404SMarek Szyprowski struct exynos_drm_plane_state *state = 3830114f404SMarek Szyprowski to_exynos_plane_state(plane->base.state); 38496976c3dSAjay Kumar struct decon_context *ctx = crtc->ctx; 3850114f404SMarek Szyprowski struct drm_framebuffer *fb = state->base.fb; 3866e2a3b66SGustavo Padovan int padding; 38796976c3dSAjay Kumar unsigned long val, alpha; 38896976c3dSAjay Kumar unsigned int last_x; 38996976c3dSAjay Kumar unsigned int last_y; 39040bdfb0aSMarek Szyprowski unsigned int win = plane->index; 391ac60944cSTobias Jakobi unsigned int cpp = fb->format->cpp[0]; 3920488f50eSMarek Szyprowski unsigned int pitch = fb->pitches[0]; 39396976c3dSAjay Kumar 39496976c3dSAjay Kumar if (ctx->suspended) 39596976c3dSAjay Kumar return; 39696976c3dSAjay Kumar 39796976c3dSAjay Kumar /* 39896976c3dSAjay Kumar * SHADOWCON/PRTCON register is used for enabling timing. 39996976c3dSAjay Kumar * 40096976c3dSAjay Kumar * for example, once only width value of a register is set, 40196976c3dSAjay Kumar * if the dma is started then decon hardware could malfunction so 40296976c3dSAjay Kumar * with protect window setting, the register fields with prefix '_F' 40396976c3dSAjay Kumar * wouldn't be updated at vsync also but updated once unprotect window 40496976c3dSAjay Kumar * is set. 40596976c3dSAjay Kumar */ 40696976c3dSAjay Kumar 40796976c3dSAjay Kumar /* buffer start address */ 4080488f50eSMarek Szyprowski val = (unsigned long)exynos_drm_fb_dma_addr(fb, 0); 40996976c3dSAjay Kumar writel(val, ctx->regs + VIDW_BUF_START(win)); 41096976c3dSAjay Kumar 411ac60944cSTobias Jakobi padding = (pitch / cpp) - fb->width; 4127ee14cdcSGustavo Padovan 41396976c3dSAjay Kumar /* buffer size */ 4140488f50eSMarek Szyprowski writel(fb->width + padding, ctx->regs + VIDW_WHOLE_X(win)); 4150488f50eSMarek Szyprowski writel(fb->height, ctx->regs + VIDW_WHOLE_Y(win)); 41696976c3dSAjay Kumar 41796976c3dSAjay Kumar /* offset from the start of the buffer to read */ 4180114f404SMarek Szyprowski writel(state->src.x, ctx->regs + VIDW_OFFSET_X(win)); 4190114f404SMarek Szyprowski writel(state->src.y, ctx->regs + VIDW_OFFSET_Y(win)); 42096976c3dSAjay Kumar 4216be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "start addr = 0x%lx\n", 4227ee14cdcSGustavo Padovan (unsigned long)val); 4236be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "ovl_width = %d, ovl_height = %d\n", 4240114f404SMarek Szyprowski state->crtc.w, state->crtc.h); 42596976c3dSAjay Kumar 4260114f404SMarek Szyprowski val = VIDOSDxA_TOPLEFT_X(state->crtc.x) | 4270114f404SMarek Szyprowski VIDOSDxA_TOPLEFT_Y(state->crtc.y); 42896976c3dSAjay Kumar writel(val, ctx->regs + VIDOSD_A(win)); 42996976c3dSAjay Kumar 4300114f404SMarek Szyprowski last_x = state->crtc.x + state->crtc.w; 43196976c3dSAjay Kumar if (last_x) 43296976c3dSAjay Kumar last_x--; 4330114f404SMarek Szyprowski last_y = state->crtc.y + state->crtc.h; 43496976c3dSAjay Kumar if (last_y) 43596976c3dSAjay Kumar last_y--; 43696976c3dSAjay Kumar 43796976c3dSAjay Kumar val = VIDOSDxB_BOTRIGHT_X(last_x) | VIDOSDxB_BOTRIGHT_Y(last_y); 43896976c3dSAjay Kumar 43996976c3dSAjay Kumar writel(val, ctx->regs + VIDOSD_B(win)); 44096976c3dSAjay Kumar 4416be90056SInki Dae DRM_DEV_DEBUG_KMS(ctx->dev, "osd pos: tx = %d, ty = %d, bx = %d, by = %d\n", 4420114f404SMarek Szyprowski state->crtc.x, state->crtc.y, last_x, last_y); 44396976c3dSAjay Kumar 44496976c3dSAjay Kumar /* OSD alpha */ 44596976c3dSAjay Kumar alpha = VIDOSDxC_ALPHA0_R_F(0x0) | 44696976c3dSAjay Kumar VIDOSDxC_ALPHA0_G_F(0x0) | 44796976c3dSAjay Kumar VIDOSDxC_ALPHA0_B_F(0x0); 44896976c3dSAjay Kumar 44996976c3dSAjay Kumar writel(alpha, ctx->regs + VIDOSD_C(win)); 45096976c3dSAjay Kumar 45196976c3dSAjay Kumar alpha = VIDOSDxD_ALPHA1_R_F(0xff) | 45296976c3dSAjay Kumar VIDOSDxD_ALPHA1_G_F(0xff) | 45396976c3dSAjay Kumar VIDOSDxD_ALPHA1_B_F(0xff); 45496976c3dSAjay Kumar 45596976c3dSAjay Kumar writel(alpha, ctx->regs + VIDOSD_D(win)); 45696976c3dSAjay Kumar 4570488f50eSMarek Szyprowski decon_win_set_pixfmt(ctx, win, fb); 45896976c3dSAjay Kumar 45996976c3dSAjay Kumar /* hardware window 0 doesn't support color key. */ 46096976c3dSAjay Kumar if (win != 0) 46196976c3dSAjay Kumar decon_win_set_colkey(ctx, win); 46296976c3dSAjay Kumar 46396976c3dSAjay Kumar /* wincon */ 46496976c3dSAjay Kumar val = readl(ctx->regs + WINCON(win)); 46596976c3dSAjay Kumar val |= WINCONx_TRIPLE_BUF_MODE; 46696976c3dSAjay Kumar val |= WINCONx_ENWIN; 46796976c3dSAjay Kumar writel(val, ctx->regs + WINCON(win)); 46896976c3dSAjay Kumar 46996976c3dSAjay Kumar /* Enable DMA channel and unprotect windows */ 47096976c3dSAjay Kumar decon_shadow_protect_win(ctx, win, false); 47196976c3dSAjay Kumar 47296976c3dSAjay Kumar val = readl(ctx->regs + DECON_UPDATE); 47396976c3dSAjay Kumar val |= DECON_UPDATE_STANDALONE_F; 47496976c3dSAjay Kumar writel(val, ctx->regs + DECON_UPDATE); 47596976c3dSAjay Kumar } 47696976c3dSAjay Kumar 4771e1d1393SGustavo Padovan static void decon_disable_plane(struct exynos_drm_crtc *crtc, 4781e1d1393SGustavo Padovan struct exynos_drm_plane *plane) 47996976c3dSAjay Kumar { 48096976c3dSAjay Kumar struct decon_context *ctx = crtc->ctx; 48140bdfb0aSMarek Szyprowski unsigned int win = plane->index; 48296976c3dSAjay Kumar u32 val; 48396976c3dSAjay Kumar 484c329f667SJoonyoung Shim if (ctx->suspended) 48596976c3dSAjay Kumar return; 48696976c3dSAjay Kumar 48796976c3dSAjay Kumar /* protect windows */ 48896976c3dSAjay Kumar decon_shadow_protect_win(ctx, win, true); 48996976c3dSAjay Kumar 49096976c3dSAjay Kumar /* wincon */ 49196976c3dSAjay Kumar val = readl(ctx->regs + WINCON(win)); 49296976c3dSAjay Kumar val &= ~WINCONx_ENWIN; 49396976c3dSAjay Kumar writel(val, ctx->regs + WINCON(win)); 49496976c3dSAjay Kumar 49596976c3dSAjay Kumar val = readl(ctx->regs + DECON_UPDATE); 49696976c3dSAjay Kumar val |= DECON_UPDATE_STANDALONE_F; 49796976c3dSAjay Kumar writel(val, ctx->regs + DECON_UPDATE); 49896976c3dSAjay Kumar } 49996976c3dSAjay Kumar 500d29c2c14SMarek Szyprowski static void decon_atomic_flush(struct exynos_drm_crtc *crtc) 501cc5a7b35SHyungwon Hwang { 502cc5a7b35SHyungwon Hwang struct decon_context *ctx = crtc->ctx; 503d29c2c14SMarek Szyprowski int i; 504cc5a7b35SHyungwon Hwang 505cc5a7b35SHyungwon Hwang if (ctx->suspended) 506cc5a7b35SHyungwon Hwang return; 507cc5a7b35SHyungwon Hwang 508d29c2c14SMarek Szyprowski for (i = 0; i < WINDOWS_NR; i++) 509d29c2c14SMarek Szyprowski decon_shadow_protect_win(ctx, i, false); 510a392276dSAndrzej Hajda exynos_crtc_handle_event(crtc); 511cc5a7b35SHyungwon Hwang } 512cc5a7b35SHyungwon Hwang 51396976c3dSAjay Kumar static void decon_init(struct decon_context *ctx) 51496976c3dSAjay Kumar { 51596976c3dSAjay Kumar u32 val; 51696976c3dSAjay Kumar 51796976c3dSAjay Kumar writel(VIDCON0_SWRESET, ctx->regs + VIDCON0); 51896976c3dSAjay Kumar 51996976c3dSAjay Kumar val = VIDOUTCON0_DISP_IF_0_ON; 52096976c3dSAjay Kumar if (!ctx->i80_if) 52196976c3dSAjay Kumar val |= VIDOUTCON0_RGBIF; 52296976c3dSAjay Kumar writel(val, ctx->regs + VIDOUTCON0); 52396976c3dSAjay Kumar 52496976c3dSAjay Kumar writel(VCLKCON0_CLKVALUP | VCLKCON0_VCLKFREE, ctx->regs + VCLKCON0); 52596976c3dSAjay Kumar 52696976c3dSAjay Kumar if (!ctx->i80_if) 52796976c3dSAjay Kumar writel(VIDCON1_VCLK_HOLD, ctx->regs + VIDCON1(0)); 52896976c3dSAjay Kumar } 52996976c3dSAjay Kumar 53011f95489SInki Dae static void decon_atomic_enable(struct exynos_drm_crtc *crtc) 53196976c3dSAjay Kumar { 5323cecda03SGustavo Padovan struct decon_context *ctx = crtc->ctx; 53396976c3dSAjay Kumar 53496976c3dSAjay Kumar if (!ctx->suspended) 5353cecda03SGustavo Padovan return; 53696976c3dSAjay Kumar 53796976c3dSAjay Kumar pm_runtime_get_sync(ctx->dev); 53896976c3dSAjay Kumar 53996976c3dSAjay Kumar decon_init(ctx); 54096976c3dSAjay Kumar 54196976c3dSAjay Kumar /* if vblank was enabled status, enable it again. */ 5423cecda03SGustavo Padovan if (test_and_clear_bit(0, &ctx->irq_flags)) 5433cecda03SGustavo Padovan decon_enable_vblank(ctx->crtc); 54496976c3dSAjay Kumar 545c329f667SJoonyoung Shim decon_commit(ctx->crtc); 546681c801eSGustavo Padovan 547681c801eSGustavo Padovan ctx->suspended = false; 54896976c3dSAjay Kumar } 54996976c3dSAjay Kumar 55011f95489SInki Dae static void decon_atomic_disable(struct exynos_drm_crtc *crtc) 55196976c3dSAjay Kumar { 5523cecda03SGustavo Padovan struct decon_context *ctx = crtc->ctx; 553c329f667SJoonyoung Shim int i; 5543cecda03SGustavo Padovan 55596976c3dSAjay Kumar if (ctx->suspended) 5563cecda03SGustavo Padovan return; 55796976c3dSAjay Kumar 55896976c3dSAjay Kumar /* 55996976c3dSAjay Kumar * We need to make sure that all windows are disabled before we 56096976c3dSAjay Kumar * suspend that connector. Otherwise we might try to scan from 56196976c3dSAjay Kumar * a destroyed buffer later. 56296976c3dSAjay Kumar */ 563c329f667SJoonyoung Shim for (i = 0; i < WINDOWS_NR; i++) 5641e1d1393SGustavo Padovan decon_disable_plane(crtc, &ctx->planes[i]); 56596976c3dSAjay Kumar 56696976c3dSAjay Kumar pm_runtime_put_sync(ctx->dev); 56796976c3dSAjay Kumar 56896976c3dSAjay Kumar ctx->suspended = true; 56996976c3dSAjay Kumar } 57096976c3dSAjay Kumar 571f3aaf762SKrzysztof Kozlowski static const struct exynos_drm_crtc_ops decon_crtc_ops = { 57211f95489SInki Dae .atomic_enable = decon_atomic_enable, 57311f95489SInki Dae .atomic_disable = decon_atomic_disable, 57496976c3dSAjay Kumar .enable_vblank = decon_enable_vblank, 57596976c3dSAjay Kumar .disable_vblank = decon_disable_vblank, 576cc5a7b35SHyungwon Hwang .atomic_begin = decon_atomic_begin, 5779cc7610aSGustavo Padovan .update_plane = decon_update_plane, 5789cc7610aSGustavo Padovan .disable_plane = decon_disable_plane, 579cc5a7b35SHyungwon Hwang .atomic_flush = decon_atomic_flush, 58096976c3dSAjay Kumar }; 58196976c3dSAjay Kumar 58296976c3dSAjay Kumar 58396976c3dSAjay Kumar static irqreturn_t decon_irq_handler(int irq, void *dev_id) 58496976c3dSAjay Kumar { 58596976c3dSAjay Kumar struct decon_context *ctx = (struct decon_context *)dev_id; 58696976c3dSAjay Kumar u32 val, clear_bit; 58796976c3dSAjay Kumar 58896976c3dSAjay Kumar val = readl(ctx->regs + VIDINTCON1); 58996976c3dSAjay Kumar 59096976c3dSAjay Kumar clear_bit = ctx->i80_if ? VIDINTCON1_INT_I80 : VIDINTCON1_INT_FRAME; 59196976c3dSAjay Kumar if (val & clear_bit) 59296976c3dSAjay Kumar writel(clear_bit, ctx->regs + VIDINTCON1); 59396976c3dSAjay Kumar 59496976c3dSAjay Kumar /* check the crtc is detached already from encoder */ 5952949390eSAndrzej Hajda if (!ctx->drm_dev) 59696976c3dSAjay Kumar goto out; 59796976c3dSAjay Kumar 59896976c3dSAjay Kumar if (!ctx->i80_if) { 599eafd540aSGustavo Padovan drm_crtc_handle_vblank(&ctx->crtc->base); 60096976c3dSAjay Kumar 60196976c3dSAjay Kumar /* set wait vsync event to zero and wake up queue. */ 60296976c3dSAjay Kumar if (atomic_read(&ctx->wait_vsync_event)) { 60396976c3dSAjay Kumar atomic_set(&ctx->wait_vsync_event, 0); 60496976c3dSAjay Kumar wake_up(&ctx->wait_vsync_queue); 60596976c3dSAjay Kumar } 60696976c3dSAjay Kumar } 60796976c3dSAjay Kumar out: 60896976c3dSAjay Kumar return IRQ_HANDLED; 60996976c3dSAjay Kumar } 61096976c3dSAjay Kumar 61196976c3dSAjay Kumar static int decon_bind(struct device *dev, struct device *master, void *data) 61296976c3dSAjay Kumar { 61396976c3dSAjay Kumar struct decon_context *ctx = dev_get_drvdata(dev); 61496976c3dSAjay Kumar struct drm_device *drm_dev = data; 6157ee14cdcSGustavo Padovan struct exynos_drm_plane *exynos_plane; 616fd2d2fc2SMarek Szyprowski unsigned int i; 6176e2a3b66SGustavo Padovan int ret; 61896976c3dSAjay Kumar 61996976c3dSAjay Kumar ret = decon_ctx_initialize(ctx, drm_dev); 62096976c3dSAjay Kumar if (ret) { 6216f83d208SInki Dae DRM_DEV_ERROR(dev, "decon_ctx_initialize failed.\n"); 62296976c3dSAjay Kumar return ret; 62396976c3dSAjay Kumar } 62496976c3dSAjay Kumar 625fd2d2fc2SMarek Szyprowski for (i = 0; i < WINDOWS_NR; i++) { 626fd2d2fc2SMarek Szyprowski ctx->configs[i].pixel_formats = decon_formats; 627fd2d2fc2SMarek Szyprowski ctx->configs[i].num_pixel_formats = ARRAY_SIZE(decon_formats); 628fd2d2fc2SMarek Szyprowski ctx->configs[i].zpos = i; 629fd2d2fc2SMarek Szyprowski ctx->configs[i].type = decon_win_types[i]; 630fd2d2fc2SMarek Szyprowski 63140bdfb0aSMarek Szyprowski ret = exynos_plane_init(drm_dev, &ctx->planes[i], i, 6322c82607bSAndrzej Hajda &ctx->configs[i]); 6337ee14cdcSGustavo Padovan if (ret) 6347ee14cdcSGustavo Padovan return ret; 6357ee14cdcSGustavo Padovan } 6367ee14cdcSGustavo Padovan 6375d3d0995SGustavo Padovan exynos_plane = &ctx->planes[DEFAULT_WIN]; 6387ee14cdcSGustavo Padovan ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base, 639d644951cSAndrzej Hajda EXYNOS_DISPLAY_TYPE_LCD, &decon_crtc_ops, ctx); 64096976c3dSAjay Kumar if (IS_ERR(ctx->crtc)) { 64196976c3dSAjay Kumar decon_ctx_remove(ctx); 64296976c3dSAjay Kumar return PTR_ERR(ctx->crtc); 64396976c3dSAjay Kumar } 64496976c3dSAjay Kumar 645cf67cc9aSGustavo Padovan if (ctx->encoder) 646a2986e80SGustavo Padovan exynos_dpi_bind(drm_dev, ctx->encoder); 64796976c3dSAjay Kumar 64896976c3dSAjay Kumar return 0; 64996976c3dSAjay Kumar 65096976c3dSAjay Kumar } 65196976c3dSAjay Kumar 65296976c3dSAjay Kumar static void decon_unbind(struct device *dev, struct device *master, 65396976c3dSAjay Kumar void *data) 65496976c3dSAjay Kumar { 65596976c3dSAjay Kumar struct decon_context *ctx = dev_get_drvdata(dev); 65696976c3dSAjay Kumar 65711f95489SInki Dae decon_atomic_disable(ctx->crtc); 65896976c3dSAjay Kumar 659cf67cc9aSGustavo Padovan if (ctx->encoder) 660cf67cc9aSGustavo Padovan exynos_dpi_remove(ctx->encoder); 66196976c3dSAjay Kumar 66296976c3dSAjay Kumar decon_ctx_remove(ctx); 66396976c3dSAjay Kumar } 66496976c3dSAjay Kumar 66596976c3dSAjay Kumar static const struct component_ops decon_component_ops = { 66696976c3dSAjay Kumar .bind = decon_bind, 66796976c3dSAjay Kumar .unbind = decon_unbind, 66896976c3dSAjay Kumar }; 66996976c3dSAjay Kumar 67096976c3dSAjay Kumar static int decon_probe(struct platform_device *pdev) 67196976c3dSAjay Kumar { 67296976c3dSAjay Kumar struct device *dev = &pdev->dev; 67396976c3dSAjay Kumar struct decon_context *ctx; 67496976c3dSAjay Kumar struct device_node *i80_if_timings; 67596976c3dSAjay Kumar struct resource *res; 67696976c3dSAjay Kumar int ret; 67796976c3dSAjay Kumar 67896976c3dSAjay Kumar if (!dev->of_node) 67996976c3dSAjay Kumar return -ENODEV; 68096976c3dSAjay Kumar 68196976c3dSAjay Kumar ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); 68296976c3dSAjay Kumar if (!ctx) 68396976c3dSAjay Kumar return -ENOMEM; 68496976c3dSAjay Kumar 68596976c3dSAjay Kumar ctx->dev = dev; 68696976c3dSAjay Kumar ctx->suspended = true; 68796976c3dSAjay Kumar 68896976c3dSAjay Kumar i80_if_timings = of_get_child_by_name(dev->of_node, "i80-if-timings"); 68996976c3dSAjay Kumar if (i80_if_timings) 69096976c3dSAjay Kumar ctx->i80_if = true; 69196976c3dSAjay Kumar of_node_put(i80_if_timings); 69296976c3dSAjay Kumar 69396976c3dSAjay Kumar ctx->regs = of_iomap(dev->of_node, 0); 69486650408SAndrzej Hajda if (!ctx->regs) 69586650408SAndrzej Hajda return -ENOMEM; 69696976c3dSAjay Kumar 69796976c3dSAjay Kumar ctx->pclk = devm_clk_get(dev, "pclk_decon0"); 69896976c3dSAjay Kumar if (IS_ERR(ctx->pclk)) { 69996976c3dSAjay Kumar dev_err(dev, "failed to get bus clock pclk\n"); 70096976c3dSAjay Kumar ret = PTR_ERR(ctx->pclk); 70196976c3dSAjay Kumar goto err_iounmap; 70296976c3dSAjay Kumar } 70396976c3dSAjay Kumar 70496976c3dSAjay Kumar ctx->aclk = devm_clk_get(dev, "aclk_decon0"); 70596976c3dSAjay Kumar if (IS_ERR(ctx->aclk)) { 70696976c3dSAjay Kumar dev_err(dev, "failed to get bus clock aclk\n"); 70796976c3dSAjay Kumar ret = PTR_ERR(ctx->aclk); 70896976c3dSAjay Kumar goto err_iounmap; 70996976c3dSAjay Kumar } 71096976c3dSAjay Kumar 71196976c3dSAjay Kumar ctx->eclk = devm_clk_get(dev, "decon0_eclk"); 71296976c3dSAjay Kumar if (IS_ERR(ctx->eclk)) { 71396976c3dSAjay Kumar dev_err(dev, "failed to get eclock\n"); 71496976c3dSAjay Kumar ret = PTR_ERR(ctx->eclk); 71596976c3dSAjay Kumar goto err_iounmap; 71696976c3dSAjay Kumar } 71796976c3dSAjay Kumar 71896976c3dSAjay Kumar ctx->vclk = devm_clk_get(dev, "decon0_vclk"); 71996976c3dSAjay Kumar if (IS_ERR(ctx->vclk)) { 72096976c3dSAjay Kumar dev_err(dev, "failed to get vclock\n"); 72196976c3dSAjay Kumar ret = PTR_ERR(ctx->vclk); 72296976c3dSAjay Kumar goto err_iounmap; 72396976c3dSAjay Kumar } 72496976c3dSAjay Kumar 72596976c3dSAjay Kumar res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, 72696976c3dSAjay Kumar ctx->i80_if ? "lcd_sys" : "vsync"); 72796976c3dSAjay Kumar if (!res) { 72896976c3dSAjay Kumar dev_err(dev, "irq request failed.\n"); 72996976c3dSAjay Kumar ret = -ENXIO; 73096976c3dSAjay Kumar goto err_iounmap; 73196976c3dSAjay Kumar } 73296976c3dSAjay Kumar 73396976c3dSAjay Kumar ret = devm_request_irq(dev, res->start, decon_irq_handler, 73496976c3dSAjay Kumar 0, "drm_decon", ctx); 73596976c3dSAjay Kumar if (ret) { 73696976c3dSAjay Kumar dev_err(dev, "irq request failed.\n"); 73796976c3dSAjay Kumar goto err_iounmap; 73896976c3dSAjay Kumar } 73996976c3dSAjay Kumar 74096976c3dSAjay Kumar init_waitqueue_head(&ctx->wait_vsync_queue); 74196976c3dSAjay Kumar atomic_set(&ctx->wait_vsync_event, 0); 74296976c3dSAjay Kumar 74396976c3dSAjay Kumar platform_set_drvdata(pdev, ctx); 74496976c3dSAjay Kumar 745cf67cc9aSGustavo Padovan ctx->encoder = exynos_dpi_probe(dev); 746cf67cc9aSGustavo Padovan if (IS_ERR(ctx->encoder)) { 747cf67cc9aSGustavo Padovan ret = PTR_ERR(ctx->encoder); 74896976c3dSAjay Kumar goto err_iounmap; 74996976c3dSAjay Kumar } 75096976c3dSAjay Kumar 75196976c3dSAjay Kumar pm_runtime_enable(dev); 75296976c3dSAjay Kumar 75396976c3dSAjay Kumar ret = component_add(dev, &decon_component_ops); 75496976c3dSAjay Kumar if (ret) 75596976c3dSAjay Kumar goto err_disable_pm_runtime; 75696976c3dSAjay Kumar 75796976c3dSAjay Kumar return ret; 75896976c3dSAjay Kumar 75996976c3dSAjay Kumar err_disable_pm_runtime: 76096976c3dSAjay Kumar pm_runtime_disable(dev); 76196976c3dSAjay Kumar 76296976c3dSAjay Kumar err_iounmap: 76396976c3dSAjay Kumar iounmap(ctx->regs); 76496976c3dSAjay Kumar 76596976c3dSAjay Kumar return ret; 76696976c3dSAjay Kumar } 76796976c3dSAjay Kumar 76896976c3dSAjay Kumar static int decon_remove(struct platform_device *pdev) 76996976c3dSAjay Kumar { 77096976c3dSAjay Kumar struct decon_context *ctx = dev_get_drvdata(&pdev->dev); 77196976c3dSAjay Kumar 77296976c3dSAjay Kumar pm_runtime_disable(&pdev->dev); 77396976c3dSAjay Kumar 77496976c3dSAjay Kumar iounmap(ctx->regs); 77596976c3dSAjay Kumar 77696976c3dSAjay Kumar component_del(&pdev->dev, &decon_component_ops); 77796976c3dSAjay Kumar 77896976c3dSAjay Kumar return 0; 77996976c3dSAjay Kumar } 78096976c3dSAjay Kumar 781681c801eSGustavo Padovan #ifdef CONFIG_PM 782681c801eSGustavo Padovan static int exynos7_decon_suspend(struct device *dev) 783681c801eSGustavo Padovan { 784681c801eSGustavo Padovan struct decon_context *ctx = dev_get_drvdata(dev); 785681c801eSGustavo Padovan 786681c801eSGustavo Padovan clk_disable_unprepare(ctx->vclk); 787681c801eSGustavo Padovan clk_disable_unprepare(ctx->eclk); 788681c801eSGustavo Padovan clk_disable_unprepare(ctx->aclk); 789681c801eSGustavo Padovan clk_disable_unprepare(ctx->pclk); 790681c801eSGustavo Padovan 791681c801eSGustavo Padovan return 0; 792681c801eSGustavo Padovan } 793681c801eSGustavo Padovan 794681c801eSGustavo Padovan static int exynos7_decon_resume(struct device *dev) 795681c801eSGustavo Padovan { 796681c801eSGustavo Padovan struct decon_context *ctx = dev_get_drvdata(dev); 797681c801eSGustavo Padovan int ret; 798681c801eSGustavo Padovan 799681c801eSGustavo Padovan ret = clk_prepare_enable(ctx->pclk); 800681c801eSGustavo Padovan if (ret < 0) { 8016f83d208SInki Dae DRM_DEV_ERROR(dev, "Failed to prepare_enable the pclk [%d]\n", 8026f83d208SInki Dae ret); 803681c801eSGustavo Padovan return ret; 804681c801eSGustavo Padovan } 805681c801eSGustavo Padovan 806681c801eSGustavo Padovan ret = clk_prepare_enable(ctx->aclk); 807681c801eSGustavo Padovan if (ret < 0) { 8086f83d208SInki Dae DRM_DEV_ERROR(dev, "Failed to prepare_enable the aclk [%d]\n", 8096f83d208SInki Dae ret); 810681c801eSGustavo Padovan return ret; 811681c801eSGustavo Padovan } 812681c801eSGustavo Padovan 813681c801eSGustavo Padovan ret = clk_prepare_enable(ctx->eclk); 814681c801eSGustavo Padovan if (ret < 0) { 8156f83d208SInki Dae DRM_DEV_ERROR(dev, "Failed to prepare_enable the eclk [%d]\n", 8166f83d208SInki Dae ret); 817681c801eSGustavo Padovan return ret; 818681c801eSGustavo Padovan } 819681c801eSGustavo Padovan 820681c801eSGustavo Padovan ret = clk_prepare_enable(ctx->vclk); 821681c801eSGustavo Padovan if (ret < 0) { 8226f83d208SInki Dae DRM_DEV_ERROR(dev, "Failed to prepare_enable the vclk [%d]\n", 8236f83d208SInki Dae ret); 824681c801eSGustavo Padovan return ret; 825681c801eSGustavo Padovan } 826681c801eSGustavo Padovan 827681c801eSGustavo Padovan return 0; 828681c801eSGustavo Padovan } 829681c801eSGustavo Padovan #endif 830681c801eSGustavo Padovan 831681c801eSGustavo Padovan static const struct dev_pm_ops exynos7_decon_pm_ops = { 832681c801eSGustavo Padovan SET_RUNTIME_PM_OPS(exynos7_decon_suspend, exynos7_decon_resume, 833681c801eSGustavo Padovan NULL) 8347e915746SMarek Szyprowski SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 8357e915746SMarek Szyprowski pm_runtime_force_resume) 836681c801eSGustavo Padovan }; 837681c801eSGustavo Padovan 83896976c3dSAjay Kumar struct platform_driver decon_driver = { 83996976c3dSAjay Kumar .probe = decon_probe, 84096976c3dSAjay Kumar .remove = decon_remove, 84196976c3dSAjay Kumar .driver = { 84296976c3dSAjay Kumar .name = "exynos-decon", 843681c801eSGustavo Padovan .pm = &exynos7_decon_pm_ops, 84496976c3dSAjay Kumar .of_match_table = decon_driver_dt_match, 84596976c3dSAjay Kumar }, 84696976c3dSAjay Kumar }; 847