1f6ffbd4fSLucas Stach /* SPDX-License-Identifier: GPL-2.0 */ 2a8c21a54SThe etnaviv authors /* 3f6ffbd4fSLucas Stach * Copyright (C) 2015-2018 Etnaviv Project 4a8c21a54SThe etnaviv authors */ 5a8c21a54SThe etnaviv authors 6a8c21a54SThe etnaviv authors #ifndef __ETNAVIV_GPU_H__ 7a8c21a54SThe etnaviv authors #define __ETNAVIV_GPU_H__ 8a8c21a54SThe etnaviv authors 92f9225dbSLucas Stach #include "etnaviv_cmdbuf.h" 10a8c21a54SThe etnaviv authors #include "etnaviv_drv.h" 11a8c21a54SThe etnaviv authors 12a8c21a54SThe etnaviv authors struct etnaviv_gem_submit; 13b6325f40SRussell King struct etnaviv_vram_mapping; 14a8c21a54SThe etnaviv authors 15a8c21a54SThe etnaviv authors struct etnaviv_chip_identity { 16a8c21a54SThe etnaviv authors /* Chip model. */ 17a8c21a54SThe etnaviv authors u32 model; 18a8c21a54SThe etnaviv authors 19a8c21a54SThe etnaviv authors /* Revision value.*/ 20a8c21a54SThe etnaviv authors u32 revision; 21a8c21a54SThe etnaviv authors 22a8c21a54SThe etnaviv authors /* Supported feature fields. */ 23a8c21a54SThe etnaviv authors u32 features; 24a8c21a54SThe etnaviv authors 25a8c21a54SThe etnaviv authors /* Supported minor feature fields. */ 26a8c21a54SThe etnaviv authors u32 minor_features0; 27a8c21a54SThe etnaviv authors u32 minor_features1; 28a8c21a54SThe etnaviv authors u32 minor_features2; 29a8c21a54SThe etnaviv authors u32 minor_features3; 30602eb489SRussell King u32 minor_features4; 31602eb489SRussell King u32 minor_features5; 320538aaf9SLucas Stach u32 minor_features6; 330538aaf9SLucas Stach u32 minor_features7; 340538aaf9SLucas Stach u32 minor_features8; 350538aaf9SLucas Stach u32 minor_features9; 360538aaf9SLucas Stach u32 minor_features10; 370538aaf9SLucas Stach u32 minor_features11; 38602eb489SRussell King 39a8c21a54SThe etnaviv authors /* Number of streams supported. */ 40a8c21a54SThe etnaviv authors u32 stream_count; 41a8c21a54SThe etnaviv authors 42a8c21a54SThe etnaviv authors /* Total number of temporary registers per thread. */ 43a8c21a54SThe etnaviv authors u32 register_max; 44a8c21a54SThe etnaviv authors 45a8c21a54SThe etnaviv authors /* Maximum number of threads. */ 46a8c21a54SThe etnaviv authors u32 thread_count; 47a8c21a54SThe etnaviv authors 48a8c21a54SThe etnaviv authors /* Number of shader cores. */ 49a8c21a54SThe etnaviv authors u32 shader_core_count; 50a8c21a54SThe etnaviv authors 51a8c21a54SThe etnaviv authors /* Size of the vertex cache. */ 52a8c21a54SThe etnaviv authors u32 vertex_cache_size; 53a8c21a54SThe etnaviv authors 54a8c21a54SThe etnaviv authors /* Number of entries in the vertex output buffer. */ 55a8c21a54SThe etnaviv authors u32 vertex_output_buffer_size; 56a8c21a54SThe etnaviv authors 57a8c21a54SThe etnaviv authors /* Number of pixel pipes. */ 58a8c21a54SThe etnaviv authors u32 pixel_pipes; 59a8c21a54SThe etnaviv authors 60a8c21a54SThe etnaviv authors /* Number of instructions. */ 61a8c21a54SThe etnaviv authors u32 instruction_count; 62a8c21a54SThe etnaviv authors 63a8c21a54SThe etnaviv authors /* Number of constants. */ 64a8c21a54SThe etnaviv authors u32 num_constants; 65a8c21a54SThe etnaviv authors 66a8c21a54SThe etnaviv authors /* Buffer size */ 67a8c21a54SThe etnaviv authors u32 buffer_size; 68602eb489SRussell King 69602eb489SRussell King /* Number of varyings */ 70602eb489SRussell King u8 varyings_count; 71a8c21a54SThe etnaviv authors }; 72a8c21a54SThe etnaviv authors 73007ad58dSLucas Stach enum etnaviv_sec_mode { 74007ad58dSLucas Stach ETNA_SEC_NONE = 0, 75007ad58dSLucas Stach ETNA_SEC_KERNEL, 76007ad58dSLucas Stach ETNA_SEC_TZ 77007ad58dSLucas Stach }; 78007ad58dSLucas Stach 79a8c21a54SThe etnaviv authors struct etnaviv_event { 80f54d1867SChris Wilson struct dma_fence *fence; 81ef146c00SLucas Stach struct etnaviv_gem_submit *submit; 82357713ceSChristian Gmeiner 83357713ceSChristian Gmeiner void (*sync_point)(struct etnaviv_gpu *gpu, struct etnaviv_event *event); 84a8c21a54SThe etnaviv authors }; 85a8c21a54SThe etnaviv authors 86e66774ddSLucas Stach struct etnaviv_cmdbuf_suballoc; 87a8c21a54SThe etnaviv authors struct etnaviv_cmdbuf; 88f9d255f4SLucas Stach struct regulator; 89f9d255f4SLucas Stach struct clk; 90a8c21a54SThe etnaviv authors 91355502e0SChristian Gmeiner #define ETNA_NR_EVENTS 30 92355502e0SChristian Gmeiner 93a8c21a54SThe etnaviv authors struct etnaviv_gpu { 94a8c21a54SThe etnaviv authors struct drm_device *drm; 95bcdfb5e5SRussell King struct thermal_cooling_device *cooling; 96a8c21a54SThe etnaviv authors struct device *dev; 97a8c21a54SThe etnaviv authors struct mutex lock; 98a8c21a54SThe etnaviv authors struct etnaviv_chip_identity identity; 99007ad58dSLucas Stach enum etnaviv_sec_mode sec_mode; 100a8c21a54SThe etnaviv authors struct etnaviv_file_private *lastctx; 101a7790d78SLucas Stach struct workqueue_struct *wq; 102e93b6deeSLucas Stach struct drm_gpu_scheduler sched; 103a8c21a54SThe etnaviv authors 104a8c21a54SThe etnaviv authors /* 'ring'-buffer: */ 1052f9225dbSLucas Stach struct etnaviv_cmdbuf buffer; 106f6086311SRussell King int exec_state; 107a8c21a54SThe etnaviv authors 108a8c21a54SThe etnaviv authors /* bus base address of memory */ 109a8c21a54SThe etnaviv authors u32 memory_base; 110a8c21a54SThe etnaviv authors 111a8c21a54SThe etnaviv authors /* event management: */ 112355502e0SChristian Gmeiner DECLARE_BITMAP(event_bitmap, ETNA_NR_EVENTS); 113355502e0SChristian Gmeiner struct etnaviv_event event[ETNA_NR_EVENTS]; 114a8c21a54SThe etnaviv authors struct completion event_free; 115a8c21a54SThe etnaviv authors spinlock_t event_spinlock; 116a8c21a54SThe etnaviv authors 117a8c21a54SThe etnaviv authors u32 idle_mask; 118a8c21a54SThe etnaviv authors 119a8c21a54SThe etnaviv authors /* Fencing support */ 120a0780bb1SLucas Stach struct mutex fence_lock; 1218bc4d885SLucas Stach struct idr fence_idr; 122a8c21a54SThe etnaviv authors u32 next_fence; 123a8c21a54SThe etnaviv authors u32 completed_fence; 124a8c21a54SThe etnaviv authors wait_queue_head_t fence_event; 12576bf0db5SChristian König u64 fence_context; 126a8c21a54SThe etnaviv authors spinlock_t fence_spinlock; 127a8c21a54SThe etnaviv authors 128357713ceSChristian Gmeiner /* worker for handling 'sync' points: */ 129357713ceSChristian Gmeiner struct work_struct sync_point_work; 130357713ceSChristian Gmeiner int sync_point_event; 131357713ceSChristian Gmeiner 1322c83a726SLucas Stach /* hang detection */ 1332c83a726SLucas Stach u32 hangcheck_dma_addr; 1342c83a726SLucas Stach 135a8c21a54SThe etnaviv authors void __iomem *mmio; 136a8c21a54SThe etnaviv authors int irq; 137a8c21a54SThe etnaviv authors 138a8c21a54SThe etnaviv authors struct etnaviv_iommu *mmu; 139e66774ddSLucas Stach struct etnaviv_cmdbuf_suballoc *cmdbuf_suballoc; 140a8c21a54SThe etnaviv authors 141a8c21a54SThe etnaviv authors /* Power Control: */ 142a8c21a54SThe etnaviv authors struct clk *clk_bus; 14365f037e8SLucas Stach struct clk *clk_reg; 144a8c21a54SThe etnaviv authors struct clk *clk_core; 145a8c21a54SThe etnaviv authors struct clk *clk_shader; 146a8c21a54SThe etnaviv authors 147bcdfb5e5SRussell King unsigned int freq_scale; 148d79fd1ccSLucas Stach unsigned long base_rate_core; 149d79fd1ccSLucas Stach unsigned long base_rate_shader; 150a8c21a54SThe etnaviv authors }; 151a8c21a54SThe etnaviv authors 152a8c21a54SThe etnaviv authors static inline void gpu_write(struct etnaviv_gpu *gpu, u32 reg, u32 data) 153a8c21a54SThe etnaviv authors { 154a98b1e78SLucas Stach writel(data, gpu->mmio + reg); 155a8c21a54SThe etnaviv authors } 156a8c21a54SThe etnaviv authors 157a8c21a54SThe etnaviv authors static inline u32 gpu_read(struct etnaviv_gpu *gpu, u32 reg) 158a8c21a54SThe etnaviv authors { 159a98b1e78SLucas Stach return readl(gpu->mmio + reg); 160a8c21a54SThe etnaviv authors } 161a8c21a54SThe etnaviv authors 162a8c21a54SThe etnaviv authors int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value); 163a8c21a54SThe etnaviv authors 164a8c21a54SThe etnaviv authors int etnaviv_gpu_init(struct etnaviv_gpu *gpu); 165681c19c8SLucas Stach bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu); 166a8c21a54SThe etnaviv authors 167a8c21a54SThe etnaviv authors #ifdef CONFIG_DEBUG_FS 168a8c21a54SThe etnaviv authors int etnaviv_gpu_debugfs(struct etnaviv_gpu *gpu, struct seq_file *m); 169a8c21a54SThe etnaviv authors #endif 170a8c21a54SThe etnaviv authors 1716d7a20c0SLucas Stach void etnaviv_gpu_recover_hang(struct etnaviv_gpu *gpu); 172a8c21a54SThe etnaviv authors void etnaviv_gpu_retire(struct etnaviv_gpu *gpu); 173a8c21a54SThe etnaviv authors int etnaviv_gpu_wait_fence_interruptible(struct etnaviv_gpu *gpu, 174a8c21a54SThe etnaviv authors u32 fence, struct timespec *timeout); 175a8c21a54SThe etnaviv authors int etnaviv_gpu_wait_obj_inactive(struct etnaviv_gpu *gpu, 176a8c21a54SThe etnaviv authors struct etnaviv_gem_object *etnaviv_obj, struct timespec *timeout); 177e93b6deeSLucas Stach struct dma_fence *etnaviv_gpu_submit(struct etnaviv_gem_submit *submit); 178a8c21a54SThe etnaviv authors int etnaviv_gpu_pm_get_sync(struct etnaviv_gpu *gpu); 179a8c21a54SThe etnaviv authors void etnaviv_gpu_pm_put(struct etnaviv_gpu *gpu); 180b88163e3SLucas Stach int etnaviv_gpu_wait_idle(struct etnaviv_gpu *gpu, unsigned int timeout_ms); 181229855b6SLucas Stach void etnaviv_gpu_start_fe(struct etnaviv_gpu *gpu, u32 address, u16 prefetch); 182a8c21a54SThe etnaviv authors 183a8c21a54SThe etnaviv authors extern struct platform_driver etnaviv_gpu_driver; 184a8c21a54SThe etnaviv authors 185a8c21a54SThe etnaviv authors #endif /* __ETNAVIV_GPU_H__ */ 186