1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2015-2018 Etnaviv Project 4 */ 5 6 #include <linux/component.h> 7 #include <linux/of_platform.h> 8 #include <drm/drm_of.h> 9 10 #include "etnaviv_cmdbuf.h" 11 #include "etnaviv_drv.h" 12 #include "etnaviv_gpu.h" 13 #include "etnaviv_gem.h" 14 #include "etnaviv_mmu.h" 15 #include "etnaviv_perfmon.h" 16 17 /* 18 * DRM operations: 19 */ 20 21 22 static void load_gpu(struct drm_device *dev) 23 { 24 struct etnaviv_drm_private *priv = dev->dev_private; 25 unsigned int i; 26 27 for (i = 0; i < ETNA_MAX_PIPES; i++) { 28 struct etnaviv_gpu *g = priv->gpu[i]; 29 30 if (g) { 31 int ret; 32 33 ret = etnaviv_gpu_init(g); 34 if (ret) 35 priv->gpu[i] = NULL; 36 } 37 } 38 } 39 40 static int etnaviv_open(struct drm_device *dev, struct drm_file *file) 41 { 42 struct etnaviv_drm_private *priv = dev->dev_private; 43 struct etnaviv_file_private *ctx; 44 int i; 45 46 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 47 if (!ctx) 48 return -ENOMEM; 49 50 for (i = 0; i < ETNA_MAX_PIPES; i++) { 51 struct etnaviv_gpu *gpu = priv->gpu[i]; 52 53 if (gpu) { 54 drm_sched_entity_init(&gpu->sched, 55 &ctx->sched_entity[i], 56 &gpu->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL], 57 NULL); 58 } 59 } 60 61 file->driver_priv = ctx; 62 63 return 0; 64 } 65 66 static void etnaviv_postclose(struct drm_device *dev, struct drm_file *file) 67 { 68 struct etnaviv_drm_private *priv = dev->dev_private; 69 struct etnaviv_file_private *ctx = file->driver_priv; 70 unsigned int i; 71 72 for (i = 0; i < ETNA_MAX_PIPES; i++) { 73 struct etnaviv_gpu *gpu = priv->gpu[i]; 74 75 if (gpu) { 76 mutex_lock(&gpu->lock); 77 if (gpu->lastctx == ctx) 78 gpu->lastctx = NULL; 79 mutex_unlock(&gpu->lock); 80 81 drm_sched_entity_fini(&gpu->sched, 82 &ctx->sched_entity[i]); 83 } 84 } 85 86 kfree(ctx); 87 } 88 89 /* 90 * DRM debugfs: 91 */ 92 93 #ifdef CONFIG_DEBUG_FS 94 static int etnaviv_gem_show(struct drm_device *dev, struct seq_file *m) 95 { 96 struct etnaviv_drm_private *priv = dev->dev_private; 97 98 etnaviv_gem_describe_objects(priv, m); 99 100 return 0; 101 } 102 103 static int etnaviv_mm_show(struct drm_device *dev, struct seq_file *m) 104 { 105 struct drm_printer p = drm_seq_file_printer(m); 106 107 read_lock(&dev->vma_offset_manager->vm_lock); 108 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); 109 read_unlock(&dev->vma_offset_manager->vm_lock); 110 111 return 0; 112 } 113 114 static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m) 115 { 116 struct drm_printer p = drm_seq_file_printer(m); 117 118 seq_printf(m, "Active Objects (%s):\n", dev_name(gpu->dev)); 119 120 mutex_lock(&gpu->mmu->lock); 121 drm_mm_print(&gpu->mmu->mm, &p); 122 mutex_unlock(&gpu->mmu->lock); 123 124 return 0; 125 } 126 127 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m) 128 { 129 struct etnaviv_cmdbuf *buf = &gpu->buffer; 130 u32 size = buf->size; 131 u32 *ptr = buf->vaddr; 132 u32 i; 133 134 seq_printf(m, "virt %p - phys 0x%llx - free 0x%08x\n", 135 buf->vaddr, (u64)etnaviv_cmdbuf_get_pa(buf), 136 size - buf->user_size); 137 138 for (i = 0; i < size / 4; i++) { 139 if (i && !(i % 4)) 140 seq_puts(m, "\n"); 141 if (i % 4 == 0) 142 seq_printf(m, "\t0x%p: ", ptr + i); 143 seq_printf(m, "%08x ", *(ptr + i)); 144 } 145 seq_puts(m, "\n"); 146 } 147 148 static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m) 149 { 150 seq_printf(m, "Ring Buffer (%s): ", dev_name(gpu->dev)); 151 152 mutex_lock(&gpu->lock); 153 etnaviv_buffer_dump(gpu, m); 154 mutex_unlock(&gpu->lock); 155 156 return 0; 157 } 158 159 static int show_unlocked(struct seq_file *m, void *arg) 160 { 161 struct drm_info_node *node = (struct drm_info_node *) m->private; 162 struct drm_device *dev = node->minor->dev; 163 int (*show)(struct drm_device *dev, struct seq_file *m) = 164 node->info_ent->data; 165 166 return show(dev, m); 167 } 168 169 static int show_each_gpu(struct seq_file *m, void *arg) 170 { 171 struct drm_info_node *node = (struct drm_info_node *) m->private; 172 struct drm_device *dev = node->minor->dev; 173 struct etnaviv_drm_private *priv = dev->dev_private; 174 struct etnaviv_gpu *gpu; 175 int (*show)(struct etnaviv_gpu *gpu, struct seq_file *m) = 176 node->info_ent->data; 177 unsigned int i; 178 int ret = 0; 179 180 for (i = 0; i < ETNA_MAX_PIPES; i++) { 181 gpu = priv->gpu[i]; 182 if (!gpu) 183 continue; 184 185 ret = show(gpu, m); 186 if (ret < 0) 187 break; 188 } 189 190 return ret; 191 } 192 193 static struct drm_info_list etnaviv_debugfs_list[] = { 194 {"gpu", show_each_gpu, 0, etnaviv_gpu_debugfs}, 195 {"gem", show_unlocked, 0, etnaviv_gem_show}, 196 { "mm", show_unlocked, 0, etnaviv_mm_show }, 197 {"mmu", show_each_gpu, 0, etnaviv_mmu_show}, 198 {"ring", show_each_gpu, 0, etnaviv_ring_show}, 199 }; 200 201 static int etnaviv_debugfs_init(struct drm_minor *minor) 202 { 203 struct drm_device *dev = minor->dev; 204 int ret; 205 206 ret = drm_debugfs_create_files(etnaviv_debugfs_list, 207 ARRAY_SIZE(etnaviv_debugfs_list), 208 minor->debugfs_root, minor); 209 210 if (ret) { 211 dev_err(dev->dev, "could not install etnaviv_debugfs_list\n"); 212 return ret; 213 } 214 215 return ret; 216 } 217 #endif 218 219 /* 220 * DRM ioctls: 221 */ 222 223 static int etnaviv_ioctl_get_param(struct drm_device *dev, void *data, 224 struct drm_file *file) 225 { 226 struct etnaviv_drm_private *priv = dev->dev_private; 227 struct drm_etnaviv_param *args = data; 228 struct etnaviv_gpu *gpu; 229 230 if (args->pipe >= ETNA_MAX_PIPES) 231 return -EINVAL; 232 233 gpu = priv->gpu[args->pipe]; 234 if (!gpu) 235 return -ENXIO; 236 237 return etnaviv_gpu_get_param(gpu, args->param, &args->value); 238 } 239 240 static int etnaviv_ioctl_gem_new(struct drm_device *dev, void *data, 241 struct drm_file *file) 242 { 243 struct drm_etnaviv_gem_new *args = data; 244 245 if (args->flags & ~(ETNA_BO_CACHED | ETNA_BO_WC | ETNA_BO_UNCACHED | 246 ETNA_BO_FORCE_MMU)) 247 return -EINVAL; 248 249 return etnaviv_gem_new_handle(dev, file, args->size, 250 args->flags, &args->handle); 251 } 252 253 #define TS(t) ((struct timespec){ \ 254 .tv_sec = (t).tv_sec, \ 255 .tv_nsec = (t).tv_nsec \ 256 }) 257 258 static int etnaviv_ioctl_gem_cpu_prep(struct drm_device *dev, void *data, 259 struct drm_file *file) 260 { 261 struct drm_etnaviv_gem_cpu_prep *args = data; 262 struct drm_gem_object *obj; 263 int ret; 264 265 if (args->op & ~(ETNA_PREP_READ | ETNA_PREP_WRITE | ETNA_PREP_NOSYNC)) 266 return -EINVAL; 267 268 obj = drm_gem_object_lookup(file, args->handle); 269 if (!obj) 270 return -ENOENT; 271 272 ret = etnaviv_gem_cpu_prep(obj, args->op, &TS(args->timeout)); 273 274 drm_gem_object_put_unlocked(obj); 275 276 return ret; 277 } 278 279 static int etnaviv_ioctl_gem_cpu_fini(struct drm_device *dev, void *data, 280 struct drm_file *file) 281 { 282 struct drm_etnaviv_gem_cpu_fini *args = data; 283 struct drm_gem_object *obj; 284 int ret; 285 286 if (args->flags) 287 return -EINVAL; 288 289 obj = drm_gem_object_lookup(file, args->handle); 290 if (!obj) 291 return -ENOENT; 292 293 ret = etnaviv_gem_cpu_fini(obj); 294 295 drm_gem_object_put_unlocked(obj); 296 297 return ret; 298 } 299 300 static int etnaviv_ioctl_gem_info(struct drm_device *dev, void *data, 301 struct drm_file *file) 302 { 303 struct drm_etnaviv_gem_info *args = data; 304 struct drm_gem_object *obj; 305 int ret; 306 307 if (args->pad) 308 return -EINVAL; 309 310 obj = drm_gem_object_lookup(file, args->handle); 311 if (!obj) 312 return -ENOENT; 313 314 ret = etnaviv_gem_mmap_offset(obj, &args->offset); 315 drm_gem_object_put_unlocked(obj); 316 317 return ret; 318 } 319 320 static int etnaviv_ioctl_wait_fence(struct drm_device *dev, void *data, 321 struct drm_file *file) 322 { 323 struct drm_etnaviv_wait_fence *args = data; 324 struct etnaviv_drm_private *priv = dev->dev_private; 325 struct timespec *timeout = &TS(args->timeout); 326 struct etnaviv_gpu *gpu; 327 328 if (args->flags & ~(ETNA_WAIT_NONBLOCK)) 329 return -EINVAL; 330 331 if (args->pipe >= ETNA_MAX_PIPES) 332 return -EINVAL; 333 334 gpu = priv->gpu[args->pipe]; 335 if (!gpu) 336 return -ENXIO; 337 338 if (args->flags & ETNA_WAIT_NONBLOCK) 339 timeout = NULL; 340 341 return etnaviv_gpu_wait_fence_interruptible(gpu, args->fence, 342 timeout); 343 } 344 345 static int etnaviv_ioctl_gem_userptr(struct drm_device *dev, void *data, 346 struct drm_file *file) 347 { 348 struct drm_etnaviv_gem_userptr *args = data; 349 int access; 350 351 if (args->flags & ~(ETNA_USERPTR_READ|ETNA_USERPTR_WRITE) || 352 args->flags == 0) 353 return -EINVAL; 354 355 if (offset_in_page(args->user_ptr | args->user_size) || 356 (uintptr_t)args->user_ptr != args->user_ptr || 357 (u32)args->user_size != args->user_size || 358 args->user_ptr & ~PAGE_MASK) 359 return -EINVAL; 360 361 if (args->flags & ETNA_USERPTR_WRITE) 362 access = VERIFY_WRITE; 363 else 364 access = VERIFY_READ; 365 366 if (!access_ok(access, (void __user *)(unsigned long)args->user_ptr, 367 args->user_size)) 368 return -EFAULT; 369 370 return etnaviv_gem_new_userptr(dev, file, args->user_ptr, 371 args->user_size, args->flags, 372 &args->handle); 373 } 374 375 static int etnaviv_ioctl_gem_wait(struct drm_device *dev, void *data, 376 struct drm_file *file) 377 { 378 struct etnaviv_drm_private *priv = dev->dev_private; 379 struct drm_etnaviv_gem_wait *args = data; 380 struct timespec *timeout = &TS(args->timeout); 381 struct drm_gem_object *obj; 382 struct etnaviv_gpu *gpu; 383 int ret; 384 385 if (args->flags & ~(ETNA_WAIT_NONBLOCK)) 386 return -EINVAL; 387 388 if (args->pipe >= ETNA_MAX_PIPES) 389 return -EINVAL; 390 391 gpu = priv->gpu[args->pipe]; 392 if (!gpu) 393 return -ENXIO; 394 395 obj = drm_gem_object_lookup(file, args->handle); 396 if (!obj) 397 return -ENOENT; 398 399 if (args->flags & ETNA_WAIT_NONBLOCK) 400 timeout = NULL; 401 402 ret = etnaviv_gem_wait_bo(gpu, obj, timeout); 403 404 drm_gem_object_put_unlocked(obj); 405 406 return ret; 407 } 408 409 static int etnaviv_ioctl_pm_query_dom(struct drm_device *dev, void *data, 410 struct drm_file *file) 411 { 412 struct etnaviv_drm_private *priv = dev->dev_private; 413 struct drm_etnaviv_pm_domain *args = data; 414 struct etnaviv_gpu *gpu; 415 416 if (args->pipe >= ETNA_MAX_PIPES) 417 return -EINVAL; 418 419 gpu = priv->gpu[args->pipe]; 420 if (!gpu) 421 return -ENXIO; 422 423 return etnaviv_pm_query_dom(gpu, args); 424 } 425 426 static int etnaviv_ioctl_pm_query_sig(struct drm_device *dev, void *data, 427 struct drm_file *file) 428 { 429 struct etnaviv_drm_private *priv = dev->dev_private; 430 struct drm_etnaviv_pm_signal *args = data; 431 struct etnaviv_gpu *gpu; 432 433 if (args->pipe >= ETNA_MAX_PIPES) 434 return -EINVAL; 435 436 gpu = priv->gpu[args->pipe]; 437 if (!gpu) 438 return -ENXIO; 439 440 return etnaviv_pm_query_sig(gpu, args); 441 } 442 443 static const struct drm_ioctl_desc etnaviv_ioctls[] = { 444 #define ETNA_IOCTL(n, func, flags) \ 445 DRM_IOCTL_DEF_DRV(ETNAVIV_##n, etnaviv_ioctl_##func, flags) 446 ETNA_IOCTL(GET_PARAM, get_param, DRM_AUTH|DRM_RENDER_ALLOW), 447 ETNA_IOCTL(GEM_NEW, gem_new, DRM_AUTH|DRM_RENDER_ALLOW), 448 ETNA_IOCTL(GEM_INFO, gem_info, DRM_AUTH|DRM_RENDER_ALLOW), 449 ETNA_IOCTL(GEM_CPU_PREP, gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), 450 ETNA_IOCTL(GEM_CPU_FINI, gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), 451 ETNA_IOCTL(GEM_SUBMIT, gem_submit, DRM_AUTH|DRM_RENDER_ALLOW), 452 ETNA_IOCTL(WAIT_FENCE, wait_fence, DRM_AUTH|DRM_RENDER_ALLOW), 453 ETNA_IOCTL(GEM_USERPTR, gem_userptr, DRM_AUTH|DRM_RENDER_ALLOW), 454 ETNA_IOCTL(GEM_WAIT, gem_wait, DRM_AUTH|DRM_RENDER_ALLOW), 455 ETNA_IOCTL(PM_QUERY_DOM, pm_query_dom, DRM_AUTH|DRM_RENDER_ALLOW), 456 ETNA_IOCTL(PM_QUERY_SIG, pm_query_sig, DRM_AUTH|DRM_RENDER_ALLOW), 457 }; 458 459 static const struct vm_operations_struct vm_ops = { 460 .fault = etnaviv_gem_fault, 461 .open = drm_gem_vm_open, 462 .close = drm_gem_vm_close, 463 }; 464 465 static const struct file_operations fops = { 466 .owner = THIS_MODULE, 467 .open = drm_open, 468 .release = drm_release, 469 .unlocked_ioctl = drm_ioctl, 470 .compat_ioctl = drm_compat_ioctl, 471 .poll = drm_poll, 472 .read = drm_read, 473 .llseek = no_llseek, 474 .mmap = etnaviv_gem_mmap, 475 }; 476 477 static struct drm_driver etnaviv_drm_driver = { 478 .driver_features = DRIVER_GEM | 479 DRIVER_PRIME | 480 DRIVER_RENDER, 481 .open = etnaviv_open, 482 .postclose = etnaviv_postclose, 483 .gem_free_object_unlocked = etnaviv_gem_free_object, 484 .gem_vm_ops = &vm_ops, 485 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 486 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 487 .gem_prime_export = drm_gem_prime_export, 488 .gem_prime_import = drm_gem_prime_import, 489 .gem_prime_res_obj = etnaviv_gem_prime_res_obj, 490 .gem_prime_pin = etnaviv_gem_prime_pin, 491 .gem_prime_unpin = etnaviv_gem_prime_unpin, 492 .gem_prime_get_sg_table = etnaviv_gem_prime_get_sg_table, 493 .gem_prime_import_sg_table = etnaviv_gem_prime_import_sg_table, 494 .gem_prime_vmap = etnaviv_gem_prime_vmap, 495 .gem_prime_vunmap = etnaviv_gem_prime_vunmap, 496 .gem_prime_mmap = etnaviv_gem_prime_mmap, 497 #ifdef CONFIG_DEBUG_FS 498 .debugfs_init = etnaviv_debugfs_init, 499 #endif 500 .ioctls = etnaviv_ioctls, 501 .num_ioctls = DRM_ETNAVIV_NUM_IOCTLS, 502 .fops = &fops, 503 .name = "etnaviv", 504 .desc = "etnaviv DRM", 505 .date = "20151214", 506 .major = 1, 507 .minor = 2, 508 }; 509 510 /* 511 * Platform driver: 512 */ 513 static int etnaviv_bind(struct device *dev) 514 { 515 struct etnaviv_drm_private *priv; 516 struct drm_device *drm; 517 int ret; 518 519 drm = drm_dev_alloc(&etnaviv_drm_driver, dev); 520 if (IS_ERR(drm)) 521 return PTR_ERR(drm); 522 523 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 524 if (!priv) { 525 dev_err(dev, "failed to allocate private data\n"); 526 ret = -ENOMEM; 527 goto out_unref; 528 } 529 drm->dev_private = priv; 530 531 mutex_init(&priv->gem_lock); 532 INIT_LIST_HEAD(&priv->gem_list); 533 priv->num_gpus = 0; 534 535 dev_set_drvdata(dev, drm); 536 537 ret = component_bind_all(dev, drm); 538 if (ret < 0) 539 goto out_bind; 540 541 load_gpu(drm); 542 543 ret = drm_dev_register(drm, 0); 544 if (ret) 545 goto out_register; 546 547 return 0; 548 549 out_register: 550 component_unbind_all(dev, drm); 551 out_bind: 552 kfree(priv); 553 out_unref: 554 drm_dev_unref(drm); 555 556 return ret; 557 } 558 559 static void etnaviv_unbind(struct device *dev) 560 { 561 struct drm_device *drm = dev_get_drvdata(dev); 562 struct etnaviv_drm_private *priv = drm->dev_private; 563 564 drm_dev_unregister(drm); 565 566 component_unbind_all(dev, drm); 567 568 drm->dev_private = NULL; 569 kfree(priv); 570 571 drm_dev_unref(drm); 572 } 573 574 static const struct component_master_ops etnaviv_master_ops = { 575 .bind = etnaviv_bind, 576 .unbind = etnaviv_unbind, 577 }; 578 579 static int compare_of(struct device *dev, void *data) 580 { 581 struct device_node *np = data; 582 583 return dev->of_node == np; 584 } 585 586 static int compare_str(struct device *dev, void *data) 587 { 588 return !strcmp(dev_name(dev), data); 589 } 590 591 static int etnaviv_pdev_probe(struct platform_device *pdev) 592 { 593 struct device *dev = &pdev->dev; 594 struct component_match *match = NULL; 595 596 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 597 598 if (!dev->platform_data) { 599 struct device_node *core_node; 600 601 for_each_compatible_node(core_node, NULL, "vivante,gc") { 602 if (!of_device_is_available(core_node)) 603 continue; 604 605 drm_of_component_match_add(&pdev->dev, &match, 606 compare_of, core_node); 607 } 608 } else { 609 char **names = dev->platform_data; 610 unsigned i; 611 612 for (i = 0; names[i]; i++) 613 component_match_add(dev, &match, compare_str, names[i]); 614 } 615 616 return component_master_add_with_match(dev, &etnaviv_master_ops, match); 617 } 618 619 static int etnaviv_pdev_remove(struct platform_device *pdev) 620 { 621 component_master_del(&pdev->dev, &etnaviv_master_ops); 622 623 return 0; 624 } 625 626 static struct platform_driver etnaviv_platform_driver = { 627 .probe = etnaviv_pdev_probe, 628 .remove = etnaviv_pdev_remove, 629 .driver = { 630 .name = "etnaviv", 631 }, 632 }; 633 634 static struct platform_device *etnaviv_drm; 635 636 static int __init etnaviv_init(void) 637 { 638 struct platform_device *pdev; 639 int ret; 640 struct device_node *np; 641 642 etnaviv_validate_init(); 643 644 ret = platform_driver_register(&etnaviv_gpu_driver); 645 if (ret != 0) 646 return ret; 647 648 ret = platform_driver_register(&etnaviv_platform_driver); 649 if (ret != 0) 650 goto unregister_gpu_driver; 651 652 /* 653 * If the DT contains at least one available GPU device, instantiate 654 * the DRM platform device. 655 */ 656 for_each_compatible_node(np, NULL, "vivante,gc") { 657 if (!of_device_is_available(np)) 658 continue; 659 pdev = platform_device_register_simple("etnaviv", -1, 660 NULL, 0); 661 if (IS_ERR(pdev)) { 662 ret = PTR_ERR(pdev); 663 of_node_put(np); 664 goto unregister_platform_driver; 665 } 666 etnaviv_drm = pdev; 667 of_node_put(np); 668 break; 669 } 670 671 return 0; 672 673 unregister_platform_driver: 674 platform_driver_unregister(&etnaviv_platform_driver); 675 unregister_gpu_driver: 676 platform_driver_unregister(&etnaviv_gpu_driver); 677 return ret; 678 } 679 module_init(etnaviv_init); 680 681 static void __exit etnaviv_exit(void) 682 { 683 platform_device_unregister(etnaviv_drm); 684 platform_driver_unregister(&etnaviv_platform_driver); 685 platform_driver_unregister(&etnaviv_gpu_driver); 686 } 687 module_exit(etnaviv_exit); 688 689 MODULE_AUTHOR("Christian Gmeiner <christian.gmeiner@gmail.com>"); 690 MODULE_AUTHOR("Russell King <rmk+kernel@arm.linux.org.uk>"); 691 MODULE_AUTHOR("Lucas Stach <l.stach@pengutronix.de>"); 692 MODULE_DESCRIPTION("etnaviv DRM Driver"); 693 MODULE_LICENSE("GPL v2"); 694 MODULE_ALIAS("platform:etnaviv"); 695