1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2015-2018 Etnaviv Project 4 */ 5 6 #include <linux/component.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/module.h> 9 #include <linux/of_platform.h> 10 #include <linux/uaccess.h> 11 12 #include <drm/drm_debugfs.h> 13 #include <drm/drm_drv.h> 14 #include <drm/drm_file.h> 15 #include <drm/drm_ioctl.h> 16 #include <drm/drm_of.h> 17 #include <drm/drm_prime.h> 18 19 #include "etnaviv_cmdbuf.h" 20 #include "etnaviv_drv.h" 21 #include "etnaviv_gpu.h" 22 #include "etnaviv_gem.h" 23 #include "etnaviv_mmu.h" 24 #include "etnaviv_perfmon.h" 25 26 /* 27 * DRM operations: 28 */ 29 30 31 static void load_gpu(struct drm_device *dev) 32 { 33 struct etnaviv_drm_private *priv = dev->dev_private; 34 unsigned int i; 35 36 for (i = 0; i < ETNA_MAX_PIPES; i++) { 37 struct etnaviv_gpu *g = priv->gpu[i]; 38 39 if (g) { 40 int ret; 41 42 ret = etnaviv_gpu_init(g); 43 if (ret) 44 priv->gpu[i] = NULL; 45 } 46 } 47 } 48 49 static int etnaviv_open(struct drm_device *dev, struct drm_file *file) 50 { 51 struct etnaviv_drm_private *priv = dev->dev_private; 52 struct etnaviv_file_private *ctx; 53 int ret, i; 54 55 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 56 if (!ctx) 57 return -ENOMEM; 58 59 ctx->mmu = etnaviv_iommu_context_init(priv->mmu_global, 60 priv->cmdbuf_suballoc); 61 if (!ctx->mmu) { 62 ret = -ENOMEM; 63 goto out_free; 64 } 65 66 for (i = 0; i < ETNA_MAX_PIPES; i++) { 67 struct etnaviv_gpu *gpu = priv->gpu[i]; 68 struct drm_gpu_scheduler *sched; 69 70 if (gpu) { 71 sched = &gpu->sched; 72 drm_sched_entity_init(&ctx->sched_entity[i], 73 DRM_SCHED_PRIORITY_NORMAL, &sched, 74 1, NULL); 75 } 76 } 77 78 file->driver_priv = ctx; 79 80 return 0; 81 82 out_free: 83 kfree(ctx); 84 return ret; 85 } 86 87 static void etnaviv_postclose(struct drm_device *dev, struct drm_file *file) 88 { 89 struct etnaviv_drm_private *priv = dev->dev_private; 90 struct etnaviv_file_private *ctx = file->driver_priv; 91 unsigned int i; 92 93 for (i = 0; i < ETNA_MAX_PIPES; i++) { 94 struct etnaviv_gpu *gpu = priv->gpu[i]; 95 96 if (gpu) 97 drm_sched_entity_destroy(&ctx->sched_entity[i]); 98 } 99 100 etnaviv_iommu_context_put(ctx->mmu); 101 102 kfree(ctx); 103 } 104 105 /* 106 * DRM debugfs: 107 */ 108 109 #ifdef CONFIG_DEBUG_FS 110 static int etnaviv_gem_show(struct drm_device *dev, struct seq_file *m) 111 { 112 struct etnaviv_drm_private *priv = dev->dev_private; 113 114 etnaviv_gem_describe_objects(priv, m); 115 116 return 0; 117 } 118 119 static int etnaviv_mm_show(struct drm_device *dev, struct seq_file *m) 120 { 121 struct drm_printer p = drm_seq_file_printer(m); 122 123 read_lock(&dev->vma_offset_manager->vm_lock); 124 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); 125 read_unlock(&dev->vma_offset_manager->vm_lock); 126 127 return 0; 128 } 129 130 static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m) 131 { 132 struct drm_printer p = drm_seq_file_printer(m); 133 struct etnaviv_iommu_context *mmu_context; 134 135 seq_printf(m, "Active Objects (%s):\n", dev_name(gpu->dev)); 136 137 /* 138 * Lock the GPU to avoid a MMU context switch just now and elevate 139 * the refcount of the current context to avoid it disappearing from 140 * under our feet. 141 */ 142 mutex_lock(&gpu->lock); 143 mmu_context = gpu->mmu_context; 144 if (mmu_context) 145 etnaviv_iommu_context_get(mmu_context); 146 mutex_unlock(&gpu->lock); 147 148 if (!mmu_context) 149 return 0; 150 151 mutex_lock(&mmu_context->lock); 152 drm_mm_print(&mmu_context->mm, &p); 153 mutex_unlock(&mmu_context->lock); 154 155 etnaviv_iommu_context_put(mmu_context); 156 157 return 0; 158 } 159 160 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m) 161 { 162 struct etnaviv_cmdbuf *buf = &gpu->buffer; 163 u32 size = buf->size; 164 u32 *ptr = buf->vaddr; 165 u32 i; 166 167 seq_printf(m, "virt %p - phys 0x%llx - free 0x%08x\n", 168 buf->vaddr, (u64)etnaviv_cmdbuf_get_pa(buf), 169 size - buf->user_size); 170 171 for (i = 0; i < size / 4; i++) { 172 if (i && !(i % 4)) 173 seq_puts(m, "\n"); 174 if (i % 4 == 0) 175 seq_printf(m, "\t0x%p: ", ptr + i); 176 seq_printf(m, "%08x ", *(ptr + i)); 177 } 178 seq_puts(m, "\n"); 179 } 180 181 static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m) 182 { 183 seq_printf(m, "Ring Buffer (%s): ", dev_name(gpu->dev)); 184 185 mutex_lock(&gpu->lock); 186 etnaviv_buffer_dump(gpu, m); 187 mutex_unlock(&gpu->lock); 188 189 return 0; 190 } 191 192 static int show_unlocked(struct seq_file *m, void *arg) 193 { 194 struct drm_info_node *node = (struct drm_info_node *) m->private; 195 struct drm_device *dev = node->minor->dev; 196 int (*show)(struct drm_device *dev, struct seq_file *m) = 197 node->info_ent->data; 198 199 return show(dev, m); 200 } 201 202 static int show_each_gpu(struct seq_file *m, void *arg) 203 { 204 struct drm_info_node *node = (struct drm_info_node *) m->private; 205 struct drm_device *dev = node->minor->dev; 206 struct etnaviv_drm_private *priv = dev->dev_private; 207 struct etnaviv_gpu *gpu; 208 int (*show)(struct etnaviv_gpu *gpu, struct seq_file *m) = 209 node->info_ent->data; 210 unsigned int i; 211 int ret = 0; 212 213 for (i = 0; i < ETNA_MAX_PIPES; i++) { 214 gpu = priv->gpu[i]; 215 if (!gpu) 216 continue; 217 218 ret = show(gpu, m); 219 if (ret < 0) 220 break; 221 } 222 223 return ret; 224 } 225 226 static struct drm_info_list etnaviv_debugfs_list[] = { 227 {"gpu", show_each_gpu, 0, etnaviv_gpu_debugfs}, 228 {"gem", show_unlocked, 0, etnaviv_gem_show}, 229 { "mm", show_unlocked, 0, etnaviv_mm_show }, 230 {"mmu", show_each_gpu, 0, etnaviv_mmu_show}, 231 {"ring", show_each_gpu, 0, etnaviv_ring_show}, 232 }; 233 234 static int etnaviv_debugfs_init(struct drm_minor *minor) 235 { 236 struct drm_device *dev = minor->dev; 237 int ret; 238 239 ret = drm_debugfs_create_files(etnaviv_debugfs_list, 240 ARRAY_SIZE(etnaviv_debugfs_list), 241 minor->debugfs_root, minor); 242 243 if (ret) { 244 dev_err(dev->dev, "could not install etnaviv_debugfs_list\n"); 245 return ret; 246 } 247 248 return ret; 249 } 250 #endif 251 252 /* 253 * DRM ioctls: 254 */ 255 256 static int etnaviv_ioctl_get_param(struct drm_device *dev, void *data, 257 struct drm_file *file) 258 { 259 struct etnaviv_drm_private *priv = dev->dev_private; 260 struct drm_etnaviv_param *args = data; 261 struct etnaviv_gpu *gpu; 262 263 if (args->pipe >= ETNA_MAX_PIPES) 264 return -EINVAL; 265 266 gpu = priv->gpu[args->pipe]; 267 if (!gpu) 268 return -ENXIO; 269 270 return etnaviv_gpu_get_param(gpu, args->param, &args->value); 271 } 272 273 static int etnaviv_ioctl_gem_new(struct drm_device *dev, void *data, 274 struct drm_file *file) 275 { 276 struct drm_etnaviv_gem_new *args = data; 277 278 if (args->flags & ~(ETNA_BO_CACHED | ETNA_BO_WC | ETNA_BO_UNCACHED | 279 ETNA_BO_FORCE_MMU)) 280 return -EINVAL; 281 282 return etnaviv_gem_new_handle(dev, file, args->size, 283 args->flags, &args->handle); 284 } 285 286 #define TS(t) ((struct timespec){ \ 287 .tv_sec = (t).tv_sec, \ 288 .tv_nsec = (t).tv_nsec \ 289 }) 290 291 static int etnaviv_ioctl_gem_cpu_prep(struct drm_device *dev, void *data, 292 struct drm_file *file) 293 { 294 struct drm_etnaviv_gem_cpu_prep *args = data; 295 struct drm_gem_object *obj; 296 int ret; 297 298 if (args->op & ~(ETNA_PREP_READ | ETNA_PREP_WRITE | ETNA_PREP_NOSYNC)) 299 return -EINVAL; 300 301 obj = drm_gem_object_lookup(file, args->handle); 302 if (!obj) 303 return -ENOENT; 304 305 ret = etnaviv_gem_cpu_prep(obj, args->op, &TS(args->timeout)); 306 307 drm_gem_object_put_unlocked(obj); 308 309 return ret; 310 } 311 312 static int etnaviv_ioctl_gem_cpu_fini(struct drm_device *dev, void *data, 313 struct drm_file *file) 314 { 315 struct drm_etnaviv_gem_cpu_fini *args = data; 316 struct drm_gem_object *obj; 317 int ret; 318 319 if (args->flags) 320 return -EINVAL; 321 322 obj = drm_gem_object_lookup(file, args->handle); 323 if (!obj) 324 return -ENOENT; 325 326 ret = etnaviv_gem_cpu_fini(obj); 327 328 drm_gem_object_put_unlocked(obj); 329 330 return ret; 331 } 332 333 static int etnaviv_ioctl_gem_info(struct drm_device *dev, void *data, 334 struct drm_file *file) 335 { 336 struct drm_etnaviv_gem_info *args = data; 337 struct drm_gem_object *obj; 338 int ret; 339 340 if (args->pad) 341 return -EINVAL; 342 343 obj = drm_gem_object_lookup(file, args->handle); 344 if (!obj) 345 return -ENOENT; 346 347 ret = etnaviv_gem_mmap_offset(obj, &args->offset); 348 drm_gem_object_put_unlocked(obj); 349 350 return ret; 351 } 352 353 static int etnaviv_ioctl_wait_fence(struct drm_device *dev, void *data, 354 struct drm_file *file) 355 { 356 struct drm_etnaviv_wait_fence *args = data; 357 struct etnaviv_drm_private *priv = dev->dev_private; 358 struct timespec *timeout = &TS(args->timeout); 359 struct etnaviv_gpu *gpu; 360 361 if (args->flags & ~(ETNA_WAIT_NONBLOCK)) 362 return -EINVAL; 363 364 if (args->pipe >= ETNA_MAX_PIPES) 365 return -EINVAL; 366 367 gpu = priv->gpu[args->pipe]; 368 if (!gpu) 369 return -ENXIO; 370 371 if (args->flags & ETNA_WAIT_NONBLOCK) 372 timeout = NULL; 373 374 return etnaviv_gpu_wait_fence_interruptible(gpu, args->fence, 375 timeout); 376 } 377 378 static int etnaviv_ioctl_gem_userptr(struct drm_device *dev, void *data, 379 struct drm_file *file) 380 { 381 struct drm_etnaviv_gem_userptr *args = data; 382 383 if (args->flags & ~(ETNA_USERPTR_READ|ETNA_USERPTR_WRITE) || 384 args->flags == 0) 385 return -EINVAL; 386 387 if (offset_in_page(args->user_ptr | args->user_size) || 388 (uintptr_t)args->user_ptr != args->user_ptr || 389 (u32)args->user_size != args->user_size || 390 args->user_ptr & ~PAGE_MASK) 391 return -EINVAL; 392 393 if (!access_ok((void __user *)(unsigned long)args->user_ptr, 394 args->user_size)) 395 return -EFAULT; 396 397 return etnaviv_gem_new_userptr(dev, file, args->user_ptr, 398 args->user_size, args->flags, 399 &args->handle); 400 } 401 402 static int etnaviv_ioctl_gem_wait(struct drm_device *dev, void *data, 403 struct drm_file *file) 404 { 405 struct etnaviv_drm_private *priv = dev->dev_private; 406 struct drm_etnaviv_gem_wait *args = data; 407 struct timespec *timeout = &TS(args->timeout); 408 struct drm_gem_object *obj; 409 struct etnaviv_gpu *gpu; 410 int ret; 411 412 if (args->flags & ~(ETNA_WAIT_NONBLOCK)) 413 return -EINVAL; 414 415 if (args->pipe >= ETNA_MAX_PIPES) 416 return -EINVAL; 417 418 gpu = priv->gpu[args->pipe]; 419 if (!gpu) 420 return -ENXIO; 421 422 obj = drm_gem_object_lookup(file, args->handle); 423 if (!obj) 424 return -ENOENT; 425 426 if (args->flags & ETNA_WAIT_NONBLOCK) 427 timeout = NULL; 428 429 ret = etnaviv_gem_wait_bo(gpu, obj, timeout); 430 431 drm_gem_object_put_unlocked(obj); 432 433 return ret; 434 } 435 436 static int etnaviv_ioctl_pm_query_dom(struct drm_device *dev, void *data, 437 struct drm_file *file) 438 { 439 struct etnaviv_drm_private *priv = dev->dev_private; 440 struct drm_etnaviv_pm_domain *args = data; 441 struct etnaviv_gpu *gpu; 442 443 if (args->pipe >= ETNA_MAX_PIPES) 444 return -EINVAL; 445 446 gpu = priv->gpu[args->pipe]; 447 if (!gpu) 448 return -ENXIO; 449 450 return etnaviv_pm_query_dom(gpu, args); 451 } 452 453 static int etnaviv_ioctl_pm_query_sig(struct drm_device *dev, void *data, 454 struct drm_file *file) 455 { 456 struct etnaviv_drm_private *priv = dev->dev_private; 457 struct drm_etnaviv_pm_signal *args = data; 458 struct etnaviv_gpu *gpu; 459 460 if (args->pipe >= ETNA_MAX_PIPES) 461 return -EINVAL; 462 463 gpu = priv->gpu[args->pipe]; 464 if (!gpu) 465 return -ENXIO; 466 467 return etnaviv_pm_query_sig(gpu, args); 468 } 469 470 static const struct drm_ioctl_desc etnaviv_ioctls[] = { 471 #define ETNA_IOCTL(n, func, flags) \ 472 DRM_IOCTL_DEF_DRV(ETNAVIV_##n, etnaviv_ioctl_##func, flags) 473 ETNA_IOCTL(GET_PARAM, get_param, DRM_RENDER_ALLOW), 474 ETNA_IOCTL(GEM_NEW, gem_new, DRM_RENDER_ALLOW), 475 ETNA_IOCTL(GEM_INFO, gem_info, DRM_RENDER_ALLOW), 476 ETNA_IOCTL(GEM_CPU_PREP, gem_cpu_prep, DRM_RENDER_ALLOW), 477 ETNA_IOCTL(GEM_CPU_FINI, gem_cpu_fini, DRM_RENDER_ALLOW), 478 ETNA_IOCTL(GEM_SUBMIT, gem_submit, DRM_RENDER_ALLOW), 479 ETNA_IOCTL(WAIT_FENCE, wait_fence, DRM_RENDER_ALLOW), 480 ETNA_IOCTL(GEM_USERPTR, gem_userptr, DRM_RENDER_ALLOW), 481 ETNA_IOCTL(GEM_WAIT, gem_wait, DRM_RENDER_ALLOW), 482 ETNA_IOCTL(PM_QUERY_DOM, pm_query_dom, DRM_RENDER_ALLOW), 483 ETNA_IOCTL(PM_QUERY_SIG, pm_query_sig, DRM_RENDER_ALLOW), 484 }; 485 486 static const struct vm_operations_struct vm_ops = { 487 .fault = etnaviv_gem_fault, 488 .open = drm_gem_vm_open, 489 .close = drm_gem_vm_close, 490 }; 491 492 static const struct file_operations fops = { 493 .owner = THIS_MODULE, 494 .open = drm_open, 495 .release = drm_release, 496 .unlocked_ioctl = drm_ioctl, 497 .compat_ioctl = drm_compat_ioctl, 498 .poll = drm_poll, 499 .read = drm_read, 500 .llseek = no_llseek, 501 .mmap = etnaviv_gem_mmap, 502 }; 503 504 static struct drm_driver etnaviv_drm_driver = { 505 .driver_features = DRIVER_GEM | DRIVER_RENDER, 506 .open = etnaviv_open, 507 .postclose = etnaviv_postclose, 508 .gem_free_object_unlocked = etnaviv_gem_free_object, 509 .gem_vm_ops = &vm_ops, 510 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 511 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 512 .gem_prime_pin = etnaviv_gem_prime_pin, 513 .gem_prime_unpin = etnaviv_gem_prime_unpin, 514 .gem_prime_get_sg_table = etnaviv_gem_prime_get_sg_table, 515 .gem_prime_import_sg_table = etnaviv_gem_prime_import_sg_table, 516 .gem_prime_vmap = etnaviv_gem_prime_vmap, 517 .gem_prime_vunmap = etnaviv_gem_prime_vunmap, 518 .gem_prime_mmap = etnaviv_gem_prime_mmap, 519 #ifdef CONFIG_DEBUG_FS 520 .debugfs_init = etnaviv_debugfs_init, 521 #endif 522 .ioctls = etnaviv_ioctls, 523 .num_ioctls = DRM_ETNAVIV_NUM_IOCTLS, 524 .fops = &fops, 525 .name = "etnaviv", 526 .desc = "etnaviv DRM", 527 .date = "20151214", 528 .major = 1, 529 .minor = 3, 530 }; 531 532 /* 533 * Platform driver: 534 */ 535 static int etnaviv_bind(struct device *dev) 536 { 537 struct etnaviv_drm_private *priv; 538 struct drm_device *drm; 539 int ret; 540 541 drm = drm_dev_alloc(&etnaviv_drm_driver, dev); 542 if (IS_ERR(drm)) 543 return PTR_ERR(drm); 544 545 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 546 if (!priv) { 547 dev_err(dev, "failed to allocate private data\n"); 548 ret = -ENOMEM; 549 goto out_put; 550 } 551 drm->dev_private = priv; 552 553 dev->dma_parms = &priv->dma_parms; 554 dma_set_max_seg_size(dev, SZ_2G); 555 556 mutex_init(&priv->gem_lock); 557 INIT_LIST_HEAD(&priv->gem_list); 558 priv->num_gpus = 0; 559 560 priv->cmdbuf_suballoc = etnaviv_cmdbuf_suballoc_new(drm->dev); 561 if (IS_ERR(priv->cmdbuf_suballoc)) { 562 dev_err(drm->dev, "Failed to create cmdbuf suballocator\n"); 563 ret = PTR_ERR(priv->cmdbuf_suballoc); 564 goto out_free_priv; 565 } 566 567 dev_set_drvdata(dev, drm); 568 569 ret = component_bind_all(dev, drm); 570 if (ret < 0) 571 goto out_destroy_suballoc; 572 573 load_gpu(drm); 574 575 ret = drm_dev_register(drm, 0); 576 if (ret) 577 goto out_unbind; 578 579 return 0; 580 581 out_unbind: 582 component_unbind_all(dev, drm); 583 out_destroy_suballoc: 584 etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc); 585 out_free_priv: 586 kfree(priv); 587 out_put: 588 drm_dev_put(drm); 589 590 return ret; 591 } 592 593 static void etnaviv_unbind(struct device *dev) 594 { 595 struct drm_device *drm = dev_get_drvdata(dev); 596 struct etnaviv_drm_private *priv = drm->dev_private; 597 598 drm_dev_unregister(drm); 599 600 component_unbind_all(dev, drm); 601 602 dev->dma_parms = NULL; 603 604 etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc); 605 606 drm->dev_private = NULL; 607 kfree(priv); 608 609 drm_dev_put(drm); 610 } 611 612 static const struct component_master_ops etnaviv_master_ops = { 613 .bind = etnaviv_bind, 614 .unbind = etnaviv_unbind, 615 }; 616 617 static int compare_of(struct device *dev, void *data) 618 { 619 struct device_node *np = data; 620 621 return dev->of_node == np; 622 } 623 624 static int compare_str(struct device *dev, void *data) 625 { 626 return !strcmp(dev_name(dev), data); 627 } 628 629 static int etnaviv_pdev_probe(struct platform_device *pdev) 630 { 631 struct device *dev = &pdev->dev; 632 struct component_match *match = NULL; 633 634 if (!dev->platform_data) { 635 struct device_node *core_node; 636 637 for_each_compatible_node(core_node, NULL, "vivante,gc") { 638 if (!of_device_is_available(core_node)) 639 continue; 640 641 drm_of_component_match_add(&pdev->dev, &match, 642 compare_of, core_node); 643 } 644 } else { 645 char **names = dev->platform_data; 646 unsigned i; 647 648 for (i = 0; names[i]; i++) 649 component_match_add(dev, &match, compare_str, names[i]); 650 } 651 652 return component_master_add_with_match(dev, &etnaviv_master_ops, match); 653 } 654 655 static int etnaviv_pdev_remove(struct platform_device *pdev) 656 { 657 component_master_del(&pdev->dev, &etnaviv_master_ops); 658 659 return 0; 660 } 661 662 static struct platform_driver etnaviv_platform_driver = { 663 .probe = etnaviv_pdev_probe, 664 .remove = etnaviv_pdev_remove, 665 .driver = { 666 .name = "etnaviv", 667 }, 668 }; 669 670 static struct platform_device *etnaviv_drm; 671 672 static int __init etnaviv_init(void) 673 { 674 struct platform_device *pdev; 675 int ret; 676 struct device_node *np; 677 678 etnaviv_validate_init(); 679 680 ret = platform_driver_register(&etnaviv_gpu_driver); 681 if (ret != 0) 682 return ret; 683 684 ret = platform_driver_register(&etnaviv_platform_driver); 685 if (ret != 0) 686 goto unregister_gpu_driver; 687 688 /* 689 * If the DT contains at least one available GPU device, instantiate 690 * the DRM platform device. 691 */ 692 for_each_compatible_node(np, NULL, "vivante,gc") { 693 if (!of_device_is_available(np)) 694 continue; 695 696 pdev = platform_device_alloc("etnaviv", -1); 697 if (!pdev) { 698 ret = -ENOMEM; 699 of_node_put(np); 700 goto unregister_platform_driver; 701 } 702 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40); 703 pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; 704 705 /* 706 * Apply the same DMA configuration to the virtual etnaviv 707 * device as the GPU we found. This assumes that all Vivante 708 * GPUs in the system share the same DMA constraints. 709 */ 710 of_dma_configure(&pdev->dev, np, true); 711 712 ret = platform_device_add(pdev); 713 if (ret) { 714 platform_device_put(pdev); 715 of_node_put(np); 716 goto unregister_platform_driver; 717 } 718 719 etnaviv_drm = pdev; 720 of_node_put(np); 721 break; 722 } 723 724 return 0; 725 726 unregister_platform_driver: 727 platform_driver_unregister(&etnaviv_platform_driver); 728 unregister_gpu_driver: 729 platform_driver_unregister(&etnaviv_gpu_driver); 730 return ret; 731 } 732 module_init(etnaviv_init); 733 734 static void __exit etnaviv_exit(void) 735 { 736 platform_device_unregister(etnaviv_drm); 737 platform_driver_unregister(&etnaviv_platform_driver); 738 platform_driver_unregister(&etnaviv_gpu_driver); 739 } 740 module_exit(etnaviv_exit); 741 742 MODULE_AUTHOR("Christian Gmeiner <christian.gmeiner@gmail.com>"); 743 MODULE_AUTHOR("Russell King <rmk+kernel@arm.linux.org.uk>"); 744 MODULE_AUTHOR("Lucas Stach <l.stach@pengutronix.de>"); 745 MODULE_DESCRIPTION("etnaviv DRM Driver"); 746 MODULE_LICENSE("GPL v2"); 747 MODULE_ALIAS("platform:etnaviv"); 748