11452c25bSSean Paul // SPDX-License-Identifier: MIT
21452c25bSSean Paul /*
31452c25bSSean Paul  * Copyright (C) 2019 Google, Inc.
41452c25bSSean Paul  *
51452c25bSSean Paul  * Authors:
61452c25bSSean Paul  * Sean Paul <seanpaul@chromium.org>
71452c25bSSean Paul  */
8d4da4e33SSean Paul #include <linux/average.h>
91452c25bSSean Paul #include <linux/bitops.h>
101452c25bSSean Paul #include <linux/slab.h>
111452c25bSSean Paul #include <linux/workqueue.h>
121452c25bSSean Paul 
131452c25bSSean Paul #include <drm/drm_atomic.h>
141452c25bSSean Paul #include <drm/drm_atomic_helper.h>
151452c25bSSean Paul #include <drm/drm_connector.h>
161452c25bSSean Paul #include <drm/drm_crtc.h>
171452c25bSSean Paul #include <drm/drm_device.h>
181452c25bSSean Paul #include <drm/drm_mode_config.h>
191452c25bSSean Paul #include <drm/drm_modeset_lock.h>
201452c25bSSean Paul #include <drm/drm_print.h>
211452c25bSSean Paul #include <drm/drm_self_refresh_helper.h>
221452c25bSSean Paul 
231452c25bSSean Paul /**
241452c25bSSean Paul  * DOC: overview
251452c25bSSean Paul  *
261452c25bSSean Paul  * This helper library provides an easy way for drivers to leverage the atomic
271452c25bSSean Paul  * framework to implement panel self refresh (SR) support. Drivers are
281452c25bSSean Paul  * responsible for initializing and cleaning up the SR helpers on load/unload
291452c25bSSean Paul  * (see &drm_self_refresh_helper_init/&drm_self_refresh_helper_cleanup).
301452c25bSSean Paul  * The connector is responsible for setting
311452c25bSSean Paul  * &drm_connector_state.self_refresh_aware to true at runtime if it is SR-aware
321452c25bSSean Paul  * (meaning it knows how to initiate self refresh on the panel).
331452c25bSSean Paul  *
341452c25bSSean Paul  * Once a crtc has enabled SR using &drm_self_refresh_helper_init, the
351452c25bSSean Paul  * helpers will monitor activity and call back into the driver to enable/disable
361452c25bSSean Paul  * SR as appropriate. The best way to think about this is that it's a DPMS
371452c25bSSean Paul  * on/off request with &drm_crtc_state.self_refresh_active set in crtc state
381452c25bSSean Paul  * that tells you to disable/enable SR on the panel instead of power-cycling it.
391452c25bSSean Paul  *
401452c25bSSean Paul  * During SR, drivers may choose to fully disable their crtc/encoder/bridge
411452c25bSSean Paul  * hardware (in which case no driver changes are necessary), or they can inspect
421452c25bSSean Paul  * &drm_crtc_state.self_refresh_active if they want to enter low power mode
431452c25bSSean Paul  * without full disable (in case full disable/enable is too slow).
441452c25bSSean Paul  *
451452c25bSSean Paul  * SR will be deactivated if there are any atomic updates affecting the
461452c25bSSean Paul  * pipe that is in SR mode. If a crtc is driving multiple connectors, all
471452c25bSSean Paul  * connectors must be SR aware and all will enter/exit SR mode at the same time.
481452c25bSSean Paul  *
491452c25bSSean Paul  * If the crtc and connector are SR aware, but the panel connected does not
501452c25bSSean Paul  * support it (or is otherwise unable to enter SR), the driver should fail
511452c25bSSean Paul  * atomic_check when &drm_crtc_state.self_refresh_active is true.
521452c25bSSean Paul  */
531452c25bSSean Paul 
54d4da4e33SSean Paul #define SELF_REFRESH_AVG_SEED_MS 200
55d4da4e33SSean Paul 
56d4da4e33SSean Paul DECLARE_EWMA(psr_time, 4, 4)
57d4da4e33SSean Paul 
581452c25bSSean Paul struct drm_self_refresh_data {
591452c25bSSean Paul 	struct drm_crtc *crtc;
601452c25bSSean Paul 	struct delayed_work entry_work;
61d4da4e33SSean Paul 
62d4da4e33SSean Paul 	struct mutex avg_mutex;
63d4da4e33SSean Paul 	struct ewma_psr_time entry_avg_ms;
64d4da4e33SSean Paul 	struct ewma_psr_time exit_avg_ms;
651452c25bSSean Paul };
661452c25bSSean Paul 
671452c25bSSean Paul static void drm_self_refresh_helper_entry_work(struct work_struct *work)
681452c25bSSean Paul {
691452c25bSSean Paul 	struct drm_self_refresh_data *sr_data = container_of(
701452c25bSSean Paul 				to_delayed_work(work),
711452c25bSSean Paul 				struct drm_self_refresh_data, entry_work);
721452c25bSSean Paul 	struct drm_crtc *crtc = sr_data->crtc;
731452c25bSSean Paul 	struct drm_device *dev = crtc->dev;
741452c25bSSean Paul 	struct drm_modeset_acquire_ctx ctx;
751452c25bSSean Paul 	struct drm_atomic_state *state;
761452c25bSSean Paul 	struct drm_connector *conn;
771452c25bSSean Paul 	struct drm_connector_state *conn_state;
781452c25bSSean Paul 	struct drm_crtc_state *crtc_state;
79002c845bSSean Paul 	int i, ret = 0;
801452c25bSSean Paul 
811452c25bSSean Paul 	drm_modeset_acquire_init(&ctx, 0);
821452c25bSSean Paul 
831452c25bSSean Paul 	state = drm_atomic_state_alloc(dev);
841452c25bSSean Paul 	if (!state) {
851452c25bSSean Paul 		ret = -ENOMEM;
86002c845bSSean Paul 		goto out_drop_locks;
871452c25bSSean Paul 	}
881452c25bSSean Paul 
891452c25bSSean Paul retry:
901452c25bSSean Paul 	state->acquire_ctx = &ctx;
911452c25bSSean Paul 
921452c25bSSean Paul 	crtc_state = drm_atomic_get_crtc_state(state, crtc);
931452c25bSSean Paul 	if (IS_ERR(crtc_state)) {
941452c25bSSean Paul 		ret = PTR_ERR(crtc_state);
951452c25bSSean Paul 		goto out;
961452c25bSSean Paul 	}
971452c25bSSean Paul 
981452c25bSSean Paul 	if (!crtc_state->enable)
991452c25bSSean Paul 		goto out;
1001452c25bSSean Paul 
1011452c25bSSean Paul 	ret = drm_atomic_add_affected_connectors(state, crtc);
1021452c25bSSean Paul 	if (ret)
1031452c25bSSean Paul 		goto out;
1041452c25bSSean Paul 
1051452c25bSSean Paul 	for_each_new_connector_in_state(state, conn, conn_state, i) {
1061452c25bSSean Paul 		if (!conn_state->self_refresh_aware)
1071452c25bSSean Paul 			goto out;
1081452c25bSSean Paul 	}
1091452c25bSSean Paul 
1101452c25bSSean Paul 	crtc_state->active = false;
1111452c25bSSean Paul 	crtc_state->self_refresh_active = true;
1121452c25bSSean Paul 
1131452c25bSSean Paul 	ret = drm_atomic_commit(state);
1141452c25bSSean Paul 	if (ret)
1151452c25bSSean Paul 		goto out;
1161452c25bSSean Paul 
1171452c25bSSean Paul out:
1181452c25bSSean Paul 	if (ret == -EDEADLK) {
1191452c25bSSean Paul 		drm_atomic_state_clear(state);
1201452c25bSSean Paul 		ret = drm_modeset_backoff(&ctx);
1211452c25bSSean Paul 		if (!ret)
1221452c25bSSean Paul 			goto retry;
1231452c25bSSean Paul 	}
1241452c25bSSean Paul 
1251452c25bSSean Paul 	drm_atomic_state_put(state);
126002c845bSSean Paul 
127002c845bSSean Paul out_drop_locks:
1281452c25bSSean Paul 	drm_modeset_drop_locks(&ctx);
1291452c25bSSean Paul 	drm_modeset_acquire_fini(&ctx);
1301452c25bSSean Paul }
1311452c25bSSean Paul 
1321452c25bSSean Paul /**
133d4da4e33SSean Paul  * drm_self_refresh_helper_update_avg_times - Updates a crtc's SR time averages
134d4da4e33SSean Paul  * @state: the state which has just been applied to hardware
135d4da4e33SSean Paul  * @commit_time_ms: the amount of time in ms that this commit took to complete
136d4da4e33SSean Paul  *
137d4da4e33SSean Paul  * Called after &drm_mode_config_funcs.atomic_commit_tail, this function will
138d4da4e33SSean Paul  * update the average entry/exit self refresh times on self refresh transitions.
139d4da4e33SSean Paul  * These averages will be used when calculating how long to delay before
140d4da4e33SSean Paul  * entering self refresh mode after activity.
141d4da4e33SSean Paul  */
142d4da4e33SSean Paul void drm_self_refresh_helper_update_avg_times(struct drm_atomic_state *state,
143d4da4e33SSean Paul 					      unsigned int commit_time_ms)
144d4da4e33SSean Paul {
145d4da4e33SSean Paul 	struct drm_crtc *crtc;
146d4da4e33SSean Paul 	struct drm_crtc_state *old_crtc_state, *new_crtc_state;
147d4da4e33SSean Paul 	int i;
148d4da4e33SSean Paul 
149d4da4e33SSean Paul 	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
150d4da4e33SSean Paul 				      new_crtc_state, i) {
151d4da4e33SSean Paul 		struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
152d4da4e33SSean Paul 		struct ewma_psr_time *time;
153d4da4e33SSean Paul 
154d4da4e33SSean Paul 		if (old_crtc_state->self_refresh_active ==
155d4da4e33SSean Paul 		    new_crtc_state->self_refresh_active)
156d4da4e33SSean Paul 			continue;
157d4da4e33SSean Paul 
158d4da4e33SSean Paul 		if (new_crtc_state->self_refresh_active)
159d4da4e33SSean Paul 			time = &sr_data->entry_avg_ms;
160d4da4e33SSean Paul 		else
161d4da4e33SSean Paul 			time = &sr_data->exit_avg_ms;
162d4da4e33SSean Paul 
163d4da4e33SSean Paul 		mutex_lock(&sr_data->avg_mutex);
164d4da4e33SSean Paul 		ewma_psr_time_add(time, commit_time_ms);
165d4da4e33SSean Paul 		mutex_unlock(&sr_data->avg_mutex);
166d4da4e33SSean Paul 	}
167d4da4e33SSean Paul }
168d4da4e33SSean Paul EXPORT_SYMBOL(drm_self_refresh_helper_update_avg_times);
169d4da4e33SSean Paul 
170d4da4e33SSean Paul /**
1711452c25bSSean Paul  * drm_self_refresh_helper_alter_state - Alters the atomic state for SR exit
1721452c25bSSean Paul  * @state: the state currently being checked
1731452c25bSSean Paul  *
1741452c25bSSean Paul  * Called at the end of atomic check. This function checks the state for flags
1751452c25bSSean Paul  * incompatible with self refresh exit and changes them. This is a bit
1761452c25bSSean Paul  * disingenuous since userspace is expecting one thing and we're giving it
1771452c25bSSean Paul  * another. However in order to keep self refresh entirely hidden from
1781452c25bSSean Paul  * userspace, this is required.
1791452c25bSSean Paul  *
1801452c25bSSean Paul  * At the end, we queue up the self refresh entry work so we can enter PSR after
1811452c25bSSean Paul  * the desired delay.
1821452c25bSSean Paul  */
1831452c25bSSean Paul void drm_self_refresh_helper_alter_state(struct drm_atomic_state *state)
1841452c25bSSean Paul {
1851452c25bSSean Paul 	struct drm_crtc *crtc;
1861452c25bSSean Paul 	struct drm_crtc_state *crtc_state;
1871452c25bSSean Paul 	int i;
1881452c25bSSean Paul 
1891452c25bSSean Paul 	if (state->async_update || !state->allow_modeset) {
1901452c25bSSean Paul 		for_each_old_crtc_in_state(state, crtc, crtc_state, i) {
1911452c25bSSean Paul 			if (crtc_state->self_refresh_active) {
1921452c25bSSean Paul 				state->async_update = false;
1931452c25bSSean Paul 				state->allow_modeset = true;
1941452c25bSSean Paul 				break;
1951452c25bSSean Paul 			}
1961452c25bSSean Paul 		}
1971452c25bSSean Paul 	}
1981452c25bSSean Paul 
1991452c25bSSean Paul 	for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
2001452c25bSSean Paul 		struct drm_self_refresh_data *sr_data;
201d4da4e33SSean Paul 		unsigned int delay;
2021452c25bSSean Paul 
2031452c25bSSean Paul 		/* Don't trigger the entry timer when we're already in SR */
2041452c25bSSean Paul 		if (crtc_state->self_refresh_active)
2051452c25bSSean Paul 			continue;
2061452c25bSSean Paul 
2071452c25bSSean Paul 		sr_data = crtc->self_refresh_data;
2081452c25bSSean Paul 		if (!sr_data)
2091452c25bSSean Paul 			continue;
2101452c25bSSean Paul 
211d4da4e33SSean Paul 		mutex_lock(&sr_data->avg_mutex);
212d4da4e33SSean Paul 		delay = (ewma_psr_time_read(&sr_data->entry_avg_ms) +
213d4da4e33SSean Paul 			 ewma_psr_time_read(&sr_data->exit_avg_ms)) * 2;
214d4da4e33SSean Paul 		mutex_unlock(&sr_data->avg_mutex);
215d4da4e33SSean Paul 
2161452c25bSSean Paul 		mod_delayed_work(system_wq, &sr_data->entry_work,
217d4da4e33SSean Paul 				 msecs_to_jiffies(delay));
2181452c25bSSean Paul 	}
2191452c25bSSean Paul }
2201452c25bSSean Paul EXPORT_SYMBOL(drm_self_refresh_helper_alter_state);
2211452c25bSSean Paul 
2221452c25bSSean Paul /**
2231452c25bSSean Paul  * drm_self_refresh_helper_init - Initializes self refresh helpers for a crtc
2241452c25bSSean Paul  * @crtc: the crtc which supports self refresh supported displays
2251452c25bSSean Paul  *
2261452c25bSSean Paul  * Returns zero if successful or -errno on failure
2271452c25bSSean Paul  */
228d4da4e33SSean Paul int drm_self_refresh_helper_init(struct drm_crtc *crtc)
2291452c25bSSean Paul {
2301452c25bSSean Paul 	struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
2311452c25bSSean Paul 
2321452c25bSSean Paul 	/* Helper is already initialized */
2331452c25bSSean Paul 	if (WARN_ON(sr_data))
2341452c25bSSean Paul 		return -EINVAL;
2351452c25bSSean Paul 
2361452c25bSSean Paul 	sr_data = kzalloc(sizeof(*sr_data), GFP_KERNEL);
2371452c25bSSean Paul 	if (!sr_data)
2381452c25bSSean Paul 		return -ENOMEM;
2391452c25bSSean Paul 
2401452c25bSSean Paul 	INIT_DELAYED_WORK(&sr_data->entry_work,
2411452c25bSSean Paul 			  drm_self_refresh_helper_entry_work);
2421452c25bSSean Paul 	sr_data->crtc = crtc;
243d4da4e33SSean Paul 	mutex_init(&sr_data->avg_mutex);
244d4da4e33SSean Paul 	ewma_psr_time_init(&sr_data->entry_avg_ms);
245d4da4e33SSean Paul 	ewma_psr_time_init(&sr_data->exit_avg_ms);
246d4da4e33SSean Paul 
247d4da4e33SSean Paul 	/*
248d4da4e33SSean Paul 	 * Seed the averages so they're non-zero (and sufficiently large
249d4da4e33SSean Paul 	 * for even poorly performing panels). As time goes on, this will be
250d4da4e33SSean Paul 	 * averaged out and the values will trend to their true value.
251d4da4e33SSean Paul 	 */
252d4da4e33SSean Paul 	ewma_psr_time_add(&sr_data->entry_avg_ms, SELF_REFRESH_AVG_SEED_MS);
253d4da4e33SSean Paul 	ewma_psr_time_add(&sr_data->exit_avg_ms, SELF_REFRESH_AVG_SEED_MS);
2541452c25bSSean Paul 
2551452c25bSSean Paul 	crtc->self_refresh_data = sr_data;
2561452c25bSSean Paul 	return 0;
2571452c25bSSean Paul }
2581452c25bSSean Paul EXPORT_SYMBOL(drm_self_refresh_helper_init);
2591452c25bSSean Paul 
2601452c25bSSean Paul /**
2611452c25bSSean Paul  * drm_self_refresh_helper_cleanup - Cleans up self refresh helpers for a crtc
2621452c25bSSean Paul  * @crtc: the crtc to cleanup
2631452c25bSSean Paul  */
2641452c25bSSean Paul void drm_self_refresh_helper_cleanup(struct drm_crtc *crtc)
2651452c25bSSean Paul {
2661452c25bSSean Paul 	struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
2671452c25bSSean Paul 
2681452c25bSSean Paul 	/* Helper is already uninitialized */
2697d0ed304SDan Carpenter 	if (!sr_data)
2701452c25bSSean Paul 		return;
2711452c25bSSean Paul 
2721452c25bSSean Paul 	crtc->self_refresh_data = NULL;
2731452c25bSSean Paul 
2741452c25bSSean Paul 	cancel_delayed_work_sync(&sr_data->entry_work);
2751452c25bSSean Paul 	kfree(sr_data);
2761452c25bSSean Paul }
2771452c25bSSean Paul EXPORT_SYMBOL(drm_self_refresh_helper_cleanup);
278