xref: /openbmc/linux/drivers/gpu/drm/drm_modes.c (revision b6dcefde)
1 /*
2  * Copyright © 1997-2003 by The XFree86 Project, Inc.
3  * Copyright © 2007 Dave Airlie
4  * Copyright © 2007-2008 Intel Corporation
5  *   Jesse Barnes <jesse.barnes@intel.com>
6  * Copyright 2005-2006 Luc Verhaegen
7  * Copyright (c) 2001, Andy Ritger  aritger@nvidia.com
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a
10  * copy of this software and associated documentation files (the "Software"),
11  * to deal in the Software without restriction, including without limitation
12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13  * and/or sell copies of the Software, and to permit persons to whom the
14  * Software is furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included in
17  * all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25  * OTHER DEALINGS IN THE SOFTWARE.
26  *
27  * Except as contained in this notice, the name of the copyright holder(s)
28  * and author(s) shall not be used in advertising or otherwise to promote
29  * the sale, use or other dealings in this Software without prior written
30  * authorization from the copyright holder(s) and author(s).
31  */
32 
33 #include <linux/list.h>
34 #include <linux/list_sort.h>
35 #include "drmP.h"
36 #include "drm.h"
37 #include "drm_crtc.h"
38 
39 /**
40  * drm_mode_debug_printmodeline - debug print a mode
41  * @dev: DRM device
42  * @mode: mode to print
43  *
44  * LOCKING:
45  * None.
46  *
47  * Describe @mode using DRM_DEBUG.
48  */
49 void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
50 {
51 	DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
52 			"0x%x 0x%x\n",
53 		mode->base.id, mode->name, mode->vrefresh, mode->clock,
54 		mode->hdisplay, mode->hsync_start,
55 		mode->hsync_end, mode->htotal,
56 		mode->vdisplay, mode->vsync_start,
57 		mode->vsync_end, mode->vtotal, mode->type, mode->flags);
58 }
59 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
60 
61 /**
62  * drm_cvt_mode -create a modeline based on CVT algorithm
63  * @dev: DRM device
64  * @hdisplay: hdisplay size
65  * @vdisplay: vdisplay size
66  * @vrefresh  : vrefresh rate
67  * @reduced : Whether the GTF calculation is simplified
68  * @interlaced:Whether the interlace is supported
69  *
70  * LOCKING:
71  * none.
72  *
73  * return the modeline based on CVT algorithm
74  *
75  * This function is called to generate the modeline based on CVT algorithm
76  * according to the hdisplay, vdisplay, vrefresh.
77  * It is based from the VESA(TM) Coordinated Video Timing Generator by
78  * Graham Loveridge April 9, 2003 available at
79  * http://www.vesa.org/public/CVT/CVTd6r1.xls
80  *
81  * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
82  * What I have done is to translate it by using integer calculation.
83  */
84 #define HV_FACTOR			1000
85 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
86 				      int vdisplay, int vrefresh,
87 				      bool reduced, bool interlaced, bool margins)
88 {
89 	/* 1) top/bottom margin size (% of height) - default: 1.8, */
90 #define	CVT_MARGIN_PERCENTAGE		18
91 	/* 2) character cell horizontal granularity (pixels) - default 8 */
92 #define	CVT_H_GRANULARITY		8
93 	/* 3) Minimum vertical porch (lines) - default 3 */
94 #define	CVT_MIN_V_PORCH			3
95 	/* 4) Minimum number of vertical back porch lines - default 6 */
96 #define	CVT_MIN_V_BPORCH		6
97 	/* Pixel Clock step (kHz) */
98 #define CVT_CLOCK_STEP			250
99 	struct drm_display_mode *drm_mode;
100 	unsigned int vfieldrate, hperiod;
101 	int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
102 	int interlace;
103 
104 	/* allocate the drm_display_mode structure. If failure, we will
105 	 * return directly
106 	 */
107 	drm_mode = drm_mode_create(dev);
108 	if (!drm_mode)
109 		return NULL;
110 
111 	/* the CVT default refresh rate is 60Hz */
112 	if (!vrefresh)
113 		vrefresh = 60;
114 
115 	/* the required field fresh rate */
116 	if (interlaced)
117 		vfieldrate = vrefresh * 2;
118 	else
119 		vfieldrate = vrefresh;
120 
121 	/* horizontal pixels */
122 	hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
123 
124 	/* determine the left&right borders */
125 	hmargin = 0;
126 	if (margins) {
127 		hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
128 		hmargin -= hmargin % CVT_H_GRANULARITY;
129 	}
130 	/* find the total active pixels */
131 	drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
132 
133 	/* find the number of lines per field */
134 	if (interlaced)
135 		vdisplay_rnd = vdisplay / 2;
136 	else
137 		vdisplay_rnd = vdisplay;
138 
139 	/* find the top & bottom borders */
140 	vmargin = 0;
141 	if (margins)
142 		vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
143 
144 	drm_mode->vdisplay = vdisplay + 2 * vmargin;
145 
146 	/* Interlaced */
147 	if (interlaced)
148 		interlace = 1;
149 	else
150 		interlace = 0;
151 
152 	/* Determine VSync Width from aspect ratio */
153 	if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
154 		vsync = 4;
155 	else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
156 		vsync = 5;
157 	else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
158 		vsync = 6;
159 	else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
160 		vsync = 7;
161 	else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
162 		vsync = 7;
163 	else /* custom */
164 		vsync = 10;
165 
166 	if (!reduced) {
167 		/* simplify the GTF calculation */
168 		/* 4) Minimum time of vertical sync + back porch interval (µs)
169 		 * default 550.0
170 		 */
171 		int tmp1, tmp2;
172 #define CVT_MIN_VSYNC_BP	550
173 		/* 3) Nominal HSync width (% of line period) - default 8 */
174 #define CVT_HSYNC_PERCENTAGE	8
175 		unsigned int hblank_percentage;
176 		int vsyncandback_porch, vback_porch, hblank;
177 
178 		/* estimated the horizontal period */
179 		tmp1 = HV_FACTOR * 1000000  -
180 				CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
181 		tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
182 				interlace;
183 		hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
184 
185 		tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
186 		/* 9. Find number of lines in sync + backporch */
187 		if (tmp1 < (vsync + CVT_MIN_V_PORCH))
188 			vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
189 		else
190 			vsyncandback_porch = tmp1;
191 		/* 10. Find number of lines in back porch */
192 		vback_porch = vsyncandback_porch - vsync;
193 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
194 				vsyncandback_porch + CVT_MIN_V_PORCH;
195 		/* 5) Definition of Horizontal blanking time limitation */
196 		/* Gradient (%/kHz) - default 600 */
197 #define CVT_M_FACTOR	600
198 		/* Offset (%) - default 40 */
199 #define CVT_C_FACTOR	40
200 		/* Blanking time scaling factor - default 128 */
201 #define CVT_K_FACTOR	128
202 		/* Scaling factor weighting - default 20 */
203 #define CVT_J_FACTOR	20
204 #define CVT_M_PRIME	(CVT_M_FACTOR * CVT_K_FACTOR / 256)
205 #define CVT_C_PRIME	((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
206 			 CVT_J_FACTOR)
207 		/* 12. Find ideal blanking duty cycle from formula */
208 		hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
209 					hperiod / 1000;
210 		/* 13. Blanking time */
211 		if (hblank_percentage < 20 * HV_FACTOR)
212 			hblank_percentage = 20 * HV_FACTOR;
213 		hblank = drm_mode->hdisplay * hblank_percentage /
214 			 (100 * HV_FACTOR - hblank_percentage);
215 		hblank -= hblank % (2 * CVT_H_GRANULARITY);
216 		/* 14. find the total pixes per line */
217 		drm_mode->htotal = drm_mode->hdisplay + hblank;
218 		drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
219 		drm_mode->hsync_start = drm_mode->hsync_end -
220 			(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
221 		drm_mode->hsync_start += CVT_H_GRANULARITY -
222 			drm_mode->hsync_start % CVT_H_GRANULARITY;
223 		/* fill the Vsync values */
224 		drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
225 		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
226 	} else {
227 		/* Reduced blanking */
228 		/* Minimum vertical blanking interval time (µs)- default 460 */
229 #define CVT_RB_MIN_VBLANK	460
230 		/* Fixed number of clocks for horizontal sync */
231 #define CVT_RB_H_SYNC		32
232 		/* Fixed number of clocks for horizontal blanking */
233 #define CVT_RB_H_BLANK		160
234 		/* Fixed number of lines for vertical front porch - default 3*/
235 #define CVT_RB_VFPORCH		3
236 		int vbilines;
237 		int tmp1, tmp2;
238 		/* 8. Estimate Horizontal period. */
239 		tmp1 = HV_FACTOR * 1000000 -
240 			CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
241 		tmp2 = vdisplay_rnd + 2 * vmargin;
242 		hperiod = tmp1 / (tmp2 * vfieldrate);
243 		/* 9. Find number of lines in vertical blanking */
244 		vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
245 		/* 10. Check if vertical blanking is sufficient */
246 		if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
247 			vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
248 		/* 11. Find total number of lines in vertical field */
249 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
250 		/* 12. Find total number of pixels in a line */
251 		drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
252 		/* Fill in HSync values */
253 		drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
254 		drm_mode->hsync_start = drm_mode->hsync_end = CVT_RB_H_SYNC;
255 	}
256 	/* 15/13. Find pixel clock frequency (kHz for xf86) */
257 	drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
258 	drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
259 	/* 18/16. Find actual vertical frame frequency */
260 	/* ignore - just set the mode flag for interlaced */
261 	if (interlaced)
262 		drm_mode->vtotal *= 2;
263 	/* Fill the mode line name */
264 	drm_mode_set_name(drm_mode);
265 	if (reduced)
266 		drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
267 					DRM_MODE_FLAG_NVSYNC);
268 	else
269 		drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
270 					DRM_MODE_FLAG_NHSYNC);
271 	if (interlaced)
272 		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
273 
274     return drm_mode;
275 }
276 EXPORT_SYMBOL(drm_cvt_mode);
277 
278 /**
279  * drm_gtf_mode - create the modeline based on GTF algorithm
280  *
281  * @dev		:drm device
282  * @hdisplay	:hdisplay size
283  * @vdisplay	:vdisplay size
284  * @vrefresh	:vrefresh rate.
285  * @interlaced	:whether the interlace is supported
286  * @margins	:whether the margin is supported
287  *
288  * LOCKING.
289  * none.
290  *
291  * return the modeline based on GTF algorithm
292  *
293  * This function is to create the modeline based on the GTF algorithm.
294  * Generalized Timing Formula is derived from:
295  *	GTF Spreadsheet by Andy Morrish (1/5/97)
296  *	available at http://www.vesa.org
297  *
298  * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
299  * What I have done is to translate it by using integer calculation.
300  * I also refer to the function of fb_get_mode in the file of
301  * drivers/video/fbmon.c
302  */
303 struct drm_display_mode *drm_gtf_mode(struct drm_device *dev, int hdisplay,
304 				      int vdisplay, int vrefresh,
305 				      bool interlaced, int margins)
306 {
307 	/* 1) top/bottom margin size (% of height) - default: 1.8, */
308 #define	GTF_MARGIN_PERCENTAGE		18
309 	/* 2) character cell horizontal granularity (pixels) - default 8 */
310 #define	GTF_CELL_GRAN			8
311 	/* 3) Minimum vertical porch (lines) - default 3 */
312 #define	GTF_MIN_V_PORCH			1
313 	/* width of vsync in lines */
314 #define V_SYNC_RQD			3
315 	/* width of hsync as % of total line */
316 #define H_SYNC_PERCENT			8
317 	/* min time of vsync + back porch (microsec) */
318 #define MIN_VSYNC_PLUS_BP		550
319 	/* blanking formula gradient */
320 #define GTF_M				600
321 	/* blanking formula offset */
322 #define GTF_C				40
323 	/* blanking formula scaling factor */
324 #define GTF_K				128
325 	/* blanking formula scaling factor */
326 #define GTF_J				20
327 	/* C' and M' are part of the Blanking Duty Cycle computation */
328 #define GTF_C_PRIME		(((GTF_C - GTF_J) * GTF_K / 256) + GTF_J)
329 #define GTF_M_PRIME		(GTF_K * GTF_M / 256)
330 	struct drm_display_mode *drm_mode;
331 	unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
332 	int top_margin, bottom_margin;
333 	int interlace;
334 	unsigned int hfreq_est;
335 	int vsync_plus_bp, vback_porch;
336 	unsigned int vtotal_lines, vfieldrate_est, hperiod;
337 	unsigned int vfield_rate, vframe_rate;
338 	int left_margin, right_margin;
339 	unsigned int total_active_pixels, ideal_duty_cycle;
340 	unsigned int hblank, total_pixels, pixel_freq;
341 	int hsync, hfront_porch, vodd_front_porch_lines;
342 	unsigned int tmp1, tmp2;
343 
344 	drm_mode = drm_mode_create(dev);
345 	if (!drm_mode)
346 		return NULL;
347 
348 	/* 1. In order to give correct results, the number of horizontal
349 	 * pixels requested is first processed to ensure that it is divisible
350 	 * by the character size, by rounding it to the nearest character
351 	 * cell boundary:
352 	 */
353 	hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
354 	hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
355 
356 	/* 2. If interlace is requested, the number of vertical lines assumed
357 	 * by the calculation must be halved, as the computation calculates
358 	 * the number of vertical lines per field.
359 	 */
360 	if (interlaced)
361 		vdisplay_rnd = vdisplay / 2;
362 	else
363 		vdisplay_rnd = vdisplay;
364 
365 	/* 3. Find the frame rate required: */
366 	if (interlaced)
367 		vfieldrate_rqd = vrefresh * 2;
368 	else
369 		vfieldrate_rqd = vrefresh;
370 
371 	/* 4. Find number of lines in Top margin: */
372 	top_margin = 0;
373 	if (margins)
374 		top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
375 				1000;
376 	/* 5. Find number of lines in bottom margin: */
377 	bottom_margin = top_margin;
378 
379 	/* 6. If interlace is required, then set variable interlace: */
380 	if (interlaced)
381 		interlace = 1;
382 	else
383 		interlace = 0;
384 
385 	/* 7. Estimate the Horizontal frequency */
386 	{
387 		tmp1 = (1000000  - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
388 		tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
389 				2 + interlace;
390 		hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
391 	}
392 
393 	/* 8. Find the number of lines in V sync + back porch */
394 	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
395 	vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
396 	vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
397 	/*  9. Find the number of lines in V back porch alone: */
398 	vback_porch = vsync_plus_bp - V_SYNC_RQD;
399 	/*  10. Find the total number of lines in Vertical field period: */
400 	vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
401 			vsync_plus_bp + GTF_MIN_V_PORCH;
402 	/*  11. Estimate the Vertical field frequency: */
403 	vfieldrate_est = hfreq_est / vtotal_lines;
404 	/*  12. Find the actual horizontal period: */
405 	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
406 
407 	/*  13. Find the actual Vertical field frequency: */
408 	vfield_rate = hfreq_est / vtotal_lines;
409 	/*  14. Find the Vertical frame frequency: */
410 	if (interlaced)
411 		vframe_rate = vfield_rate / 2;
412 	else
413 		vframe_rate = vfield_rate;
414 	/*  15. Find number of pixels in left margin: */
415 	if (margins)
416 		left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
417 				1000;
418 	else
419 		left_margin = 0;
420 
421 	/* 16.Find number of pixels in right margin: */
422 	right_margin = left_margin;
423 	/* 17.Find total number of active pixels in image and left and right */
424 	total_active_pixels = hdisplay_rnd + left_margin + right_margin;
425 	/* 18.Find the ideal blanking duty cycle from blanking duty cycle */
426 	ideal_duty_cycle = GTF_C_PRIME * 1000 -
427 				(GTF_M_PRIME * 1000000 / hfreq_est);
428 	/* 19.Find the number of pixels in the blanking time to the nearest
429 	 * double character cell: */
430 	hblank = total_active_pixels * ideal_duty_cycle /
431 			(100000 - ideal_duty_cycle);
432 	hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
433 	hblank = hblank * 2 * GTF_CELL_GRAN;
434 	/* 20.Find total number of pixels: */
435 	total_pixels = total_active_pixels + hblank;
436 	/* 21.Find pixel clock frequency: */
437 	pixel_freq = total_pixels * hfreq_est / 1000;
438 	/* Stage 1 computations are now complete; I should really pass
439 	 * the results to another function and do the Stage 2 computations,
440 	 * but I only need a few more values so I'll just append the
441 	 * computations here for now */
442 	/* 17. Find the number of pixels in the horizontal sync period: */
443 	hsync = H_SYNC_PERCENT * total_pixels / 100;
444 	hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
445 	hsync = hsync * GTF_CELL_GRAN;
446 	/* 18. Find the number of pixels in horizontal front porch period */
447 	hfront_porch = hblank / 2 - hsync;
448 	/*  36. Find the number of lines in the odd front porch period: */
449 	vodd_front_porch_lines = GTF_MIN_V_PORCH ;
450 
451 	/* finally, pack the results in the mode struct */
452 	drm_mode->hdisplay = hdisplay_rnd;
453 	drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
454 	drm_mode->hsync_end = drm_mode->hsync_start + hsync;
455 	drm_mode->htotal = total_pixels;
456 	drm_mode->vdisplay = vdisplay_rnd;
457 	drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
458 	drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
459 	drm_mode->vtotal = vtotal_lines;
460 
461 	drm_mode->clock = pixel_freq;
462 
463 	drm_mode_set_name(drm_mode);
464 	drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
465 
466 	if (interlaced) {
467 		drm_mode->vtotal *= 2;
468 		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
469 	}
470 
471 	return drm_mode;
472 }
473 EXPORT_SYMBOL(drm_gtf_mode);
474 /**
475  * drm_mode_set_name - set the name on a mode
476  * @mode: name will be set in this mode
477  *
478  * LOCKING:
479  * None.
480  *
481  * Set the name of @mode to a standard format.
482  */
483 void drm_mode_set_name(struct drm_display_mode *mode)
484 {
485 	snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d", mode->hdisplay,
486 		 mode->vdisplay);
487 }
488 EXPORT_SYMBOL(drm_mode_set_name);
489 
490 /**
491  * drm_mode_list_concat - move modes from one list to another
492  * @head: source list
493  * @new: dst list
494  *
495  * LOCKING:
496  * Caller must ensure both lists are locked.
497  *
498  * Move all the modes from @head to @new.
499  */
500 void drm_mode_list_concat(struct list_head *head, struct list_head *new)
501 {
502 
503 	struct list_head *entry, *tmp;
504 
505 	list_for_each_safe(entry, tmp, head) {
506 		list_move_tail(entry, new);
507 	}
508 }
509 EXPORT_SYMBOL(drm_mode_list_concat);
510 
511 /**
512  * drm_mode_width - get the width of a mode
513  * @mode: mode
514  *
515  * LOCKING:
516  * None.
517  *
518  * Return @mode's width (hdisplay) value.
519  *
520  * FIXME: is this needed?
521  *
522  * RETURNS:
523  * @mode->hdisplay
524  */
525 int drm_mode_width(struct drm_display_mode *mode)
526 {
527 	return mode->hdisplay;
528 
529 }
530 EXPORT_SYMBOL(drm_mode_width);
531 
532 /**
533  * drm_mode_height - get the height of a mode
534  * @mode: mode
535  *
536  * LOCKING:
537  * None.
538  *
539  * Return @mode's height (vdisplay) value.
540  *
541  * FIXME: is this needed?
542  *
543  * RETURNS:
544  * @mode->vdisplay
545  */
546 int drm_mode_height(struct drm_display_mode *mode)
547 {
548 	return mode->vdisplay;
549 }
550 EXPORT_SYMBOL(drm_mode_height);
551 
552 /** drm_mode_hsync - get the hsync of a mode
553  * @mode: mode
554  *
555  * LOCKING:
556  * None.
557  *
558  * Return @modes's hsync rate in kHz, rounded to the nearest int.
559  */
560 int drm_mode_hsync(struct drm_display_mode *mode)
561 {
562 	unsigned int calc_val;
563 
564 	if (mode->hsync)
565 		return mode->hsync;
566 
567 	if (mode->htotal < 0)
568 		return 0;
569 
570 	calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
571 	calc_val += 500;				/* round to 1000Hz */
572 	calc_val /= 1000;				/* truncate to kHz */
573 
574 	return calc_val;
575 }
576 EXPORT_SYMBOL(drm_mode_hsync);
577 
578 /**
579  * drm_mode_vrefresh - get the vrefresh of a mode
580  * @mode: mode
581  *
582  * LOCKING:
583  * None.
584  *
585  * Return @mode's vrefresh rate in Hz or calculate it if necessary.
586  *
587  * FIXME: why is this needed?  shouldn't vrefresh be set already?
588  *
589  * RETURNS:
590  * Vertical refresh rate. It will be the result of actual value plus 0.5.
591  * If it is 70.288, it will return 70Hz.
592  * If it is 59.6, it will return 60Hz.
593  */
594 int drm_mode_vrefresh(struct drm_display_mode *mode)
595 {
596 	int refresh = 0;
597 	unsigned int calc_val;
598 
599 	if (mode->vrefresh > 0)
600 		refresh = mode->vrefresh;
601 	else if (mode->htotal > 0 && mode->vtotal > 0) {
602 		int vtotal;
603 		vtotal = mode->vtotal;
604 		/* work out vrefresh the value will be x1000 */
605 		calc_val = (mode->clock * 1000);
606 		calc_val /= mode->htotal;
607 		refresh = (calc_val + vtotal / 2) / vtotal;
608 
609 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
610 			refresh *= 2;
611 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
612 			refresh /= 2;
613 		if (mode->vscan > 1)
614 			refresh /= mode->vscan;
615 	}
616 	return refresh;
617 }
618 EXPORT_SYMBOL(drm_mode_vrefresh);
619 
620 /**
621  * drm_mode_set_crtcinfo - set CRTC modesetting parameters
622  * @p: mode
623  * @adjust_flags: unused? (FIXME)
624  *
625  * LOCKING:
626  * None.
627  *
628  * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
629  */
630 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
631 {
632 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
633 		return;
634 
635 	p->crtc_hdisplay = p->hdisplay;
636 	p->crtc_hsync_start = p->hsync_start;
637 	p->crtc_hsync_end = p->hsync_end;
638 	p->crtc_htotal = p->htotal;
639 	p->crtc_hskew = p->hskew;
640 	p->crtc_vdisplay = p->vdisplay;
641 	p->crtc_vsync_start = p->vsync_start;
642 	p->crtc_vsync_end = p->vsync_end;
643 	p->crtc_vtotal = p->vtotal;
644 
645 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
646 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
647 			p->crtc_vdisplay /= 2;
648 			p->crtc_vsync_start /= 2;
649 			p->crtc_vsync_end /= 2;
650 			p->crtc_vtotal /= 2;
651 		}
652 
653 		p->crtc_vtotal |= 1;
654 	}
655 
656 	if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
657 		p->crtc_vdisplay *= 2;
658 		p->crtc_vsync_start *= 2;
659 		p->crtc_vsync_end *= 2;
660 		p->crtc_vtotal *= 2;
661 	}
662 
663 	if (p->vscan > 1) {
664 		p->crtc_vdisplay *= p->vscan;
665 		p->crtc_vsync_start *= p->vscan;
666 		p->crtc_vsync_end *= p->vscan;
667 		p->crtc_vtotal *= p->vscan;
668 	}
669 
670 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
671 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
672 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
673 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
674 
675 	p->crtc_hadjusted = false;
676 	p->crtc_vadjusted = false;
677 }
678 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
679 
680 
681 /**
682  * drm_mode_duplicate - allocate and duplicate an existing mode
683  * @m: mode to duplicate
684  *
685  * LOCKING:
686  * None.
687  *
688  * Just allocate a new mode, copy the existing mode into it, and return
689  * a pointer to it.  Used to create new instances of established modes.
690  */
691 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
692 					    struct drm_display_mode *mode)
693 {
694 	struct drm_display_mode *nmode;
695 	int new_id;
696 
697 	nmode = drm_mode_create(dev);
698 	if (!nmode)
699 		return NULL;
700 
701 	new_id = nmode->base.id;
702 	*nmode = *mode;
703 	nmode->base.id = new_id;
704 	INIT_LIST_HEAD(&nmode->head);
705 	return nmode;
706 }
707 EXPORT_SYMBOL(drm_mode_duplicate);
708 
709 /**
710  * drm_mode_equal - test modes for equality
711  * @mode1: first mode
712  * @mode2: second mode
713  *
714  * LOCKING:
715  * None.
716  *
717  * Check to see if @mode1 and @mode2 are equivalent.
718  *
719  * RETURNS:
720  * True if the modes are equal, false otherwise.
721  */
722 bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)
723 {
724 	/* do clock check convert to PICOS so fb modes get matched
725 	 * the same */
726 	if (mode1->clock && mode2->clock) {
727 		if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
728 			return false;
729 	} else if (mode1->clock != mode2->clock)
730 		return false;
731 
732 	if (mode1->hdisplay == mode2->hdisplay &&
733 	    mode1->hsync_start == mode2->hsync_start &&
734 	    mode1->hsync_end == mode2->hsync_end &&
735 	    mode1->htotal == mode2->htotal &&
736 	    mode1->hskew == mode2->hskew &&
737 	    mode1->vdisplay == mode2->vdisplay &&
738 	    mode1->vsync_start == mode2->vsync_start &&
739 	    mode1->vsync_end == mode2->vsync_end &&
740 	    mode1->vtotal == mode2->vtotal &&
741 	    mode1->vscan == mode2->vscan &&
742 	    mode1->flags == mode2->flags)
743 		return true;
744 
745 	return false;
746 }
747 EXPORT_SYMBOL(drm_mode_equal);
748 
749 /**
750  * drm_mode_validate_size - make sure modes adhere to size constraints
751  * @dev: DRM device
752  * @mode_list: list of modes to check
753  * @maxX: maximum width
754  * @maxY: maximum height
755  * @maxPitch: max pitch
756  *
757  * LOCKING:
758  * Caller must hold a lock protecting @mode_list.
759  *
760  * The DRM device (@dev) has size and pitch limits.  Here we validate the
761  * modes we probed for @dev against those limits and set their status as
762  * necessary.
763  */
764 void drm_mode_validate_size(struct drm_device *dev,
765 			    struct list_head *mode_list,
766 			    int maxX, int maxY, int maxPitch)
767 {
768 	struct drm_display_mode *mode;
769 
770 	list_for_each_entry(mode, mode_list, head) {
771 		if (maxPitch > 0 && mode->hdisplay > maxPitch)
772 			mode->status = MODE_BAD_WIDTH;
773 
774 		if (maxX > 0 && mode->hdisplay > maxX)
775 			mode->status = MODE_VIRTUAL_X;
776 
777 		if (maxY > 0 && mode->vdisplay > maxY)
778 			mode->status = MODE_VIRTUAL_Y;
779 	}
780 }
781 EXPORT_SYMBOL(drm_mode_validate_size);
782 
783 /**
784  * drm_mode_validate_clocks - validate modes against clock limits
785  * @dev: DRM device
786  * @mode_list: list of modes to check
787  * @min: minimum clock rate array
788  * @max: maximum clock rate array
789  * @n_ranges: number of clock ranges (size of arrays)
790  *
791  * LOCKING:
792  * Caller must hold a lock protecting @mode_list.
793  *
794  * Some code may need to check a mode list against the clock limits of the
795  * device in question.  This function walks the mode list, testing to make
796  * sure each mode falls within a given range (defined by @min and @max
797  * arrays) and sets @mode->status as needed.
798  */
799 void drm_mode_validate_clocks(struct drm_device *dev,
800 			      struct list_head *mode_list,
801 			      int *min, int *max, int n_ranges)
802 {
803 	struct drm_display_mode *mode;
804 	int i;
805 
806 	list_for_each_entry(mode, mode_list, head) {
807 		bool good = false;
808 		for (i = 0; i < n_ranges; i++) {
809 			if (mode->clock >= min[i] && mode->clock <= max[i]) {
810 				good = true;
811 				break;
812 			}
813 		}
814 		if (!good)
815 			mode->status = MODE_CLOCK_RANGE;
816 	}
817 }
818 EXPORT_SYMBOL(drm_mode_validate_clocks);
819 
820 /**
821  * drm_mode_prune_invalid - remove invalid modes from mode list
822  * @dev: DRM device
823  * @mode_list: list of modes to check
824  * @verbose: be verbose about it
825  *
826  * LOCKING:
827  * Caller must hold a lock protecting @mode_list.
828  *
829  * Once mode list generation is complete, a caller can use this routine to
830  * remove invalid modes from a mode list.  If any of the modes have a
831  * status other than %MODE_OK, they are removed from @mode_list and freed.
832  */
833 void drm_mode_prune_invalid(struct drm_device *dev,
834 			    struct list_head *mode_list, bool verbose)
835 {
836 	struct drm_display_mode *mode, *t;
837 
838 	list_for_each_entry_safe(mode, t, mode_list, head) {
839 		if (mode->status != MODE_OK) {
840 			list_del(&mode->head);
841 			if (verbose) {
842 				drm_mode_debug_printmodeline(mode);
843 				DRM_DEBUG_KMS("Not using %s mode %d\n",
844 					mode->name, mode->status);
845 			}
846 			drm_mode_destroy(dev, mode);
847 		}
848 	}
849 }
850 EXPORT_SYMBOL(drm_mode_prune_invalid);
851 
852 /**
853  * drm_mode_compare - compare modes for favorability
854  * @priv: unused
855  * @lh_a: list_head for first mode
856  * @lh_b: list_head for second mode
857  *
858  * LOCKING:
859  * None.
860  *
861  * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
862  * which is better.
863  *
864  * RETURNS:
865  * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
866  * positive if @lh_b is better than @lh_a.
867  */
868 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
869 {
870 	struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
871 	struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
872 	int diff;
873 
874 	diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
875 		((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
876 	if (diff)
877 		return diff;
878 	diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
879 	if (diff)
880 		return diff;
881 	diff = b->clock - a->clock;
882 	return diff;
883 }
884 
885 /**
886  * drm_mode_sort - sort mode list
887  * @mode_list: list to sort
888  *
889  * LOCKING:
890  * Caller must hold a lock protecting @mode_list.
891  *
892  * Sort @mode_list by favorability, putting good modes first.
893  */
894 void drm_mode_sort(struct list_head *mode_list)
895 {
896 	list_sort(NULL, mode_list, drm_mode_compare);
897 }
898 EXPORT_SYMBOL(drm_mode_sort);
899 
900 /**
901  * drm_mode_connector_list_update - update the mode list for the connector
902  * @connector: the connector to update
903  *
904  * LOCKING:
905  * Caller must hold a lock protecting @mode_list.
906  *
907  * This moves the modes from the @connector probed_modes list
908  * to the actual mode list. It compares the probed mode against the current
909  * list and only adds different modes. All modes unverified after this point
910  * will be removed by the prune invalid modes.
911  */
912 void drm_mode_connector_list_update(struct drm_connector *connector)
913 {
914 	struct drm_display_mode *mode;
915 	struct drm_display_mode *pmode, *pt;
916 	int found_it;
917 
918 	list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
919 				 head) {
920 		found_it = 0;
921 		/* go through current modes checking for the new probed mode */
922 		list_for_each_entry(mode, &connector->modes, head) {
923 			if (drm_mode_equal(pmode, mode)) {
924 				found_it = 1;
925 				/* if equal delete the probed mode */
926 				mode->status = pmode->status;
927 				/* Merge type bits together */
928 				mode->type |= pmode->type;
929 				list_del(&pmode->head);
930 				drm_mode_destroy(connector->dev, pmode);
931 				break;
932 			}
933 		}
934 
935 		if (!found_it) {
936 			list_move_tail(&pmode->head, &connector->modes);
937 		}
938 	}
939 }
940 EXPORT_SYMBOL(drm_mode_connector_list_update);
941