1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 */ 32 33 #include <linux/list.h> 34 #include <linux/list_sort.h> 35 #include <linux/export.h> 36 #include <drm/drmP.h> 37 #include <drm/drm_crtc.h> 38 #include <video/of_videomode.h> 39 #include <video/videomode.h> 40 41 /** 42 * drm_mode_debug_printmodeline - debug print a mode 43 * @dev: DRM device 44 * @mode: mode to print 45 * 46 * LOCKING: 47 * None. 48 * 49 * Describe @mode using DRM_DEBUG. 50 */ 51 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 52 { 53 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 54 "0x%x 0x%x\n", 55 mode->base.id, mode->name, mode->vrefresh, mode->clock, 56 mode->hdisplay, mode->hsync_start, 57 mode->hsync_end, mode->htotal, 58 mode->vdisplay, mode->vsync_start, 59 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 60 } 61 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 62 63 /** 64 * drm_cvt_mode -create a modeline based on CVT algorithm 65 * @dev: DRM device 66 * @hdisplay: hdisplay size 67 * @vdisplay: vdisplay size 68 * @vrefresh : vrefresh rate 69 * @reduced : Whether the GTF calculation is simplified 70 * @interlaced:Whether the interlace is supported 71 * 72 * LOCKING: 73 * none. 74 * 75 * return the modeline based on CVT algorithm 76 * 77 * This function is called to generate the modeline based on CVT algorithm 78 * according to the hdisplay, vdisplay, vrefresh. 79 * It is based from the VESA(TM) Coordinated Video Timing Generator by 80 * Graham Loveridge April 9, 2003 available at 81 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 82 * 83 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 84 * What I have done is to translate it by using integer calculation. 85 */ 86 #define HV_FACTOR 1000 87 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 88 int vdisplay, int vrefresh, 89 bool reduced, bool interlaced, bool margins) 90 { 91 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 92 #define CVT_MARGIN_PERCENTAGE 18 93 /* 2) character cell horizontal granularity (pixels) - default 8 */ 94 #define CVT_H_GRANULARITY 8 95 /* 3) Minimum vertical porch (lines) - default 3 */ 96 #define CVT_MIN_V_PORCH 3 97 /* 4) Minimum number of vertical back porch lines - default 6 */ 98 #define CVT_MIN_V_BPORCH 6 99 /* Pixel Clock step (kHz) */ 100 #define CVT_CLOCK_STEP 250 101 struct drm_display_mode *drm_mode; 102 unsigned int vfieldrate, hperiod; 103 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 104 int interlace; 105 106 /* allocate the drm_display_mode structure. If failure, we will 107 * return directly 108 */ 109 drm_mode = drm_mode_create(dev); 110 if (!drm_mode) 111 return NULL; 112 113 /* the CVT default refresh rate is 60Hz */ 114 if (!vrefresh) 115 vrefresh = 60; 116 117 /* the required field fresh rate */ 118 if (interlaced) 119 vfieldrate = vrefresh * 2; 120 else 121 vfieldrate = vrefresh; 122 123 /* horizontal pixels */ 124 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 125 126 /* determine the left&right borders */ 127 hmargin = 0; 128 if (margins) { 129 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 130 hmargin -= hmargin % CVT_H_GRANULARITY; 131 } 132 /* find the total active pixels */ 133 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 134 135 /* find the number of lines per field */ 136 if (interlaced) 137 vdisplay_rnd = vdisplay / 2; 138 else 139 vdisplay_rnd = vdisplay; 140 141 /* find the top & bottom borders */ 142 vmargin = 0; 143 if (margins) 144 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 145 146 drm_mode->vdisplay = vdisplay + 2 * vmargin; 147 148 /* Interlaced */ 149 if (interlaced) 150 interlace = 1; 151 else 152 interlace = 0; 153 154 /* Determine VSync Width from aspect ratio */ 155 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 156 vsync = 4; 157 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 158 vsync = 5; 159 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 160 vsync = 6; 161 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 162 vsync = 7; 163 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 164 vsync = 7; 165 else /* custom */ 166 vsync = 10; 167 168 if (!reduced) { 169 /* simplify the GTF calculation */ 170 /* 4) Minimum time of vertical sync + back porch interval (µs) 171 * default 550.0 172 */ 173 int tmp1, tmp2; 174 #define CVT_MIN_VSYNC_BP 550 175 /* 3) Nominal HSync width (% of line period) - default 8 */ 176 #define CVT_HSYNC_PERCENTAGE 8 177 unsigned int hblank_percentage; 178 int vsyncandback_porch, vback_porch, hblank; 179 180 /* estimated the horizontal period */ 181 tmp1 = HV_FACTOR * 1000000 - 182 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 183 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 184 interlace; 185 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 186 187 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 188 /* 9. Find number of lines in sync + backporch */ 189 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 190 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 191 else 192 vsyncandback_porch = tmp1; 193 /* 10. Find number of lines in back porch */ 194 vback_porch = vsyncandback_porch - vsync; 195 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 196 vsyncandback_porch + CVT_MIN_V_PORCH; 197 /* 5) Definition of Horizontal blanking time limitation */ 198 /* Gradient (%/kHz) - default 600 */ 199 #define CVT_M_FACTOR 600 200 /* Offset (%) - default 40 */ 201 #define CVT_C_FACTOR 40 202 /* Blanking time scaling factor - default 128 */ 203 #define CVT_K_FACTOR 128 204 /* Scaling factor weighting - default 20 */ 205 #define CVT_J_FACTOR 20 206 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 207 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 208 CVT_J_FACTOR) 209 /* 12. Find ideal blanking duty cycle from formula */ 210 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 211 hperiod / 1000; 212 /* 13. Blanking time */ 213 if (hblank_percentage < 20 * HV_FACTOR) 214 hblank_percentage = 20 * HV_FACTOR; 215 hblank = drm_mode->hdisplay * hblank_percentage / 216 (100 * HV_FACTOR - hblank_percentage); 217 hblank -= hblank % (2 * CVT_H_GRANULARITY); 218 /* 14. find the total pixes per line */ 219 drm_mode->htotal = drm_mode->hdisplay + hblank; 220 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 221 drm_mode->hsync_start = drm_mode->hsync_end - 222 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 223 drm_mode->hsync_start += CVT_H_GRANULARITY - 224 drm_mode->hsync_start % CVT_H_GRANULARITY; 225 /* fill the Vsync values */ 226 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 227 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 228 } else { 229 /* Reduced blanking */ 230 /* Minimum vertical blanking interval time (µs)- default 460 */ 231 #define CVT_RB_MIN_VBLANK 460 232 /* Fixed number of clocks for horizontal sync */ 233 #define CVT_RB_H_SYNC 32 234 /* Fixed number of clocks for horizontal blanking */ 235 #define CVT_RB_H_BLANK 160 236 /* Fixed number of lines for vertical front porch - default 3*/ 237 #define CVT_RB_VFPORCH 3 238 int vbilines; 239 int tmp1, tmp2; 240 /* 8. Estimate Horizontal period. */ 241 tmp1 = HV_FACTOR * 1000000 - 242 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 243 tmp2 = vdisplay_rnd + 2 * vmargin; 244 hperiod = tmp1 / (tmp2 * vfieldrate); 245 /* 9. Find number of lines in vertical blanking */ 246 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 247 /* 10. Check if vertical blanking is sufficient */ 248 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 249 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 250 /* 11. Find total number of lines in vertical field */ 251 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 252 /* 12. Find total number of pixels in a line */ 253 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 254 /* Fill in HSync values */ 255 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 256 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 257 /* Fill in VSync values */ 258 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 259 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 260 } 261 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 262 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 263 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 264 /* 18/16. Find actual vertical frame frequency */ 265 /* ignore - just set the mode flag for interlaced */ 266 if (interlaced) { 267 drm_mode->vtotal *= 2; 268 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 269 } 270 /* Fill the mode line name */ 271 drm_mode_set_name(drm_mode); 272 if (reduced) 273 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 274 DRM_MODE_FLAG_NVSYNC); 275 else 276 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 277 DRM_MODE_FLAG_NHSYNC); 278 279 return drm_mode; 280 } 281 EXPORT_SYMBOL(drm_cvt_mode); 282 283 /** 284 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 285 * 286 * @dev :drm device 287 * @hdisplay :hdisplay size 288 * @vdisplay :vdisplay size 289 * @vrefresh :vrefresh rate. 290 * @interlaced :whether the interlace is supported 291 * @margins :desired margin size 292 * @GTF_[MCKJ] :extended GTF formula parameters 293 * 294 * LOCKING. 295 * none. 296 * 297 * return the modeline based on full GTF algorithm. 298 * 299 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 300 * in here multiplied by two. For a C of 40, pass in 80. 301 */ 302 struct drm_display_mode * 303 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 304 int vrefresh, bool interlaced, int margins, 305 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 306 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 307 #define GTF_MARGIN_PERCENTAGE 18 308 /* 2) character cell horizontal granularity (pixels) - default 8 */ 309 #define GTF_CELL_GRAN 8 310 /* 3) Minimum vertical porch (lines) - default 3 */ 311 #define GTF_MIN_V_PORCH 1 312 /* width of vsync in lines */ 313 #define V_SYNC_RQD 3 314 /* width of hsync as % of total line */ 315 #define H_SYNC_PERCENT 8 316 /* min time of vsync + back porch (microsec) */ 317 #define MIN_VSYNC_PLUS_BP 550 318 /* C' and M' are part of the Blanking Duty Cycle computation */ 319 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 320 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 321 struct drm_display_mode *drm_mode; 322 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 323 int top_margin, bottom_margin; 324 int interlace; 325 unsigned int hfreq_est; 326 int vsync_plus_bp, vback_porch; 327 unsigned int vtotal_lines, vfieldrate_est, hperiod; 328 unsigned int vfield_rate, vframe_rate; 329 int left_margin, right_margin; 330 unsigned int total_active_pixels, ideal_duty_cycle; 331 unsigned int hblank, total_pixels, pixel_freq; 332 int hsync, hfront_porch, vodd_front_porch_lines; 333 unsigned int tmp1, tmp2; 334 335 drm_mode = drm_mode_create(dev); 336 if (!drm_mode) 337 return NULL; 338 339 /* 1. In order to give correct results, the number of horizontal 340 * pixels requested is first processed to ensure that it is divisible 341 * by the character size, by rounding it to the nearest character 342 * cell boundary: 343 */ 344 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 345 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 346 347 /* 2. If interlace is requested, the number of vertical lines assumed 348 * by the calculation must be halved, as the computation calculates 349 * the number of vertical lines per field. 350 */ 351 if (interlaced) 352 vdisplay_rnd = vdisplay / 2; 353 else 354 vdisplay_rnd = vdisplay; 355 356 /* 3. Find the frame rate required: */ 357 if (interlaced) 358 vfieldrate_rqd = vrefresh * 2; 359 else 360 vfieldrate_rqd = vrefresh; 361 362 /* 4. Find number of lines in Top margin: */ 363 top_margin = 0; 364 if (margins) 365 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 366 1000; 367 /* 5. Find number of lines in bottom margin: */ 368 bottom_margin = top_margin; 369 370 /* 6. If interlace is required, then set variable interlace: */ 371 if (interlaced) 372 interlace = 1; 373 else 374 interlace = 0; 375 376 /* 7. Estimate the Horizontal frequency */ 377 { 378 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 379 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 380 2 + interlace; 381 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 382 } 383 384 /* 8. Find the number of lines in V sync + back porch */ 385 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 386 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 387 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 388 /* 9. Find the number of lines in V back porch alone: */ 389 vback_porch = vsync_plus_bp - V_SYNC_RQD; 390 /* 10. Find the total number of lines in Vertical field period: */ 391 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 392 vsync_plus_bp + GTF_MIN_V_PORCH; 393 /* 11. Estimate the Vertical field frequency: */ 394 vfieldrate_est = hfreq_est / vtotal_lines; 395 /* 12. Find the actual horizontal period: */ 396 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 397 398 /* 13. Find the actual Vertical field frequency: */ 399 vfield_rate = hfreq_est / vtotal_lines; 400 /* 14. Find the Vertical frame frequency: */ 401 if (interlaced) 402 vframe_rate = vfield_rate / 2; 403 else 404 vframe_rate = vfield_rate; 405 /* 15. Find number of pixels in left margin: */ 406 if (margins) 407 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 408 1000; 409 else 410 left_margin = 0; 411 412 /* 16.Find number of pixels in right margin: */ 413 right_margin = left_margin; 414 /* 17.Find total number of active pixels in image and left and right */ 415 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 416 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 417 ideal_duty_cycle = GTF_C_PRIME * 1000 - 418 (GTF_M_PRIME * 1000000 / hfreq_est); 419 /* 19.Find the number of pixels in the blanking time to the nearest 420 * double character cell: */ 421 hblank = total_active_pixels * ideal_duty_cycle / 422 (100000 - ideal_duty_cycle); 423 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 424 hblank = hblank * 2 * GTF_CELL_GRAN; 425 /* 20.Find total number of pixels: */ 426 total_pixels = total_active_pixels + hblank; 427 /* 21.Find pixel clock frequency: */ 428 pixel_freq = total_pixels * hfreq_est / 1000; 429 /* Stage 1 computations are now complete; I should really pass 430 * the results to another function and do the Stage 2 computations, 431 * but I only need a few more values so I'll just append the 432 * computations here for now */ 433 /* 17. Find the number of pixels in the horizontal sync period: */ 434 hsync = H_SYNC_PERCENT * total_pixels / 100; 435 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 436 hsync = hsync * GTF_CELL_GRAN; 437 /* 18. Find the number of pixels in horizontal front porch period */ 438 hfront_porch = hblank / 2 - hsync; 439 /* 36. Find the number of lines in the odd front porch period: */ 440 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 441 442 /* finally, pack the results in the mode struct */ 443 drm_mode->hdisplay = hdisplay_rnd; 444 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 445 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 446 drm_mode->htotal = total_pixels; 447 drm_mode->vdisplay = vdisplay_rnd; 448 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 449 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 450 drm_mode->vtotal = vtotal_lines; 451 452 drm_mode->clock = pixel_freq; 453 454 if (interlaced) { 455 drm_mode->vtotal *= 2; 456 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 457 } 458 459 drm_mode_set_name(drm_mode); 460 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 461 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 462 else 463 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 464 465 return drm_mode; 466 } 467 EXPORT_SYMBOL(drm_gtf_mode_complex); 468 469 /** 470 * drm_gtf_mode - create the modeline based on GTF algorithm 471 * 472 * @dev :drm device 473 * @hdisplay :hdisplay size 474 * @vdisplay :vdisplay size 475 * @vrefresh :vrefresh rate. 476 * @interlaced :whether the interlace is supported 477 * @margins :whether the margin is supported 478 * 479 * LOCKING. 480 * none. 481 * 482 * return the modeline based on GTF algorithm 483 * 484 * This function is to create the modeline based on the GTF algorithm. 485 * Generalized Timing Formula is derived from: 486 * GTF Spreadsheet by Andy Morrish (1/5/97) 487 * available at http://www.vesa.org 488 * 489 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 490 * What I have done is to translate it by using integer calculation. 491 * I also refer to the function of fb_get_mode in the file of 492 * drivers/video/fbmon.c 493 * 494 * Standard GTF parameters: 495 * M = 600 496 * C = 40 497 * K = 128 498 * J = 20 499 */ 500 struct drm_display_mode * 501 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 502 bool lace, int margins) 503 { 504 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 505 margins, 600, 40 * 2, 128, 20 * 2); 506 } 507 EXPORT_SYMBOL(drm_gtf_mode); 508 509 #ifdef CONFIG_VIDEOMODE_HELPERS 510 int drm_display_mode_from_videomode(const struct videomode *vm, 511 struct drm_display_mode *dmode) 512 { 513 dmode->hdisplay = vm->hactive; 514 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; 515 dmode->hsync_end = dmode->hsync_start + vm->hsync_len; 516 dmode->htotal = dmode->hsync_end + vm->hback_porch; 517 518 dmode->vdisplay = vm->vactive; 519 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch; 520 dmode->vsync_end = dmode->vsync_start + vm->vsync_len; 521 dmode->vtotal = dmode->vsync_end + vm->vback_porch; 522 523 dmode->clock = vm->pixelclock / 1000; 524 525 dmode->flags = 0; 526 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH) 527 dmode->flags |= DRM_MODE_FLAG_PHSYNC; 528 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW) 529 dmode->flags |= DRM_MODE_FLAG_NHSYNC; 530 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH) 531 dmode->flags |= DRM_MODE_FLAG_PVSYNC; 532 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW) 533 dmode->flags |= DRM_MODE_FLAG_NVSYNC; 534 if (vm->flags & DISPLAY_FLAGS_INTERLACED) 535 dmode->flags |= DRM_MODE_FLAG_INTERLACE; 536 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN) 537 dmode->flags |= DRM_MODE_FLAG_DBLSCAN; 538 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) 539 dmode->flags |= DRM_MODE_FLAG_DBLCLK; 540 drm_mode_set_name(dmode); 541 542 return 0; 543 } 544 EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode); 545 546 #ifdef CONFIG_OF 547 /** 548 * of_get_drm_display_mode - get a drm_display_mode from devicetree 549 * @np: device_node with the timing specification 550 * @dmode: will be set to the return value 551 * @index: index into the list of display timings in devicetree 552 * 553 * This function is expensive and should only be used, if only one mode is to be 554 * read from DT. To get multiple modes start with of_get_display_timings and 555 * work with that instead. 556 */ 557 int of_get_drm_display_mode(struct device_node *np, 558 struct drm_display_mode *dmode, int index) 559 { 560 struct videomode vm; 561 int ret; 562 563 ret = of_get_videomode(np, &vm, index); 564 if (ret) 565 return ret; 566 567 drm_display_mode_from_videomode(&vm, dmode); 568 569 pr_debug("%s: got %dx%d display mode from %s\n", 570 of_node_full_name(np), vm.hactive, vm.vactive, np->name); 571 drm_mode_debug_printmodeline(dmode); 572 573 return 0; 574 } 575 EXPORT_SYMBOL_GPL(of_get_drm_display_mode); 576 #endif /* CONFIG_OF */ 577 #endif /* CONFIG_VIDEOMODE_HELPERS */ 578 579 /** 580 * drm_mode_set_name - set the name on a mode 581 * @mode: name will be set in this mode 582 * 583 * LOCKING: 584 * None. 585 * 586 * Set the name of @mode to a standard format. 587 */ 588 void drm_mode_set_name(struct drm_display_mode *mode) 589 { 590 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 591 592 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 593 mode->hdisplay, mode->vdisplay, 594 interlaced ? "i" : ""); 595 } 596 EXPORT_SYMBOL(drm_mode_set_name); 597 598 /** 599 * drm_mode_width - get the width of a mode 600 * @mode: mode 601 * 602 * LOCKING: 603 * None. 604 * 605 * Return @mode's width (hdisplay) value. 606 * 607 * FIXME: is this needed? 608 * 609 * RETURNS: 610 * @mode->hdisplay 611 */ 612 int drm_mode_width(const struct drm_display_mode *mode) 613 { 614 return mode->hdisplay; 615 616 } 617 EXPORT_SYMBOL(drm_mode_width); 618 619 /** 620 * drm_mode_height - get the height of a mode 621 * @mode: mode 622 * 623 * LOCKING: 624 * None. 625 * 626 * Return @mode's height (vdisplay) value. 627 * 628 * FIXME: is this needed? 629 * 630 * RETURNS: 631 * @mode->vdisplay 632 */ 633 int drm_mode_height(const struct drm_display_mode *mode) 634 { 635 return mode->vdisplay; 636 } 637 EXPORT_SYMBOL(drm_mode_height); 638 639 /** drm_mode_hsync - get the hsync of a mode 640 * @mode: mode 641 * 642 * LOCKING: 643 * None. 644 * 645 * Return @modes's hsync rate in kHz, rounded to the nearest int. 646 */ 647 int drm_mode_hsync(const struct drm_display_mode *mode) 648 { 649 unsigned int calc_val; 650 651 if (mode->hsync) 652 return mode->hsync; 653 654 if (mode->htotal < 0) 655 return 0; 656 657 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 658 calc_val += 500; /* round to 1000Hz */ 659 calc_val /= 1000; /* truncate to kHz */ 660 661 return calc_val; 662 } 663 EXPORT_SYMBOL(drm_mode_hsync); 664 665 /** 666 * drm_mode_vrefresh - get the vrefresh of a mode 667 * @mode: mode 668 * 669 * LOCKING: 670 * None. 671 * 672 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 673 * 674 * FIXME: why is this needed? shouldn't vrefresh be set already? 675 * 676 * RETURNS: 677 * Vertical refresh rate. It will be the result of actual value plus 0.5. 678 * If it is 70.288, it will return 70Hz. 679 * If it is 59.6, it will return 60Hz. 680 */ 681 int drm_mode_vrefresh(const struct drm_display_mode *mode) 682 { 683 int refresh = 0; 684 unsigned int calc_val; 685 686 if (mode->vrefresh > 0) 687 refresh = mode->vrefresh; 688 else if (mode->htotal > 0 && mode->vtotal > 0) { 689 int vtotal; 690 vtotal = mode->vtotal; 691 /* work out vrefresh the value will be x1000 */ 692 calc_val = (mode->clock * 1000); 693 calc_val /= mode->htotal; 694 refresh = (calc_val + vtotal / 2) / vtotal; 695 696 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 697 refresh *= 2; 698 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 699 refresh /= 2; 700 if (mode->vscan > 1) 701 refresh /= mode->vscan; 702 } 703 return refresh; 704 } 705 EXPORT_SYMBOL(drm_mode_vrefresh); 706 707 /** 708 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 709 * @p: mode 710 * @adjust_flags: a combination of adjustment flags 711 * 712 * LOCKING: 713 * None. 714 * 715 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 716 * 717 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 718 * interlaced modes. 719 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 720 * buffers containing two eyes (only adjust the timings when needed, eg. for 721 * "frame packing" or "side by side full"). 722 */ 723 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 724 { 725 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 726 return; 727 728 p->crtc_clock = p->clock; 729 p->crtc_hdisplay = p->hdisplay; 730 p->crtc_hsync_start = p->hsync_start; 731 p->crtc_hsync_end = p->hsync_end; 732 p->crtc_htotal = p->htotal; 733 p->crtc_hskew = p->hskew; 734 p->crtc_vdisplay = p->vdisplay; 735 p->crtc_vsync_start = p->vsync_start; 736 p->crtc_vsync_end = p->vsync_end; 737 p->crtc_vtotal = p->vtotal; 738 739 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 740 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 741 p->crtc_vdisplay /= 2; 742 p->crtc_vsync_start /= 2; 743 p->crtc_vsync_end /= 2; 744 p->crtc_vtotal /= 2; 745 } 746 } 747 748 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 749 p->crtc_vdisplay *= 2; 750 p->crtc_vsync_start *= 2; 751 p->crtc_vsync_end *= 2; 752 p->crtc_vtotal *= 2; 753 } 754 755 if (p->vscan > 1) { 756 p->crtc_vdisplay *= p->vscan; 757 p->crtc_vsync_start *= p->vscan; 758 p->crtc_vsync_end *= p->vscan; 759 p->crtc_vtotal *= p->vscan; 760 } 761 762 if (adjust_flags & CRTC_STEREO_DOUBLE) { 763 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 764 765 switch (layout) { 766 case DRM_MODE_FLAG_3D_FRAME_PACKING: 767 p->crtc_clock *= 2; 768 p->crtc_vdisplay += p->crtc_vtotal; 769 p->crtc_vsync_start += p->crtc_vtotal; 770 p->crtc_vsync_end += p->crtc_vtotal; 771 p->crtc_vtotal += p->crtc_vtotal; 772 break; 773 } 774 } 775 776 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 777 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 778 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 779 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 780 } 781 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 782 783 784 /** 785 * drm_mode_copy - copy the mode 786 * @dst: mode to overwrite 787 * @src: mode to copy 788 * 789 * LOCKING: 790 * None. 791 * 792 * Copy an existing mode into another mode, preserving the object id and 793 * list head of the destination mode. 794 */ 795 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) 796 { 797 int id = dst->base.id; 798 struct list_head head = dst->head; 799 800 *dst = *src; 801 dst->base.id = id; 802 dst->head = head; 803 } 804 EXPORT_SYMBOL(drm_mode_copy); 805 806 /** 807 * drm_mode_duplicate - allocate and duplicate an existing mode 808 * @m: mode to duplicate 809 * 810 * LOCKING: 811 * None. 812 * 813 * Just allocate a new mode, copy the existing mode into it, and return 814 * a pointer to it. Used to create new instances of established modes. 815 */ 816 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 817 const struct drm_display_mode *mode) 818 { 819 struct drm_display_mode *nmode; 820 821 nmode = drm_mode_create(dev); 822 if (!nmode) 823 return NULL; 824 825 drm_mode_copy(nmode, mode); 826 827 return nmode; 828 } 829 EXPORT_SYMBOL(drm_mode_duplicate); 830 831 /** 832 * drm_mode_equal - test modes for equality 833 * @mode1: first mode 834 * @mode2: second mode 835 * 836 * LOCKING: 837 * None. 838 * 839 * Check to see if @mode1 and @mode2 are equivalent. 840 * 841 * RETURNS: 842 * True if the modes are equal, false otherwise. 843 */ 844 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 845 { 846 /* do clock check convert to PICOS so fb modes get matched 847 * the same */ 848 if (mode1->clock && mode2->clock) { 849 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 850 return false; 851 } else if (mode1->clock != mode2->clock) 852 return false; 853 854 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) != 855 (mode2->flags & DRM_MODE_FLAG_3D_MASK)) 856 return false; 857 858 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2); 859 } 860 EXPORT_SYMBOL(drm_mode_equal); 861 862 /** 863 * drm_mode_equal_no_clocks_no_stereo - test modes for equality 864 * @mode1: first mode 865 * @mode2: second mode 866 * 867 * LOCKING: 868 * None. 869 * 870 * Check to see if @mode1 and @mode2 are equivalent, but 871 * don't check the pixel clocks nor the stereo layout. 872 * 873 * RETURNS: 874 * True if the modes are equal, false otherwise. 875 */ 876 bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, 877 const struct drm_display_mode *mode2) 878 { 879 if (mode1->hdisplay == mode2->hdisplay && 880 mode1->hsync_start == mode2->hsync_start && 881 mode1->hsync_end == mode2->hsync_end && 882 mode1->htotal == mode2->htotal && 883 mode1->hskew == mode2->hskew && 884 mode1->vdisplay == mode2->vdisplay && 885 mode1->vsync_start == mode2->vsync_start && 886 mode1->vsync_end == mode2->vsync_end && 887 mode1->vtotal == mode2->vtotal && 888 mode1->vscan == mode2->vscan && 889 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) == 890 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK)) 891 return true; 892 893 return false; 894 } 895 EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo); 896 897 /** 898 * drm_mode_validate_size - make sure modes adhere to size constraints 899 * @dev: DRM device 900 * @mode_list: list of modes to check 901 * @maxX: maximum width 902 * @maxY: maximum height 903 * @maxPitch: max pitch 904 * 905 * LOCKING: 906 * Caller must hold a lock protecting @mode_list. 907 * 908 * The DRM device (@dev) has size and pitch limits. Here we validate the 909 * modes we probed for @dev against those limits and set their status as 910 * necessary. 911 */ 912 void drm_mode_validate_size(struct drm_device *dev, 913 struct list_head *mode_list, 914 int maxX, int maxY, int maxPitch) 915 { 916 struct drm_display_mode *mode; 917 918 list_for_each_entry(mode, mode_list, head) { 919 if (maxPitch > 0 && mode->hdisplay > maxPitch) 920 mode->status = MODE_BAD_WIDTH; 921 922 if (maxX > 0 && mode->hdisplay > maxX) 923 mode->status = MODE_VIRTUAL_X; 924 925 if (maxY > 0 && mode->vdisplay > maxY) 926 mode->status = MODE_VIRTUAL_Y; 927 } 928 } 929 EXPORT_SYMBOL(drm_mode_validate_size); 930 931 /** 932 * drm_mode_prune_invalid - remove invalid modes from mode list 933 * @dev: DRM device 934 * @mode_list: list of modes to check 935 * @verbose: be verbose about it 936 * 937 * LOCKING: 938 * Caller must hold a lock protecting @mode_list. 939 * 940 * Once mode list generation is complete, a caller can use this routine to 941 * remove invalid modes from a mode list. If any of the modes have a 942 * status other than %MODE_OK, they are removed from @mode_list and freed. 943 */ 944 void drm_mode_prune_invalid(struct drm_device *dev, 945 struct list_head *mode_list, bool verbose) 946 { 947 struct drm_display_mode *mode, *t; 948 949 list_for_each_entry_safe(mode, t, mode_list, head) { 950 if (mode->status != MODE_OK) { 951 list_del(&mode->head); 952 if (verbose) { 953 drm_mode_debug_printmodeline(mode); 954 DRM_DEBUG_KMS("Not using %s mode %d\n", 955 mode->name, mode->status); 956 } 957 drm_mode_destroy(dev, mode); 958 } 959 } 960 } 961 EXPORT_SYMBOL(drm_mode_prune_invalid); 962 963 /** 964 * drm_mode_compare - compare modes for favorability 965 * @priv: unused 966 * @lh_a: list_head for first mode 967 * @lh_b: list_head for second mode 968 * 969 * LOCKING: 970 * None. 971 * 972 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 973 * which is better. 974 * 975 * RETURNS: 976 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 977 * positive if @lh_b is better than @lh_a. 978 */ 979 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 980 { 981 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 982 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 983 int diff; 984 985 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 986 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 987 if (diff) 988 return diff; 989 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 990 if (diff) 991 return diff; 992 993 diff = b->vrefresh - a->vrefresh; 994 if (diff) 995 return diff; 996 997 diff = b->clock - a->clock; 998 return diff; 999 } 1000 1001 /** 1002 * drm_mode_sort - sort mode list 1003 * @mode_list: list to sort 1004 * 1005 * LOCKING: 1006 * Caller must hold a lock protecting @mode_list. 1007 * 1008 * Sort @mode_list by favorability, putting good modes first. 1009 */ 1010 void drm_mode_sort(struct list_head *mode_list) 1011 { 1012 list_sort(NULL, mode_list, drm_mode_compare); 1013 } 1014 EXPORT_SYMBOL(drm_mode_sort); 1015 1016 /** 1017 * drm_mode_connector_list_update - update the mode list for the connector 1018 * @connector: the connector to update 1019 * 1020 * LOCKING: 1021 * Caller must hold a lock protecting @mode_list. 1022 * 1023 * This moves the modes from the @connector probed_modes list 1024 * to the actual mode list. It compares the probed mode against the current 1025 * list and only adds different modes. All modes unverified after this point 1026 * will be removed by the prune invalid modes. 1027 */ 1028 void drm_mode_connector_list_update(struct drm_connector *connector) 1029 { 1030 struct drm_display_mode *mode; 1031 struct drm_display_mode *pmode, *pt; 1032 int found_it; 1033 1034 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 1035 head) { 1036 found_it = 0; 1037 /* go through current modes checking for the new probed mode */ 1038 list_for_each_entry(mode, &connector->modes, head) { 1039 if (drm_mode_equal(pmode, mode)) { 1040 found_it = 1; 1041 /* if equal delete the probed mode */ 1042 mode->status = pmode->status; 1043 /* Merge type bits together */ 1044 mode->type = pmode->type; 1045 list_del(&pmode->head); 1046 drm_mode_destroy(connector->dev, pmode); 1047 break; 1048 } 1049 } 1050 1051 if (!found_it) { 1052 list_move_tail(&pmode->head, &connector->modes); 1053 } 1054 } 1055 } 1056 EXPORT_SYMBOL(drm_mode_connector_list_update); 1057 1058 /** 1059 * drm_mode_parse_command_line_for_connector - parse command line for connector 1060 * @mode_option - per connector mode option 1061 * @connector - connector to parse line for 1062 * 1063 * This parses the connector specific then generic command lines for 1064 * modes and options to configure the connector. 1065 * 1066 * This uses the same parameters as the fb modedb.c, except for extra 1067 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 1068 * 1069 * enable/enable Digital/disable bit at the end 1070 */ 1071 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 1072 struct drm_connector *connector, 1073 struct drm_cmdline_mode *mode) 1074 { 1075 const char *name; 1076 unsigned int namelen; 1077 bool res_specified = false, bpp_specified = false, refresh_specified = false; 1078 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 1079 bool yres_specified = false, cvt = false, rb = false; 1080 bool interlace = false, margins = false, was_digit = false; 1081 int i; 1082 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 1083 1084 #ifdef CONFIG_FB 1085 if (!mode_option) 1086 mode_option = fb_mode_option; 1087 #endif 1088 1089 if (!mode_option) { 1090 mode->specified = false; 1091 return false; 1092 } 1093 1094 name = mode_option; 1095 namelen = strlen(name); 1096 for (i = namelen-1; i >= 0; i--) { 1097 switch (name[i]) { 1098 case '@': 1099 if (!refresh_specified && !bpp_specified && 1100 !yres_specified && !cvt && !rb && was_digit) { 1101 refresh = simple_strtol(&name[i+1], NULL, 10); 1102 refresh_specified = true; 1103 was_digit = false; 1104 } else 1105 goto done; 1106 break; 1107 case '-': 1108 if (!bpp_specified && !yres_specified && !cvt && 1109 !rb && was_digit) { 1110 bpp = simple_strtol(&name[i+1], NULL, 10); 1111 bpp_specified = true; 1112 was_digit = false; 1113 } else 1114 goto done; 1115 break; 1116 case 'x': 1117 if (!yres_specified && was_digit) { 1118 yres = simple_strtol(&name[i+1], NULL, 10); 1119 yres_specified = true; 1120 was_digit = false; 1121 } else 1122 goto done; 1123 break; 1124 case '0' ... '9': 1125 was_digit = true; 1126 break; 1127 case 'M': 1128 if (yres_specified || cvt || was_digit) 1129 goto done; 1130 cvt = true; 1131 break; 1132 case 'R': 1133 if (yres_specified || cvt || rb || was_digit) 1134 goto done; 1135 rb = true; 1136 break; 1137 case 'm': 1138 if (cvt || yres_specified || was_digit) 1139 goto done; 1140 margins = true; 1141 break; 1142 case 'i': 1143 if (cvt || yres_specified || was_digit) 1144 goto done; 1145 interlace = true; 1146 break; 1147 case 'e': 1148 if (yres_specified || bpp_specified || refresh_specified || 1149 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1150 goto done; 1151 1152 force = DRM_FORCE_ON; 1153 break; 1154 case 'D': 1155 if (yres_specified || bpp_specified || refresh_specified || 1156 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1157 goto done; 1158 1159 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1160 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1161 force = DRM_FORCE_ON; 1162 else 1163 force = DRM_FORCE_ON_DIGITAL; 1164 break; 1165 case 'd': 1166 if (yres_specified || bpp_specified || refresh_specified || 1167 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1168 goto done; 1169 1170 force = DRM_FORCE_OFF; 1171 break; 1172 default: 1173 goto done; 1174 } 1175 } 1176 1177 if (i < 0 && yres_specified) { 1178 char *ch; 1179 xres = simple_strtol(name, &ch, 10); 1180 if ((ch != NULL) && (*ch == 'x')) 1181 res_specified = true; 1182 else 1183 i = ch - name; 1184 } else if (!yres_specified && was_digit) { 1185 /* catch mode that begins with digits but has no 'x' */ 1186 i = 0; 1187 } 1188 done: 1189 if (i >= 0) { 1190 printk(KERN_WARNING 1191 "parse error at position %i in video mode '%s'\n", 1192 i, name); 1193 mode->specified = false; 1194 return false; 1195 } 1196 1197 if (res_specified) { 1198 mode->specified = true; 1199 mode->xres = xres; 1200 mode->yres = yres; 1201 } 1202 1203 if (refresh_specified) { 1204 mode->refresh_specified = true; 1205 mode->refresh = refresh; 1206 } 1207 1208 if (bpp_specified) { 1209 mode->bpp_specified = true; 1210 mode->bpp = bpp; 1211 } 1212 mode->rb = rb; 1213 mode->cvt = cvt; 1214 mode->interlace = interlace; 1215 mode->margins = margins; 1216 mode->force = force; 1217 1218 return true; 1219 } 1220 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); 1221 1222 struct drm_display_mode * 1223 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1224 struct drm_cmdline_mode *cmd) 1225 { 1226 struct drm_display_mode *mode; 1227 1228 if (cmd->cvt) 1229 mode = drm_cvt_mode(dev, 1230 cmd->xres, cmd->yres, 1231 cmd->refresh_specified ? cmd->refresh : 60, 1232 cmd->rb, cmd->interlace, 1233 cmd->margins); 1234 else 1235 mode = drm_gtf_mode(dev, 1236 cmd->xres, cmd->yres, 1237 cmd->refresh_specified ? cmd->refresh : 60, 1238 cmd->interlace, 1239 cmd->margins); 1240 if (!mode) 1241 return NULL; 1242 1243 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1244 return mode; 1245 } 1246 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode); 1247