1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 */ 30 #include <linux/kernel.h> 31 #include <linux/slab.h> 32 #include <linux/hdmi.h> 33 #include <linux/i2c.h> 34 #include <linux/module.h> 35 #include <drm/drmP.h> 36 #include <drm/drm_edid.h> 37 38 #define version_greater(edid, maj, min) \ 39 (((edid)->version > (maj)) || \ 40 ((edid)->version == (maj) && (edid)->revision > (min))) 41 42 #define EDID_EST_TIMINGS 16 43 #define EDID_STD_TIMINGS 8 44 #define EDID_DETAILED_TIMINGS 4 45 46 /* 47 * EDID blocks out in the wild have a variety of bugs, try to collect 48 * them here (note that userspace may work around broken monitors first, 49 * but fixes should make their way here so that the kernel "just works" 50 * on as many displays as possible). 51 */ 52 53 /* First detailed mode wrong, use largest 60Hz mode */ 54 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 55 /* Reported 135MHz pixel clock is too high, needs adjustment */ 56 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 57 /* Prefer the largest mode at 75 Hz */ 58 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 59 /* Detail timing is in cm not mm */ 60 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 61 /* Detailed timing descriptors have bogus size values, so just take the 62 * maximum size and use that. 63 */ 64 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 65 /* Monitor forgot to set the first detailed is preferred bit. */ 66 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 67 /* use +hsync +vsync for detailed mode */ 68 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 69 /* Force reduced-blanking timings for detailed modes */ 70 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) 71 72 struct detailed_mode_closure { 73 struct drm_connector *connector; 74 struct edid *edid; 75 bool preferred; 76 u32 quirks; 77 int modes; 78 }; 79 80 #define LEVEL_DMT 0 81 #define LEVEL_GTF 1 82 #define LEVEL_GTF2 2 83 #define LEVEL_CVT 3 84 85 static struct edid_quirk { 86 char vendor[4]; 87 int product_id; 88 u32 quirks; 89 } edid_quirk_list[] = { 90 /* Acer AL1706 */ 91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 92 /* Acer F51 */ 93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 94 /* Unknown Acer */ 95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 96 97 /* Belinea 10 15 55 */ 98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 100 101 /* Envision Peripherals, Inc. EN-7100e */ 102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 103 /* Envision EN2028 */ 104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, 105 106 /* Funai Electronics PM36B */ 107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 108 EDID_QUIRK_DETAILED_IN_CM }, 109 110 /* LG Philips LCD LP154W01-A5 */ 111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 113 114 /* Philips 107p5 CRT */ 115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 116 117 /* Proview AY765C */ 118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 119 120 /* Samsung SyncMaster 205BW. Note: irony */ 121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 122 /* Samsung SyncMaster 22[5-6]BW */ 123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 125 126 /* ViewSonic VA2026w */ 127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, 128 }; 129 130 /* 131 * Autogenerated from the DMT spec. 132 * This table is copied from xfree86/modes/xf86EdidModes.c. 133 */ 134 static const struct drm_display_mode drm_dmt_modes[] = { 135 /* 640x350@85Hz */ 136 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 137 736, 832, 0, 350, 382, 385, 445, 0, 138 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 139 /* 640x400@85Hz */ 140 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 141 736, 832, 0, 400, 401, 404, 445, 0, 142 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 143 /* 720x400@85Hz */ 144 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 145 828, 936, 0, 400, 401, 404, 446, 0, 146 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 147 /* 640x480@60Hz */ 148 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 149 752, 800, 0, 480, 489, 492, 525, 0, 150 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 151 /* 640x480@72Hz */ 152 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 153 704, 832, 0, 480, 489, 492, 520, 0, 154 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 155 /* 640x480@75Hz */ 156 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 157 720, 840, 0, 480, 481, 484, 500, 0, 158 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 159 /* 640x480@85Hz */ 160 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 161 752, 832, 0, 480, 481, 484, 509, 0, 162 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 163 /* 800x600@56Hz */ 164 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 165 896, 1024, 0, 600, 601, 603, 625, 0, 166 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 167 /* 800x600@60Hz */ 168 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 169 968, 1056, 0, 600, 601, 605, 628, 0, 170 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 171 /* 800x600@72Hz */ 172 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 173 976, 1040, 0, 600, 637, 643, 666, 0, 174 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 175 /* 800x600@75Hz */ 176 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 177 896, 1056, 0, 600, 601, 604, 625, 0, 178 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 179 /* 800x600@85Hz */ 180 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 181 896, 1048, 0, 600, 601, 604, 631, 0, 182 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 183 /* 800x600@120Hz RB */ 184 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, 185 880, 960, 0, 600, 603, 607, 636, 0, 186 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 187 /* 848x480@60Hz */ 188 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 189 976, 1088, 0, 480, 486, 494, 517, 0, 190 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 191 /* 1024x768@43Hz, interlace */ 192 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 193 1208, 1264, 0, 768, 768, 772, 817, 0, 194 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 195 DRM_MODE_FLAG_INTERLACE) }, 196 /* 1024x768@60Hz */ 197 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 198 1184, 1344, 0, 768, 771, 777, 806, 0, 199 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 200 /* 1024x768@70Hz */ 201 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 202 1184, 1328, 0, 768, 771, 777, 806, 0, 203 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 204 /* 1024x768@75Hz */ 205 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 206 1136, 1312, 0, 768, 769, 772, 800, 0, 207 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 208 /* 1024x768@85Hz */ 209 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 210 1168, 1376, 0, 768, 769, 772, 808, 0, 211 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 212 /* 1024x768@120Hz RB */ 213 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, 214 1104, 1184, 0, 768, 771, 775, 813, 0, 215 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 216 /* 1152x864@75Hz */ 217 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 218 1344, 1600, 0, 864, 865, 868, 900, 0, 219 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 220 /* 1280x768@60Hz RB */ 221 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, 222 1360, 1440, 0, 768, 771, 778, 790, 0, 223 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 224 /* 1280x768@60Hz */ 225 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 226 1472, 1664, 0, 768, 771, 778, 798, 0, 227 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 228 /* 1280x768@75Hz */ 229 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 230 1488, 1696, 0, 768, 771, 778, 805, 0, 231 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 232 /* 1280x768@85Hz */ 233 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 234 1496, 1712, 0, 768, 771, 778, 809, 0, 235 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 236 /* 1280x768@120Hz RB */ 237 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, 238 1360, 1440, 0, 768, 771, 778, 813, 0, 239 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 240 /* 1280x800@60Hz RB */ 241 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, 242 1360, 1440, 0, 800, 803, 809, 823, 0, 243 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 244 /* 1280x800@60Hz */ 245 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 246 1480, 1680, 0, 800, 803, 809, 831, 0, 247 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 248 /* 1280x800@75Hz */ 249 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 250 1488, 1696, 0, 800, 803, 809, 838, 0, 251 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 252 /* 1280x800@85Hz */ 253 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 254 1496, 1712, 0, 800, 803, 809, 843, 0, 255 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 256 /* 1280x800@120Hz RB */ 257 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, 258 1360, 1440, 0, 800, 803, 809, 847, 0, 259 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 260 /* 1280x960@60Hz */ 261 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 262 1488, 1800, 0, 960, 961, 964, 1000, 0, 263 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 264 /* 1280x960@85Hz */ 265 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 266 1504, 1728, 0, 960, 961, 964, 1011, 0, 267 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 268 /* 1280x960@120Hz RB */ 269 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, 270 1360, 1440, 0, 960, 963, 967, 1017, 0, 271 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 272 /* 1280x1024@60Hz */ 273 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 274 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 275 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 276 /* 1280x1024@75Hz */ 277 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 278 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 279 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 280 /* 1280x1024@85Hz */ 281 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 282 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 283 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 284 /* 1280x1024@120Hz RB */ 285 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, 286 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, 287 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 288 /* 1360x768@60Hz */ 289 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 290 1536, 1792, 0, 768, 771, 777, 795, 0, 291 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 292 /* 1360x768@120Hz RB */ 293 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, 294 1440, 1520, 0, 768, 771, 776, 813, 0, 295 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 296 /* 1400x1050@60Hz RB */ 297 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, 298 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, 299 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 300 /* 1400x1050@60Hz */ 301 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 302 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 303 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 304 /* 1400x1050@75Hz */ 305 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 306 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 307 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 308 /* 1400x1050@85Hz */ 309 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 310 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 311 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 312 /* 1400x1050@120Hz RB */ 313 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, 314 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, 315 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 316 /* 1440x900@60Hz RB */ 317 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, 318 1520, 1600, 0, 900, 903, 909, 926, 0, 319 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 320 /* 1440x900@60Hz */ 321 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 322 1672, 1904, 0, 900, 903, 909, 934, 0, 323 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 324 /* 1440x900@75Hz */ 325 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 326 1688, 1936, 0, 900, 903, 909, 942, 0, 327 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 328 /* 1440x900@85Hz */ 329 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 330 1696, 1952, 0, 900, 903, 909, 948, 0, 331 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 332 /* 1440x900@120Hz RB */ 333 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, 334 1520, 1600, 0, 900, 903, 909, 953, 0, 335 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 336 /* 1600x1200@60Hz */ 337 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 338 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 339 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 340 /* 1600x1200@65Hz */ 341 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 342 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 343 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 344 /* 1600x1200@70Hz */ 345 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 346 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 347 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 348 /* 1600x1200@75Hz */ 349 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, 350 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 351 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 352 /* 1600x1200@85Hz */ 353 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 354 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 355 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 356 /* 1600x1200@120Hz RB */ 357 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, 358 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, 359 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 360 /* 1680x1050@60Hz RB */ 361 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, 362 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, 363 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 364 /* 1680x1050@60Hz */ 365 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 366 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 367 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 368 /* 1680x1050@75Hz */ 369 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 370 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 371 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 372 /* 1680x1050@85Hz */ 373 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 374 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 375 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 376 /* 1680x1050@120Hz RB */ 377 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, 378 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, 379 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 380 /* 1792x1344@60Hz */ 381 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 382 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 383 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 384 /* 1792x1344@75Hz */ 385 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 386 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 387 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 388 /* 1792x1344@120Hz RB */ 389 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, 390 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, 391 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 392 /* 1856x1392@60Hz */ 393 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 394 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 395 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 396 /* 1856x1392@75Hz */ 397 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 398 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 399 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 400 /* 1856x1392@120Hz RB */ 401 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, 402 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, 403 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 404 /* 1920x1200@60Hz RB */ 405 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, 406 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, 407 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 408 /* 1920x1200@60Hz */ 409 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 410 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 411 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 412 /* 1920x1200@75Hz */ 413 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 414 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 415 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 416 /* 1920x1200@85Hz */ 417 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 418 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 419 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 420 /* 1920x1200@120Hz RB */ 421 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, 422 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, 423 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 424 /* 1920x1440@60Hz */ 425 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 426 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 427 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 428 /* 1920x1440@75Hz */ 429 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 430 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 431 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 432 /* 1920x1440@120Hz RB */ 433 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, 434 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, 435 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 436 /* 2560x1600@60Hz RB */ 437 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, 438 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, 439 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 440 /* 2560x1600@60Hz */ 441 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 442 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 444 /* 2560x1600@75HZ */ 445 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 446 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 448 /* 2560x1600@85HZ */ 449 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 450 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 452 /* 2560x1600@120Hz RB */ 453 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, 454 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, 455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 456 }; 457 458 static const struct drm_display_mode edid_est_modes[] = { 459 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 460 968, 1056, 0, 600, 601, 605, 628, 0, 461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 462 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 463 896, 1024, 0, 600, 601, 603, 625, 0, 464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 465 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 466 720, 840, 0, 480, 481, 484, 500, 0, 467 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 468 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 469 704, 832, 0, 480, 489, 491, 520, 0, 470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 471 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 472 768, 864, 0, 480, 483, 486, 525, 0, 473 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 474 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 475 752, 800, 0, 480, 490, 492, 525, 0, 476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 477 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 478 846, 900, 0, 400, 421, 423, 449, 0, 479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 480 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 481 846, 900, 0, 400, 412, 414, 449, 0, 482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 483 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 484 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 486 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 487 1136, 1312, 0, 768, 769, 772, 800, 0, 488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 490 1184, 1328, 0, 768, 771, 777, 806, 0, 491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 492 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 493 1184, 1344, 0, 768, 771, 777, 806, 0, 494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 495 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 496 1208, 1264, 0, 768, 768, 776, 817, 0, 497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 498 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 499 928, 1152, 0, 624, 625, 628, 667, 0, 500 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 501 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 502 896, 1056, 0, 600, 601, 604, 625, 0, 503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 504 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 505 976, 1040, 0, 600, 637, 643, 666, 0, 506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 507 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 508 1344, 1600, 0, 864, 865, 868, 900, 0, 509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 510 }; 511 512 struct minimode { 513 short w; 514 short h; 515 short r; 516 short rb; 517 }; 518 519 static const struct minimode est3_modes[] = { 520 /* byte 6 */ 521 { 640, 350, 85, 0 }, 522 { 640, 400, 85, 0 }, 523 { 720, 400, 85, 0 }, 524 { 640, 480, 85, 0 }, 525 { 848, 480, 60, 0 }, 526 { 800, 600, 85, 0 }, 527 { 1024, 768, 85, 0 }, 528 { 1152, 864, 75, 0 }, 529 /* byte 7 */ 530 { 1280, 768, 60, 1 }, 531 { 1280, 768, 60, 0 }, 532 { 1280, 768, 75, 0 }, 533 { 1280, 768, 85, 0 }, 534 { 1280, 960, 60, 0 }, 535 { 1280, 960, 85, 0 }, 536 { 1280, 1024, 60, 0 }, 537 { 1280, 1024, 85, 0 }, 538 /* byte 8 */ 539 { 1360, 768, 60, 0 }, 540 { 1440, 900, 60, 1 }, 541 { 1440, 900, 60, 0 }, 542 { 1440, 900, 75, 0 }, 543 { 1440, 900, 85, 0 }, 544 { 1400, 1050, 60, 1 }, 545 { 1400, 1050, 60, 0 }, 546 { 1400, 1050, 75, 0 }, 547 /* byte 9 */ 548 { 1400, 1050, 85, 0 }, 549 { 1680, 1050, 60, 1 }, 550 { 1680, 1050, 60, 0 }, 551 { 1680, 1050, 75, 0 }, 552 { 1680, 1050, 85, 0 }, 553 { 1600, 1200, 60, 0 }, 554 { 1600, 1200, 65, 0 }, 555 { 1600, 1200, 70, 0 }, 556 /* byte 10 */ 557 { 1600, 1200, 75, 0 }, 558 { 1600, 1200, 85, 0 }, 559 { 1792, 1344, 60, 0 }, 560 { 1792, 1344, 85, 0 }, 561 { 1856, 1392, 60, 0 }, 562 { 1856, 1392, 75, 0 }, 563 { 1920, 1200, 60, 1 }, 564 { 1920, 1200, 60, 0 }, 565 /* byte 11 */ 566 { 1920, 1200, 75, 0 }, 567 { 1920, 1200, 85, 0 }, 568 { 1920, 1440, 60, 0 }, 569 { 1920, 1440, 75, 0 }, 570 }; 571 572 static const struct minimode extra_modes[] = { 573 { 1024, 576, 60, 0 }, 574 { 1366, 768, 60, 0 }, 575 { 1600, 900, 60, 0 }, 576 { 1680, 945, 60, 0 }, 577 { 1920, 1080, 60, 0 }, 578 { 2048, 1152, 60, 0 }, 579 { 2048, 1536, 60, 0 }, 580 }; 581 582 /* 583 * Probably taken from CEA-861 spec. 584 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. 585 */ 586 static const struct drm_display_mode edid_cea_modes[] = { 587 /* 1 - 640x480@60Hz */ 588 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 589 752, 800, 0, 480, 490, 492, 525, 0, 590 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 591 .vrefresh = 60, }, 592 /* 2 - 720x480@60Hz */ 593 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 594 798, 858, 0, 480, 489, 495, 525, 0, 595 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 596 .vrefresh = 60, }, 597 /* 3 - 720x480@60Hz */ 598 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 599 798, 858, 0, 480, 489, 495, 525, 0, 600 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 601 .vrefresh = 60, }, 602 /* 4 - 1280x720@60Hz */ 603 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 604 1430, 1650, 0, 720, 725, 730, 750, 0, 605 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 606 .vrefresh = 60, }, 607 /* 5 - 1920x1080i@60Hz */ 608 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 609 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 610 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 611 DRM_MODE_FLAG_INTERLACE), 612 .vrefresh = 60, }, 613 /* 6 - 1440x480i@60Hz */ 614 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 615 1602, 1716, 0, 480, 488, 494, 525, 0, 616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 617 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 618 .vrefresh = 60, }, 619 /* 7 - 1440x480i@60Hz */ 620 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 621 1602, 1716, 0, 480, 488, 494, 525, 0, 622 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 623 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 624 .vrefresh = 60, }, 625 /* 8 - 1440x240@60Hz */ 626 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 627 1602, 1716, 0, 240, 244, 247, 262, 0, 628 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 629 DRM_MODE_FLAG_DBLCLK), 630 .vrefresh = 60, }, 631 /* 9 - 1440x240@60Hz */ 632 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 633 1602, 1716, 0, 240, 244, 247, 262, 0, 634 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 635 DRM_MODE_FLAG_DBLCLK), 636 .vrefresh = 60, }, 637 /* 10 - 2880x480i@60Hz */ 638 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 639 3204, 3432, 0, 480, 488, 494, 525, 0, 640 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 641 DRM_MODE_FLAG_INTERLACE), 642 .vrefresh = 60, }, 643 /* 11 - 2880x480i@60Hz */ 644 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 645 3204, 3432, 0, 480, 488, 494, 525, 0, 646 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 647 DRM_MODE_FLAG_INTERLACE), 648 .vrefresh = 60, }, 649 /* 12 - 2880x240@60Hz */ 650 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 651 3204, 3432, 0, 240, 244, 247, 262, 0, 652 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 653 .vrefresh = 60, }, 654 /* 13 - 2880x240@60Hz */ 655 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 656 3204, 3432, 0, 240, 244, 247, 262, 0, 657 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 658 .vrefresh = 60, }, 659 /* 14 - 1440x480@60Hz */ 660 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 661 1596, 1716, 0, 480, 489, 495, 525, 0, 662 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 663 .vrefresh = 60, }, 664 /* 15 - 1440x480@60Hz */ 665 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 666 1596, 1716, 0, 480, 489, 495, 525, 0, 667 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 668 .vrefresh = 60, }, 669 /* 16 - 1920x1080@60Hz */ 670 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 671 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 672 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 673 .vrefresh = 60, }, 674 /* 17 - 720x576@50Hz */ 675 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 676 796, 864, 0, 576, 581, 586, 625, 0, 677 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 678 .vrefresh = 50, }, 679 /* 18 - 720x576@50Hz */ 680 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 681 796, 864, 0, 576, 581, 586, 625, 0, 682 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 683 .vrefresh = 50, }, 684 /* 19 - 1280x720@50Hz */ 685 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 686 1760, 1980, 0, 720, 725, 730, 750, 0, 687 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 688 .vrefresh = 50, }, 689 /* 20 - 1920x1080i@50Hz */ 690 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 691 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 692 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 693 DRM_MODE_FLAG_INTERLACE), 694 .vrefresh = 50, }, 695 /* 21 - 1440x576i@50Hz */ 696 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 697 1590, 1728, 0, 576, 580, 586, 625, 0, 698 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 699 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 700 .vrefresh = 50, }, 701 /* 22 - 1440x576i@50Hz */ 702 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 703 1590, 1728, 0, 576, 580, 586, 625, 0, 704 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 705 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 706 .vrefresh = 50, }, 707 /* 23 - 1440x288@50Hz */ 708 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 709 1590, 1728, 0, 288, 290, 293, 312, 0, 710 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 711 DRM_MODE_FLAG_DBLCLK), 712 .vrefresh = 50, }, 713 /* 24 - 1440x288@50Hz */ 714 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 715 1590, 1728, 0, 288, 290, 293, 312, 0, 716 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 717 DRM_MODE_FLAG_DBLCLK), 718 .vrefresh = 50, }, 719 /* 25 - 2880x576i@50Hz */ 720 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 721 3180, 3456, 0, 576, 580, 586, 625, 0, 722 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 723 DRM_MODE_FLAG_INTERLACE), 724 .vrefresh = 50, }, 725 /* 26 - 2880x576i@50Hz */ 726 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 727 3180, 3456, 0, 576, 580, 586, 625, 0, 728 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 729 DRM_MODE_FLAG_INTERLACE), 730 .vrefresh = 50, }, 731 /* 27 - 2880x288@50Hz */ 732 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 733 3180, 3456, 0, 288, 290, 293, 312, 0, 734 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 735 .vrefresh = 50, }, 736 /* 28 - 2880x288@50Hz */ 737 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 738 3180, 3456, 0, 288, 290, 293, 312, 0, 739 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 740 .vrefresh = 50, }, 741 /* 29 - 1440x576@50Hz */ 742 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 743 1592, 1728, 0, 576, 581, 586, 625, 0, 744 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 745 .vrefresh = 50, }, 746 /* 30 - 1440x576@50Hz */ 747 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 748 1592, 1728, 0, 576, 581, 586, 625, 0, 749 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 750 .vrefresh = 50, }, 751 /* 31 - 1920x1080@50Hz */ 752 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 753 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 754 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 755 .vrefresh = 50, }, 756 /* 32 - 1920x1080@24Hz */ 757 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 758 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, 759 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 760 .vrefresh = 24, }, 761 /* 33 - 1920x1080@25Hz */ 762 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 763 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 764 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 765 .vrefresh = 25, }, 766 /* 34 - 1920x1080@30Hz */ 767 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 768 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 769 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 770 .vrefresh = 30, }, 771 /* 35 - 2880x480@60Hz */ 772 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 773 3192, 3432, 0, 480, 489, 495, 525, 0, 774 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 775 .vrefresh = 60, }, 776 /* 36 - 2880x480@60Hz */ 777 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 778 3192, 3432, 0, 480, 489, 495, 525, 0, 779 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 780 .vrefresh = 60, }, 781 /* 37 - 2880x576@50Hz */ 782 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 783 3184, 3456, 0, 576, 581, 586, 625, 0, 784 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 785 .vrefresh = 50, }, 786 /* 38 - 2880x576@50Hz */ 787 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 788 3184, 3456, 0, 576, 581, 586, 625, 0, 789 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 790 .vrefresh = 50, }, 791 /* 39 - 1920x1080i@50Hz */ 792 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, 793 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, 794 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | 795 DRM_MODE_FLAG_INTERLACE), 796 .vrefresh = 50, }, 797 /* 40 - 1920x1080i@100Hz */ 798 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 799 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 800 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 801 DRM_MODE_FLAG_INTERLACE), 802 .vrefresh = 100, }, 803 /* 41 - 1280x720@100Hz */ 804 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 805 1760, 1980, 0, 720, 725, 730, 750, 0, 806 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 807 .vrefresh = 100, }, 808 /* 42 - 720x576@100Hz */ 809 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 810 796, 864, 0, 576, 581, 586, 625, 0, 811 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 812 .vrefresh = 100, }, 813 /* 43 - 720x576@100Hz */ 814 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 815 796, 864, 0, 576, 581, 586, 625, 0, 816 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 817 .vrefresh = 100, }, 818 /* 44 - 1440x576i@100Hz */ 819 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 820 1590, 1728, 0, 576, 580, 586, 625, 0, 821 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 822 DRM_MODE_FLAG_DBLCLK), 823 .vrefresh = 100, }, 824 /* 45 - 1440x576i@100Hz */ 825 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 826 1590, 1728, 0, 576, 580, 586, 625, 0, 827 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 828 DRM_MODE_FLAG_DBLCLK), 829 .vrefresh = 100, }, 830 /* 46 - 1920x1080i@120Hz */ 831 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 832 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 833 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 834 DRM_MODE_FLAG_INTERLACE), 835 .vrefresh = 120, }, 836 /* 47 - 1280x720@120Hz */ 837 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 838 1430, 1650, 0, 720, 725, 730, 750, 0, 839 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 840 .vrefresh = 120, }, 841 /* 48 - 720x480@120Hz */ 842 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 843 798, 858, 0, 480, 489, 495, 525, 0, 844 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 845 .vrefresh = 120, }, 846 /* 49 - 720x480@120Hz */ 847 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 848 798, 858, 0, 480, 489, 495, 525, 0, 849 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 850 .vrefresh = 120, }, 851 /* 50 - 1440x480i@120Hz */ 852 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 853 1602, 1716, 0, 480, 488, 494, 525, 0, 854 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 855 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 856 .vrefresh = 120, }, 857 /* 51 - 1440x480i@120Hz */ 858 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 859 1602, 1716, 0, 480, 488, 494, 525, 0, 860 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 861 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 862 .vrefresh = 120, }, 863 /* 52 - 720x576@200Hz */ 864 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 865 796, 864, 0, 576, 581, 586, 625, 0, 866 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 867 .vrefresh = 200, }, 868 /* 53 - 720x576@200Hz */ 869 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 870 796, 864, 0, 576, 581, 586, 625, 0, 871 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 872 .vrefresh = 200, }, 873 /* 54 - 1440x576i@200Hz */ 874 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 875 1590, 1728, 0, 576, 580, 586, 625, 0, 876 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 877 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 878 .vrefresh = 200, }, 879 /* 55 - 1440x576i@200Hz */ 880 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 881 1590, 1728, 0, 576, 580, 586, 625, 0, 882 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 883 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 884 .vrefresh = 200, }, 885 /* 56 - 720x480@240Hz */ 886 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 887 798, 858, 0, 480, 489, 495, 525, 0, 888 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 889 .vrefresh = 240, }, 890 /* 57 - 720x480@240Hz */ 891 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 892 798, 858, 0, 480, 489, 495, 525, 0, 893 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 894 .vrefresh = 240, }, 895 /* 58 - 1440x480i@240 */ 896 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 897 1602, 1716, 0, 480, 488, 494, 525, 0, 898 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 899 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 900 .vrefresh = 240, }, 901 /* 59 - 1440x480i@240 */ 902 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 903 1602, 1716, 0, 480, 488, 494, 525, 0, 904 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 905 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 906 .vrefresh = 240, }, 907 /* 60 - 1280x720@24Hz */ 908 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 909 3080, 3300, 0, 720, 725, 730, 750, 0, 910 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 911 .vrefresh = 24, }, 912 /* 61 - 1280x720@25Hz */ 913 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 914 3740, 3960, 0, 720, 725, 730, 750, 0, 915 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 916 .vrefresh = 25, }, 917 /* 62 - 1280x720@30Hz */ 918 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 919 3080, 3300, 0, 720, 725, 730, 750, 0, 920 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 921 .vrefresh = 30, }, 922 /* 63 - 1920x1080@120Hz */ 923 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 924 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 925 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 926 .vrefresh = 120, }, 927 /* 64 - 1920x1080@100Hz */ 928 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 929 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 930 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 931 .vrefresh = 100, }, 932 }; 933 934 /*** DDC fetch and block validation ***/ 935 936 static const u8 edid_header[] = { 937 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 938 }; 939 940 /* 941 * Sanity check the header of the base EDID block. Return 8 if the header 942 * is perfect, down to 0 if it's totally wrong. 943 */ 944 int drm_edid_header_is_valid(const u8 *raw_edid) 945 { 946 int i, score = 0; 947 948 for (i = 0; i < sizeof(edid_header); i++) 949 if (raw_edid[i] == edid_header[i]) 950 score++; 951 952 return score; 953 } 954 EXPORT_SYMBOL(drm_edid_header_is_valid); 955 956 static int edid_fixup __read_mostly = 6; 957 module_param_named(edid_fixup, edid_fixup, int, 0400); 958 MODULE_PARM_DESC(edid_fixup, 959 "Minimum number of valid EDID header bytes (0-8, default 6)"); 960 961 /* 962 * Sanity check the EDID block (base or extension). Return 0 if the block 963 * doesn't check out, or 1 if it's valid. 964 */ 965 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) 966 { 967 int i; 968 u8 csum = 0; 969 struct edid *edid = (struct edid *)raw_edid; 970 971 if (WARN_ON(!raw_edid)) 972 return false; 973 974 if (edid_fixup > 8 || edid_fixup < 0) 975 edid_fixup = 6; 976 977 if (block == 0) { 978 int score = drm_edid_header_is_valid(raw_edid); 979 if (score == 8) ; 980 else if (score >= edid_fixup) { 981 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 982 memcpy(raw_edid, edid_header, sizeof(edid_header)); 983 } else { 984 goto bad; 985 } 986 } 987 988 for (i = 0; i < EDID_LENGTH; i++) 989 csum += raw_edid[i]; 990 if (csum) { 991 if (print_bad_edid) { 992 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 993 } 994 995 /* allow CEA to slide through, switches mangle this */ 996 if (raw_edid[0] != 0x02) 997 goto bad; 998 } 999 1000 /* per-block-type checks */ 1001 switch (raw_edid[0]) { 1002 case 0: /* base */ 1003 if (edid->version != 1) { 1004 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 1005 goto bad; 1006 } 1007 1008 if (edid->revision > 4) 1009 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 1010 break; 1011 1012 default: 1013 break; 1014 } 1015 1016 return true; 1017 1018 bad: 1019 if (print_bad_edid) { 1020 printk(KERN_ERR "Raw EDID:\n"); 1021 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, 1022 raw_edid, EDID_LENGTH, false); 1023 } 1024 return false; 1025 } 1026 EXPORT_SYMBOL(drm_edid_block_valid); 1027 1028 /** 1029 * drm_edid_is_valid - sanity check EDID data 1030 * @edid: EDID data 1031 * 1032 * Sanity-check an entire EDID record (including extensions) 1033 */ 1034 bool drm_edid_is_valid(struct edid *edid) 1035 { 1036 int i; 1037 u8 *raw = (u8 *)edid; 1038 1039 if (!edid) 1040 return false; 1041 1042 for (i = 0; i <= edid->extensions; i++) 1043 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) 1044 return false; 1045 1046 return true; 1047 } 1048 EXPORT_SYMBOL(drm_edid_is_valid); 1049 1050 #define DDC_SEGMENT_ADDR 0x30 1051 /** 1052 * Get EDID information via I2C. 1053 * 1054 * \param adapter : i2c device adaptor 1055 * \param buf : EDID data buffer to be filled 1056 * \param len : EDID data buffer length 1057 * \return 0 on success or -1 on failure. 1058 * 1059 * Try to fetch EDID information by calling i2c driver function. 1060 */ 1061 static int 1062 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, 1063 int block, int len) 1064 { 1065 unsigned char start = block * EDID_LENGTH; 1066 unsigned char segment = block >> 1; 1067 unsigned char xfers = segment ? 3 : 2; 1068 int ret, retries = 5; 1069 1070 /* The core i2c driver will automatically retry the transfer if the 1071 * adapter reports EAGAIN. However, we find that bit-banging transfers 1072 * are susceptible to errors under a heavily loaded machine and 1073 * generate spurious NAKs and timeouts. Retrying the transfer 1074 * of the individual block a few times seems to overcome this. 1075 */ 1076 do { 1077 struct i2c_msg msgs[] = { 1078 { 1079 .addr = DDC_SEGMENT_ADDR, 1080 .flags = 0, 1081 .len = 1, 1082 .buf = &segment, 1083 }, { 1084 .addr = DDC_ADDR, 1085 .flags = 0, 1086 .len = 1, 1087 .buf = &start, 1088 }, { 1089 .addr = DDC_ADDR, 1090 .flags = I2C_M_RD, 1091 .len = len, 1092 .buf = buf, 1093 } 1094 }; 1095 1096 /* 1097 * Avoid sending the segment addr to not upset non-compliant ddc 1098 * monitors. 1099 */ 1100 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); 1101 1102 if (ret == -ENXIO) { 1103 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", 1104 adapter->name); 1105 break; 1106 } 1107 } while (ret != xfers && --retries); 1108 1109 return ret == xfers ? 0 : -1; 1110 } 1111 1112 static bool drm_edid_is_zero(u8 *in_edid, int length) 1113 { 1114 if (memchr_inv(in_edid, 0, length)) 1115 return false; 1116 1117 return true; 1118 } 1119 1120 static u8 * 1121 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) 1122 { 1123 int i, j = 0, valid_extensions = 0; 1124 u8 *block, *new; 1125 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); 1126 1127 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) 1128 return NULL; 1129 1130 /* base block fetch */ 1131 for (i = 0; i < 4; i++) { 1132 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 1133 goto out; 1134 if (drm_edid_block_valid(block, 0, print_bad_edid)) 1135 break; 1136 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { 1137 connector->null_edid_counter++; 1138 goto carp; 1139 } 1140 } 1141 if (i == 4) 1142 goto carp; 1143 1144 /* if there's no extensions, we're done */ 1145 if (block[0x7e] == 0) 1146 return block; 1147 1148 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); 1149 if (!new) 1150 goto out; 1151 block = new; 1152 1153 for (j = 1; j <= block[0x7e]; j++) { 1154 for (i = 0; i < 4; i++) { 1155 if (drm_do_probe_ddc_edid(adapter, 1156 block + (valid_extensions + 1) * EDID_LENGTH, 1157 j, EDID_LENGTH)) 1158 goto out; 1159 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { 1160 valid_extensions++; 1161 break; 1162 } 1163 } 1164 1165 if (i == 4 && print_bad_edid) { 1166 dev_warn(connector->dev->dev, 1167 "%s: Ignoring invalid EDID block %d.\n", 1168 drm_get_connector_name(connector), j); 1169 1170 connector->bad_edid_counter++; 1171 } 1172 } 1173 1174 if (valid_extensions != block[0x7e]) { 1175 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; 1176 block[0x7e] = valid_extensions; 1177 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); 1178 if (!new) 1179 goto out; 1180 block = new; 1181 } 1182 1183 return block; 1184 1185 carp: 1186 if (print_bad_edid) { 1187 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", 1188 drm_get_connector_name(connector), j); 1189 } 1190 connector->bad_edid_counter++; 1191 1192 out: 1193 kfree(block); 1194 return NULL; 1195 } 1196 1197 /** 1198 * Probe DDC presence. 1199 * 1200 * \param adapter : i2c device adaptor 1201 * \return 1 on success 1202 */ 1203 bool 1204 drm_probe_ddc(struct i2c_adapter *adapter) 1205 { 1206 unsigned char out; 1207 1208 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 1209 } 1210 EXPORT_SYMBOL(drm_probe_ddc); 1211 1212 /** 1213 * drm_get_edid - get EDID data, if available 1214 * @connector: connector we're probing 1215 * @adapter: i2c adapter to use for DDC 1216 * 1217 * Poke the given i2c channel to grab EDID data if possible. If found, 1218 * attach it to the connector. 1219 * 1220 * Return edid data or NULL if we couldn't find any. 1221 */ 1222 struct edid *drm_get_edid(struct drm_connector *connector, 1223 struct i2c_adapter *adapter) 1224 { 1225 struct edid *edid = NULL; 1226 1227 if (drm_probe_ddc(adapter)) 1228 edid = (struct edid *)drm_do_get_edid(connector, adapter); 1229 1230 return edid; 1231 } 1232 EXPORT_SYMBOL(drm_get_edid); 1233 1234 /*** EDID parsing ***/ 1235 1236 /** 1237 * edid_vendor - match a string against EDID's obfuscated vendor field 1238 * @edid: EDID to match 1239 * @vendor: vendor string 1240 * 1241 * Returns true if @vendor is in @edid, false otherwise 1242 */ 1243 static bool edid_vendor(struct edid *edid, char *vendor) 1244 { 1245 char edid_vendor[3]; 1246 1247 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 1248 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 1249 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 1250 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 1251 1252 return !strncmp(edid_vendor, vendor, 3); 1253 } 1254 1255 /** 1256 * edid_get_quirks - return quirk flags for a given EDID 1257 * @edid: EDID to process 1258 * 1259 * This tells subsequent routines what fixes they need to apply. 1260 */ 1261 static u32 edid_get_quirks(struct edid *edid) 1262 { 1263 struct edid_quirk *quirk; 1264 int i; 1265 1266 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 1267 quirk = &edid_quirk_list[i]; 1268 1269 if (edid_vendor(edid, quirk->vendor) && 1270 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 1271 return quirk->quirks; 1272 } 1273 1274 return 0; 1275 } 1276 1277 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 1278 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 1279 1280 /** 1281 * edid_fixup_preferred - set preferred modes based on quirk list 1282 * @connector: has mode list to fix up 1283 * @quirks: quirks list 1284 * 1285 * Walk the mode list for @connector, clearing the preferred status 1286 * on existing modes and setting it anew for the right mode ala @quirks. 1287 */ 1288 static void edid_fixup_preferred(struct drm_connector *connector, 1289 u32 quirks) 1290 { 1291 struct drm_display_mode *t, *cur_mode, *preferred_mode; 1292 int target_refresh = 0; 1293 1294 if (list_empty(&connector->probed_modes)) 1295 return; 1296 1297 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 1298 target_refresh = 60; 1299 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 1300 target_refresh = 75; 1301 1302 preferred_mode = list_first_entry(&connector->probed_modes, 1303 struct drm_display_mode, head); 1304 1305 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 1306 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 1307 1308 if (cur_mode == preferred_mode) 1309 continue; 1310 1311 /* Largest mode is preferred */ 1312 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 1313 preferred_mode = cur_mode; 1314 1315 /* At a given size, try to get closest to target refresh */ 1316 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 1317 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 1318 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 1319 preferred_mode = cur_mode; 1320 } 1321 } 1322 1323 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 1324 } 1325 1326 static bool 1327 mode_is_rb(const struct drm_display_mode *mode) 1328 { 1329 return (mode->htotal - mode->hdisplay == 160) && 1330 (mode->hsync_end - mode->hdisplay == 80) && 1331 (mode->hsync_end - mode->hsync_start == 32) && 1332 (mode->vsync_start - mode->vdisplay == 3); 1333 } 1334 1335 /* 1336 * drm_mode_find_dmt - Create a copy of a mode if present in DMT 1337 * @dev: Device to duplicate against 1338 * @hsize: Mode width 1339 * @vsize: Mode height 1340 * @fresh: Mode refresh rate 1341 * @rb: Mode reduced-blanking-ness 1342 * 1343 * Walk the DMT mode list looking for a match for the given parameters. 1344 * Return a newly allocated copy of the mode, or NULL if not found. 1345 */ 1346 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 1347 int hsize, int vsize, int fresh, 1348 bool rb) 1349 { 1350 int i; 1351 1352 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1353 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 1354 if (hsize != ptr->hdisplay) 1355 continue; 1356 if (vsize != ptr->vdisplay) 1357 continue; 1358 if (fresh != drm_mode_vrefresh(ptr)) 1359 continue; 1360 if (rb != mode_is_rb(ptr)) 1361 continue; 1362 1363 return drm_mode_duplicate(dev, ptr); 1364 } 1365 1366 return NULL; 1367 } 1368 EXPORT_SYMBOL(drm_mode_find_dmt); 1369 1370 typedef void detailed_cb(struct detailed_timing *timing, void *closure); 1371 1372 static void 1373 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1374 { 1375 int i, n = 0; 1376 u8 d = ext[0x02]; 1377 u8 *det_base = ext + d; 1378 1379 n = (127 - d) / 18; 1380 for (i = 0; i < n; i++) 1381 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1382 } 1383 1384 static void 1385 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1386 { 1387 unsigned int i, n = min((int)ext[0x02], 6); 1388 u8 *det_base = ext + 5; 1389 1390 if (ext[0x01] != 1) 1391 return; /* unknown version */ 1392 1393 for (i = 0; i < n; i++) 1394 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1395 } 1396 1397 static void 1398 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) 1399 { 1400 int i; 1401 struct edid *edid = (struct edid *)raw_edid; 1402 1403 if (edid == NULL) 1404 return; 1405 1406 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) 1407 cb(&(edid->detailed_timings[i]), closure); 1408 1409 for (i = 1; i <= raw_edid[0x7e]; i++) { 1410 u8 *ext = raw_edid + (i * EDID_LENGTH); 1411 switch (*ext) { 1412 case CEA_EXT: 1413 cea_for_each_detailed_block(ext, cb, closure); 1414 break; 1415 case VTB_EXT: 1416 vtb_for_each_detailed_block(ext, cb, closure); 1417 break; 1418 default: 1419 break; 1420 } 1421 } 1422 } 1423 1424 static void 1425 is_rb(struct detailed_timing *t, void *data) 1426 { 1427 u8 *r = (u8 *)t; 1428 if (r[3] == EDID_DETAIL_MONITOR_RANGE) 1429 if (r[15] & 0x10) 1430 *(bool *)data = true; 1431 } 1432 1433 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ 1434 static bool 1435 drm_monitor_supports_rb(struct edid *edid) 1436 { 1437 if (edid->revision >= 4) { 1438 bool ret = false; 1439 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); 1440 return ret; 1441 } 1442 1443 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); 1444 } 1445 1446 static void 1447 find_gtf2(struct detailed_timing *t, void *data) 1448 { 1449 u8 *r = (u8 *)t; 1450 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) 1451 *(u8 **)data = r; 1452 } 1453 1454 /* Secondary GTF curve kicks in above some break frequency */ 1455 static int 1456 drm_gtf2_hbreak(struct edid *edid) 1457 { 1458 u8 *r = NULL; 1459 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1460 return r ? (r[12] * 2) : 0; 1461 } 1462 1463 static int 1464 drm_gtf2_2c(struct edid *edid) 1465 { 1466 u8 *r = NULL; 1467 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1468 return r ? r[13] : 0; 1469 } 1470 1471 static int 1472 drm_gtf2_m(struct edid *edid) 1473 { 1474 u8 *r = NULL; 1475 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1476 return r ? (r[15] << 8) + r[14] : 0; 1477 } 1478 1479 static int 1480 drm_gtf2_k(struct edid *edid) 1481 { 1482 u8 *r = NULL; 1483 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1484 return r ? r[16] : 0; 1485 } 1486 1487 static int 1488 drm_gtf2_2j(struct edid *edid) 1489 { 1490 u8 *r = NULL; 1491 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1492 return r ? r[17] : 0; 1493 } 1494 1495 /** 1496 * standard_timing_level - get std. timing level(CVT/GTF/DMT) 1497 * @edid: EDID block to scan 1498 */ 1499 static int standard_timing_level(struct edid *edid) 1500 { 1501 if (edid->revision >= 2) { 1502 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 1503 return LEVEL_CVT; 1504 if (drm_gtf2_hbreak(edid)) 1505 return LEVEL_GTF2; 1506 return LEVEL_GTF; 1507 } 1508 return LEVEL_DMT; 1509 } 1510 1511 /* 1512 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 1513 * monitors fill with ascii space (0x20) instead. 1514 */ 1515 static int 1516 bad_std_timing(u8 a, u8 b) 1517 { 1518 return (a == 0x00 && b == 0x00) || 1519 (a == 0x01 && b == 0x01) || 1520 (a == 0x20 && b == 0x20); 1521 } 1522 1523 /** 1524 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 1525 * @t: standard timing params 1526 * @timing_level: standard timing level 1527 * 1528 * Take the standard timing params (in this case width, aspect, and refresh) 1529 * and convert them into a real mode using CVT/GTF/DMT. 1530 */ 1531 static struct drm_display_mode * 1532 drm_mode_std(struct drm_connector *connector, struct edid *edid, 1533 struct std_timing *t, int revision) 1534 { 1535 struct drm_device *dev = connector->dev; 1536 struct drm_display_mode *m, *mode = NULL; 1537 int hsize, vsize; 1538 int vrefresh_rate; 1539 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 1540 >> EDID_TIMING_ASPECT_SHIFT; 1541 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 1542 >> EDID_TIMING_VFREQ_SHIFT; 1543 int timing_level = standard_timing_level(edid); 1544 1545 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 1546 return NULL; 1547 1548 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 1549 hsize = t->hsize * 8 + 248; 1550 /* vrefresh_rate = vfreq + 60 */ 1551 vrefresh_rate = vfreq + 60; 1552 /* the vdisplay is calculated based on the aspect ratio */ 1553 if (aspect_ratio == 0) { 1554 if (revision < 3) 1555 vsize = hsize; 1556 else 1557 vsize = (hsize * 10) / 16; 1558 } else if (aspect_ratio == 1) 1559 vsize = (hsize * 3) / 4; 1560 else if (aspect_ratio == 2) 1561 vsize = (hsize * 4) / 5; 1562 else 1563 vsize = (hsize * 9) / 16; 1564 1565 /* HDTV hack, part 1 */ 1566 if (vrefresh_rate == 60 && 1567 ((hsize == 1360 && vsize == 765) || 1568 (hsize == 1368 && vsize == 769))) { 1569 hsize = 1366; 1570 vsize = 768; 1571 } 1572 1573 /* 1574 * If this connector already has a mode for this size and refresh 1575 * rate (because it came from detailed or CVT info), use that 1576 * instead. This way we don't have to guess at interlace or 1577 * reduced blanking. 1578 */ 1579 list_for_each_entry(m, &connector->probed_modes, head) 1580 if (m->hdisplay == hsize && m->vdisplay == vsize && 1581 drm_mode_vrefresh(m) == vrefresh_rate) 1582 return NULL; 1583 1584 /* HDTV hack, part 2 */ 1585 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { 1586 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 1587 false); 1588 mode->hdisplay = 1366; 1589 mode->hsync_start = mode->hsync_start - 1; 1590 mode->hsync_end = mode->hsync_end - 1; 1591 return mode; 1592 } 1593 1594 /* check whether it can be found in default mode table */ 1595 if (drm_monitor_supports_rb(edid)) { 1596 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, 1597 true); 1598 if (mode) 1599 return mode; 1600 } 1601 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); 1602 if (mode) 1603 return mode; 1604 1605 /* okay, generate it */ 1606 switch (timing_level) { 1607 case LEVEL_DMT: 1608 break; 1609 case LEVEL_GTF: 1610 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1611 break; 1612 case LEVEL_GTF2: 1613 /* 1614 * This is potentially wrong if there's ever a monitor with 1615 * more than one ranges section, each claiming a different 1616 * secondary GTF curve. Please don't do that. 1617 */ 1618 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1619 if (!mode) 1620 return NULL; 1621 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { 1622 drm_mode_destroy(dev, mode); 1623 mode = drm_gtf_mode_complex(dev, hsize, vsize, 1624 vrefresh_rate, 0, 0, 1625 drm_gtf2_m(edid), 1626 drm_gtf2_2c(edid), 1627 drm_gtf2_k(edid), 1628 drm_gtf2_2j(edid)); 1629 } 1630 break; 1631 case LEVEL_CVT: 1632 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 1633 false); 1634 break; 1635 } 1636 return mode; 1637 } 1638 1639 /* 1640 * EDID is delightfully ambiguous about how interlaced modes are to be 1641 * encoded. Our internal representation is of frame height, but some 1642 * HDTV detailed timings are encoded as field height. 1643 * 1644 * The format list here is from CEA, in frame size. Technically we 1645 * should be checking refresh rate too. Whatever. 1646 */ 1647 static void 1648 drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 1649 struct detailed_pixel_timing *pt) 1650 { 1651 int i; 1652 static const struct { 1653 int w, h; 1654 } cea_interlaced[] = { 1655 { 1920, 1080 }, 1656 { 720, 480 }, 1657 { 1440, 480 }, 1658 { 2880, 480 }, 1659 { 720, 576 }, 1660 { 1440, 576 }, 1661 { 2880, 576 }, 1662 }; 1663 1664 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 1665 return; 1666 1667 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { 1668 if ((mode->hdisplay == cea_interlaced[i].w) && 1669 (mode->vdisplay == cea_interlaced[i].h / 2)) { 1670 mode->vdisplay *= 2; 1671 mode->vsync_start *= 2; 1672 mode->vsync_end *= 2; 1673 mode->vtotal *= 2; 1674 mode->vtotal |= 1; 1675 } 1676 } 1677 1678 mode->flags |= DRM_MODE_FLAG_INTERLACE; 1679 } 1680 1681 /** 1682 * drm_mode_detailed - create a new mode from an EDID detailed timing section 1683 * @dev: DRM device (needed to create new mode) 1684 * @edid: EDID block 1685 * @timing: EDID detailed timing info 1686 * @quirks: quirks to apply 1687 * 1688 * An EDID detailed timing block contains enough info for us to create and 1689 * return a new struct drm_display_mode. 1690 */ 1691 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 1692 struct edid *edid, 1693 struct detailed_timing *timing, 1694 u32 quirks) 1695 { 1696 struct drm_display_mode *mode; 1697 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 1698 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 1699 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 1700 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 1701 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 1702 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 1703 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 1704 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; 1705 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 1706 1707 /* ignore tiny modes */ 1708 if (hactive < 64 || vactive < 64) 1709 return NULL; 1710 1711 if (pt->misc & DRM_EDID_PT_STEREO) { 1712 DRM_DEBUG_KMS("stereo mode not supported\n"); 1713 return NULL; 1714 } 1715 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 1716 DRM_DEBUG_KMS("composite sync not supported\n"); 1717 } 1718 1719 /* it is incorrect if hsync/vsync width is zero */ 1720 if (!hsync_pulse_width || !vsync_pulse_width) { 1721 DRM_DEBUG_KMS("Incorrect Detailed timing. " 1722 "Wrong Hsync/Vsync pulse width\n"); 1723 return NULL; 1724 } 1725 1726 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { 1727 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); 1728 if (!mode) 1729 return NULL; 1730 1731 goto set_size; 1732 } 1733 1734 mode = drm_mode_create(dev); 1735 if (!mode) 1736 return NULL; 1737 1738 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 1739 timing->pixel_clock = cpu_to_le16(1088); 1740 1741 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 1742 1743 mode->hdisplay = hactive; 1744 mode->hsync_start = mode->hdisplay + hsync_offset; 1745 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 1746 mode->htotal = mode->hdisplay + hblank; 1747 1748 mode->vdisplay = vactive; 1749 mode->vsync_start = mode->vdisplay + vsync_offset; 1750 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 1751 mode->vtotal = mode->vdisplay + vblank; 1752 1753 /* Some EDIDs have bogus h/vtotal values */ 1754 if (mode->hsync_end > mode->htotal) 1755 mode->htotal = mode->hsync_end + 1; 1756 if (mode->vsync_end > mode->vtotal) 1757 mode->vtotal = mode->vsync_end + 1; 1758 1759 drm_mode_do_interlace_quirk(mode, pt); 1760 1761 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 1762 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 1763 } 1764 1765 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 1766 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 1767 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 1768 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 1769 1770 set_size: 1771 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 1772 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 1773 1774 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 1775 mode->width_mm *= 10; 1776 mode->height_mm *= 10; 1777 } 1778 1779 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 1780 mode->width_mm = edid->width_cm * 10; 1781 mode->height_mm = edid->height_cm * 10; 1782 } 1783 1784 mode->type = DRM_MODE_TYPE_DRIVER; 1785 mode->vrefresh = drm_mode_vrefresh(mode); 1786 drm_mode_set_name(mode); 1787 1788 return mode; 1789 } 1790 1791 static bool 1792 mode_in_hsync_range(const struct drm_display_mode *mode, 1793 struct edid *edid, u8 *t) 1794 { 1795 int hsync, hmin, hmax; 1796 1797 hmin = t[7]; 1798 if (edid->revision >= 4) 1799 hmin += ((t[4] & 0x04) ? 255 : 0); 1800 hmax = t[8]; 1801 if (edid->revision >= 4) 1802 hmax += ((t[4] & 0x08) ? 255 : 0); 1803 hsync = drm_mode_hsync(mode); 1804 1805 return (hsync <= hmax && hsync >= hmin); 1806 } 1807 1808 static bool 1809 mode_in_vsync_range(const struct drm_display_mode *mode, 1810 struct edid *edid, u8 *t) 1811 { 1812 int vsync, vmin, vmax; 1813 1814 vmin = t[5]; 1815 if (edid->revision >= 4) 1816 vmin += ((t[4] & 0x01) ? 255 : 0); 1817 vmax = t[6]; 1818 if (edid->revision >= 4) 1819 vmax += ((t[4] & 0x02) ? 255 : 0); 1820 vsync = drm_mode_vrefresh(mode); 1821 1822 return (vsync <= vmax && vsync >= vmin); 1823 } 1824 1825 static u32 1826 range_pixel_clock(struct edid *edid, u8 *t) 1827 { 1828 /* unspecified */ 1829 if (t[9] == 0 || t[9] == 255) 1830 return 0; 1831 1832 /* 1.4 with CVT support gives us real precision, yay */ 1833 if (edid->revision >= 4 && t[10] == 0x04) 1834 return (t[9] * 10000) - ((t[12] >> 2) * 250); 1835 1836 /* 1.3 is pathetic, so fuzz up a bit */ 1837 return t[9] * 10000 + 5001; 1838 } 1839 1840 static bool 1841 mode_in_range(const struct drm_display_mode *mode, struct edid *edid, 1842 struct detailed_timing *timing) 1843 { 1844 u32 max_clock; 1845 u8 *t = (u8 *)timing; 1846 1847 if (!mode_in_hsync_range(mode, edid, t)) 1848 return false; 1849 1850 if (!mode_in_vsync_range(mode, edid, t)) 1851 return false; 1852 1853 if ((max_clock = range_pixel_clock(edid, t))) 1854 if (mode->clock > max_clock) 1855 return false; 1856 1857 /* 1.4 max horizontal check */ 1858 if (edid->revision >= 4 && t[10] == 0x04) 1859 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) 1860 return false; 1861 1862 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) 1863 return false; 1864 1865 return true; 1866 } 1867 1868 static bool valid_inferred_mode(const struct drm_connector *connector, 1869 const struct drm_display_mode *mode) 1870 { 1871 struct drm_display_mode *m; 1872 bool ok = false; 1873 1874 list_for_each_entry(m, &connector->probed_modes, head) { 1875 if (mode->hdisplay == m->hdisplay && 1876 mode->vdisplay == m->vdisplay && 1877 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) 1878 return false; /* duplicated */ 1879 if (mode->hdisplay <= m->hdisplay && 1880 mode->vdisplay <= m->vdisplay) 1881 ok = true; 1882 } 1883 return ok; 1884 } 1885 1886 static int 1887 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1888 struct detailed_timing *timing) 1889 { 1890 int i, modes = 0; 1891 struct drm_display_mode *newmode; 1892 struct drm_device *dev = connector->dev; 1893 1894 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1895 if (mode_in_range(drm_dmt_modes + i, edid, timing) && 1896 valid_inferred_mode(connector, drm_dmt_modes + i)) { 1897 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1898 if (newmode) { 1899 drm_mode_probed_add(connector, newmode); 1900 modes++; 1901 } 1902 } 1903 } 1904 1905 return modes; 1906 } 1907 1908 /* fix up 1366x768 mode from 1368x768; 1909 * GFT/CVT can't express 1366 width which isn't dividable by 8 1910 */ 1911 static void fixup_mode_1366x768(struct drm_display_mode *mode) 1912 { 1913 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { 1914 mode->hdisplay = 1366; 1915 mode->hsync_start--; 1916 mode->hsync_end--; 1917 drm_mode_set_name(mode); 1918 } 1919 } 1920 1921 static int 1922 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, 1923 struct detailed_timing *timing) 1924 { 1925 int i, modes = 0; 1926 struct drm_display_mode *newmode; 1927 struct drm_device *dev = connector->dev; 1928 1929 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1930 const struct minimode *m = &extra_modes[i]; 1931 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); 1932 if (!newmode) 1933 return modes; 1934 1935 fixup_mode_1366x768(newmode); 1936 if (!mode_in_range(newmode, edid, timing) || 1937 !valid_inferred_mode(connector, newmode)) { 1938 drm_mode_destroy(dev, newmode); 1939 continue; 1940 } 1941 1942 drm_mode_probed_add(connector, newmode); 1943 modes++; 1944 } 1945 1946 return modes; 1947 } 1948 1949 static int 1950 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1951 struct detailed_timing *timing) 1952 { 1953 int i, modes = 0; 1954 struct drm_display_mode *newmode; 1955 struct drm_device *dev = connector->dev; 1956 bool rb = drm_monitor_supports_rb(edid); 1957 1958 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1959 const struct minimode *m = &extra_modes[i]; 1960 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); 1961 if (!newmode) 1962 return modes; 1963 1964 fixup_mode_1366x768(newmode); 1965 if (!mode_in_range(newmode, edid, timing) || 1966 !valid_inferred_mode(connector, newmode)) { 1967 drm_mode_destroy(dev, newmode); 1968 continue; 1969 } 1970 1971 drm_mode_probed_add(connector, newmode); 1972 modes++; 1973 } 1974 1975 return modes; 1976 } 1977 1978 static void 1979 do_inferred_modes(struct detailed_timing *timing, void *c) 1980 { 1981 struct detailed_mode_closure *closure = c; 1982 struct detailed_non_pixel *data = &timing->data.other_data; 1983 struct detailed_data_monitor_range *range = &data->data.range; 1984 1985 if (data->type != EDID_DETAIL_MONITOR_RANGE) 1986 return; 1987 1988 closure->modes += drm_dmt_modes_for_range(closure->connector, 1989 closure->edid, 1990 timing); 1991 1992 if (!version_greater(closure->edid, 1, 1)) 1993 return; /* GTF not defined yet */ 1994 1995 switch (range->flags) { 1996 case 0x02: /* secondary gtf, XXX could do more */ 1997 case 0x00: /* default gtf */ 1998 closure->modes += drm_gtf_modes_for_range(closure->connector, 1999 closure->edid, 2000 timing); 2001 break; 2002 case 0x04: /* cvt, only in 1.4+ */ 2003 if (!version_greater(closure->edid, 1, 3)) 2004 break; 2005 2006 closure->modes += drm_cvt_modes_for_range(closure->connector, 2007 closure->edid, 2008 timing); 2009 break; 2010 case 0x01: /* just the ranges, no formula */ 2011 default: 2012 break; 2013 } 2014 } 2015 2016 static int 2017 add_inferred_modes(struct drm_connector *connector, struct edid *edid) 2018 { 2019 struct detailed_mode_closure closure = { 2020 connector, edid, 0, 0, 0 2021 }; 2022 2023 if (version_greater(edid, 1, 0)) 2024 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, 2025 &closure); 2026 2027 return closure.modes; 2028 } 2029 2030 static int 2031 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 2032 { 2033 int i, j, m, modes = 0; 2034 struct drm_display_mode *mode; 2035 u8 *est = ((u8 *)timing) + 5; 2036 2037 for (i = 0; i < 6; i++) { 2038 for (j = 7; j > 0; j--) { 2039 m = (i * 8) + (7 - j); 2040 if (m >= ARRAY_SIZE(est3_modes)) 2041 break; 2042 if (est[i] & (1 << j)) { 2043 mode = drm_mode_find_dmt(connector->dev, 2044 est3_modes[m].w, 2045 est3_modes[m].h, 2046 est3_modes[m].r, 2047 est3_modes[m].rb); 2048 if (mode) { 2049 drm_mode_probed_add(connector, mode); 2050 modes++; 2051 } 2052 } 2053 } 2054 } 2055 2056 return modes; 2057 } 2058 2059 static void 2060 do_established_modes(struct detailed_timing *timing, void *c) 2061 { 2062 struct detailed_mode_closure *closure = c; 2063 struct detailed_non_pixel *data = &timing->data.other_data; 2064 2065 if (data->type == EDID_DETAIL_EST_TIMINGS) 2066 closure->modes += drm_est3_modes(closure->connector, timing); 2067 } 2068 2069 /** 2070 * add_established_modes - get est. modes from EDID and add them 2071 * @edid: EDID block to scan 2072 * 2073 * Each EDID block contains a bitmap of the supported "established modes" list 2074 * (defined above). Tease them out and add them to the global modes list. 2075 */ 2076 static int 2077 add_established_modes(struct drm_connector *connector, struct edid *edid) 2078 { 2079 struct drm_device *dev = connector->dev; 2080 unsigned long est_bits = edid->established_timings.t1 | 2081 (edid->established_timings.t2 << 8) | 2082 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 2083 int i, modes = 0; 2084 struct detailed_mode_closure closure = { 2085 connector, edid, 0, 0, 0 2086 }; 2087 2088 for (i = 0; i <= EDID_EST_TIMINGS; i++) { 2089 if (est_bits & (1<<i)) { 2090 struct drm_display_mode *newmode; 2091 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 2092 if (newmode) { 2093 drm_mode_probed_add(connector, newmode); 2094 modes++; 2095 } 2096 } 2097 } 2098 2099 if (version_greater(edid, 1, 0)) 2100 drm_for_each_detailed_block((u8 *)edid, 2101 do_established_modes, &closure); 2102 2103 return modes + closure.modes; 2104 } 2105 2106 static void 2107 do_standard_modes(struct detailed_timing *timing, void *c) 2108 { 2109 struct detailed_mode_closure *closure = c; 2110 struct detailed_non_pixel *data = &timing->data.other_data; 2111 struct drm_connector *connector = closure->connector; 2112 struct edid *edid = closure->edid; 2113 2114 if (data->type == EDID_DETAIL_STD_MODES) { 2115 int i; 2116 for (i = 0; i < 6; i++) { 2117 struct std_timing *std; 2118 struct drm_display_mode *newmode; 2119 2120 std = &data->data.timings[i]; 2121 newmode = drm_mode_std(connector, edid, std, 2122 edid->revision); 2123 if (newmode) { 2124 drm_mode_probed_add(connector, newmode); 2125 closure->modes++; 2126 } 2127 } 2128 } 2129 } 2130 2131 /** 2132 * add_standard_modes - get std. modes from EDID and add them 2133 * @edid: EDID block to scan 2134 * 2135 * Standard modes can be calculated using the appropriate standard (DMT, 2136 * GTF or CVT. Grab them from @edid and add them to the list. 2137 */ 2138 static int 2139 add_standard_modes(struct drm_connector *connector, struct edid *edid) 2140 { 2141 int i, modes = 0; 2142 struct detailed_mode_closure closure = { 2143 connector, edid, 0, 0, 0 2144 }; 2145 2146 for (i = 0; i < EDID_STD_TIMINGS; i++) { 2147 struct drm_display_mode *newmode; 2148 2149 newmode = drm_mode_std(connector, edid, 2150 &edid->standard_timings[i], 2151 edid->revision); 2152 if (newmode) { 2153 drm_mode_probed_add(connector, newmode); 2154 modes++; 2155 } 2156 } 2157 2158 if (version_greater(edid, 1, 0)) 2159 drm_for_each_detailed_block((u8 *)edid, do_standard_modes, 2160 &closure); 2161 2162 /* XXX should also look for standard codes in VTB blocks */ 2163 2164 return modes + closure.modes; 2165 } 2166 2167 static int drm_cvt_modes(struct drm_connector *connector, 2168 struct detailed_timing *timing) 2169 { 2170 int i, j, modes = 0; 2171 struct drm_display_mode *newmode; 2172 struct drm_device *dev = connector->dev; 2173 struct cvt_timing *cvt; 2174 const int rates[] = { 60, 85, 75, 60, 50 }; 2175 const u8 empty[3] = { 0, 0, 0 }; 2176 2177 for (i = 0; i < 4; i++) { 2178 int uninitialized_var(width), height; 2179 cvt = &(timing->data.other_data.data.cvt[i]); 2180 2181 if (!memcmp(cvt->code, empty, 3)) 2182 continue; 2183 2184 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 2185 switch (cvt->code[1] & 0x0c) { 2186 case 0x00: 2187 width = height * 4 / 3; 2188 break; 2189 case 0x04: 2190 width = height * 16 / 9; 2191 break; 2192 case 0x08: 2193 width = height * 16 / 10; 2194 break; 2195 case 0x0c: 2196 width = height * 15 / 9; 2197 break; 2198 } 2199 2200 for (j = 1; j < 5; j++) { 2201 if (cvt->code[2] & (1 << j)) { 2202 newmode = drm_cvt_mode(dev, width, height, 2203 rates[j], j == 0, 2204 false, false); 2205 if (newmode) { 2206 drm_mode_probed_add(connector, newmode); 2207 modes++; 2208 } 2209 } 2210 } 2211 } 2212 2213 return modes; 2214 } 2215 2216 static void 2217 do_cvt_mode(struct detailed_timing *timing, void *c) 2218 { 2219 struct detailed_mode_closure *closure = c; 2220 struct detailed_non_pixel *data = &timing->data.other_data; 2221 2222 if (data->type == EDID_DETAIL_CVT_3BYTE) 2223 closure->modes += drm_cvt_modes(closure->connector, timing); 2224 } 2225 2226 static int 2227 add_cvt_modes(struct drm_connector *connector, struct edid *edid) 2228 { 2229 struct detailed_mode_closure closure = { 2230 connector, edid, 0, 0, 0 2231 }; 2232 2233 if (version_greater(edid, 1, 2)) 2234 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); 2235 2236 /* XXX should also look for CVT codes in VTB blocks */ 2237 2238 return closure.modes; 2239 } 2240 2241 static void 2242 do_detailed_mode(struct detailed_timing *timing, void *c) 2243 { 2244 struct detailed_mode_closure *closure = c; 2245 struct drm_display_mode *newmode; 2246 2247 if (timing->pixel_clock) { 2248 newmode = drm_mode_detailed(closure->connector->dev, 2249 closure->edid, timing, 2250 closure->quirks); 2251 if (!newmode) 2252 return; 2253 2254 if (closure->preferred) 2255 newmode->type |= DRM_MODE_TYPE_PREFERRED; 2256 2257 drm_mode_probed_add(closure->connector, newmode); 2258 closure->modes++; 2259 closure->preferred = 0; 2260 } 2261 } 2262 2263 /* 2264 * add_detailed_modes - Add modes from detailed timings 2265 * @connector: attached connector 2266 * @edid: EDID block to scan 2267 * @quirks: quirks to apply 2268 */ 2269 static int 2270 add_detailed_modes(struct drm_connector *connector, struct edid *edid, 2271 u32 quirks) 2272 { 2273 struct detailed_mode_closure closure = { 2274 connector, 2275 edid, 2276 1, 2277 quirks, 2278 0 2279 }; 2280 2281 if (closure.preferred && !version_greater(edid, 1, 3)) 2282 closure.preferred = 2283 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 2284 2285 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); 2286 2287 return closure.modes; 2288 } 2289 2290 #define HDMI_IDENTIFIER 0x000C03 2291 #define AUDIO_BLOCK 0x01 2292 #define VIDEO_BLOCK 0x02 2293 #define VENDOR_BLOCK 0x03 2294 #define SPEAKER_BLOCK 0x04 2295 #define VIDEO_CAPABILITY_BLOCK 0x07 2296 #define EDID_BASIC_AUDIO (1 << 6) 2297 #define EDID_CEA_YCRCB444 (1 << 5) 2298 #define EDID_CEA_YCRCB422 (1 << 4) 2299 #define EDID_CEA_VCDB_QS (1 << 6) 2300 2301 /** 2302 * Search EDID for CEA extension block. 2303 */ 2304 u8 *drm_find_cea_extension(struct edid *edid) 2305 { 2306 u8 *edid_ext = NULL; 2307 int i; 2308 2309 /* No EDID or EDID extensions */ 2310 if (edid == NULL || edid->extensions == 0) 2311 return NULL; 2312 2313 /* Find CEA extension */ 2314 for (i = 0; i < edid->extensions; i++) { 2315 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); 2316 if (edid_ext[0] == CEA_EXT) 2317 break; 2318 } 2319 2320 if (i == edid->extensions) 2321 return NULL; 2322 2323 return edid_ext; 2324 } 2325 EXPORT_SYMBOL(drm_find_cea_extension); 2326 2327 /* 2328 * Calculate the alternate clock for the CEA mode 2329 * (60Hz vs. 59.94Hz etc.) 2330 */ 2331 static unsigned int 2332 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) 2333 { 2334 unsigned int clock = cea_mode->clock; 2335 2336 if (cea_mode->vrefresh % 6 != 0) 2337 return clock; 2338 2339 /* 2340 * edid_cea_modes contains the 59.94Hz 2341 * variant for 240 and 480 line modes, 2342 * and the 60Hz variant otherwise. 2343 */ 2344 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) 2345 clock = clock * 1001 / 1000; 2346 else 2347 clock = DIV_ROUND_UP(clock * 1000, 1001); 2348 2349 return clock; 2350 } 2351 2352 /** 2353 * drm_match_cea_mode - look for a CEA mode matching given mode 2354 * @to_match: display mode 2355 * 2356 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 2357 * mode. 2358 */ 2359 u8 drm_match_cea_mode(const struct drm_display_mode *to_match) 2360 { 2361 u8 mode; 2362 2363 if (!to_match->clock) 2364 return 0; 2365 2366 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { 2367 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode]; 2368 unsigned int clock1, clock2; 2369 2370 /* Check both 60Hz and 59.94Hz */ 2371 clock1 = cea_mode->clock; 2372 clock2 = cea_mode_alternate_clock(cea_mode); 2373 2374 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || 2375 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && 2376 drm_mode_equal_no_clocks(to_match, cea_mode)) 2377 return mode + 1; 2378 } 2379 return 0; 2380 } 2381 EXPORT_SYMBOL(drm_match_cea_mode); 2382 2383 static int 2384 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) 2385 { 2386 struct drm_device *dev = connector->dev; 2387 struct drm_display_mode *mode, *tmp; 2388 LIST_HEAD(list); 2389 int modes = 0; 2390 2391 /* Don't add CEA modes if the CEA extension block is missing */ 2392 if (!drm_find_cea_extension(edid)) 2393 return 0; 2394 2395 /* 2396 * Go through all probed modes and create a new mode 2397 * with the alternate clock for certain CEA modes. 2398 */ 2399 list_for_each_entry(mode, &connector->probed_modes, head) { 2400 const struct drm_display_mode *cea_mode; 2401 struct drm_display_mode *newmode; 2402 u8 cea_mode_idx = drm_match_cea_mode(mode) - 1; 2403 unsigned int clock1, clock2; 2404 2405 if (cea_mode_idx >= ARRAY_SIZE(edid_cea_modes)) 2406 continue; 2407 2408 cea_mode = &edid_cea_modes[cea_mode_idx]; 2409 2410 clock1 = cea_mode->clock; 2411 clock2 = cea_mode_alternate_clock(cea_mode); 2412 2413 if (clock1 == clock2) 2414 continue; 2415 2416 if (mode->clock != clock1 && mode->clock != clock2) 2417 continue; 2418 2419 newmode = drm_mode_duplicate(dev, cea_mode); 2420 if (!newmode) 2421 continue; 2422 2423 /* 2424 * The current mode could be either variant. Make 2425 * sure to pick the "other" clock for the new mode. 2426 */ 2427 if (mode->clock != clock1) 2428 newmode->clock = clock1; 2429 else 2430 newmode->clock = clock2; 2431 2432 list_add_tail(&newmode->head, &list); 2433 } 2434 2435 list_for_each_entry_safe(mode, tmp, &list, head) { 2436 list_del(&mode->head); 2437 drm_mode_probed_add(connector, mode); 2438 modes++; 2439 } 2440 2441 return modes; 2442 } 2443 2444 static int 2445 do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) 2446 { 2447 struct drm_device *dev = connector->dev; 2448 u8 * mode, cea_mode; 2449 int modes = 0; 2450 2451 for (mode = db; mode < db + len; mode++) { 2452 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ 2453 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) { 2454 struct drm_display_mode *newmode; 2455 newmode = drm_mode_duplicate(dev, 2456 &edid_cea_modes[cea_mode]); 2457 if (newmode) { 2458 newmode->vrefresh = 0; 2459 drm_mode_probed_add(connector, newmode); 2460 modes++; 2461 } 2462 } 2463 } 2464 2465 return modes; 2466 } 2467 2468 static int 2469 cea_db_payload_len(const u8 *db) 2470 { 2471 return db[0] & 0x1f; 2472 } 2473 2474 static int 2475 cea_db_tag(const u8 *db) 2476 { 2477 return db[0] >> 5; 2478 } 2479 2480 static int 2481 cea_revision(const u8 *cea) 2482 { 2483 return cea[1]; 2484 } 2485 2486 static int 2487 cea_db_offsets(const u8 *cea, int *start, int *end) 2488 { 2489 /* Data block offset in CEA extension block */ 2490 *start = 4; 2491 *end = cea[2]; 2492 if (*end == 0) 2493 *end = 127; 2494 if (*end < 4 || *end > 127) 2495 return -ERANGE; 2496 return 0; 2497 } 2498 2499 #define for_each_cea_db(cea, i, start, end) \ 2500 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) 2501 2502 static int 2503 add_cea_modes(struct drm_connector *connector, struct edid *edid) 2504 { 2505 u8 * cea = drm_find_cea_extension(edid); 2506 u8 * db, dbl; 2507 int modes = 0; 2508 2509 if (cea && cea_revision(cea) >= 3) { 2510 int i, start, end; 2511 2512 if (cea_db_offsets(cea, &start, &end)) 2513 return 0; 2514 2515 for_each_cea_db(cea, i, start, end) { 2516 db = &cea[i]; 2517 dbl = cea_db_payload_len(db); 2518 2519 if (cea_db_tag(db) == VIDEO_BLOCK) 2520 modes += do_cea_modes (connector, db+1, dbl); 2521 } 2522 } 2523 2524 return modes; 2525 } 2526 2527 static void 2528 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) 2529 { 2530 u8 len = cea_db_payload_len(db); 2531 2532 if (len >= 6) { 2533 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ 2534 connector->dvi_dual = db[6] & 1; 2535 } 2536 if (len >= 7) 2537 connector->max_tmds_clock = db[7] * 5; 2538 if (len >= 8) { 2539 connector->latency_present[0] = db[8] >> 7; 2540 connector->latency_present[1] = (db[8] >> 6) & 1; 2541 } 2542 if (len >= 9) 2543 connector->video_latency[0] = db[9]; 2544 if (len >= 10) 2545 connector->audio_latency[0] = db[10]; 2546 if (len >= 11) 2547 connector->video_latency[1] = db[11]; 2548 if (len >= 12) 2549 connector->audio_latency[1] = db[12]; 2550 2551 DRM_DEBUG_KMS("HDMI: DVI dual %d, " 2552 "max TMDS clock %d, " 2553 "latency present %d %d, " 2554 "video latency %d %d, " 2555 "audio latency %d %d\n", 2556 connector->dvi_dual, 2557 connector->max_tmds_clock, 2558 (int) connector->latency_present[0], 2559 (int) connector->latency_present[1], 2560 connector->video_latency[0], 2561 connector->video_latency[1], 2562 connector->audio_latency[0], 2563 connector->audio_latency[1]); 2564 } 2565 2566 static void 2567 monitor_name(struct detailed_timing *t, void *data) 2568 { 2569 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) 2570 *(u8 **)data = t->data.other_data.data.str.str; 2571 } 2572 2573 static bool cea_db_is_hdmi_vsdb(const u8 *db) 2574 { 2575 int hdmi_id; 2576 2577 if (cea_db_tag(db) != VENDOR_BLOCK) 2578 return false; 2579 2580 if (cea_db_payload_len(db) < 5) 2581 return false; 2582 2583 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); 2584 2585 return hdmi_id == HDMI_IDENTIFIER; 2586 } 2587 2588 /** 2589 * drm_edid_to_eld - build ELD from EDID 2590 * @connector: connector corresponding to the HDMI/DP sink 2591 * @edid: EDID to parse 2592 * 2593 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. 2594 * Some ELD fields are left to the graphics driver caller: 2595 * - Conn_Type 2596 * - HDCP 2597 * - Port_ID 2598 */ 2599 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) 2600 { 2601 uint8_t *eld = connector->eld; 2602 u8 *cea; 2603 u8 *name; 2604 u8 *db; 2605 int sad_count = 0; 2606 int mnl; 2607 int dbl; 2608 2609 memset(eld, 0, sizeof(connector->eld)); 2610 2611 cea = drm_find_cea_extension(edid); 2612 if (!cea) { 2613 DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); 2614 return; 2615 } 2616 2617 name = NULL; 2618 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); 2619 for (mnl = 0; name && mnl < 13; mnl++) { 2620 if (name[mnl] == 0x0a) 2621 break; 2622 eld[20 + mnl] = name[mnl]; 2623 } 2624 eld[4] = (cea[1] << 5) | mnl; 2625 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); 2626 2627 eld[0] = 2 << 3; /* ELD version: 2 */ 2628 2629 eld[16] = edid->mfg_id[0]; 2630 eld[17] = edid->mfg_id[1]; 2631 eld[18] = edid->prod_code[0]; 2632 eld[19] = edid->prod_code[1]; 2633 2634 if (cea_revision(cea) >= 3) { 2635 int i, start, end; 2636 2637 if (cea_db_offsets(cea, &start, &end)) { 2638 start = 0; 2639 end = 0; 2640 } 2641 2642 for_each_cea_db(cea, i, start, end) { 2643 db = &cea[i]; 2644 dbl = cea_db_payload_len(db); 2645 2646 switch (cea_db_tag(db)) { 2647 case AUDIO_BLOCK: 2648 /* Audio Data Block, contains SADs */ 2649 sad_count = dbl / 3; 2650 if (dbl >= 1) 2651 memcpy(eld + 20 + mnl, &db[1], dbl); 2652 break; 2653 case SPEAKER_BLOCK: 2654 /* Speaker Allocation Data Block */ 2655 if (dbl >= 1) 2656 eld[7] = db[1]; 2657 break; 2658 case VENDOR_BLOCK: 2659 /* HDMI Vendor-Specific Data Block */ 2660 if (cea_db_is_hdmi_vsdb(db)) 2661 parse_hdmi_vsdb(connector, db); 2662 break; 2663 default: 2664 break; 2665 } 2666 } 2667 } 2668 eld[5] |= sad_count << 4; 2669 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; 2670 2671 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); 2672 } 2673 EXPORT_SYMBOL(drm_edid_to_eld); 2674 2675 /** 2676 * drm_edid_to_sad - extracts SADs from EDID 2677 * @edid: EDID to parse 2678 * @sads: pointer that will be set to the extracted SADs 2679 * 2680 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it. 2681 * Note: returned pointer needs to be kfreed 2682 * 2683 * Return number of found SADs or negative number on error. 2684 */ 2685 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads) 2686 { 2687 int count = 0; 2688 int i, start, end, dbl; 2689 u8 *cea; 2690 2691 cea = drm_find_cea_extension(edid); 2692 if (!cea) { 2693 DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); 2694 return -ENOENT; 2695 } 2696 2697 if (cea_revision(cea) < 3) { 2698 DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); 2699 return -ENOTSUPP; 2700 } 2701 2702 if (cea_db_offsets(cea, &start, &end)) { 2703 DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); 2704 return -EPROTO; 2705 } 2706 2707 for_each_cea_db(cea, i, start, end) { 2708 u8 *db = &cea[i]; 2709 2710 if (cea_db_tag(db) == AUDIO_BLOCK) { 2711 int j; 2712 dbl = cea_db_payload_len(db); 2713 2714 count = dbl / 3; /* SAD is 3B */ 2715 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL); 2716 if (!*sads) 2717 return -ENOMEM; 2718 for (j = 0; j < count; j++) { 2719 u8 *sad = &db[1 + j * 3]; 2720 2721 (*sads)[j].format = (sad[0] & 0x78) >> 3; 2722 (*sads)[j].channels = sad[0] & 0x7; 2723 (*sads)[j].freq = sad[1] & 0x7F; 2724 (*sads)[j].byte2 = sad[2]; 2725 } 2726 break; 2727 } 2728 } 2729 2730 return count; 2731 } 2732 EXPORT_SYMBOL(drm_edid_to_sad); 2733 2734 /** 2735 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond 2736 * @connector: connector associated with the HDMI/DP sink 2737 * @mode: the display mode 2738 */ 2739 int drm_av_sync_delay(struct drm_connector *connector, 2740 struct drm_display_mode *mode) 2741 { 2742 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 2743 int a, v; 2744 2745 if (!connector->latency_present[0]) 2746 return 0; 2747 if (!connector->latency_present[1]) 2748 i = 0; 2749 2750 a = connector->audio_latency[i]; 2751 v = connector->video_latency[i]; 2752 2753 /* 2754 * HDMI/DP sink doesn't support audio or video? 2755 */ 2756 if (a == 255 || v == 255) 2757 return 0; 2758 2759 /* 2760 * Convert raw EDID values to millisecond. 2761 * Treat unknown latency as 0ms. 2762 */ 2763 if (a) 2764 a = min(2 * (a - 1), 500); 2765 if (v) 2766 v = min(2 * (v - 1), 500); 2767 2768 return max(v - a, 0); 2769 } 2770 EXPORT_SYMBOL(drm_av_sync_delay); 2771 2772 /** 2773 * drm_select_eld - select one ELD from multiple HDMI/DP sinks 2774 * @encoder: the encoder just changed display mode 2775 * @mode: the adjusted display mode 2776 * 2777 * It's possible for one encoder to be associated with multiple HDMI/DP sinks. 2778 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. 2779 */ 2780 struct drm_connector *drm_select_eld(struct drm_encoder *encoder, 2781 struct drm_display_mode *mode) 2782 { 2783 struct drm_connector *connector; 2784 struct drm_device *dev = encoder->dev; 2785 2786 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 2787 if (connector->encoder == encoder && connector->eld[0]) 2788 return connector; 2789 2790 return NULL; 2791 } 2792 EXPORT_SYMBOL(drm_select_eld); 2793 2794 /** 2795 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 2796 * @edid: monitor EDID information 2797 * 2798 * Parse the CEA extension according to CEA-861-B. 2799 * Return true if HDMI, false if not or unknown. 2800 */ 2801 bool drm_detect_hdmi_monitor(struct edid *edid) 2802 { 2803 u8 *edid_ext; 2804 int i; 2805 int start_offset, end_offset; 2806 2807 edid_ext = drm_find_cea_extension(edid); 2808 if (!edid_ext) 2809 return false; 2810 2811 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 2812 return false; 2813 2814 /* 2815 * Because HDMI identifier is in Vendor Specific Block, 2816 * search it from all data blocks of CEA extension. 2817 */ 2818 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 2819 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) 2820 return true; 2821 } 2822 2823 return false; 2824 } 2825 EXPORT_SYMBOL(drm_detect_hdmi_monitor); 2826 2827 /** 2828 * drm_detect_monitor_audio - check monitor audio capability 2829 * 2830 * Monitor should have CEA extension block. 2831 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic 2832 * audio' only. If there is any audio extension block and supported 2833 * audio format, assume at least 'basic audio' support, even if 'basic 2834 * audio' is not defined in EDID. 2835 * 2836 */ 2837 bool drm_detect_monitor_audio(struct edid *edid) 2838 { 2839 u8 *edid_ext; 2840 int i, j; 2841 bool has_audio = false; 2842 int start_offset, end_offset; 2843 2844 edid_ext = drm_find_cea_extension(edid); 2845 if (!edid_ext) 2846 goto end; 2847 2848 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); 2849 2850 if (has_audio) { 2851 DRM_DEBUG_KMS("Monitor has basic audio support\n"); 2852 goto end; 2853 } 2854 2855 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 2856 goto end; 2857 2858 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 2859 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { 2860 has_audio = true; 2861 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) 2862 DRM_DEBUG_KMS("CEA audio format %d\n", 2863 (edid_ext[i + j] >> 3) & 0xf); 2864 goto end; 2865 } 2866 } 2867 end: 2868 return has_audio; 2869 } 2870 EXPORT_SYMBOL(drm_detect_monitor_audio); 2871 2872 /** 2873 * drm_rgb_quant_range_selectable - is RGB quantization range selectable? 2874 * 2875 * Check whether the monitor reports the RGB quantization range selection 2876 * as supported. The AVI infoframe can then be used to inform the monitor 2877 * which quantization range (full or limited) is used. 2878 */ 2879 bool drm_rgb_quant_range_selectable(struct edid *edid) 2880 { 2881 u8 *edid_ext; 2882 int i, start, end; 2883 2884 edid_ext = drm_find_cea_extension(edid); 2885 if (!edid_ext) 2886 return false; 2887 2888 if (cea_db_offsets(edid_ext, &start, &end)) 2889 return false; 2890 2891 for_each_cea_db(edid_ext, i, start, end) { 2892 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && 2893 cea_db_payload_len(&edid_ext[i]) == 2) { 2894 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); 2895 return edid_ext[i + 2] & EDID_CEA_VCDB_QS; 2896 } 2897 } 2898 2899 return false; 2900 } 2901 EXPORT_SYMBOL(drm_rgb_quant_range_selectable); 2902 2903 /** 2904 * drm_add_display_info - pull display info out if present 2905 * @edid: EDID data 2906 * @info: display info (attached to connector) 2907 * 2908 * Grab any available display info and stuff it into the drm_display_info 2909 * structure that's part of the connector. Useful for tracking bpp and 2910 * color spaces. 2911 */ 2912 static void drm_add_display_info(struct edid *edid, 2913 struct drm_display_info *info) 2914 { 2915 u8 *edid_ext; 2916 2917 info->width_mm = edid->width_cm * 10; 2918 info->height_mm = edid->height_cm * 10; 2919 2920 /* driver figures it out in this case */ 2921 info->bpc = 0; 2922 info->color_formats = 0; 2923 2924 if (edid->revision < 3) 2925 return; 2926 2927 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) 2928 return; 2929 2930 /* Get data from CEA blocks if present */ 2931 edid_ext = drm_find_cea_extension(edid); 2932 if (edid_ext) { 2933 info->cea_rev = edid_ext[1]; 2934 2935 /* The existence of a CEA block should imply RGB support */ 2936 info->color_formats = DRM_COLOR_FORMAT_RGB444; 2937 if (edid_ext[3] & EDID_CEA_YCRCB444) 2938 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 2939 if (edid_ext[3] & EDID_CEA_YCRCB422) 2940 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 2941 } 2942 2943 /* Only defined for 1.4 with digital displays */ 2944 if (edid->revision < 4) 2945 return; 2946 2947 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { 2948 case DRM_EDID_DIGITAL_DEPTH_6: 2949 info->bpc = 6; 2950 break; 2951 case DRM_EDID_DIGITAL_DEPTH_8: 2952 info->bpc = 8; 2953 break; 2954 case DRM_EDID_DIGITAL_DEPTH_10: 2955 info->bpc = 10; 2956 break; 2957 case DRM_EDID_DIGITAL_DEPTH_12: 2958 info->bpc = 12; 2959 break; 2960 case DRM_EDID_DIGITAL_DEPTH_14: 2961 info->bpc = 14; 2962 break; 2963 case DRM_EDID_DIGITAL_DEPTH_16: 2964 info->bpc = 16; 2965 break; 2966 case DRM_EDID_DIGITAL_DEPTH_UNDEF: 2967 default: 2968 info->bpc = 0; 2969 break; 2970 } 2971 2972 info->color_formats |= DRM_COLOR_FORMAT_RGB444; 2973 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) 2974 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 2975 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) 2976 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 2977 } 2978 2979 /** 2980 * drm_add_edid_modes - add modes from EDID data, if available 2981 * @connector: connector we're probing 2982 * @edid: edid data 2983 * 2984 * Add the specified modes to the connector's mode list. 2985 * 2986 * Return number of modes added or 0 if we couldn't find any. 2987 */ 2988 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 2989 { 2990 int num_modes = 0; 2991 u32 quirks; 2992 2993 if (edid == NULL) { 2994 return 0; 2995 } 2996 if (!drm_edid_is_valid(edid)) { 2997 dev_warn(connector->dev->dev, "%s: EDID invalid.\n", 2998 drm_get_connector_name(connector)); 2999 return 0; 3000 } 3001 3002 quirks = edid_get_quirks(edid); 3003 3004 /* 3005 * EDID spec says modes should be preferred in this order: 3006 * - preferred detailed mode 3007 * - other detailed modes from base block 3008 * - detailed modes from extension blocks 3009 * - CVT 3-byte code modes 3010 * - standard timing codes 3011 * - established timing codes 3012 * - modes inferred from GTF or CVT range information 3013 * 3014 * We get this pretty much right. 3015 * 3016 * XXX order for additional mode types in extension blocks? 3017 */ 3018 num_modes += add_detailed_modes(connector, edid, quirks); 3019 num_modes += add_cvt_modes(connector, edid); 3020 num_modes += add_standard_modes(connector, edid); 3021 num_modes += add_established_modes(connector, edid); 3022 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) 3023 num_modes += add_inferred_modes(connector, edid); 3024 num_modes += add_cea_modes(connector, edid); 3025 num_modes += add_alternate_cea_modes(connector, edid); 3026 3027 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 3028 edid_fixup_preferred(connector, quirks); 3029 3030 drm_add_display_info(edid, &connector->display_info); 3031 3032 return num_modes; 3033 } 3034 EXPORT_SYMBOL(drm_add_edid_modes); 3035 3036 /** 3037 * drm_add_modes_noedid - add modes for the connectors without EDID 3038 * @connector: connector we're probing 3039 * @hdisplay: the horizontal display limit 3040 * @vdisplay: the vertical display limit 3041 * 3042 * Add the specified modes to the connector's mode list. Only when the 3043 * hdisplay/vdisplay is not beyond the given limit, it will be added. 3044 * 3045 * Return number of modes added or 0 if we couldn't find any. 3046 */ 3047 int drm_add_modes_noedid(struct drm_connector *connector, 3048 int hdisplay, int vdisplay) 3049 { 3050 int i, count, num_modes = 0; 3051 struct drm_display_mode *mode; 3052 struct drm_device *dev = connector->dev; 3053 3054 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 3055 if (hdisplay < 0) 3056 hdisplay = 0; 3057 if (vdisplay < 0) 3058 vdisplay = 0; 3059 3060 for (i = 0; i < count; i++) { 3061 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 3062 if (hdisplay && vdisplay) { 3063 /* 3064 * Only when two are valid, they will be used to check 3065 * whether the mode should be added to the mode list of 3066 * the connector. 3067 */ 3068 if (ptr->hdisplay > hdisplay || 3069 ptr->vdisplay > vdisplay) 3070 continue; 3071 } 3072 if (drm_mode_vrefresh(ptr) > 61) 3073 continue; 3074 mode = drm_mode_duplicate(dev, ptr); 3075 if (mode) { 3076 drm_mode_probed_add(connector, mode); 3077 num_modes++; 3078 } 3079 } 3080 return num_modes; 3081 } 3082 EXPORT_SYMBOL(drm_add_modes_noedid); 3083 3084 /** 3085 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with 3086 * data from a DRM display mode 3087 * @frame: HDMI AVI infoframe 3088 * @mode: DRM display mode 3089 * 3090 * Returns 0 on success or a negative error code on failure. 3091 */ 3092 int 3093 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, 3094 const struct drm_display_mode *mode) 3095 { 3096 int err; 3097 3098 if (!frame || !mode) 3099 return -EINVAL; 3100 3101 err = hdmi_avi_infoframe_init(frame); 3102 if (err < 0) 3103 return err; 3104 3105 frame->video_code = drm_match_cea_mode(mode); 3106 if (!frame->video_code) 3107 return 0; 3108 3109 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; 3110 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; 3111 3112 return 0; 3113 } 3114 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode); 3115