1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 7 * FB layer. 8 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 9 * 10 * Permission is hereby granted, free of charge, to any person obtaining a 11 * copy of this software and associated documentation files (the "Software"), 12 * to deal in the Software without restriction, including without limitation 13 * the rights to use, copy, modify, merge, publish, distribute, sub license, 14 * and/or sell copies of the Software, and to permit persons to whom the 15 * Software is furnished to do so, subject to the following conditions: 16 * 17 * The above copyright notice and this permission notice (including the 18 * next paragraph) shall be included in all copies or substantial portions 19 * of the Software. 20 * 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 24 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 27 * DEALINGS IN THE SOFTWARE. 28 */ 29 #include <linux/kernel.h> 30 #include <linux/i2c.h> 31 #include <linux/i2c-algo-bit.h> 32 #include "drmP.h" 33 #include "drm_edid.h" 34 35 /* 36 * TODO: 37 * - support EDID 1.4 (incl. CE blocks) 38 */ 39 40 /* 41 * EDID blocks out in the wild have a variety of bugs, try to collect 42 * them here (note that userspace may work around broken monitors first, 43 * but fixes should make their way here so that the kernel "just works" 44 * on as many displays as possible). 45 */ 46 47 /* First detailed mode wrong, use largest 60Hz mode */ 48 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 49 /* Reported 135MHz pixel clock is too high, needs adjustment */ 50 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 51 /* Prefer the largest mode at 75 Hz */ 52 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 53 /* Detail timing is in cm not mm */ 54 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 55 /* Detailed timing descriptors have bogus size values, so just take the 56 * maximum size and use that. 57 */ 58 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 59 /* Monitor forgot to set the first detailed is preferred bit. */ 60 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 61 /* use +hsync +vsync for detailed mode */ 62 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 63 /* define the number of Extension EDID block */ 64 #define MAX_EDID_EXT_NUM 4 65 66 #define LEVEL_DMT 0 67 #define LEVEL_GTF 1 68 #define LEVEL_CVT 2 69 70 static struct edid_quirk { 71 char *vendor; 72 int product_id; 73 u32 quirks; 74 } edid_quirk_list[] = { 75 /* Acer AL1706 */ 76 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 77 /* Acer F51 */ 78 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 79 /* Unknown Acer */ 80 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 81 82 /* Belinea 10 15 55 */ 83 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 84 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 85 86 /* Envision Peripherals, Inc. EN-7100e */ 87 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 88 89 /* Funai Electronics PM36B */ 90 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 91 EDID_QUIRK_DETAILED_IN_CM }, 92 93 /* LG Philips LCD LP154W01-A5 */ 94 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 95 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 96 97 /* Philips 107p5 CRT */ 98 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 99 100 /* Proview AY765C */ 101 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 102 103 /* Samsung SyncMaster 205BW. Note: irony */ 104 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 105 /* Samsung SyncMaster 22[5-6]BW */ 106 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 107 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 108 }; 109 110 111 /* Valid EDID header has these bytes */ 112 static const u8 edid_header[] = { 113 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 114 }; 115 116 /** 117 * edid_is_valid - sanity check EDID data 118 * @edid: EDID data 119 * 120 * Sanity check the EDID block by looking at the header, the version number 121 * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's 122 * valid. 123 */ 124 static bool edid_is_valid(struct edid *edid) 125 { 126 int i; 127 u8 csum = 0; 128 u8 *raw_edid = (u8 *)edid; 129 130 if (memcmp(edid->header, edid_header, sizeof(edid_header))) 131 goto bad; 132 if (edid->version != 1) { 133 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 134 goto bad; 135 } 136 if (edid->revision > 4) 137 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 138 139 for (i = 0; i < EDID_LENGTH; i++) 140 csum += raw_edid[i]; 141 if (csum) { 142 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 143 goto bad; 144 } 145 146 return 1; 147 148 bad: 149 if (raw_edid) { 150 DRM_ERROR("Raw EDID:\n"); 151 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); 152 printk("\n"); 153 } 154 return 0; 155 } 156 157 /** 158 * edid_vendor - match a string against EDID's obfuscated vendor field 159 * @edid: EDID to match 160 * @vendor: vendor string 161 * 162 * Returns true if @vendor is in @edid, false otherwise 163 */ 164 static bool edid_vendor(struct edid *edid, char *vendor) 165 { 166 char edid_vendor[3]; 167 168 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 169 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 170 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 171 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 172 173 return !strncmp(edid_vendor, vendor, 3); 174 } 175 176 /** 177 * edid_get_quirks - return quirk flags for a given EDID 178 * @edid: EDID to process 179 * 180 * This tells subsequent routines what fixes they need to apply. 181 */ 182 static u32 edid_get_quirks(struct edid *edid) 183 { 184 struct edid_quirk *quirk; 185 int i; 186 187 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 188 quirk = &edid_quirk_list[i]; 189 190 if (edid_vendor(edid, quirk->vendor) && 191 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 192 return quirk->quirks; 193 } 194 195 return 0; 196 } 197 198 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 199 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 200 201 202 /** 203 * edid_fixup_preferred - set preferred modes based on quirk list 204 * @connector: has mode list to fix up 205 * @quirks: quirks list 206 * 207 * Walk the mode list for @connector, clearing the preferred status 208 * on existing modes and setting it anew for the right mode ala @quirks. 209 */ 210 static void edid_fixup_preferred(struct drm_connector *connector, 211 u32 quirks) 212 { 213 struct drm_display_mode *t, *cur_mode, *preferred_mode; 214 int target_refresh = 0; 215 216 if (list_empty(&connector->probed_modes)) 217 return; 218 219 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 220 target_refresh = 60; 221 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 222 target_refresh = 75; 223 224 preferred_mode = list_first_entry(&connector->probed_modes, 225 struct drm_display_mode, head); 226 227 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 228 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 229 230 if (cur_mode == preferred_mode) 231 continue; 232 233 /* Largest mode is preferred */ 234 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 235 preferred_mode = cur_mode; 236 237 /* At a given size, try to get closest to target refresh */ 238 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 239 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 240 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 241 preferred_mode = cur_mode; 242 } 243 } 244 245 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 246 } 247 248 /* 249 * Add the Autogenerated from the DMT spec. 250 * This table is copied from xfree86/modes/xf86EdidModes.c. 251 * But the mode with Reduced blank feature is deleted. 252 */ 253 static struct drm_display_mode drm_dmt_modes[] = { 254 /* 640x350@85Hz */ 255 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 256 736, 832, 0, 350, 382, 385, 445, 0, 257 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 258 /* 640x400@85Hz */ 259 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 260 736, 832, 0, 400, 401, 404, 445, 0, 261 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 262 /* 720x400@85Hz */ 263 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 264 828, 936, 0, 400, 401, 404, 446, 0, 265 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 266 /* 640x480@60Hz */ 267 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 268 752, 800, 0, 480, 489, 492, 525, 0, 269 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 270 /* 640x480@72Hz */ 271 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 272 704, 832, 0, 480, 489, 492, 520, 0, 273 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 274 /* 640x480@75Hz */ 275 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 276 720, 840, 0, 480, 481, 484, 500, 0, 277 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 278 /* 640x480@85Hz */ 279 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 280 752, 832, 0, 480, 481, 484, 509, 0, 281 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 282 /* 800x600@56Hz */ 283 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 284 896, 1024, 0, 600, 601, 603, 625, 0, 285 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 286 /* 800x600@60Hz */ 287 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 288 968, 1056, 0, 600, 601, 605, 628, 0, 289 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 290 /* 800x600@72Hz */ 291 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 292 976, 1040, 0, 600, 637, 643, 666, 0, 293 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 294 /* 800x600@75Hz */ 295 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 296 896, 1056, 0, 600, 601, 604, 625, 0, 297 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 298 /* 800x600@85Hz */ 299 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 300 896, 1048, 0, 600, 601, 604, 631, 0, 301 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 302 /* 848x480@60Hz */ 303 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 304 976, 1088, 0, 480, 486, 494, 517, 0, 305 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 306 /* 1024x768@43Hz, interlace */ 307 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 308 1208, 1264, 0, 768, 768, 772, 817, 0, 309 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 310 DRM_MODE_FLAG_INTERLACE) }, 311 /* 1024x768@60Hz */ 312 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 313 1184, 1344, 0, 768, 771, 777, 806, 0, 314 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 315 /* 1024x768@70Hz */ 316 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 317 1184, 1328, 0, 768, 771, 777, 806, 0, 318 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 319 /* 1024x768@75Hz */ 320 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 321 1136, 1312, 0, 768, 769, 772, 800, 0, 322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 323 /* 1024x768@85Hz */ 324 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 325 1072, 1376, 0, 768, 769, 772, 808, 0, 326 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 327 /* 1152x864@75Hz */ 328 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 329 1344, 1600, 0, 864, 865, 868, 900, 0, 330 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 331 /* 1280x768@60Hz */ 332 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 333 1472, 1664, 0, 768, 771, 778, 798, 0, 334 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 335 /* 1280x768@75Hz */ 336 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 337 1488, 1696, 0, 768, 771, 778, 805, 0, 338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 339 /* 1280x768@85Hz */ 340 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 341 1496, 1712, 0, 768, 771, 778, 809, 0, 342 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 343 /* 1280x800@60Hz */ 344 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 345 1480, 1680, 0, 800, 803, 809, 831, 0, 346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 347 /* 1280x800@75Hz */ 348 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 349 1488, 1696, 0, 800, 803, 809, 838, 0, 350 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 351 /* 1280x800@85Hz */ 352 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 353 1496, 1712, 0, 800, 803, 809, 843, 0, 354 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 355 /* 1280x960@60Hz */ 356 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 357 1488, 1800, 0, 960, 961, 964, 1000, 0, 358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 359 /* 1280x960@85Hz */ 360 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 361 1504, 1728, 0, 960, 961, 964, 1011, 0, 362 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 363 /* 1280x1024@60Hz */ 364 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 365 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 366 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 367 /* 1280x1024@75Hz */ 368 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 369 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 370 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 371 /* 1280x1024@85Hz */ 372 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 373 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 374 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 375 /* 1360x768@60Hz */ 376 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 377 1536, 1792, 0, 768, 771, 777, 795, 0, 378 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 379 /* 1440x1050@60Hz */ 380 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 381 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 382 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 383 /* 1440x1050@75Hz */ 384 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 385 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 387 /* 1440x1050@85Hz */ 388 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 389 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 390 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 391 /* 1440x900@60Hz */ 392 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 393 1672, 1904, 0, 900, 903, 909, 934, 0, 394 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 395 /* 1440x900@75Hz */ 396 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 397 1688, 1936, 0, 900, 903, 909, 942, 0, 398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 399 /* 1440x900@85Hz */ 400 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 401 1696, 1952, 0, 900, 903, 909, 948, 0, 402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 403 /* 1600x1200@60Hz */ 404 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 405 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 406 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 407 /* 1600x1200@65Hz */ 408 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 409 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 411 /* 1600x1200@70Hz */ 412 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 413 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 414 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 415 /* 1600x1200@75Hz */ 416 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664, 417 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 418 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 419 /* 1600x1200@85Hz */ 420 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 421 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 422 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 423 /* 1680x1050@60Hz */ 424 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 425 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 426 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 427 /* 1680x1050@75Hz */ 428 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 429 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 431 /* 1680x1050@85Hz */ 432 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 433 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 435 /* 1792x1344@60Hz */ 436 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 437 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 438 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 439 /* 1729x1344@75Hz */ 440 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 441 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 443 /* 1853x1392@60Hz */ 444 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 445 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 447 /* 1856x1392@75Hz */ 448 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 449 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 451 /* 1920x1200@60Hz */ 452 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 453 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 455 /* 1920x1200@75Hz */ 456 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 457 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 458 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 459 /* 1920x1200@85Hz */ 460 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 461 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 462 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 463 /* 1920x1440@60Hz */ 464 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 465 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 466 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 467 /* 1920x1440@75Hz */ 468 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 469 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 471 /* 2560x1600@60Hz */ 472 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 473 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 474 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 475 /* 2560x1600@75HZ */ 476 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 477 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 478 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 479 /* 2560x1600@85HZ */ 480 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 481 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 483 }; 484 485 static struct drm_display_mode *drm_find_dmt(struct drm_device *dev, 486 int hsize, int vsize, int fresh) 487 { 488 int i, count; 489 struct drm_display_mode *ptr, *mode; 490 491 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 492 mode = NULL; 493 for (i = 0; i < count; i++) { 494 ptr = &drm_dmt_modes[i]; 495 if (hsize == ptr->hdisplay && 496 vsize == ptr->vdisplay && 497 fresh == drm_mode_vrefresh(ptr)) { 498 /* get the expected default mode */ 499 mode = drm_mode_duplicate(dev, ptr); 500 break; 501 } 502 } 503 return mode; 504 } 505 506 /* 507 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 508 * monitors fill with ascii space (0x20) instead. 509 */ 510 static int 511 bad_std_timing(u8 a, u8 b) 512 { 513 return (a == 0x00 && b == 0x00) || 514 (a == 0x01 && b == 0x01) || 515 (a == 0x20 && b == 0x20); 516 } 517 518 /** 519 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 520 * @t: standard timing params 521 * @timing_level: standard timing level 522 * 523 * Take the standard timing params (in this case width, aspect, and refresh) 524 * and convert them into a real mode using CVT/GTF/DMT. 525 * 526 * Punts for now, but should eventually use the FB layer's CVT based mode 527 * generation code. 528 */ 529 struct drm_display_mode *drm_mode_std(struct drm_device *dev, 530 struct std_timing *t, 531 int revision, 532 int timing_level) 533 { 534 struct drm_display_mode *mode; 535 int hsize, vsize; 536 int vrefresh_rate; 537 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 538 >> EDID_TIMING_ASPECT_SHIFT; 539 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 540 >> EDID_TIMING_VFREQ_SHIFT; 541 542 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 543 return NULL; 544 545 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 546 hsize = t->hsize * 8 + 248; 547 /* vrefresh_rate = vfreq + 60 */ 548 vrefresh_rate = vfreq + 60; 549 /* the vdisplay is calculated based on the aspect ratio */ 550 if (aspect_ratio == 0) { 551 if (revision < 3) 552 vsize = hsize; 553 else 554 vsize = (hsize * 10) / 16; 555 } else if (aspect_ratio == 1) 556 vsize = (hsize * 3) / 4; 557 else if (aspect_ratio == 2) 558 vsize = (hsize * 4) / 5; 559 else 560 vsize = (hsize * 9) / 16; 561 /* HDTV hack */ 562 if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) { 563 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 564 false); 565 mode->hdisplay = 1366; 566 mode->vsync_start = mode->vsync_start - 1; 567 mode->vsync_end = mode->vsync_end - 1; 568 return mode; 569 } 570 mode = NULL; 571 /* check whether it can be found in default mode table */ 572 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate); 573 if (mode) 574 return mode; 575 576 switch (timing_level) { 577 case LEVEL_DMT: 578 break; 579 case LEVEL_GTF: 580 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 581 break; 582 case LEVEL_CVT: 583 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 584 false); 585 break; 586 } 587 return mode; 588 } 589 590 /** 591 * drm_mode_detailed - create a new mode from an EDID detailed timing section 592 * @dev: DRM device (needed to create new mode) 593 * @edid: EDID block 594 * @timing: EDID detailed timing info 595 * @quirks: quirks to apply 596 * 597 * An EDID detailed timing block contains enough info for us to create and 598 * return a new struct drm_display_mode. 599 */ 600 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 601 struct edid *edid, 602 struct detailed_timing *timing, 603 u32 quirks) 604 { 605 struct drm_display_mode *mode; 606 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 607 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 608 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 609 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 610 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 611 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 612 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 613 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; 614 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 615 616 /* ignore tiny modes */ 617 if (hactive < 64 || vactive < 64) 618 return NULL; 619 620 if (pt->misc & DRM_EDID_PT_STEREO) { 621 printk(KERN_WARNING "stereo mode not supported\n"); 622 return NULL; 623 } 624 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 625 printk(KERN_WARNING "integrated sync not supported\n"); 626 return NULL; 627 } 628 629 mode = drm_mode_create(dev); 630 if (!mode) 631 return NULL; 632 633 mode->type = DRM_MODE_TYPE_DRIVER; 634 635 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 636 timing->pixel_clock = cpu_to_le16(1088); 637 638 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 639 640 mode->hdisplay = hactive; 641 mode->hsync_start = mode->hdisplay + hsync_offset; 642 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 643 mode->htotal = mode->hdisplay + hblank; 644 645 mode->vdisplay = vactive; 646 mode->vsync_start = mode->vdisplay + vsync_offset; 647 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 648 mode->vtotal = mode->vdisplay + vblank; 649 650 drm_mode_set_name(mode); 651 652 if (pt->misc & DRM_EDID_PT_INTERLACED) 653 mode->flags |= DRM_MODE_FLAG_INTERLACE; 654 655 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 656 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 657 } 658 659 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 660 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 661 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 662 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 663 664 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 665 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 666 667 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 668 mode->width_mm *= 10; 669 mode->height_mm *= 10; 670 } 671 672 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 673 mode->width_mm = edid->width_cm * 10; 674 mode->height_mm = edid->height_cm * 10; 675 } 676 677 return mode; 678 } 679 680 /* 681 * Detailed mode info for the EDID "established modes" data to use. 682 */ 683 static struct drm_display_mode edid_est_modes[] = { 684 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 685 968, 1056, 0, 600, 601, 605, 628, 0, 686 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 687 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 688 896, 1024, 0, 600, 601, 603, 625, 0, 689 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 690 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 691 720, 840, 0, 480, 481, 484, 500, 0, 692 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 693 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 694 704, 832, 0, 480, 489, 491, 520, 0, 695 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 696 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 697 768, 864, 0, 480, 483, 486, 525, 0, 698 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 699 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 700 752, 800, 0, 480, 490, 492, 525, 0, 701 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 702 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 703 846, 900, 0, 400, 421, 423, 449, 0, 704 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 705 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 706 846, 900, 0, 400, 412, 414, 449, 0, 707 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 708 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 709 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 710 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 711 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 712 1136, 1312, 0, 768, 769, 772, 800, 0, 713 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 714 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 715 1184, 1328, 0, 768, 771, 777, 806, 0, 716 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 717 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 718 1184, 1344, 0, 768, 771, 777, 806, 0, 719 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 720 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 721 1208, 1264, 0, 768, 768, 776, 817, 0, 722 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 723 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 724 928, 1152, 0, 624, 625, 628, 667, 0, 725 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 726 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 727 896, 1056, 0, 600, 601, 604, 625, 0, 728 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 729 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 730 976, 1040, 0, 600, 637, 643, 666, 0, 731 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 732 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 733 1344, 1600, 0, 864, 865, 868, 900, 0, 734 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 735 }; 736 737 #define EDID_EST_TIMINGS 16 738 #define EDID_STD_TIMINGS 8 739 #define EDID_DETAILED_TIMINGS 4 740 741 /** 742 * add_established_modes - get est. modes from EDID and add them 743 * @edid: EDID block to scan 744 * 745 * Each EDID block contains a bitmap of the supported "established modes" list 746 * (defined above). Tease them out and add them to the global modes list. 747 */ 748 static int add_established_modes(struct drm_connector *connector, struct edid *edid) 749 { 750 struct drm_device *dev = connector->dev; 751 unsigned long est_bits = edid->established_timings.t1 | 752 (edid->established_timings.t2 << 8) | 753 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 754 int i, modes = 0; 755 756 for (i = 0; i <= EDID_EST_TIMINGS; i++) 757 if (est_bits & (1<<i)) { 758 struct drm_display_mode *newmode; 759 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 760 if (newmode) { 761 drm_mode_probed_add(connector, newmode); 762 modes++; 763 } 764 } 765 766 return modes; 767 } 768 /** 769 * stanard_timing_level - get std. timing level(CVT/GTF/DMT) 770 * @edid: EDID block to scan 771 */ 772 static int standard_timing_level(struct edid *edid) 773 { 774 if (edid->revision >= 2) { 775 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 776 return LEVEL_CVT; 777 return LEVEL_GTF; 778 } 779 return LEVEL_DMT; 780 } 781 782 /** 783 * add_standard_modes - get std. modes from EDID and add them 784 * @edid: EDID block to scan 785 * 786 * Standard modes can be calculated using the CVT standard. Grab them from 787 * @edid, calculate them, and add them to the list. 788 */ 789 static int add_standard_modes(struct drm_connector *connector, struct edid *edid) 790 { 791 struct drm_device *dev = connector->dev; 792 int i, modes = 0; 793 int timing_level; 794 795 timing_level = standard_timing_level(edid); 796 797 for (i = 0; i < EDID_STD_TIMINGS; i++) { 798 struct std_timing *t = &edid->standard_timings[i]; 799 struct drm_display_mode *newmode; 800 801 /* If std timings bytes are 1, 1 it's empty */ 802 if (t->hsize == 1 && t->vfreq_aspect == 1) 803 continue; 804 805 newmode = drm_mode_std(dev, &edid->standard_timings[i], 806 edid->revision, timing_level); 807 if (newmode) { 808 drm_mode_probed_add(connector, newmode); 809 modes++; 810 } 811 } 812 813 return modes; 814 } 815 816 /** 817 * add_detailed_modes - get detailed mode info from EDID data 818 * @connector: attached connector 819 * @edid: EDID block to scan 820 * @quirks: quirks to apply 821 * 822 * Some of the detailed timing sections may contain mode information. Grab 823 * it and add it to the list. 824 */ 825 static int add_detailed_info(struct drm_connector *connector, 826 struct edid *edid, u32 quirks) 827 { 828 struct drm_device *dev = connector->dev; 829 int i, j, modes = 0; 830 int timing_level; 831 832 timing_level = standard_timing_level(edid); 833 834 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) { 835 struct detailed_timing *timing = &edid->detailed_timings[i]; 836 struct detailed_non_pixel *data = &timing->data.other_data; 837 struct drm_display_mode *newmode; 838 839 /* X server check is version 1.1 or higher */ 840 if (edid->version == 1 && edid->revision >= 1 && 841 !timing->pixel_clock) { 842 /* Other timing or info */ 843 switch (data->type) { 844 case EDID_DETAIL_MONITOR_SERIAL: 845 break; 846 case EDID_DETAIL_MONITOR_STRING: 847 break; 848 case EDID_DETAIL_MONITOR_RANGE: 849 /* Get monitor range data */ 850 break; 851 case EDID_DETAIL_MONITOR_NAME: 852 break; 853 case EDID_DETAIL_MONITOR_CPDATA: 854 break; 855 case EDID_DETAIL_STD_MODES: 856 for (j = 0; j < 6; i++) { 857 struct std_timing *std; 858 struct drm_display_mode *newmode; 859 860 std = &data->data.timings[j]; 861 newmode = drm_mode_std(dev, std, 862 edid->revision, 863 timing_level); 864 if (newmode) { 865 drm_mode_probed_add(connector, newmode); 866 modes++; 867 } 868 } 869 break; 870 default: 871 break; 872 } 873 } else { 874 newmode = drm_mode_detailed(dev, edid, timing, quirks); 875 if (!newmode) 876 continue; 877 878 /* First detailed mode is preferred */ 879 if (i == 0 && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING)) 880 newmode->type |= DRM_MODE_TYPE_PREFERRED; 881 drm_mode_probed_add(connector, newmode); 882 883 modes++; 884 } 885 } 886 887 return modes; 888 } 889 /** 890 * add_detailed_mode_eedid - get detailed mode info from addtional timing 891 * EDID block 892 * @connector: attached connector 893 * @edid: EDID block to scan(It is only to get addtional timing EDID block) 894 * @quirks: quirks to apply 895 * 896 * Some of the detailed timing sections may contain mode information. Grab 897 * it and add it to the list. 898 */ 899 static int add_detailed_info_eedid(struct drm_connector *connector, 900 struct edid *edid, u32 quirks) 901 { 902 struct drm_device *dev = connector->dev; 903 int i, j, modes = 0; 904 char *edid_ext = NULL; 905 struct detailed_timing *timing; 906 struct detailed_non_pixel *data; 907 struct drm_display_mode *newmode; 908 int edid_ext_num; 909 int start_offset, end_offset; 910 int timing_level; 911 912 if (edid->version == 1 && edid->revision < 3) { 913 /* If the EDID version is less than 1.3, there is no 914 * extension EDID. 915 */ 916 return 0; 917 } 918 if (!edid->extensions) { 919 /* if there is no extension EDID, it is unnecessary to 920 * parse the E-EDID to get detailed info 921 */ 922 return 0; 923 } 924 925 /* Chose real EDID extension number */ 926 edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ? 927 MAX_EDID_EXT_NUM : edid->extensions; 928 929 /* Find CEA extension */ 930 for (i = 0; i < edid_ext_num; i++) { 931 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 932 /* This block is CEA extension */ 933 if (edid_ext[0] == 0x02) 934 break; 935 } 936 937 if (i == edid_ext_num) { 938 /* if there is no additional timing EDID block, return */ 939 return 0; 940 } 941 942 /* Get the start offset of detailed timing block */ 943 start_offset = edid_ext[2]; 944 if (start_offset == 0) { 945 /* If the start_offset is zero, it means that neither detailed 946 * info nor data block exist. In such case it is also 947 * unnecessary to parse the detailed timing info. 948 */ 949 return 0; 950 } 951 952 timing_level = standard_timing_level(edid); 953 end_offset = EDID_LENGTH; 954 end_offset -= sizeof(struct detailed_timing); 955 for (i = start_offset; i < end_offset; 956 i += sizeof(struct detailed_timing)) { 957 timing = (struct detailed_timing *)(edid_ext + i); 958 data = &timing->data.other_data; 959 /* Detailed mode timing */ 960 if (timing->pixel_clock) { 961 newmode = drm_mode_detailed(dev, edid, timing, quirks); 962 if (!newmode) 963 continue; 964 965 drm_mode_probed_add(connector, newmode); 966 967 modes++; 968 continue; 969 } 970 971 /* Other timing or info */ 972 switch (data->type) { 973 case EDID_DETAIL_MONITOR_SERIAL: 974 break; 975 case EDID_DETAIL_MONITOR_STRING: 976 break; 977 case EDID_DETAIL_MONITOR_RANGE: 978 /* Get monitor range data */ 979 break; 980 case EDID_DETAIL_MONITOR_NAME: 981 break; 982 case EDID_DETAIL_MONITOR_CPDATA: 983 break; 984 case EDID_DETAIL_STD_MODES: 985 /* Five modes per detailed section */ 986 for (j = 0; j < 5; i++) { 987 struct std_timing *std; 988 struct drm_display_mode *newmode; 989 990 std = &data->data.timings[j]; 991 newmode = drm_mode_std(dev, std, 992 edid->revision, 993 timing_level); 994 if (newmode) { 995 drm_mode_probed_add(connector, newmode); 996 modes++; 997 } 998 } 999 break; 1000 default: 1001 break; 1002 } 1003 } 1004 1005 return modes; 1006 } 1007 1008 #define DDC_ADDR 0x50 1009 /** 1010 * Get EDID information via I2C. 1011 * 1012 * \param adapter : i2c device adaptor 1013 * \param buf : EDID data buffer to be filled 1014 * \param len : EDID data buffer length 1015 * \return 0 on success or -1 on failure. 1016 * 1017 * Try to fetch EDID information by calling i2c driver function. 1018 */ 1019 int drm_do_probe_ddc_edid(struct i2c_adapter *adapter, 1020 unsigned char *buf, int len) 1021 { 1022 unsigned char start = 0x0; 1023 struct i2c_msg msgs[] = { 1024 { 1025 .addr = DDC_ADDR, 1026 .flags = 0, 1027 .len = 1, 1028 .buf = &start, 1029 }, { 1030 .addr = DDC_ADDR, 1031 .flags = I2C_M_RD, 1032 .len = len, 1033 .buf = buf, 1034 } 1035 }; 1036 1037 if (i2c_transfer(adapter, msgs, 2) == 2) 1038 return 0; 1039 1040 return -1; 1041 } 1042 EXPORT_SYMBOL(drm_do_probe_ddc_edid); 1043 1044 static int drm_ddc_read_edid(struct drm_connector *connector, 1045 struct i2c_adapter *adapter, 1046 char *buf, int len) 1047 { 1048 int ret; 1049 1050 ret = drm_do_probe_ddc_edid(adapter, buf, len); 1051 if (ret != 0) { 1052 goto end; 1053 } 1054 if (!edid_is_valid((struct edid *)buf)) { 1055 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 1056 drm_get_connector_name(connector)); 1057 ret = -1; 1058 } 1059 end: 1060 return ret; 1061 } 1062 1063 /** 1064 * drm_get_edid - get EDID data, if available 1065 * @connector: connector we're probing 1066 * @adapter: i2c adapter to use for DDC 1067 * 1068 * Poke the given connector's i2c channel to grab EDID data if possible. 1069 * 1070 * Return edid data or NULL if we couldn't find any. 1071 */ 1072 struct edid *drm_get_edid(struct drm_connector *connector, 1073 struct i2c_adapter *adapter) 1074 { 1075 int ret; 1076 struct edid *edid; 1077 1078 edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1), 1079 GFP_KERNEL); 1080 if (edid == NULL) { 1081 dev_warn(&connector->dev->pdev->dev, 1082 "Failed to allocate EDID\n"); 1083 goto end; 1084 } 1085 1086 /* Read first EDID block */ 1087 ret = drm_ddc_read_edid(connector, adapter, 1088 (unsigned char *)edid, EDID_LENGTH); 1089 if (ret != 0) 1090 goto clean_up; 1091 1092 /* There are EDID extensions to be read */ 1093 if (edid->extensions != 0) { 1094 int edid_ext_num = edid->extensions; 1095 1096 if (edid_ext_num > MAX_EDID_EXT_NUM) { 1097 dev_warn(&connector->dev->pdev->dev, 1098 "The number of extension(%d) is " 1099 "over max (%d), actually read number (%d)\n", 1100 edid_ext_num, MAX_EDID_EXT_NUM, 1101 MAX_EDID_EXT_NUM); 1102 /* Reset EDID extension number to be read */ 1103 edid_ext_num = MAX_EDID_EXT_NUM; 1104 } 1105 /* Read EDID including extensions too */ 1106 ret = drm_ddc_read_edid(connector, adapter, (char *)edid, 1107 EDID_LENGTH * (edid_ext_num + 1)); 1108 if (ret != 0) 1109 goto clean_up; 1110 1111 } 1112 1113 connector->display_info.raw_edid = (char *)edid; 1114 goto end; 1115 1116 clean_up: 1117 kfree(edid); 1118 edid = NULL; 1119 end: 1120 return edid; 1121 1122 } 1123 EXPORT_SYMBOL(drm_get_edid); 1124 1125 #define HDMI_IDENTIFIER 0x000C03 1126 #define VENDOR_BLOCK 0x03 1127 /** 1128 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 1129 * @edid: monitor EDID information 1130 * 1131 * Parse the CEA extension according to CEA-861-B. 1132 * Return true if HDMI, false if not or unknown. 1133 */ 1134 bool drm_detect_hdmi_monitor(struct edid *edid) 1135 { 1136 char *edid_ext = NULL; 1137 int i, hdmi_id, edid_ext_num; 1138 int start_offset, end_offset; 1139 bool is_hdmi = false; 1140 1141 /* No EDID or EDID extensions */ 1142 if (edid == NULL || edid->extensions == 0) 1143 goto end; 1144 1145 /* Chose real EDID extension number */ 1146 edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ? 1147 MAX_EDID_EXT_NUM : edid->extensions; 1148 1149 /* Find CEA extension */ 1150 for (i = 0; i < edid_ext_num; i++) { 1151 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 1152 /* This block is CEA extension */ 1153 if (edid_ext[0] == 0x02) 1154 break; 1155 } 1156 1157 if (i == edid_ext_num) 1158 goto end; 1159 1160 /* Data block offset in CEA extension block */ 1161 start_offset = 4; 1162 end_offset = edid_ext[2]; 1163 1164 /* 1165 * Because HDMI identifier is in Vendor Specific Block, 1166 * search it from all data blocks of CEA extension. 1167 */ 1168 for (i = start_offset; i < end_offset; 1169 /* Increased by data block len */ 1170 i += ((edid_ext[i] & 0x1f) + 1)) { 1171 /* Find vendor specific block */ 1172 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { 1173 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | 1174 edid_ext[i + 3] << 16; 1175 /* Find HDMI identifier */ 1176 if (hdmi_id == HDMI_IDENTIFIER) 1177 is_hdmi = true; 1178 break; 1179 } 1180 } 1181 1182 end: 1183 return is_hdmi; 1184 } 1185 EXPORT_SYMBOL(drm_detect_hdmi_monitor); 1186 1187 /** 1188 * drm_add_edid_modes - add modes from EDID data, if available 1189 * @connector: connector we're probing 1190 * @edid: edid data 1191 * 1192 * Add the specified modes to the connector's mode list. 1193 * 1194 * Return number of modes added or 0 if we couldn't find any. 1195 */ 1196 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 1197 { 1198 int num_modes = 0; 1199 u32 quirks; 1200 1201 if (edid == NULL) { 1202 return 0; 1203 } 1204 if (!edid_is_valid(edid)) { 1205 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 1206 drm_get_connector_name(connector)); 1207 return 0; 1208 } 1209 1210 quirks = edid_get_quirks(edid); 1211 1212 num_modes += add_established_modes(connector, edid); 1213 num_modes += add_standard_modes(connector, edid); 1214 num_modes += add_detailed_info(connector, edid, quirks); 1215 num_modes += add_detailed_info_eedid(connector, edid, quirks); 1216 1217 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 1218 edid_fixup_preferred(connector, quirks); 1219 1220 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0; 1221 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0; 1222 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0; 1223 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0; 1224 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0; 1225 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5; 1226 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0; 1227 connector->display_info.width_mm = edid->width_cm * 10; 1228 connector->display_info.height_mm = edid->height_cm * 10; 1229 connector->display_info.gamma = edid->gamma; 1230 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0; 1231 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0; 1232 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3; 1233 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0; 1234 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0; 1235 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0; 1236 connector->display_info.gamma = edid->gamma; 1237 1238 return num_modes; 1239 } 1240 EXPORT_SYMBOL(drm_add_edid_modes); 1241 1242 /** 1243 * drm_add_modes_noedid - add modes for the connectors without EDID 1244 * @connector: connector we're probing 1245 * @hdisplay: the horizontal display limit 1246 * @vdisplay: the vertical display limit 1247 * 1248 * Add the specified modes to the connector's mode list. Only when the 1249 * hdisplay/vdisplay is not beyond the given limit, it will be added. 1250 * 1251 * Return number of modes added or 0 if we couldn't find any. 1252 */ 1253 int drm_add_modes_noedid(struct drm_connector *connector, 1254 int hdisplay, int vdisplay) 1255 { 1256 int i, count, num_modes = 0; 1257 struct drm_display_mode *mode, *ptr; 1258 struct drm_device *dev = connector->dev; 1259 1260 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 1261 if (hdisplay < 0) 1262 hdisplay = 0; 1263 if (vdisplay < 0) 1264 vdisplay = 0; 1265 1266 for (i = 0; i < count; i++) { 1267 ptr = &drm_dmt_modes[i]; 1268 if (hdisplay && vdisplay) { 1269 /* 1270 * Only when two are valid, they will be used to check 1271 * whether the mode should be added to the mode list of 1272 * the connector. 1273 */ 1274 if (ptr->hdisplay > hdisplay || 1275 ptr->vdisplay > vdisplay) 1276 continue; 1277 } 1278 mode = drm_mode_duplicate(dev, ptr); 1279 if (mode) { 1280 drm_mode_probed_add(connector, mode); 1281 num_modes++; 1282 } 1283 } 1284 return num_modes; 1285 } 1286 EXPORT_SYMBOL(drm_add_modes_noedid); 1287