1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 */ 30 #include <linux/kernel.h> 31 #include <linux/slab.h> 32 #include <linux/hdmi.h> 33 #include <linux/i2c.h> 34 #include <linux/module.h> 35 #include <drm/drmP.h> 36 #include <drm/drm_edid.h> 37 38 #define version_greater(edid, maj, min) \ 39 (((edid)->version > (maj)) || \ 40 ((edid)->version == (maj) && (edid)->revision > (min))) 41 42 #define EDID_EST_TIMINGS 16 43 #define EDID_STD_TIMINGS 8 44 #define EDID_DETAILED_TIMINGS 4 45 46 /* 47 * EDID blocks out in the wild have a variety of bugs, try to collect 48 * them here (note that userspace may work around broken monitors first, 49 * but fixes should make their way here so that the kernel "just works" 50 * on as many displays as possible). 51 */ 52 53 /* First detailed mode wrong, use largest 60Hz mode */ 54 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 55 /* Reported 135MHz pixel clock is too high, needs adjustment */ 56 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 57 /* Prefer the largest mode at 75 Hz */ 58 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 59 /* Detail timing is in cm not mm */ 60 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 61 /* Detailed timing descriptors have bogus size values, so just take the 62 * maximum size and use that. 63 */ 64 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 65 /* Monitor forgot to set the first detailed is preferred bit. */ 66 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 67 /* use +hsync +vsync for detailed mode */ 68 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 69 /* Force reduced-blanking timings for detailed modes */ 70 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) 71 72 struct detailed_mode_closure { 73 struct drm_connector *connector; 74 struct edid *edid; 75 bool preferred; 76 u32 quirks; 77 int modes; 78 }; 79 80 #define LEVEL_DMT 0 81 #define LEVEL_GTF 1 82 #define LEVEL_GTF2 2 83 #define LEVEL_CVT 3 84 85 static struct edid_quirk { 86 char vendor[4]; 87 int product_id; 88 u32 quirks; 89 } edid_quirk_list[] = { 90 /* Acer AL1706 */ 91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 92 /* Acer F51 */ 93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 94 /* Unknown Acer */ 95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 96 97 /* Belinea 10 15 55 */ 98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 100 101 /* Envision Peripherals, Inc. EN-7100e */ 102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 103 /* Envision EN2028 */ 104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, 105 106 /* Funai Electronics PM36B */ 107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 108 EDID_QUIRK_DETAILED_IN_CM }, 109 110 /* LG Philips LCD LP154W01-A5 */ 111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 113 114 /* Philips 107p5 CRT */ 115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 116 117 /* Proview AY765C */ 118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 119 120 /* Samsung SyncMaster 205BW. Note: irony */ 121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 122 /* Samsung SyncMaster 22[5-6]BW */ 123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 125 126 /* ViewSonic VA2026w */ 127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, 128 129 /* Medion MD 30217 PG */ 130 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 }, 131 }; 132 133 /* 134 * Autogenerated from the DMT spec. 135 * This table is copied from xfree86/modes/xf86EdidModes.c. 136 */ 137 static const struct drm_display_mode drm_dmt_modes[] = { 138 /* 640x350@85Hz */ 139 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 140 736, 832, 0, 350, 382, 385, 445, 0, 141 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 142 /* 640x400@85Hz */ 143 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 144 736, 832, 0, 400, 401, 404, 445, 0, 145 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 146 /* 720x400@85Hz */ 147 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 148 828, 936, 0, 400, 401, 404, 446, 0, 149 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 150 /* 640x480@60Hz */ 151 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 152 752, 800, 0, 480, 489, 492, 525, 0, 153 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 154 /* 640x480@72Hz */ 155 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 156 704, 832, 0, 480, 489, 492, 520, 0, 157 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 158 /* 640x480@75Hz */ 159 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 160 720, 840, 0, 480, 481, 484, 500, 0, 161 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 162 /* 640x480@85Hz */ 163 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 164 752, 832, 0, 480, 481, 484, 509, 0, 165 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 166 /* 800x600@56Hz */ 167 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 168 896, 1024, 0, 600, 601, 603, 625, 0, 169 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 170 /* 800x600@60Hz */ 171 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 172 968, 1056, 0, 600, 601, 605, 628, 0, 173 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 174 /* 800x600@72Hz */ 175 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 176 976, 1040, 0, 600, 637, 643, 666, 0, 177 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 178 /* 800x600@75Hz */ 179 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 180 896, 1056, 0, 600, 601, 604, 625, 0, 181 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 182 /* 800x600@85Hz */ 183 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 184 896, 1048, 0, 600, 601, 604, 631, 0, 185 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 186 /* 800x600@120Hz RB */ 187 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, 188 880, 960, 0, 600, 603, 607, 636, 0, 189 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 190 /* 848x480@60Hz */ 191 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 192 976, 1088, 0, 480, 486, 494, 517, 0, 193 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 194 /* 1024x768@43Hz, interlace */ 195 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 196 1208, 1264, 0, 768, 768, 772, 817, 0, 197 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 198 DRM_MODE_FLAG_INTERLACE) }, 199 /* 1024x768@60Hz */ 200 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 201 1184, 1344, 0, 768, 771, 777, 806, 0, 202 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 203 /* 1024x768@70Hz */ 204 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 205 1184, 1328, 0, 768, 771, 777, 806, 0, 206 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 207 /* 1024x768@75Hz */ 208 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 209 1136, 1312, 0, 768, 769, 772, 800, 0, 210 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 211 /* 1024x768@85Hz */ 212 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 213 1168, 1376, 0, 768, 769, 772, 808, 0, 214 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 215 /* 1024x768@120Hz RB */ 216 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, 217 1104, 1184, 0, 768, 771, 775, 813, 0, 218 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 219 /* 1152x864@75Hz */ 220 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 221 1344, 1600, 0, 864, 865, 868, 900, 0, 222 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 223 /* 1280x768@60Hz RB */ 224 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, 225 1360, 1440, 0, 768, 771, 778, 790, 0, 226 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 227 /* 1280x768@60Hz */ 228 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 229 1472, 1664, 0, 768, 771, 778, 798, 0, 230 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 231 /* 1280x768@75Hz */ 232 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 233 1488, 1696, 0, 768, 771, 778, 805, 0, 234 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 235 /* 1280x768@85Hz */ 236 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 237 1496, 1712, 0, 768, 771, 778, 809, 0, 238 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 239 /* 1280x768@120Hz RB */ 240 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, 241 1360, 1440, 0, 768, 771, 778, 813, 0, 242 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 243 /* 1280x800@60Hz RB */ 244 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, 245 1360, 1440, 0, 800, 803, 809, 823, 0, 246 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 247 /* 1280x800@60Hz */ 248 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 249 1480, 1680, 0, 800, 803, 809, 831, 0, 250 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 251 /* 1280x800@75Hz */ 252 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 253 1488, 1696, 0, 800, 803, 809, 838, 0, 254 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 255 /* 1280x800@85Hz */ 256 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 257 1496, 1712, 0, 800, 803, 809, 843, 0, 258 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 259 /* 1280x800@120Hz RB */ 260 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, 261 1360, 1440, 0, 800, 803, 809, 847, 0, 262 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 263 /* 1280x960@60Hz */ 264 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 265 1488, 1800, 0, 960, 961, 964, 1000, 0, 266 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 267 /* 1280x960@85Hz */ 268 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 269 1504, 1728, 0, 960, 961, 964, 1011, 0, 270 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 271 /* 1280x960@120Hz RB */ 272 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, 273 1360, 1440, 0, 960, 963, 967, 1017, 0, 274 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 275 /* 1280x1024@60Hz */ 276 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 277 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 278 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 279 /* 1280x1024@75Hz */ 280 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 281 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 282 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 283 /* 1280x1024@85Hz */ 284 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 285 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 286 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 287 /* 1280x1024@120Hz RB */ 288 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, 289 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, 290 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 291 /* 1360x768@60Hz */ 292 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 293 1536, 1792, 0, 768, 771, 777, 795, 0, 294 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 295 /* 1360x768@120Hz RB */ 296 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, 297 1440, 1520, 0, 768, 771, 776, 813, 0, 298 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 299 /* 1400x1050@60Hz RB */ 300 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, 301 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, 302 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 303 /* 1400x1050@60Hz */ 304 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 305 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 306 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 307 /* 1400x1050@75Hz */ 308 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 309 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 310 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 311 /* 1400x1050@85Hz */ 312 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 313 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 314 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 315 /* 1400x1050@120Hz RB */ 316 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, 317 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, 318 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 319 /* 1440x900@60Hz RB */ 320 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, 321 1520, 1600, 0, 900, 903, 909, 926, 0, 322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 323 /* 1440x900@60Hz */ 324 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 325 1672, 1904, 0, 900, 903, 909, 934, 0, 326 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 327 /* 1440x900@75Hz */ 328 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 329 1688, 1936, 0, 900, 903, 909, 942, 0, 330 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 331 /* 1440x900@85Hz */ 332 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 333 1696, 1952, 0, 900, 903, 909, 948, 0, 334 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 335 /* 1440x900@120Hz RB */ 336 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, 337 1520, 1600, 0, 900, 903, 909, 953, 0, 338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 339 /* 1600x1200@60Hz */ 340 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 341 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 342 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 343 /* 1600x1200@65Hz */ 344 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 345 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 347 /* 1600x1200@70Hz */ 348 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 349 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 350 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 351 /* 1600x1200@75Hz */ 352 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, 353 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 354 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 355 /* 1600x1200@85Hz */ 356 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 357 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 359 /* 1600x1200@120Hz RB */ 360 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, 361 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, 362 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 363 /* 1680x1050@60Hz RB */ 364 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, 365 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, 366 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 367 /* 1680x1050@60Hz */ 368 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 369 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 370 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 371 /* 1680x1050@75Hz */ 372 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 373 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 374 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 375 /* 1680x1050@85Hz */ 376 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 377 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 378 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 379 /* 1680x1050@120Hz RB */ 380 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, 381 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, 382 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 383 /* 1792x1344@60Hz */ 384 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 385 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 387 /* 1792x1344@75Hz */ 388 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 389 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 390 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 391 /* 1792x1344@120Hz RB */ 392 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, 393 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, 394 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 395 /* 1856x1392@60Hz */ 396 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 397 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 399 /* 1856x1392@75Hz */ 400 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 401 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 403 /* 1856x1392@120Hz RB */ 404 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, 405 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, 406 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 407 /* 1920x1200@60Hz RB */ 408 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, 409 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, 410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 411 /* 1920x1200@60Hz */ 412 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 413 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 414 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 415 /* 1920x1200@75Hz */ 416 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 417 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 418 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 419 /* 1920x1200@85Hz */ 420 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 421 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 422 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 423 /* 1920x1200@120Hz RB */ 424 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, 425 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, 426 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 427 /* 1920x1440@60Hz */ 428 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 429 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 431 /* 1920x1440@75Hz */ 432 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 433 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 435 /* 1920x1440@120Hz RB */ 436 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, 437 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, 438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 439 /* 2560x1600@60Hz RB */ 440 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, 441 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, 442 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 443 /* 2560x1600@60Hz */ 444 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 445 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 447 /* 2560x1600@75HZ */ 448 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 449 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 451 /* 2560x1600@85HZ */ 452 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 453 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 455 /* 2560x1600@120Hz RB */ 456 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, 457 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, 458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 459 }; 460 461 static const struct drm_display_mode edid_est_modes[] = { 462 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 463 968, 1056, 0, 600, 601, 605, 628, 0, 464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 466 896, 1024, 0, 600, 601, 603, 625, 0, 467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 468 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 469 720, 840, 0, 480, 481, 484, 500, 0, 470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 471 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 472 704, 832, 0, 480, 489, 491, 520, 0, 473 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 474 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 475 768, 864, 0, 480, 483, 486, 525, 0, 476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 477 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 478 752, 800, 0, 480, 490, 492, 525, 0, 479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 480 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 481 846, 900, 0, 400, 421, 423, 449, 0, 482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 483 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 484 846, 900, 0, 400, 412, 414, 449, 0, 485 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 486 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 487 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 490 1136, 1312, 0, 768, 769, 772, 800, 0, 491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 492 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 493 1184, 1328, 0, 768, 771, 777, 806, 0, 494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 495 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 496 1184, 1344, 0, 768, 771, 777, 806, 0, 497 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 498 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 499 1208, 1264, 0, 768, 768, 776, 817, 0, 500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 501 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 502 928, 1152, 0, 624, 625, 628, 667, 0, 503 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 504 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 505 896, 1056, 0, 600, 601, 604, 625, 0, 506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 507 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 508 976, 1040, 0, 600, 637, 643, 666, 0, 509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 510 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 511 1344, 1600, 0, 864, 865, 868, 900, 0, 512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 513 }; 514 515 struct minimode { 516 short w; 517 short h; 518 short r; 519 short rb; 520 }; 521 522 static const struct minimode est3_modes[] = { 523 /* byte 6 */ 524 { 640, 350, 85, 0 }, 525 { 640, 400, 85, 0 }, 526 { 720, 400, 85, 0 }, 527 { 640, 480, 85, 0 }, 528 { 848, 480, 60, 0 }, 529 { 800, 600, 85, 0 }, 530 { 1024, 768, 85, 0 }, 531 { 1152, 864, 75, 0 }, 532 /* byte 7 */ 533 { 1280, 768, 60, 1 }, 534 { 1280, 768, 60, 0 }, 535 { 1280, 768, 75, 0 }, 536 { 1280, 768, 85, 0 }, 537 { 1280, 960, 60, 0 }, 538 { 1280, 960, 85, 0 }, 539 { 1280, 1024, 60, 0 }, 540 { 1280, 1024, 85, 0 }, 541 /* byte 8 */ 542 { 1360, 768, 60, 0 }, 543 { 1440, 900, 60, 1 }, 544 { 1440, 900, 60, 0 }, 545 { 1440, 900, 75, 0 }, 546 { 1440, 900, 85, 0 }, 547 { 1400, 1050, 60, 1 }, 548 { 1400, 1050, 60, 0 }, 549 { 1400, 1050, 75, 0 }, 550 /* byte 9 */ 551 { 1400, 1050, 85, 0 }, 552 { 1680, 1050, 60, 1 }, 553 { 1680, 1050, 60, 0 }, 554 { 1680, 1050, 75, 0 }, 555 { 1680, 1050, 85, 0 }, 556 { 1600, 1200, 60, 0 }, 557 { 1600, 1200, 65, 0 }, 558 { 1600, 1200, 70, 0 }, 559 /* byte 10 */ 560 { 1600, 1200, 75, 0 }, 561 { 1600, 1200, 85, 0 }, 562 { 1792, 1344, 60, 0 }, 563 { 1792, 1344, 85, 0 }, 564 { 1856, 1392, 60, 0 }, 565 { 1856, 1392, 75, 0 }, 566 { 1920, 1200, 60, 1 }, 567 { 1920, 1200, 60, 0 }, 568 /* byte 11 */ 569 { 1920, 1200, 75, 0 }, 570 { 1920, 1200, 85, 0 }, 571 { 1920, 1440, 60, 0 }, 572 { 1920, 1440, 75, 0 }, 573 }; 574 575 static const struct minimode extra_modes[] = { 576 { 1024, 576, 60, 0 }, 577 { 1366, 768, 60, 0 }, 578 { 1600, 900, 60, 0 }, 579 { 1680, 945, 60, 0 }, 580 { 1920, 1080, 60, 0 }, 581 { 2048, 1152, 60, 0 }, 582 { 2048, 1536, 60, 0 }, 583 }; 584 585 /* 586 * Probably taken from CEA-861 spec. 587 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. 588 */ 589 static const struct drm_display_mode edid_cea_modes[] = { 590 /* 1 - 640x480@60Hz */ 591 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 592 752, 800, 0, 480, 490, 492, 525, 0, 593 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 594 .vrefresh = 60, }, 595 /* 2 - 720x480@60Hz */ 596 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 597 798, 858, 0, 480, 489, 495, 525, 0, 598 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 599 .vrefresh = 60, }, 600 /* 3 - 720x480@60Hz */ 601 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 602 798, 858, 0, 480, 489, 495, 525, 0, 603 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 604 .vrefresh = 60, }, 605 /* 4 - 1280x720@60Hz */ 606 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 607 1430, 1650, 0, 720, 725, 730, 750, 0, 608 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 609 .vrefresh = 60, }, 610 /* 5 - 1920x1080i@60Hz */ 611 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 612 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 613 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 614 DRM_MODE_FLAG_INTERLACE), 615 .vrefresh = 60, }, 616 /* 6 - 1440x480i@60Hz */ 617 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 618 1602, 1716, 0, 480, 488, 494, 525, 0, 619 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 620 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 621 .vrefresh = 60, }, 622 /* 7 - 1440x480i@60Hz */ 623 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 624 1602, 1716, 0, 480, 488, 494, 525, 0, 625 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 626 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 627 .vrefresh = 60, }, 628 /* 8 - 1440x240@60Hz */ 629 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 630 1602, 1716, 0, 240, 244, 247, 262, 0, 631 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 632 DRM_MODE_FLAG_DBLCLK), 633 .vrefresh = 60, }, 634 /* 9 - 1440x240@60Hz */ 635 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 636 1602, 1716, 0, 240, 244, 247, 262, 0, 637 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 638 DRM_MODE_FLAG_DBLCLK), 639 .vrefresh = 60, }, 640 /* 10 - 2880x480i@60Hz */ 641 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 642 3204, 3432, 0, 480, 488, 494, 525, 0, 643 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 644 DRM_MODE_FLAG_INTERLACE), 645 .vrefresh = 60, }, 646 /* 11 - 2880x480i@60Hz */ 647 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 648 3204, 3432, 0, 480, 488, 494, 525, 0, 649 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 650 DRM_MODE_FLAG_INTERLACE), 651 .vrefresh = 60, }, 652 /* 12 - 2880x240@60Hz */ 653 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 654 3204, 3432, 0, 240, 244, 247, 262, 0, 655 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 656 .vrefresh = 60, }, 657 /* 13 - 2880x240@60Hz */ 658 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 659 3204, 3432, 0, 240, 244, 247, 262, 0, 660 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 661 .vrefresh = 60, }, 662 /* 14 - 1440x480@60Hz */ 663 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 664 1596, 1716, 0, 480, 489, 495, 525, 0, 665 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 666 .vrefresh = 60, }, 667 /* 15 - 1440x480@60Hz */ 668 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 669 1596, 1716, 0, 480, 489, 495, 525, 0, 670 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 671 .vrefresh = 60, }, 672 /* 16 - 1920x1080@60Hz */ 673 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 674 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 675 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 676 .vrefresh = 60, }, 677 /* 17 - 720x576@50Hz */ 678 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 679 796, 864, 0, 576, 581, 586, 625, 0, 680 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 681 .vrefresh = 50, }, 682 /* 18 - 720x576@50Hz */ 683 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 684 796, 864, 0, 576, 581, 586, 625, 0, 685 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 686 .vrefresh = 50, }, 687 /* 19 - 1280x720@50Hz */ 688 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 689 1760, 1980, 0, 720, 725, 730, 750, 0, 690 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 691 .vrefresh = 50, }, 692 /* 20 - 1920x1080i@50Hz */ 693 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 694 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 695 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 696 DRM_MODE_FLAG_INTERLACE), 697 .vrefresh = 50, }, 698 /* 21 - 1440x576i@50Hz */ 699 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 700 1590, 1728, 0, 576, 580, 586, 625, 0, 701 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 702 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 703 .vrefresh = 50, }, 704 /* 22 - 1440x576i@50Hz */ 705 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 706 1590, 1728, 0, 576, 580, 586, 625, 0, 707 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 708 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 709 .vrefresh = 50, }, 710 /* 23 - 1440x288@50Hz */ 711 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 712 1590, 1728, 0, 288, 290, 293, 312, 0, 713 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 714 DRM_MODE_FLAG_DBLCLK), 715 .vrefresh = 50, }, 716 /* 24 - 1440x288@50Hz */ 717 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 718 1590, 1728, 0, 288, 290, 293, 312, 0, 719 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 720 DRM_MODE_FLAG_DBLCLK), 721 .vrefresh = 50, }, 722 /* 25 - 2880x576i@50Hz */ 723 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 724 3180, 3456, 0, 576, 580, 586, 625, 0, 725 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 726 DRM_MODE_FLAG_INTERLACE), 727 .vrefresh = 50, }, 728 /* 26 - 2880x576i@50Hz */ 729 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 730 3180, 3456, 0, 576, 580, 586, 625, 0, 731 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 732 DRM_MODE_FLAG_INTERLACE), 733 .vrefresh = 50, }, 734 /* 27 - 2880x288@50Hz */ 735 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 736 3180, 3456, 0, 288, 290, 293, 312, 0, 737 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 738 .vrefresh = 50, }, 739 /* 28 - 2880x288@50Hz */ 740 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 741 3180, 3456, 0, 288, 290, 293, 312, 0, 742 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 743 .vrefresh = 50, }, 744 /* 29 - 1440x576@50Hz */ 745 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 746 1592, 1728, 0, 576, 581, 586, 625, 0, 747 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 748 .vrefresh = 50, }, 749 /* 30 - 1440x576@50Hz */ 750 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 751 1592, 1728, 0, 576, 581, 586, 625, 0, 752 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 753 .vrefresh = 50, }, 754 /* 31 - 1920x1080@50Hz */ 755 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 756 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 757 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 758 .vrefresh = 50, }, 759 /* 32 - 1920x1080@24Hz */ 760 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 761 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, 762 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 763 .vrefresh = 24, }, 764 /* 33 - 1920x1080@25Hz */ 765 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 766 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 767 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 768 .vrefresh = 25, }, 769 /* 34 - 1920x1080@30Hz */ 770 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 771 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 772 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 773 .vrefresh = 30, }, 774 /* 35 - 2880x480@60Hz */ 775 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 776 3192, 3432, 0, 480, 489, 495, 525, 0, 777 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 778 .vrefresh = 60, }, 779 /* 36 - 2880x480@60Hz */ 780 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 781 3192, 3432, 0, 480, 489, 495, 525, 0, 782 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 783 .vrefresh = 60, }, 784 /* 37 - 2880x576@50Hz */ 785 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 786 3184, 3456, 0, 576, 581, 586, 625, 0, 787 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 788 .vrefresh = 50, }, 789 /* 38 - 2880x576@50Hz */ 790 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 791 3184, 3456, 0, 576, 581, 586, 625, 0, 792 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 793 .vrefresh = 50, }, 794 /* 39 - 1920x1080i@50Hz */ 795 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, 796 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, 797 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | 798 DRM_MODE_FLAG_INTERLACE), 799 .vrefresh = 50, }, 800 /* 40 - 1920x1080i@100Hz */ 801 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 802 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 803 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 804 DRM_MODE_FLAG_INTERLACE), 805 .vrefresh = 100, }, 806 /* 41 - 1280x720@100Hz */ 807 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 808 1760, 1980, 0, 720, 725, 730, 750, 0, 809 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 810 .vrefresh = 100, }, 811 /* 42 - 720x576@100Hz */ 812 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 813 796, 864, 0, 576, 581, 586, 625, 0, 814 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 815 .vrefresh = 100, }, 816 /* 43 - 720x576@100Hz */ 817 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 818 796, 864, 0, 576, 581, 586, 625, 0, 819 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 820 .vrefresh = 100, }, 821 /* 44 - 1440x576i@100Hz */ 822 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 823 1590, 1728, 0, 576, 580, 586, 625, 0, 824 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 825 DRM_MODE_FLAG_DBLCLK), 826 .vrefresh = 100, }, 827 /* 45 - 1440x576i@100Hz */ 828 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 829 1590, 1728, 0, 576, 580, 586, 625, 0, 830 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 831 DRM_MODE_FLAG_DBLCLK), 832 .vrefresh = 100, }, 833 /* 46 - 1920x1080i@120Hz */ 834 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 835 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 836 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 837 DRM_MODE_FLAG_INTERLACE), 838 .vrefresh = 120, }, 839 /* 47 - 1280x720@120Hz */ 840 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 841 1430, 1650, 0, 720, 725, 730, 750, 0, 842 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 843 .vrefresh = 120, }, 844 /* 48 - 720x480@120Hz */ 845 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 846 798, 858, 0, 480, 489, 495, 525, 0, 847 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 848 .vrefresh = 120, }, 849 /* 49 - 720x480@120Hz */ 850 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 851 798, 858, 0, 480, 489, 495, 525, 0, 852 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 853 .vrefresh = 120, }, 854 /* 50 - 1440x480i@120Hz */ 855 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 856 1602, 1716, 0, 480, 488, 494, 525, 0, 857 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 858 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 859 .vrefresh = 120, }, 860 /* 51 - 1440x480i@120Hz */ 861 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 862 1602, 1716, 0, 480, 488, 494, 525, 0, 863 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 864 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 865 .vrefresh = 120, }, 866 /* 52 - 720x576@200Hz */ 867 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 868 796, 864, 0, 576, 581, 586, 625, 0, 869 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 870 .vrefresh = 200, }, 871 /* 53 - 720x576@200Hz */ 872 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 873 796, 864, 0, 576, 581, 586, 625, 0, 874 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 875 .vrefresh = 200, }, 876 /* 54 - 1440x576i@200Hz */ 877 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 878 1590, 1728, 0, 576, 580, 586, 625, 0, 879 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 880 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 881 .vrefresh = 200, }, 882 /* 55 - 1440x576i@200Hz */ 883 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 884 1590, 1728, 0, 576, 580, 586, 625, 0, 885 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 886 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 887 .vrefresh = 200, }, 888 /* 56 - 720x480@240Hz */ 889 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 890 798, 858, 0, 480, 489, 495, 525, 0, 891 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 892 .vrefresh = 240, }, 893 /* 57 - 720x480@240Hz */ 894 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 895 798, 858, 0, 480, 489, 495, 525, 0, 896 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 897 .vrefresh = 240, }, 898 /* 58 - 1440x480i@240 */ 899 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 900 1602, 1716, 0, 480, 488, 494, 525, 0, 901 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 902 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 903 .vrefresh = 240, }, 904 /* 59 - 1440x480i@240 */ 905 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 906 1602, 1716, 0, 480, 488, 494, 525, 0, 907 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 908 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 909 .vrefresh = 240, }, 910 /* 60 - 1280x720@24Hz */ 911 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 912 3080, 3300, 0, 720, 725, 730, 750, 0, 913 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 914 .vrefresh = 24, }, 915 /* 61 - 1280x720@25Hz */ 916 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 917 3740, 3960, 0, 720, 725, 730, 750, 0, 918 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 919 .vrefresh = 25, }, 920 /* 62 - 1280x720@30Hz */ 921 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 922 3080, 3300, 0, 720, 725, 730, 750, 0, 923 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 924 .vrefresh = 30, }, 925 /* 63 - 1920x1080@120Hz */ 926 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 927 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 928 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 929 .vrefresh = 120, }, 930 /* 64 - 1920x1080@100Hz */ 931 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 932 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 933 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 934 .vrefresh = 100, }, 935 }; 936 937 /* 938 * HDMI 1.4 4k modes. 939 */ 940 static const struct drm_display_mode edid_4k_modes[] = { 941 /* 1 - 3840x2160@30Hz */ 942 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 943 3840, 4016, 4104, 4400, 0, 944 2160, 2168, 2178, 2250, 0, 945 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 946 .vrefresh = 30, }, 947 /* 2 - 3840x2160@25Hz */ 948 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 949 3840, 4896, 4984, 5280, 0, 950 2160, 2168, 2178, 2250, 0, 951 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 952 .vrefresh = 25, }, 953 /* 3 - 3840x2160@24Hz */ 954 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 955 3840, 5116, 5204, 5500, 0, 956 2160, 2168, 2178, 2250, 0, 957 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 958 .vrefresh = 24, }, 959 /* 4 - 4096x2160@24Hz (SMPTE) */ 960 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 961 4096, 5116, 5204, 5500, 0, 962 2160, 2168, 2178, 2250, 0, 963 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 964 .vrefresh = 24, }, 965 }; 966 967 /*** DDC fetch and block validation ***/ 968 969 static const u8 edid_header[] = { 970 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 971 }; 972 973 /* 974 * Sanity check the header of the base EDID block. Return 8 if the header 975 * is perfect, down to 0 if it's totally wrong. 976 */ 977 int drm_edid_header_is_valid(const u8 *raw_edid) 978 { 979 int i, score = 0; 980 981 for (i = 0; i < sizeof(edid_header); i++) 982 if (raw_edid[i] == edid_header[i]) 983 score++; 984 985 return score; 986 } 987 EXPORT_SYMBOL(drm_edid_header_is_valid); 988 989 static int edid_fixup __read_mostly = 6; 990 module_param_named(edid_fixup, edid_fixup, int, 0400); 991 MODULE_PARM_DESC(edid_fixup, 992 "Minimum number of valid EDID header bytes (0-8, default 6)"); 993 994 /* 995 * Sanity check the EDID block (base or extension). Return 0 if the block 996 * doesn't check out, or 1 if it's valid. 997 */ 998 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) 999 { 1000 int i; 1001 u8 csum = 0; 1002 struct edid *edid = (struct edid *)raw_edid; 1003 1004 if (WARN_ON(!raw_edid)) 1005 return false; 1006 1007 if (edid_fixup > 8 || edid_fixup < 0) 1008 edid_fixup = 6; 1009 1010 if (block == 0) { 1011 int score = drm_edid_header_is_valid(raw_edid); 1012 if (score == 8) ; 1013 else if (score >= edid_fixup) { 1014 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 1015 memcpy(raw_edid, edid_header, sizeof(edid_header)); 1016 } else { 1017 goto bad; 1018 } 1019 } 1020 1021 for (i = 0; i < EDID_LENGTH; i++) 1022 csum += raw_edid[i]; 1023 if (csum) { 1024 if (print_bad_edid) { 1025 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 1026 } 1027 1028 /* allow CEA to slide through, switches mangle this */ 1029 if (raw_edid[0] != 0x02) 1030 goto bad; 1031 } 1032 1033 /* per-block-type checks */ 1034 switch (raw_edid[0]) { 1035 case 0: /* base */ 1036 if (edid->version != 1) { 1037 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 1038 goto bad; 1039 } 1040 1041 if (edid->revision > 4) 1042 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 1043 break; 1044 1045 default: 1046 break; 1047 } 1048 1049 return true; 1050 1051 bad: 1052 if (print_bad_edid) { 1053 printk(KERN_ERR "Raw EDID:\n"); 1054 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, 1055 raw_edid, EDID_LENGTH, false); 1056 } 1057 return false; 1058 } 1059 EXPORT_SYMBOL(drm_edid_block_valid); 1060 1061 /** 1062 * drm_edid_is_valid - sanity check EDID data 1063 * @edid: EDID data 1064 * 1065 * Sanity-check an entire EDID record (including extensions) 1066 */ 1067 bool drm_edid_is_valid(struct edid *edid) 1068 { 1069 int i; 1070 u8 *raw = (u8 *)edid; 1071 1072 if (!edid) 1073 return false; 1074 1075 for (i = 0; i <= edid->extensions; i++) 1076 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) 1077 return false; 1078 1079 return true; 1080 } 1081 EXPORT_SYMBOL(drm_edid_is_valid); 1082 1083 #define DDC_SEGMENT_ADDR 0x30 1084 /** 1085 * Get EDID information via I2C. 1086 * 1087 * \param adapter : i2c device adaptor 1088 * \param buf : EDID data buffer to be filled 1089 * \param len : EDID data buffer length 1090 * \return 0 on success or -1 on failure. 1091 * 1092 * Try to fetch EDID information by calling i2c driver function. 1093 */ 1094 static int 1095 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, 1096 int block, int len) 1097 { 1098 unsigned char start = block * EDID_LENGTH; 1099 unsigned char segment = block >> 1; 1100 unsigned char xfers = segment ? 3 : 2; 1101 int ret, retries = 5; 1102 1103 /* The core i2c driver will automatically retry the transfer if the 1104 * adapter reports EAGAIN. However, we find that bit-banging transfers 1105 * are susceptible to errors under a heavily loaded machine and 1106 * generate spurious NAKs and timeouts. Retrying the transfer 1107 * of the individual block a few times seems to overcome this. 1108 */ 1109 do { 1110 struct i2c_msg msgs[] = { 1111 { 1112 .addr = DDC_SEGMENT_ADDR, 1113 .flags = 0, 1114 .len = 1, 1115 .buf = &segment, 1116 }, { 1117 .addr = DDC_ADDR, 1118 .flags = 0, 1119 .len = 1, 1120 .buf = &start, 1121 }, { 1122 .addr = DDC_ADDR, 1123 .flags = I2C_M_RD, 1124 .len = len, 1125 .buf = buf, 1126 } 1127 }; 1128 1129 /* 1130 * Avoid sending the segment addr to not upset non-compliant ddc 1131 * monitors. 1132 */ 1133 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); 1134 1135 if (ret == -ENXIO) { 1136 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", 1137 adapter->name); 1138 break; 1139 } 1140 } while (ret != xfers && --retries); 1141 1142 return ret == xfers ? 0 : -1; 1143 } 1144 1145 static bool drm_edid_is_zero(u8 *in_edid, int length) 1146 { 1147 if (memchr_inv(in_edid, 0, length)) 1148 return false; 1149 1150 return true; 1151 } 1152 1153 static u8 * 1154 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) 1155 { 1156 int i, j = 0, valid_extensions = 0; 1157 u8 *block, *new; 1158 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); 1159 1160 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) 1161 return NULL; 1162 1163 /* base block fetch */ 1164 for (i = 0; i < 4; i++) { 1165 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 1166 goto out; 1167 if (drm_edid_block_valid(block, 0, print_bad_edid)) 1168 break; 1169 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { 1170 connector->null_edid_counter++; 1171 goto carp; 1172 } 1173 } 1174 if (i == 4) 1175 goto carp; 1176 1177 /* if there's no extensions, we're done */ 1178 if (block[0x7e] == 0) 1179 return block; 1180 1181 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); 1182 if (!new) 1183 goto out; 1184 block = new; 1185 1186 for (j = 1; j <= block[0x7e]; j++) { 1187 for (i = 0; i < 4; i++) { 1188 if (drm_do_probe_ddc_edid(adapter, 1189 block + (valid_extensions + 1) * EDID_LENGTH, 1190 j, EDID_LENGTH)) 1191 goto out; 1192 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { 1193 valid_extensions++; 1194 break; 1195 } 1196 } 1197 1198 if (i == 4 && print_bad_edid) { 1199 dev_warn(connector->dev->dev, 1200 "%s: Ignoring invalid EDID block %d.\n", 1201 drm_get_connector_name(connector), j); 1202 1203 connector->bad_edid_counter++; 1204 } 1205 } 1206 1207 if (valid_extensions != block[0x7e]) { 1208 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; 1209 block[0x7e] = valid_extensions; 1210 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); 1211 if (!new) 1212 goto out; 1213 block = new; 1214 } 1215 1216 return block; 1217 1218 carp: 1219 if (print_bad_edid) { 1220 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", 1221 drm_get_connector_name(connector), j); 1222 } 1223 connector->bad_edid_counter++; 1224 1225 out: 1226 kfree(block); 1227 return NULL; 1228 } 1229 1230 /** 1231 * Probe DDC presence. 1232 * 1233 * \param adapter : i2c device adaptor 1234 * \return 1 on success 1235 */ 1236 bool 1237 drm_probe_ddc(struct i2c_adapter *adapter) 1238 { 1239 unsigned char out; 1240 1241 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 1242 } 1243 EXPORT_SYMBOL(drm_probe_ddc); 1244 1245 /** 1246 * drm_get_edid - get EDID data, if available 1247 * @connector: connector we're probing 1248 * @adapter: i2c adapter to use for DDC 1249 * 1250 * Poke the given i2c channel to grab EDID data if possible. If found, 1251 * attach it to the connector. 1252 * 1253 * Return edid data or NULL if we couldn't find any. 1254 */ 1255 struct edid *drm_get_edid(struct drm_connector *connector, 1256 struct i2c_adapter *adapter) 1257 { 1258 struct edid *edid = NULL; 1259 1260 if (drm_probe_ddc(adapter)) 1261 edid = (struct edid *)drm_do_get_edid(connector, adapter); 1262 1263 return edid; 1264 } 1265 EXPORT_SYMBOL(drm_get_edid); 1266 1267 /*** EDID parsing ***/ 1268 1269 /** 1270 * edid_vendor - match a string against EDID's obfuscated vendor field 1271 * @edid: EDID to match 1272 * @vendor: vendor string 1273 * 1274 * Returns true if @vendor is in @edid, false otherwise 1275 */ 1276 static bool edid_vendor(struct edid *edid, char *vendor) 1277 { 1278 char edid_vendor[3]; 1279 1280 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 1281 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 1282 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 1283 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 1284 1285 return !strncmp(edid_vendor, vendor, 3); 1286 } 1287 1288 /** 1289 * edid_get_quirks - return quirk flags for a given EDID 1290 * @edid: EDID to process 1291 * 1292 * This tells subsequent routines what fixes they need to apply. 1293 */ 1294 static u32 edid_get_quirks(struct edid *edid) 1295 { 1296 struct edid_quirk *quirk; 1297 int i; 1298 1299 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 1300 quirk = &edid_quirk_list[i]; 1301 1302 if (edid_vendor(edid, quirk->vendor) && 1303 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 1304 return quirk->quirks; 1305 } 1306 1307 return 0; 1308 } 1309 1310 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 1311 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 1312 1313 /** 1314 * edid_fixup_preferred - set preferred modes based on quirk list 1315 * @connector: has mode list to fix up 1316 * @quirks: quirks list 1317 * 1318 * Walk the mode list for @connector, clearing the preferred status 1319 * on existing modes and setting it anew for the right mode ala @quirks. 1320 */ 1321 static void edid_fixup_preferred(struct drm_connector *connector, 1322 u32 quirks) 1323 { 1324 struct drm_display_mode *t, *cur_mode, *preferred_mode; 1325 int target_refresh = 0; 1326 1327 if (list_empty(&connector->probed_modes)) 1328 return; 1329 1330 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 1331 target_refresh = 60; 1332 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 1333 target_refresh = 75; 1334 1335 preferred_mode = list_first_entry(&connector->probed_modes, 1336 struct drm_display_mode, head); 1337 1338 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 1339 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 1340 1341 if (cur_mode == preferred_mode) 1342 continue; 1343 1344 /* Largest mode is preferred */ 1345 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 1346 preferred_mode = cur_mode; 1347 1348 /* At a given size, try to get closest to target refresh */ 1349 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 1350 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 1351 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 1352 preferred_mode = cur_mode; 1353 } 1354 } 1355 1356 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 1357 } 1358 1359 static bool 1360 mode_is_rb(const struct drm_display_mode *mode) 1361 { 1362 return (mode->htotal - mode->hdisplay == 160) && 1363 (mode->hsync_end - mode->hdisplay == 80) && 1364 (mode->hsync_end - mode->hsync_start == 32) && 1365 (mode->vsync_start - mode->vdisplay == 3); 1366 } 1367 1368 /* 1369 * drm_mode_find_dmt - Create a copy of a mode if present in DMT 1370 * @dev: Device to duplicate against 1371 * @hsize: Mode width 1372 * @vsize: Mode height 1373 * @fresh: Mode refresh rate 1374 * @rb: Mode reduced-blanking-ness 1375 * 1376 * Walk the DMT mode list looking for a match for the given parameters. 1377 * Return a newly allocated copy of the mode, or NULL if not found. 1378 */ 1379 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 1380 int hsize, int vsize, int fresh, 1381 bool rb) 1382 { 1383 int i; 1384 1385 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1386 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 1387 if (hsize != ptr->hdisplay) 1388 continue; 1389 if (vsize != ptr->vdisplay) 1390 continue; 1391 if (fresh != drm_mode_vrefresh(ptr)) 1392 continue; 1393 if (rb != mode_is_rb(ptr)) 1394 continue; 1395 1396 return drm_mode_duplicate(dev, ptr); 1397 } 1398 1399 return NULL; 1400 } 1401 EXPORT_SYMBOL(drm_mode_find_dmt); 1402 1403 typedef void detailed_cb(struct detailed_timing *timing, void *closure); 1404 1405 static void 1406 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1407 { 1408 int i, n = 0; 1409 u8 d = ext[0x02]; 1410 u8 *det_base = ext + d; 1411 1412 n = (127 - d) / 18; 1413 for (i = 0; i < n; i++) 1414 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1415 } 1416 1417 static void 1418 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1419 { 1420 unsigned int i, n = min((int)ext[0x02], 6); 1421 u8 *det_base = ext + 5; 1422 1423 if (ext[0x01] != 1) 1424 return; /* unknown version */ 1425 1426 for (i = 0; i < n; i++) 1427 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1428 } 1429 1430 static void 1431 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) 1432 { 1433 int i; 1434 struct edid *edid = (struct edid *)raw_edid; 1435 1436 if (edid == NULL) 1437 return; 1438 1439 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) 1440 cb(&(edid->detailed_timings[i]), closure); 1441 1442 for (i = 1; i <= raw_edid[0x7e]; i++) { 1443 u8 *ext = raw_edid + (i * EDID_LENGTH); 1444 switch (*ext) { 1445 case CEA_EXT: 1446 cea_for_each_detailed_block(ext, cb, closure); 1447 break; 1448 case VTB_EXT: 1449 vtb_for_each_detailed_block(ext, cb, closure); 1450 break; 1451 default: 1452 break; 1453 } 1454 } 1455 } 1456 1457 static void 1458 is_rb(struct detailed_timing *t, void *data) 1459 { 1460 u8 *r = (u8 *)t; 1461 if (r[3] == EDID_DETAIL_MONITOR_RANGE) 1462 if (r[15] & 0x10) 1463 *(bool *)data = true; 1464 } 1465 1466 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ 1467 static bool 1468 drm_monitor_supports_rb(struct edid *edid) 1469 { 1470 if (edid->revision >= 4) { 1471 bool ret = false; 1472 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); 1473 return ret; 1474 } 1475 1476 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); 1477 } 1478 1479 static void 1480 find_gtf2(struct detailed_timing *t, void *data) 1481 { 1482 u8 *r = (u8 *)t; 1483 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) 1484 *(u8 **)data = r; 1485 } 1486 1487 /* Secondary GTF curve kicks in above some break frequency */ 1488 static int 1489 drm_gtf2_hbreak(struct edid *edid) 1490 { 1491 u8 *r = NULL; 1492 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1493 return r ? (r[12] * 2) : 0; 1494 } 1495 1496 static int 1497 drm_gtf2_2c(struct edid *edid) 1498 { 1499 u8 *r = NULL; 1500 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1501 return r ? r[13] : 0; 1502 } 1503 1504 static int 1505 drm_gtf2_m(struct edid *edid) 1506 { 1507 u8 *r = NULL; 1508 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1509 return r ? (r[15] << 8) + r[14] : 0; 1510 } 1511 1512 static int 1513 drm_gtf2_k(struct edid *edid) 1514 { 1515 u8 *r = NULL; 1516 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1517 return r ? r[16] : 0; 1518 } 1519 1520 static int 1521 drm_gtf2_2j(struct edid *edid) 1522 { 1523 u8 *r = NULL; 1524 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1525 return r ? r[17] : 0; 1526 } 1527 1528 /** 1529 * standard_timing_level - get std. timing level(CVT/GTF/DMT) 1530 * @edid: EDID block to scan 1531 */ 1532 static int standard_timing_level(struct edid *edid) 1533 { 1534 if (edid->revision >= 2) { 1535 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 1536 return LEVEL_CVT; 1537 if (drm_gtf2_hbreak(edid)) 1538 return LEVEL_GTF2; 1539 return LEVEL_GTF; 1540 } 1541 return LEVEL_DMT; 1542 } 1543 1544 /* 1545 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 1546 * monitors fill with ascii space (0x20) instead. 1547 */ 1548 static int 1549 bad_std_timing(u8 a, u8 b) 1550 { 1551 return (a == 0x00 && b == 0x00) || 1552 (a == 0x01 && b == 0x01) || 1553 (a == 0x20 && b == 0x20); 1554 } 1555 1556 /** 1557 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 1558 * @t: standard timing params 1559 * @timing_level: standard timing level 1560 * 1561 * Take the standard timing params (in this case width, aspect, and refresh) 1562 * and convert them into a real mode using CVT/GTF/DMT. 1563 */ 1564 static struct drm_display_mode * 1565 drm_mode_std(struct drm_connector *connector, struct edid *edid, 1566 struct std_timing *t, int revision) 1567 { 1568 struct drm_device *dev = connector->dev; 1569 struct drm_display_mode *m, *mode = NULL; 1570 int hsize, vsize; 1571 int vrefresh_rate; 1572 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 1573 >> EDID_TIMING_ASPECT_SHIFT; 1574 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 1575 >> EDID_TIMING_VFREQ_SHIFT; 1576 int timing_level = standard_timing_level(edid); 1577 1578 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 1579 return NULL; 1580 1581 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 1582 hsize = t->hsize * 8 + 248; 1583 /* vrefresh_rate = vfreq + 60 */ 1584 vrefresh_rate = vfreq + 60; 1585 /* the vdisplay is calculated based on the aspect ratio */ 1586 if (aspect_ratio == 0) { 1587 if (revision < 3) 1588 vsize = hsize; 1589 else 1590 vsize = (hsize * 10) / 16; 1591 } else if (aspect_ratio == 1) 1592 vsize = (hsize * 3) / 4; 1593 else if (aspect_ratio == 2) 1594 vsize = (hsize * 4) / 5; 1595 else 1596 vsize = (hsize * 9) / 16; 1597 1598 /* HDTV hack, part 1 */ 1599 if (vrefresh_rate == 60 && 1600 ((hsize == 1360 && vsize == 765) || 1601 (hsize == 1368 && vsize == 769))) { 1602 hsize = 1366; 1603 vsize = 768; 1604 } 1605 1606 /* 1607 * If this connector already has a mode for this size and refresh 1608 * rate (because it came from detailed or CVT info), use that 1609 * instead. This way we don't have to guess at interlace or 1610 * reduced blanking. 1611 */ 1612 list_for_each_entry(m, &connector->probed_modes, head) 1613 if (m->hdisplay == hsize && m->vdisplay == vsize && 1614 drm_mode_vrefresh(m) == vrefresh_rate) 1615 return NULL; 1616 1617 /* HDTV hack, part 2 */ 1618 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { 1619 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 1620 false); 1621 mode->hdisplay = 1366; 1622 mode->hsync_start = mode->hsync_start - 1; 1623 mode->hsync_end = mode->hsync_end - 1; 1624 return mode; 1625 } 1626 1627 /* check whether it can be found in default mode table */ 1628 if (drm_monitor_supports_rb(edid)) { 1629 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, 1630 true); 1631 if (mode) 1632 return mode; 1633 } 1634 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); 1635 if (mode) 1636 return mode; 1637 1638 /* okay, generate it */ 1639 switch (timing_level) { 1640 case LEVEL_DMT: 1641 break; 1642 case LEVEL_GTF: 1643 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1644 break; 1645 case LEVEL_GTF2: 1646 /* 1647 * This is potentially wrong if there's ever a monitor with 1648 * more than one ranges section, each claiming a different 1649 * secondary GTF curve. Please don't do that. 1650 */ 1651 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1652 if (!mode) 1653 return NULL; 1654 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { 1655 drm_mode_destroy(dev, mode); 1656 mode = drm_gtf_mode_complex(dev, hsize, vsize, 1657 vrefresh_rate, 0, 0, 1658 drm_gtf2_m(edid), 1659 drm_gtf2_2c(edid), 1660 drm_gtf2_k(edid), 1661 drm_gtf2_2j(edid)); 1662 } 1663 break; 1664 case LEVEL_CVT: 1665 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 1666 false); 1667 break; 1668 } 1669 return mode; 1670 } 1671 1672 /* 1673 * EDID is delightfully ambiguous about how interlaced modes are to be 1674 * encoded. Our internal representation is of frame height, but some 1675 * HDTV detailed timings are encoded as field height. 1676 * 1677 * The format list here is from CEA, in frame size. Technically we 1678 * should be checking refresh rate too. Whatever. 1679 */ 1680 static void 1681 drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 1682 struct detailed_pixel_timing *pt) 1683 { 1684 int i; 1685 static const struct { 1686 int w, h; 1687 } cea_interlaced[] = { 1688 { 1920, 1080 }, 1689 { 720, 480 }, 1690 { 1440, 480 }, 1691 { 2880, 480 }, 1692 { 720, 576 }, 1693 { 1440, 576 }, 1694 { 2880, 576 }, 1695 }; 1696 1697 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 1698 return; 1699 1700 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { 1701 if ((mode->hdisplay == cea_interlaced[i].w) && 1702 (mode->vdisplay == cea_interlaced[i].h / 2)) { 1703 mode->vdisplay *= 2; 1704 mode->vsync_start *= 2; 1705 mode->vsync_end *= 2; 1706 mode->vtotal *= 2; 1707 mode->vtotal |= 1; 1708 } 1709 } 1710 1711 mode->flags |= DRM_MODE_FLAG_INTERLACE; 1712 } 1713 1714 /** 1715 * drm_mode_detailed - create a new mode from an EDID detailed timing section 1716 * @dev: DRM device (needed to create new mode) 1717 * @edid: EDID block 1718 * @timing: EDID detailed timing info 1719 * @quirks: quirks to apply 1720 * 1721 * An EDID detailed timing block contains enough info for us to create and 1722 * return a new struct drm_display_mode. 1723 */ 1724 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 1725 struct edid *edid, 1726 struct detailed_timing *timing, 1727 u32 quirks) 1728 { 1729 struct drm_display_mode *mode; 1730 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 1731 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 1732 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 1733 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 1734 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 1735 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 1736 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 1737 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; 1738 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 1739 1740 /* ignore tiny modes */ 1741 if (hactive < 64 || vactive < 64) 1742 return NULL; 1743 1744 if (pt->misc & DRM_EDID_PT_STEREO) { 1745 DRM_DEBUG_KMS("stereo mode not supported\n"); 1746 return NULL; 1747 } 1748 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 1749 DRM_DEBUG_KMS("composite sync not supported\n"); 1750 } 1751 1752 /* it is incorrect if hsync/vsync width is zero */ 1753 if (!hsync_pulse_width || !vsync_pulse_width) { 1754 DRM_DEBUG_KMS("Incorrect Detailed timing. " 1755 "Wrong Hsync/Vsync pulse width\n"); 1756 return NULL; 1757 } 1758 1759 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { 1760 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); 1761 if (!mode) 1762 return NULL; 1763 1764 goto set_size; 1765 } 1766 1767 mode = drm_mode_create(dev); 1768 if (!mode) 1769 return NULL; 1770 1771 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 1772 timing->pixel_clock = cpu_to_le16(1088); 1773 1774 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 1775 1776 mode->hdisplay = hactive; 1777 mode->hsync_start = mode->hdisplay + hsync_offset; 1778 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 1779 mode->htotal = mode->hdisplay + hblank; 1780 1781 mode->vdisplay = vactive; 1782 mode->vsync_start = mode->vdisplay + vsync_offset; 1783 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 1784 mode->vtotal = mode->vdisplay + vblank; 1785 1786 /* Some EDIDs have bogus h/vtotal values */ 1787 if (mode->hsync_end > mode->htotal) 1788 mode->htotal = mode->hsync_end + 1; 1789 if (mode->vsync_end > mode->vtotal) 1790 mode->vtotal = mode->vsync_end + 1; 1791 1792 drm_mode_do_interlace_quirk(mode, pt); 1793 1794 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 1795 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 1796 } 1797 1798 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 1799 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 1800 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 1801 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 1802 1803 set_size: 1804 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 1805 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 1806 1807 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 1808 mode->width_mm *= 10; 1809 mode->height_mm *= 10; 1810 } 1811 1812 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 1813 mode->width_mm = edid->width_cm * 10; 1814 mode->height_mm = edid->height_cm * 10; 1815 } 1816 1817 mode->type = DRM_MODE_TYPE_DRIVER; 1818 mode->vrefresh = drm_mode_vrefresh(mode); 1819 drm_mode_set_name(mode); 1820 1821 return mode; 1822 } 1823 1824 static bool 1825 mode_in_hsync_range(const struct drm_display_mode *mode, 1826 struct edid *edid, u8 *t) 1827 { 1828 int hsync, hmin, hmax; 1829 1830 hmin = t[7]; 1831 if (edid->revision >= 4) 1832 hmin += ((t[4] & 0x04) ? 255 : 0); 1833 hmax = t[8]; 1834 if (edid->revision >= 4) 1835 hmax += ((t[4] & 0x08) ? 255 : 0); 1836 hsync = drm_mode_hsync(mode); 1837 1838 return (hsync <= hmax && hsync >= hmin); 1839 } 1840 1841 static bool 1842 mode_in_vsync_range(const struct drm_display_mode *mode, 1843 struct edid *edid, u8 *t) 1844 { 1845 int vsync, vmin, vmax; 1846 1847 vmin = t[5]; 1848 if (edid->revision >= 4) 1849 vmin += ((t[4] & 0x01) ? 255 : 0); 1850 vmax = t[6]; 1851 if (edid->revision >= 4) 1852 vmax += ((t[4] & 0x02) ? 255 : 0); 1853 vsync = drm_mode_vrefresh(mode); 1854 1855 return (vsync <= vmax && vsync >= vmin); 1856 } 1857 1858 static u32 1859 range_pixel_clock(struct edid *edid, u8 *t) 1860 { 1861 /* unspecified */ 1862 if (t[9] == 0 || t[9] == 255) 1863 return 0; 1864 1865 /* 1.4 with CVT support gives us real precision, yay */ 1866 if (edid->revision >= 4 && t[10] == 0x04) 1867 return (t[9] * 10000) - ((t[12] >> 2) * 250); 1868 1869 /* 1.3 is pathetic, so fuzz up a bit */ 1870 return t[9] * 10000 + 5001; 1871 } 1872 1873 static bool 1874 mode_in_range(const struct drm_display_mode *mode, struct edid *edid, 1875 struct detailed_timing *timing) 1876 { 1877 u32 max_clock; 1878 u8 *t = (u8 *)timing; 1879 1880 if (!mode_in_hsync_range(mode, edid, t)) 1881 return false; 1882 1883 if (!mode_in_vsync_range(mode, edid, t)) 1884 return false; 1885 1886 if ((max_clock = range_pixel_clock(edid, t))) 1887 if (mode->clock > max_clock) 1888 return false; 1889 1890 /* 1.4 max horizontal check */ 1891 if (edid->revision >= 4 && t[10] == 0x04) 1892 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) 1893 return false; 1894 1895 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) 1896 return false; 1897 1898 return true; 1899 } 1900 1901 static bool valid_inferred_mode(const struct drm_connector *connector, 1902 const struct drm_display_mode *mode) 1903 { 1904 struct drm_display_mode *m; 1905 bool ok = false; 1906 1907 list_for_each_entry(m, &connector->probed_modes, head) { 1908 if (mode->hdisplay == m->hdisplay && 1909 mode->vdisplay == m->vdisplay && 1910 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) 1911 return false; /* duplicated */ 1912 if (mode->hdisplay <= m->hdisplay && 1913 mode->vdisplay <= m->vdisplay) 1914 ok = true; 1915 } 1916 return ok; 1917 } 1918 1919 static int 1920 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1921 struct detailed_timing *timing) 1922 { 1923 int i, modes = 0; 1924 struct drm_display_mode *newmode; 1925 struct drm_device *dev = connector->dev; 1926 1927 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1928 if (mode_in_range(drm_dmt_modes + i, edid, timing) && 1929 valid_inferred_mode(connector, drm_dmt_modes + i)) { 1930 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1931 if (newmode) { 1932 drm_mode_probed_add(connector, newmode); 1933 modes++; 1934 } 1935 } 1936 } 1937 1938 return modes; 1939 } 1940 1941 /* fix up 1366x768 mode from 1368x768; 1942 * GFT/CVT can't express 1366 width which isn't dividable by 8 1943 */ 1944 static void fixup_mode_1366x768(struct drm_display_mode *mode) 1945 { 1946 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { 1947 mode->hdisplay = 1366; 1948 mode->hsync_start--; 1949 mode->hsync_end--; 1950 drm_mode_set_name(mode); 1951 } 1952 } 1953 1954 static int 1955 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, 1956 struct detailed_timing *timing) 1957 { 1958 int i, modes = 0; 1959 struct drm_display_mode *newmode; 1960 struct drm_device *dev = connector->dev; 1961 1962 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1963 const struct minimode *m = &extra_modes[i]; 1964 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); 1965 if (!newmode) 1966 return modes; 1967 1968 fixup_mode_1366x768(newmode); 1969 if (!mode_in_range(newmode, edid, timing) || 1970 !valid_inferred_mode(connector, newmode)) { 1971 drm_mode_destroy(dev, newmode); 1972 continue; 1973 } 1974 1975 drm_mode_probed_add(connector, newmode); 1976 modes++; 1977 } 1978 1979 return modes; 1980 } 1981 1982 static int 1983 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1984 struct detailed_timing *timing) 1985 { 1986 int i, modes = 0; 1987 struct drm_display_mode *newmode; 1988 struct drm_device *dev = connector->dev; 1989 bool rb = drm_monitor_supports_rb(edid); 1990 1991 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1992 const struct minimode *m = &extra_modes[i]; 1993 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); 1994 if (!newmode) 1995 return modes; 1996 1997 fixup_mode_1366x768(newmode); 1998 if (!mode_in_range(newmode, edid, timing) || 1999 !valid_inferred_mode(connector, newmode)) { 2000 drm_mode_destroy(dev, newmode); 2001 continue; 2002 } 2003 2004 drm_mode_probed_add(connector, newmode); 2005 modes++; 2006 } 2007 2008 return modes; 2009 } 2010 2011 static void 2012 do_inferred_modes(struct detailed_timing *timing, void *c) 2013 { 2014 struct detailed_mode_closure *closure = c; 2015 struct detailed_non_pixel *data = &timing->data.other_data; 2016 struct detailed_data_monitor_range *range = &data->data.range; 2017 2018 if (data->type != EDID_DETAIL_MONITOR_RANGE) 2019 return; 2020 2021 closure->modes += drm_dmt_modes_for_range(closure->connector, 2022 closure->edid, 2023 timing); 2024 2025 if (!version_greater(closure->edid, 1, 1)) 2026 return; /* GTF not defined yet */ 2027 2028 switch (range->flags) { 2029 case 0x02: /* secondary gtf, XXX could do more */ 2030 case 0x00: /* default gtf */ 2031 closure->modes += drm_gtf_modes_for_range(closure->connector, 2032 closure->edid, 2033 timing); 2034 break; 2035 case 0x04: /* cvt, only in 1.4+ */ 2036 if (!version_greater(closure->edid, 1, 3)) 2037 break; 2038 2039 closure->modes += drm_cvt_modes_for_range(closure->connector, 2040 closure->edid, 2041 timing); 2042 break; 2043 case 0x01: /* just the ranges, no formula */ 2044 default: 2045 break; 2046 } 2047 } 2048 2049 static int 2050 add_inferred_modes(struct drm_connector *connector, struct edid *edid) 2051 { 2052 struct detailed_mode_closure closure = { 2053 connector, edid, 0, 0, 0 2054 }; 2055 2056 if (version_greater(edid, 1, 0)) 2057 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, 2058 &closure); 2059 2060 return closure.modes; 2061 } 2062 2063 static int 2064 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 2065 { 2066 int i, j, m, modes = 0; 2067 struct drm_display_mode *mode; 2068 u8 *est = ((u8 *)timing) + 5; 2069 2070 for (i = 0; i < 6; i++) { 2071 for (j = 7; j > 0; j--) { 2072 m = (i * 8) + (7 - j); 2073 if (m >= ARRAY_SIZE(est3_modes)) 2074 break; 2075 if (est[i] & (1 << j)) { 2076 mode = drm_mode_find_dmt(connector->dev, 2077 est3_modes[m].w, 2078 est3_modes[m].h, 2079 est3_modes[m].r, 2080 est3_modes[m].rb); 2081 if (mode) { 2082 drm_mode_probed_add(connector, mode); 2083 modes++; 2084 } 2085 } 2086 } 2087 } 2088 2089 return modes; 2090 } 2091 2092 static void 2093 do_established_modes(struct detailed_timing *timing, void *c) 2094 { 2095 struct detailed_mode_closure *closure = c; 2096 struct detailed_non_pixel *data = &timing->data.other_data; 2097 2098 if (data->type == EDID_DETAIL_EST_TIMINGS) 2099 closure->modes += drm_est3_modes(closure->connector, timing); 2100 } 2101 2102 /** 2103 * add_established_modes - get est. modes from EDID and add them 2104 * @edid: EDID block to scan 2105 * 2106 * Each EDID block contains a bitmap of the supported "established modes" list 2107 * (defined above). Tease them out and add them to the global modes list. 2108 */ 2109 static int 2110 add_established_modes(struct drm_connector *connector, struct edid *edid) 2111 { 2112 struct drm_device *dev = connector->dev; 2113 unsigned long est_bits = edid->established_timings.t1 | 2114 (edid->established_timings.t2 << 8) | 2115 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 2116 int i, modes = 0; 2117 struct detailed_mode_closure closure = { 2118 connector, edid, 0, 0, 0 2119 }; 2120 2121 for (i = 0; i <= EDID_EST_TIMINGS; i++) { 2122 if (est_bits & (1<<i)) { 2123 struct drm_display_mode *newmode; 2124 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 2125 if (newmode) { 2126 drm_mode_probed_add(connector, newmode); 2127 modes++; 2128 } 2129 } 2130 } 2131 2132 if (version_greater(edid, 1, 0)) 2133 drm_for_each_detailed_block((u8 *)edid, 2134 do_established_modes, &closure); 2135 2136 return modes + closure.modes; 2137 } 2138 2139 static void 2140 do_standard_modes(struct detailed_timing *timing, void *c) 2141 { 2142 struct detailed_mode_closure *closure = c; 2143 struct detailed_non_pixel *data = &timing->data.other_data; 2144 struct drm_connector *connector = closure->connector; 2145 struct edid *edid = closure->edid; 2146 2147 if (data->type == EDID_DETAIL_STD_MODES) { 2148 int i; 2149 for (i = 0; i < 6; i++) { 2150 struct std_timing *std; 2151 struct drm_display_mode *newmode; 2152 2153 std = &data->data.timings[i]; 2154 newmode = drm_mode_std(connector, edid, std, 2155 edid->revision); 2156 if (newmode) { 2157 drm_mode_probed_add(connector, newmode); 2158 closure->modes++; 2159 } 2160 } 2161 } 2162 } 2163 2164 /** 2165 * add_standard_modes - get std. modes from EDID and add them 2166 * @edid: EDID block to scan 2167 * 2168 * Standard modes can be calculated using the appropriate standard (DMT, 2169 * GTF or CVT. Grab them from @edid and add them to the list. 2170 */ 2171 static int 2172 add_standard_modes(struct drm_connector *connector, struct edid *edid) 2173 { 2174 int i, modes = 0; 2175 struct detailed_mode_closure closure = { 2176 connector, edid, 0, 0, 0 2177 }; 2178 2179 for (i = 0; i < EDID_STD_TIMINGS; i++) { 2180 struct drm_display_mode *newmode; 2181 2182 newmode = drm_mode_std(connector, edid, 2183 &edid->standard_timings[i], 2184 edid->revision); 2185 if (newmode) { 2186 drm_mode_probed_add(connector, newmode); 2187 modes++; 2188 } 2189 } 2190 2191 if (version_greater(edid, 1, 0)) 2192 drm_for_each_detailed_block((u8 *)edid, do_standard_modes, 2193 &closure); 2194 2195 /* XXX should also look for standard codes in VTB blocks */ 2196 2197 return modes + closure.modes; 2198 } 2199 2200 static int drm_cvt_modes(struct drm_connector *connector, 2201 struct detailed_timing *timing) 2202 { 2203 int i, j, modes = 0; 2204 struct drm_display_mode *newmode; 2205 struct drm_device *dev = connector->dev; 2206 struct cvt_timing *cvt; 2207 const int rates[] = { 60, 85, 75, 60, 50 }; 2208 const u8 empty[3] = { 0, 0, 0 }; 2209 2210 for (i = 0; i < 4; i++) { 2211 int uninitialized_var(width), height; 2212 cvt = &(timing->data.other_data.data.cvt[i]); 2213 2214 if (!memcmp(cvt->code, empty, 3)) 2215 continue; 2216 2217 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 2218 switch (cvt->code[1] & 0x0c) { 2219 case 0x00: 2220 width = height * 4 / 3; 2221 break; 2222 case 0x04: 2223 width = height * 16 / 9; 2224 break; 2225 case 0x08: 2226 width = height * 16 / 10; 2227 break; 2228 case 0x0c: 2229 width = height * 15 / 9; 2230 break; 2231 } 2232 2233 for (j = 1; j < 5; j++) { 2234 if (cvt->code[2] & (1 << j)) { 2235 newmode = drm_cvt_mode(dev, width, height, 2236 rates[j], j == 0, 2237 false, false); 2238 if (newmode) { 2239 drm_mode_probed_add(connector, newmode); 2240 modes++; 2241 } 2242 } 2243 } 2244 } 2245 2246 return modes; 2247 } 2248 2249 static void 2250 do_cvt_mode(struct detailed_timing *timing, void *c) 2251 { 2252 struct detailed_mode_closure *closure = c; 2253 struct detailed_non_pixel *data = &timing->data.other_data; 2254 2255 if (data->type == EDID_DETAIL_CVT_3BYTE) 2256 closure->modes += drm_cvt_modes(closure->connector, timing); 2257 } 2258 2259 static int 2260 add_cvt_modes(struct drm_connector *connector, struct edid *edid) 2261 { 2262 struct detailed_mode_closure closure = { 2263 connector, edid, 0, 0, 0 2264 }; 2265 2266 if (version_greater(edid, 1, 2)) 2267 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); 2268 2269 /* XXX should also look for CVT codes in VTB blocks */ 2270 2271 return closure.modes; 2272 } 2273 2274 static void 2275 do_detailed_mode(struct detailed_timing *timing, void *c) 2276 { 2277 struct detailed_mode_closure *closure = c; 2278 struct drm_display_mode *newmode; 2279 2280 if (timing->pixel_clock) { 2281 newmode = drm_mode_detailed(closure->connector->dev, 2282 closure->edid, timing, 2283 closure->quirks); 2284 if (!newmode) 2285 return; 2286 2287 if (closure->preferred) 2288 newmode->type |= DRM_MODE_TYPE_PREFERRED; 2289 2290 drm_mode_probed_add(closure->connector, newmode); 2291 closure->modes++; 2292 closure->preferred = 0; 2293 } 2294 } 2295 2296 /* 2297 * add_detailed_modes - Add modes from detailed timings 2298 * @connector: attached connector 2299 * @edid: EDID block to scan 2300 * @quirks: quirks to apply 2301 */ 2302 static int 2303 add_detailed_modes(struct drm_connector *connector, struct edid *edid, 2304 u32 quirks) 2305 { 2306 struct detailed_mode_closure closure = { 2307 connector, 2308 edid, 2309 1, 2310 quirks, 2311 0 2312 }; 2313 2314 if (closure.preferred && !version_greater(edid, 1, 3)) 2315 closure.preferred = 2316 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 2317 2318 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); 2319 2320 return closure.modes; 2321 } 2322 2323 #define AUDIO_BLOCK 0x01 2324 #define VIDEO_BLOCK 0x02 2325 #define VENDOR_BLOCK 0x03 2326 #define SPEAKER_BLOCK 0x04 2327 #define VIDEO_CAPABILITY_BLOCK 0x07 2328 #define EDID_BASIC_AUDIO (1 << 6) 2329 #define EDID_CEA_YCRCB444 (1 << 5) 2330 #define EDID_CEA_YCRCB422 (1 << 4) 2331 #define EDID_CEA_VCDB_QS (1 << 6) 2332 2333 /* 2334 * Search EDID for CEA extension block. 2335 */ 2336 static u8 *drm_find_cea_extension(struct edid *edid) 2337 { 2338 u8 *edid_ext = NULL; 2339 int i; 2340 2341 /* No EDID or EDID extensions */ 2342 if (edid == NULL || edid->extensions == 0) 2343 return NULL; 2344 2345 /* Find CEA extension */ 2346 for (i = 0; i < edid->extensions; i++) { 2347 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); 2348 if (edid_ext[0] == CEA_EXT) 2349 break; 2350 } 2351 2352 if (i == edid->extensions) 2353 return NULL; 2354 2355 return edid_ext; 2356 } 2357 2358 /* 2359 * Calculate the alternate clock for the CEA mode 2360 * (60Hz vs. 59.94Hz etc.) 2361 */ 2362 static unsigned int 2363 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) 2364 { 2365 unsigned int clock = cea_mode->clock; 2366 2367 if (cea_mode->vrefresh % 6 != 0) 2368 return clock; 2369 2370 /* 2371 * edid_cea_modes contains the 59.94Hz 2372 * variant for 240 and 480 line modes, 2373 * and the 60Hz variant otherwise. 2374 */ 2375 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) 2376 clock = clock * 1001 / 1000; 2377 else 2378 clock = DIV_ROUND_UP(clock * 1000, 1001); 2379 2380 return clock; 2381 } 2382 2383 /** 2384 * drm_match_cea_mode - look for a CEA mode matching given mode 2385 * @to_match: display mode 2386 * 2387 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 2388 * mode. 2389 */ 2390 u8 drm_match_cea_mode(const struct drm_display_mode *to_match) 2391 { 2392 u8 mode; 2393 2394 if (!to_match->clock) 2395 return 0; 2396 2397 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { 2398 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode]; 2399 unsigned int clock1, clock2; 2400 2401 /* Check both 60Hz and 59.94Hz */ 2402 clock1 = cea_mode->clock; 2403 clock2 = cea_mode_alternate_clock(cea_mode); 2404 2405 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || 2406 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && 2407 drm_mode_equal_no_clocks(to_match, cea_mode)) 2408 return mode + 1; 2409 } 2410 return 0; 2411 } 2412 EXPORT_SYMBOL(drm_match_cea_mode); 2413 2414 /* 2415 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor 2416 * specific block). 2417 * 2418 * It's almost like cea_mode_alternate_clock(), we just need to add an 2419 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this 2420 * one. 2421 */ 2422 static unsigned int 2423 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode) 2424 { 2425 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160) 2426 return hdmi_mode->clock; 2427 2428 return cea_mode_alternate_clock(hdmi_mode); 2429 } 2430 2431 /* 2432 * drm_match_hdmi_mode - look for a HDMI mode matching given mode 2433 * @to_match: display mode 2434 * 2435 * An HDMI mode is one defined in the HDMI vendor specific block. 2436 * 2437 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one. 2438 */ 2439 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match) 2440 { 2441 u8 mode; 2442 2443 if (!to_match->clock) 2444 return 0; 2445 2446 for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) { 2447 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode]; 2448 unsigned int clock1, clock2; 2449 2450 /* Make sure to also match alternate clocks */ 2451 clock1 = hdmi_mode->clock; 2452 clock2 = hdmi_mode_alternate_clock(hdmi_mode); 2453 2454 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || 2455 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && 2456 drm_mode_equal_no_clocks(to_match, hdmi_mode)) 2457 return mode + 1; 2458 } 2459 return 0; 2460 } 2461 2462 static int 2463 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) 2464 { 2465 struct drm_device *dev = connector->dev; 2466 struct drm_display_mode *mode, *tmp; 2467 LIST_HEAD(list); 2468 int modes = 0; 2469 2470 /* Don't add CEA modes if the CEA extension block is missing */ 2471 if (!drm_find_cea_extension(edid)) 2472 return 0; 2473 2474 /* 2475 * Go through all probed modes and create a new mode 2476 * with the alternate clock for certain CEA modes. 2477 */ 2478 list_for_each_entry(mode, &connector->probed_modes, head) { 2479 const struct drm_display_mode *cea_mode = NULL; 2480 struct drm_display_mode *newmode; 2481 u8 mode_idx = drm_match_cea_mode(mode) - 1; 2482 unsigned int clock1, clock2; 2483 2484 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) { 2485 cea_mode = &edid_cea_modes[mode_idx]; 2486 clock2 = cea_mode_alternate_clock(cea_mode); 2487 } else { 2488 mode_idx = drm_match_hdmi_mode(mode) - 1; 2489 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) { 2490 cea_mode = &edid_4k_modes[mode_idx]; 2491 clock2 = hdmi_mode_alternate_clock(cea_mode); 2492 } 2493 } 2494 2495 if (!cea_mode) 2496 continue; 2497 2498 clock1 = cea_mode->clock; 2499 2500 if (clock1 == clock2) 2501 continue; 2502 2503 if (mode->clock != clock1 && mode->clock != clock2) 2504 continue; 2505 2506 newmode = drm_mode_duplicate(dev, cea_mode); 2507 if (!newmode) 2508 continue; 2509 2510 /* 2511 * The current mode could be either variant. Make 2512 * sure to pick the "other" clock for the new mode. 2513 */ 2514 if (mode->clock != clock1) 2515 newmode->clock = clock1; 2516 else 2517 newmode->clock = clock2; 2518 2519 list_add_tail(&newmode->head, &list); 2520 } 2521 2522 list_for_each_entry_safe(mode, tmp, &list, head) { 2523 list_del(&mode->head); 2524 drm_mode_probed_add(connector, mode); 2525 modes++; 2526 } 2527 2528 return modes; 2529 } 2530 2531 static int 2532 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len) 2533 { 2534 struct drm_device *dev = connector->dev; 2535 const u8 *mode; 2536 u8 cea_mode; 2537 int modes = 0; 2538 2539 for (mode = db; mode < db + len; mode++) { 2540 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ 2541 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) { 2542 struct drm_display_mode *newmode; 2543 newmode = drm_mode_duplicate(dev, 2544 &edid_cea_modes[cea_mode]); 2545 if (newmode) { 2546 newmode->vrefresh = 0; 2547 drm_mode_probed_add(connector, newmode); 2548 modes++; 2549 } 2550 } 2551 } 2552 2553 return modes; 2554 } 2555 2556 /* 2557 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block 2558 * @connector: connector corresponding to the HDMI sink 2559 * @db: start of the CEA vendor specific block 2560 * @len: length of the CEA block payload, ie. one can access up to db[len] 2561 * 2562 * Parses the HDMI VSDB looking for modes to add to @connector. 2563 */ 2564 static int 2565 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len) 2566 { 2567 struct drm_device *dev = connector->dev; 2568 int modes = 0, offset = 0, i; 2569 u8 vic_len; 2570 2571 if (len < 8) 2572 goto out; 2573 2574 /* no HDMI_Video_Present */ 2575 if (!(db[8] & (1 << 5))) 2576 goto out; 2577 2578 /* Latency_Fields_Present */ 2579 if (db[8] & (1 << 7)) 2580 offset += 2; 2581 2582 /* I_Latency_Fields_Present */ 2583 if (db[8] & (1 << 6)) 2584 offset += 2; 2585 2586 /* the declared length is not long enough for the 2 first bytes 2587 * of additional video format capabilities */ 2588 offset += 2; 2589 if (len < (8 + offset)) 2590 goto out; 2591 2592 vic_len = db[8 + offset] >> 5; 2593 2594 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) { 2595 struct drm_display_mode *newmode; 2596 u8 vic; 2597 2598 vic = db[9 + offset + i]; 2599 2600 vic--; /* VICs start at 1 */ 2601 if (vic >= ARRAY_SIZE(edid_4k_modes)) { 2602 DRM_ERROR("Unknown HDMI VIC: %d\n", vic); 2603 continue; 2604 } 2605 2606 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]); 2607 if (!newmode) 2608 continue; 2609 2610 drm_mode_probed_add(connector, newmode); 2611 modes++; 2612 } 2613 2614 out: 2615 return modes; 2616 } 2617 2618 static int 2619 cea_db_payload_len(const u8 *db) 2620 { 2621 return db[0] & 0x1f; 2622 } 2623 2624 static int 2625 cea_db_tag(const u8 *db) 2626 { 2627 return db[0] >> 5; 2628 } 2629 2630 static int 2631 cea_revision(const u8 *cea) 2632 { 2633 return cea[1]; 2634 } 2635 2636 static int 2637 cea_db_offsets(const u8 *cea, int *start, int *end) 2638 { 2639 /* Data block offset in CEA extension block */ 2640 *start = 4; 2641 *end = cea[2]; 2642 if (*end == 0) 2643 *end = 127; 2644 if (*end < 4 || *end > 127) 2645 return -ERANGE; 2646 return 0; 2647 } 2648 2649 static bool cea_db_is_hdmi_vsdb(const u8 *db) 2650 { 2651 int hdmi_id; 2652 2653 if (cea_db_tag(db) != VENDOR_BLOCK) 2654 return false; 2655 2656 if (cea_db_payload_len(db) < 5) 2657 return false; 2658 2659 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); 2660 2661 return hdmi_id == HDMI_IEEE_OUI; 2662 } 2663 2664 #define for_each_cea_db(cea, i, start, end) \ 2665 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) 2666 2667 static int 2668 add_cea_modes(struct drm_connector *connector, struct edid *edid) 2669 { 2670 const u8 *cea = drm_find_cea_extension(edid); 2671 const u8 *db; 2672 u8 dbl; 2673 int modes = 0; 2674 2675 if (cea && cea_revision(cea) >= 3) { 2676 int i, start, end; 2677 2678 if (cea_db_offsets(cea, &start, &end)) 2679 return 0; 2680 2681 for_each_cea_db(cea, i, start, end) { 2682 db = &cea[i]; 2683 dbl = cea_db_payload_len(db); 2684 2685 if (cea_db_tag(db) == VIDEO_BLOCK) 2686 modes += do_cea_modes(connector, db + 1, dbl); 2687 else if (cea_db_is_hdmi_vsdb(db)) 2688 modes += do_hdmi_vsdb_modes(connector, db, dbl); 2689 } 2690 } 2691 2692 return modes; 2693 } 2694 2695 static void 2696 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) 2697 { 2698 u8 len = cea_db_payload_len(db); 2699 2700 if (len >= 6) { 2701 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ 2702 connector->dvi_dual = db[6] & 1; 2703 } 2704 if (len >= 7) 2705 connector->max_tmds_clock = db[7] * 5; 2706 if (len >= 8) { 2707 connector->latency_present[0] = db[8] >> 7; 2708 connector->latency_present[1] = (db[8] >> 6) & 1; 2709 } 2710 if (len >= 9) 2711 connector->video_latency[0] = db[9]; 2712 if (len >= 10) 2713 connector->audio_latency[0] = db[10]; 2714 if (len >= 11) 2715 connector->video_latency[1] = db[11]; 2716 if (len >= 12) 2717 connector->audio_latency[1] = db[12]; 2718 2719 DRM_DEBUG_KMS("HDMI: DVI dual %d, " 2720 "max TMDS clock %d, " 2721 "latency present %d %d, " 2722 "video latency %d %d, " 2723 "audio latency %d %d\n", 2724 connector->dvi_dual, 2725 connector->max_tmds_clock, 2726 (int) connector->latency_present[0], 2727 (int) connector->latency_present[1], 2728 connector->video_latency[0], 2729 connector->video_latency[1], 2730 connector->audio_latency[0], 2731 connector->audio_latency[1]); 2732 } 2733 2734 static void 2735 monitor_name(struct detailed_timing *t, void *data) 2736 { 2737 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) 2738 *(u8 **)data = t->data.other_data.data.str.str; 2739 } 2740 2741 /** 2742 * drm_edid_to_eld - build ELD from EDID 2743 * @connector: connector corresponding to the HDMI/DP sink 2744 * @edid: EDID to parse 2745 * 2746 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. 2747 * Some ELD fields are left to the graphics driver caller: 2748 * - Conn_Type 2749 * - HDCP 2750 * - Port_ID 2751 */ 2752 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) 2753 { 2754 uint8_t *eld = connector->eld; 2755 u8 *cea; 2756 u8 *name; 2757 u8 *db; 2758 int sad_count = 0; 2759 int mnl; 2760 int dbl; 2761 2762 memset(eld, 0, sizeof(connector->eld)); 2763 2764 cea = drm_find_cea_extension(edid); 2765 if (!cea) { 2766 DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); 2767 return; 2768 } 2769 2770 name = NULL; 2771 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); 2772 for (mnl = 0; name && mnl < 13; mnl++) { 2773 if (name[mnl] == 0x0a) 2774 break; 2775 eld[20 + mnl] = name[mnl]; 2776 } 2777 eld[4] = (cea[1] << 5) | mnl; 2778 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); 2779 2780 eld[0] = 2 << 3; /* ELD version: 2 */ 2781 2782 eld[16] = edid->mfg_id[0]; 2783 eld[17] = edid->mfg_id[1]; 2784 eld[18] = edid->prod_code[0]; 2785 eld[19] = edid->prod_code[1]; 2786 2787 if (cea_revision(cea) >= 3) { 2788 int i, start, end; 2789 2790 if (cea_db_offsets(cea, &start, &end)) { 2791 start = 0; 2792 end = 0; 2793 } 2794 2795 for_each_cea_db(cea, i, start, end) { 2796 db = &cea[i]; 2797 dbl = cea_db_payload_len(db); 2798 2799 switch (cea_db_tag(db)) { 2800 case AUDIO_BLOCK: 2801 /* Audio Data Block, contains SADs */ 2802 sad_count = dbl / 3; 2803 if (dbl >= 1) 2804 memcpy(eld + 20 + mnl, &db[1], dbl); 2805 break; 2806 case SPEAKER_BLOCK: 2807 /* Speaker Allocation Data Block */ 2808 if (dbl >= 1) 2809 eld[7] = db[1]; 2810 break; 2811 case VENDOR_BLOCK: 2812 /* HDMI Vendor-Specific Data Block */ 2813 if (cea_db_is_hdmi_vsdb(db)) 2814 parse_hdmi_vsdb(connector, db); 2815 break; 2816 default: 2817 break; 2818 } 2819 } 2820 } 2821 eld[5] |= sad_count << 4; 2822 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; 2823 2824 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); 2825 } 2826 EXPORT_SYMBOL(drm_edid_to_eld); 2827 2828 /** 2829 * drm_edid_to_sad - extracts SADs from EDID 2830 * @edid: EDID to parse 2831 * @sads: pointer that will be set to the extracted SADs 2832 * 2833 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it. 2834 * Note: returned pointer needs to be kfreed 2835 * 2836 * Return number of found SADs or negative number on error. 2837 */ 2838 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads) 2839 { 2840 int count = 0; 2841 int i, start, end, dbl; 2842 u8 *cea; 2843 2844 cea = drm_find_cea_extension(edid); 2845 if (!cea) { 2846 DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); 2847 return -ENOENT; 2848 } 2849 2850 if (cea_revision(cea) < 3) { 2851 DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); 2852 return -ENOTSUPP; 2853 } 2854 2855 if (cea_db_offsets(cea, &start, &end)) { 2856 DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); 2857 return -EPROTO; 2858 } 2859 2860 for_each_cea_db(cea, i, start, end) { 2861 u8 *db = &cea[i]; 2862 2863 if (cea_db_tag(db) == AUDIO_BLOCK) { 2864 int j; 2865 dbl = cea_db_payload_len(db); 2866 2867 count = dbl / 3; /* SAD is 3B */ 2868 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL); 2869 if (!*sads) 2870 return -ENOMEM; 2871 for (j = 0; j < count; j++) { 2872 u8 *sad = &db[1 + j * 3]; 2873 2874 (*sads)[j].format = (sad[0] & 0x78) >> 3; 2875 (*sads)[j].channels = sad[0] & 0x7; 2876 (*sads)[j].freq = sad[1] & 0x7F; 2877 (*sads)[j].byte2 = sad[2]; 2878 } 2879 break; 2880 } 2881 } 2882 2883 return count; 2884 } 2885 EXPORT_SYMBOL(drm_edid_to_sad); 2886 2887 /** 2888 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID 2889 * @edid: EDID to parse 2890 * @sadb: pointer to the speaker block 2891 * 2892 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it. 2893 * Note: returned pointer needs to be kfreed 2894 * 2895 * Return number of found Speaker Allocation Blocks or negative number on error. 2896 */ 2897 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb) 2898 { 2899 int count = 0; 2900 int i, start, end, dbl; 2901 const u8 *cea; 2902 2903 cea = drm_find_cea_extension(edid); 2904 if (!cea) { 2905 DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); 2906 return -ENOENT; 2907 } 2908 2909 if (cea_revision(cea) < 3) { 2910 DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); 2911 return -ENOTSUPP; 2912 } 2913 2914 if (cea_db_offsets(cea, &start, &end)) { 2915 DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); 2916 return -EPROTO; 2917 } 2918 2919 for_each_cea_db(cea, i, start, end) { 2920 const u8 *db = &cea[i]; 2921 2922 if (cea_db_tag(db) == SPEAKER_BLOCK) { 2923 dbl = cea_db_payload_len(db); 2924 2925 /* Speaker Allocation Data Block */ 2926 if (dbl == 3) { 2927 *sadb = kmalloc(dbl, GFP_KERNEL); 2928 if (!*sadb) 2929 return -ENOMEM; 2930 memcpy(*sadb, &db[1], dbl); 2931 count = dbl; 2932 break; 2933 } 2934 } 2935 } 2936 2937 return count; 2938 } 2939 EXPORT_SYMBOL(drm_edid_to_speaker_allocation); 2940 2941 /** 2942 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond 2943 * @connector: connector associated with the HDMI/DP sink 2944 * @mode: the display mode 2945 */ 2946 int drm_av_sync_delay(struct drm_connector *connector, 2947 struct drm_display_mode *mode) 2948 { 2949 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 2950 int a, v; 2951 2952 if (!connector->latency_present[0]) 2953 return 0; 2954 if (!connector->latency_present[1]) 2955 i = 0; 2956 2957 a = connector->audio_latency[i]; 2958 v = connector->video_latency[i]; 2959 2960 /* 2961 * HDMI/DP sink doesn't support audio or video? 2962 */ 2963 if (a == 255 || v == 255) 2964 return 0; 2965 2966 /* 2967 * Convert raw EDID values to millisecond. 2968 * Treat unknown latency as 0ms. 2969 */ 2970 if (a) 2971 a = min(2 * (a - 1), 500); 2972 if (v) 2973 v = min(2 * (v - 1), 500); 2974 2975 return max(v - a, 0); 2976 } 2977 EXPORT_SYMBOL(drm_av_sync_delay); 2978 2979 /** 2980 * drm_select_eld - select one ELD from multiple HDMI/DP sinks 2981 * @encoder: the encoder just changed display mode 2982 * @mode: the adjusted display mode 2983 * 2984 * It's possible for one encoder to be associated with multiple HDMI/DP sinks. 2985 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. 2986 */ 2987 struct drm_connector *drm_select_eld(struct drm_encoder *encoder, 2988 struct drm_display_mode *mode) 2989 { 2990 struct drm_connector *connector; 2991 struct drm_device *dev = encoder->dev; 2992 2993 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 2994 if (connector->encoder == encoder && connector->eld[0]) 2995 return connector; 2996 2997 return NULL; 2998 } 2999 EXPORT_SYMBOL(drm_select_eld); 3000 3001 /** 3002 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 3003 * @edid: monitor EDID information 3004 * 3005 * Parse the CEA extension according to CEA-861-B. 3006 * Return true if HDMI, false if not or unknown. 3007 */ 3008 bool drm_detect_hdmi_monitor(struct edid *edid) 3009 { 3010 u8 *edid_ext; 3011 int i; 3012 int start_offset, end_offset; 3013 3014 edid_ext = drm_find_cea_extension(edid); 3015 if (!edid_ext) 3016 return false; 3017 3018 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 3019 return false; 3020 3021 /* 3022 * Because HDMI identifier is in Vendor Specific Block, 3023 * search it from all data blocks of CEA extension. 3024 */ 3025 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 3026 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) 3027 return true; 3028 } 3029 3030 return false; 3031 } 3032 EXPORT_SYMBOL(drm_detect_hdmi_monitor); 3033 3034 /** 3035 * drm_detect_monitor_audio - check monitor audio capability 3036 * 3037 * Monitor should have CEA extension block. 3038 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic 3039 * audio' only. If there is any audio extension block and supported 3040 * audio format, assume at least 'basic audio' support, even if 'basic 3041 * audio' is not defined in EDID. 3042 * 3043 */ 3044 bool drm_detect_monitor_audio(struct edid *edid) 3045 { 3046 u8 *edid_ext; 3047 int i, j; 3048 bool has_audio = false; 3049 int start_offset, end_offset; 3050 3051 edid_ext = drm_find_cea_extension(edid); 3052 if (!edid_ext) 3053 goto end; 3054 3055 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); 3056 3057 if (has_audio) { 3058 DRM_DEBUG_KMS("Monitor has basic audio support\n"); 3059 goto end; 3060 } 3061 3062 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 3063 goto end; 3064 3065 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 3066 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { 3067 has_audio = true; 3068 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) 3069 DRM_DEBUG_KMS("CEA audio format %d\n", 3070 (edid_ext[i + j] >> 3) & 0xf); 3071 goto end; 3072 } 3073 } 3074 end: 3075 return has_audio; 3076 } 3077 EXPORT_SYMBOL(drm_detect_monitor_audio); 3078 3079 /** 3080 * drm_rgb_quant_range_selectable - is RGB quantization range selectable? 3081 * 3082 * Check whether the monitor reports the RGB quantization range selection 3083 * as supported. The AVI infoframe can then be used to inform the monitor 3084 * which quantization range (full or limited) is used. 3085 */ 3086 bool drm_rgb_quant_range_selectable(struct edid *edid) 3087 { 3088 u8 *edid_ext; 3089 int i, start, end; 3090 3091 edid_ext = drm_find_cea_extension(edid); 3092 if (!edid_ext) 3093 return false; 3094 3095 if (cea_db_offsets(edid_ext, &start, &end)) 3096 return false; 3097 3098 for_each_cea_db(edid_ext, i, start, end) { 3099 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && 3100 cea_db_payload_len(&edid_ext[i]) == 2) { 3101 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); 3102 return edid_ext[i + 2] & EDID_CEA_VCDB_QS; 3103 } 3104 } 3105 3106 return false; 3107 } 3108 EXPORT_SYMBOL(drm_rgb_quant_range_selectable); 3109 3110 /** 3111 * drm_add_display_info - pull display info out if present 3112 * @edid: EDID data 3113 * @info: display info (attached to connector) 3114 * 3115 * Grab any available display info and stuff it into the drm_display_info 3116 * structure that's part of the connector. Useful for tracking bpp and 3117 * color spaces. 3118 */ 3119 static void drm_add_display_info(struct edid *edid, 3120 struct drm_display_info *info) 3121 { 3122 u8 *edid_ext; 3123 3124 info->width_mm = edid->width_cm * 10; 3125 info->height_mm = edid->height_cm * 10; 3126 3127 /* driver figures it out in this case */ 3128 info->bpc = 0; 3129 info->color_formats = 0; 3130 3131 if (edid->revision < 3) 3132 return; 3133 3134 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) 3135 return; 3136 3137 /* Get data from CEA blocks if present */ 3138 edid_ext = drm_find_cea_extension(edid); 3139 if (edid_ext) { 3140 info->cea_rev = edid_ext[1]; 3141 3142 /* The existence of a CEA block should imply RGB support */ 3143 info->color_formats = DRM_COLOR_FORMAT_RGB444; 3144 if (edid_ext[3] & EDID_CEA_YCRCB444) 3145 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 3146 if (edid_ext[3] & EDID_CEA_YCRCB422) 3147 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 3148 } 3149 3150 /* Only defined for 1.4 with digital displays */ 3151 if (edid->revision < 4) 3152 return; 3153 3154 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { 3155 case DRM_EDID_DIGITAL_DEPTH_6: 3156 info->bpc = 6; 3157 break; 3158 case DRM_EDID_DIGITAL_DEPTH_8: 3159 info->bpc = 8; 3160 break; 3161 case DRM_EDID_DIGITAL_DEPTH_10: 3162 info->bpc = 10; 3163 break; 3164 case DRM_EDID_DIGITAL_DEPTH_12: 3165 info->bpc = 12; 3166 break; 3167 case DRM_EDID_DIGITAL_DEPTH_14: 3168 info->bpc = 14; 3169 break; 3170 case DRM_EDID_DIGITAL_DEPTH_16: 3171 info->bpc = 16; 3172 break; 3173 case DRM_EDID_DIGITAL_DEPTH_UNDEF: 3174 default: 3175 info->bpc = 0; 3176 break; 3177 } 3178 3179 info->color_formats |= DRM_COLOR_FORMAT_RGB444; 3180 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) 3181 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 3182 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) 3183 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 3184 } 3185 3186 /** 3187 * drm_add_edid_modes - add modes from EDID data, if available 3188 * @connector: connector we're probing 3189 * @edid: edid data 3190 * 3191 * Add the specified modes to the connector's mode list. 3192 * 3193 * Return number of modes added or 0 if we couldn't find any. 3194 */ 3195 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 3196 { 3197 int num_modes = 0; 3198 u32 quirks; 3199 3200 if (edid == NULL) { 3201 return 0; 3202 } 3203 if (!drm_edid_is_valid(edid)) { 3204 dev_warn(connector->dev->dev, "%s: EDID invalid.\n", 3205 drm_get_connector_name(connector)); 3206 return 0; 3207 } 3208 3209 quirks = edid_get_quirks(edid); 3210 3211 /* 3212 * EDID spec says modes should be preferred in this order: 3213 * - preferred detailed mode 3214 * - other detailed modes from base block 3215 * - detailed modes from extension blocks 3216 * - CVT 3-byte code modes 3217 * - standard timing codes 3218 * - established timing codes 3219 * - modes inferred from GTF or CVT range information 3220 * 3221 * We get this pretty much right. 3222 * 3223 * XXX order for additional mode types in extension blocks? 3224 */ 3225 num_modes += add_detailed_modes(connector, edid, quirks); 3226 num_modes += add_cvt_modes(connector, edid); 3227 num_modes += add_standard_modes(connector, edid); 3228 num_modes += add_established_modes(connector, edid); 3229 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) 3230 num_modes += add_inferred_modes(connector, edid); 3231 num_modes += add_cea_modes(connector, edid); 3232 num_modes += add_alternate_cea_modes(connector, edid); 3233 3234 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 3235 edid_fixup_preferred(connector, quirks); 3236 3237 drm_add_display_info(edid, &connector->display_info); 3238 3239 return num_modes; 3240 } 3241 EXPORT_SYMBOL(drm_add_edid_modes); 3242 3243 /** 3244 * drm_add_modes_noedid - add modes for the connectors without EDID 3245 * @connector: connector we're probing 3246 * @hdisplay: the horizontal display limit 3247 * @vdisplay: the vertical display limit 3248 * 3249 * Add the specified modes to the connector's mode list. Only when the 3250 * hdisplay/vdisplay is not beyond the given limit, it will be added. 3251 * 3252 * Return number of modes added or 0 if we couldn't find any. 3253 */ 3254 int drm_add_modes_noedid(struct drm_connector *connector, 3255 int hdisplay, int vdisplay) 3256 { 3257 int i, count, num_modes = 0; 3258 struct drm_display_mode *mode; 3259 struct drm_device *dev = connector->dev; 3260 3261 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 3262 if (hdisplay < 0) 3263 hdisplay = 0; 3264 if (vdisplay < 0) 3265 vdisplay = 0; 3266 3267 for (i = 0; i < count; i++) { 3268 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 3269 if (hdisplay && vdisplay) { 3270 /* 3271 * Only when two are valid, they will be used to check 3272 * whether the mode should be added to the mode list of 3273 * the connector. 3274 */ 3275 if (ptr->hdisplay > hdisplay || 3276 ptr->vdisplay > vdisplay) 3277 continue; 3278 } 3279 if (drm_mode_vrefresh(ptr) > 61) 3280 continue; 3281 mode = drm_mode_duplicate(dev, ptr); 3282 if (mode) { 3283 drm_mode_probed_add(connector, mode); 3284 num_modes++; 3285 } 3286 } 3287 return num_modes; 3288 } 3289 EXPORT_SYMBOL(drm_add_modes_noedid); 3290 3291 /** 3292 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with 3293 * data from a DRM display mode 3294 * @frame: HDMI AVI infoframe 3295 * @mode: DRM display mode 3296 * 3297 * Returns 0 on success or a negative error code on failure. 3298 */ 3299 int 3300 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, 3301 const struct drm_display_mode *mode) 3302 { 3303 int err; 3304 3305 if (!frame || !mode) 3306 return -EINVAL; 3307 3308 err = hdmi_avi_infoframe_init(frame); 3309 if (err < 0) 3310 return err; 3311 3312 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 3313 frame->pixel_repeat = 1; 3314 3315 frame->video_code = drm_match_cea_mode(mode); 3316 3317 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; 3318 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; 3319 3320 return 0; 3321 } 3322 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode); 3323 3324 /** 3325 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with 3326 * data from a DRM display mode 3327 * @frame: HDMI vendor infoframe 3328 * @mode: DRM display mode 3329 * 3330 * Note that there's is a need to send HDMI vendor infoframes only when using a 3331 * 4k or stereoscopic 3D mode. So when giving any other mode as input this 3332 * function will return -EINVAL, error that can be safely ignored. 3333 * 3334 * Returns 0 on success or a negative error code on failure. 3335 */ 3336 int 3337 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, 3338 const struct drm_display_mode *mode) 3339 { 3340 int err; 3341 u8 vic; 3342 3343 if (!frame || !mode) 3344 return -EINVAL; 3345 3346 vic = drm_match_hdmi_mode(mode); 3347 if (!vic) 3348 return -EINVAL; 3349 3350 err = hdmi_vendor_infoframe_init(frame); 3351 if (err < 0) 3352 return err; 3353 3354 frame->vic = vic; 3355 3356 return 0; 3357 } 3358 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode); 3359