1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2018 Intel Corp 4 * 5 * Author: 6 * Manasi Navare <manasi.d.navare@intel.com> 7 */ 8 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/init.h> 12 #include <linux/errno.h> 13 #include <linux/byteorder/generic.h> 14 15 #include <drm/display/drm_dp_helper.h> 16 #include <drm/display/drm_dsc_helper.h> 17 #include <drm/drm_print.h> 18 19 /** 20 * DOC: dsc helpers 21 * 22 * VESA specification for DP 1.4 adds a new feature called Display Stream 23 * Compression (DSC) used to compress the pixel bits before sending it on 24 * DP/eDP/MIPI DSI interface. DSC is required to be enabled so that the existing 25 * display interfaces can support high resolutions at higher frames rates uisng 26 * the maximum available link capacity of these interfaces. 27 * 28 * These functions contain some common logic and helpers to deal with VESA 29 * Display Stream Compression standard required for DSC on Display Port/eDP or 30 * MIPI display interfaces. 31 */ 32 33 /** 34 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header 35 * for DisplayPort as per the DP 1.4 spec. 36 * @pps_header: Secondary data packet header for DSC Picture 37 * Parameter Set as defined in &struct dp_sdp_header 38 * 39 * DP 1.4 spec defines the secondary data packet for sending the 40 * picture parameter infoframes from the source to the sink. 41 * This function populates the SDP header defined in 42 * &struct dp_sdp_header. 43 */ 44 void drm_dsc_dp_pps_header_init(struct dp_sdp_header *pps_header) 45 { 46 memset(pps_header, 0, sizeof(*pps_header)); 47 48 pps_header->HB1 = DP_SDP_PPS; 49 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; 50 } 51 EXPORT_SYMBOL(drm_dsc_dp_pps_header_init); 52 53 /** 54 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes 55 * @rc_buffer_block_size: block size code, according to DPCD offset 62h 56 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h 57 * 58 * return: 59 * buffer size in bytes, or 0 on invalid input 60 */ 61 int drm_dsc_dp_rc_buffer_size(u8 rc_buffer_block_size, u8 rc_buffer_size) 62 { 63 int size = 1024 * (rc_buffer_size + 1); 64 65 switch (rc_buffer_block_size) { 66 case DP_DSC_RC_BUF_BLK_SIZE_1: 67 return 1 * size; 68 case DP_DSC_RC_BUF_BLK_SIZE_4: 69 return 4 * size; 70 case DP_DSC_RC_BUF_BLK_SIZE_16: 71 return 16 * size; 72 case DP_DSC_RC_BUF_BLK_SIZE_64: 73 return 64 * size; 74 default: 75 return 0; 76 } 77 } 78 EXPORT_SYMBOL(drm_dsc_dp_rc_buffer_size); 79 80 /** 81 * drm_dsc_pps_payload_pack() - Populates the DSC PPS 82 * 83 * @pps_payload: 84 * Bitwise struct for DSC Picture Parameter Set. This is defined 85 * by &struct drm_dsc_picture_parameter_set 86 * @dsc_cfg: 87 * DSC Configuration data filled by driver as defined by 88 * &struct drm_dsc_config 89 * 90 * DSC source device sends a picture parameter set (PPS) containing the 91 * information required by the sink to decode the compressed frame. Driver 92 * populates the DSC PPS struct using the DSC configuration parameters in 93 * the order expected by the DSC Display Sink device. For the DSC, the sink 94 * device expects the PPS payload in big endian format for fields 95 * that span more than 1 byte. 96 */ 97 void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_payload, 98 const struct drm_dsc_config *dsc_cfg) 99 { 100 int i; 101 102 /* Protect against someone accidentally changing struct size */ 103 BUILD_BUG_ON(sizeof(*pps_payload) != 104 DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1 + 1); 105 106 memset(pps_payload, 0, sizeof(*pps_payload)); 107 108 /* PPS 0 */ 109 pps_payload->dsc_version = 110 dsc_cfg->dsc_version_minor | 111 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; 112 113 /* PPS 1, 2 is 0 */ 114 115 /* PPS 3 */ 116 pps_payload->pps_3 = 117 dsc_cfg->line_buf_depth | 118 dsc_cfg->bits_per_component << DSC_PPS_BPC_SHIFT; 119 120 /* PPS 4 */ 121 pps_payload->pps_4 = 122 ((dsc_cfg->bits_per_pixel & DSC_PPS_BPP_HIGH_MASK) >> 123 DSC_PPS_MSB_SHIFT) | 124 dsc_cfg->vbr_enable << DSC_PPS_VBR_EN_SHIFT | 125 dsc_cfg->simple_422 << DSC_PPS_SIMPLE422_SHIFT | 126 dsc_cfg->convert_rgb << DSC_PPS_CONVERT_RGB_SHIFT | 127 dsc_cfg->block_pred_enable << DSC_PPS_BLOCK_PRED_EN_SHIFT; 128 129 /* PPS 5 */ 130 pps_payload->bits_per_pixel_low = 131 (dsc_cfg->bits_per_pixel & DSC_PPS_LSB_MASK); 132 133 /* 134 * The DSC panel expects the PPS packet to have big endian format 135 * for data spanning 2 bytes. Use a macro cpu_to_be16() to convert 136 * to big endian format. If format is little endian, it will swap 137 * bytes to convert to Big endian else keep it unchanged. 138 */ 139 140 /* PPS 6, 7 */ 141 pps_payload->pic_height = cpu_to_be16(dsc_cfg->pic_height); 142 143 /* PPS 8, 9 */ 144 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width); 145 146 /* PPS 10, 11 */ 147 pps_payload->slice_height = cpu_to_be16(dsc_cfg->slice_height); 148 149 /* PPS 12, 13 */ 150 pps_payload->slice_width = cpu_to_be16(dsc_cfg->slice_width); 151 152 /* PPS 14, 15 */ 153 pps_payload->chunk_size = cpu_to_be16(dsc_cfg->slice_chunk_size); 154 155 /* PPS 16 */ 156 pps_payload->initial_xmit_delay_high = 157 ((dsc_cfg->initial_xmit_delay & 158 DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK) >> 159 DSC_PPS_MSB_SHIFT); 160 161 /* PPS 17 */ 162 pps_payload->initial_xmit_delay_low = 163 (dsc_cfg->initial_xmit_delay & DSC_PPS_LSB_MASK); 164 165 /* PPS 18, 19 */ 166 pps_payload->initial_dec_delay = 167 cpu_to_be16(dsc_cfg->initial_dec_delay); 168 169 /* PPS 20 is 0 */ 170 171 /* PPS 21 */ 172 pps_payload->initial_scale_value = 173 dsc_cfg->initial_scale_value; 174 175 /* PPS 22, 23 */ 176 pps_payload->scale_increment_interval = 177 cpu_to_be16(dsc_cfg->scale_increment_interval); 178 179 /* PPS 24 */ 180 pps_payload->scale_decrement_interval_high = 181 ((dsc_cfg->scale_decrement_interval & 182 DSC_PPS_SCALE_DEC_INT_HIGH_MASK) >> 183 DSC_PPS_MSB_SHIFT); 184 185 /* PPS 25 */ 186 pps_payload->scale_decrement_interval_low = 187 (dsc_cfg->scale_decrement_interval & DSC_PPS_LSB_MASK); 188 189 /* PPS 26[7:0], PPS 27[7:5] RESERVED */ 190 191 /* PPS 27 */ 192 pps_payload->first_line_bpg_offset = 193 dsc_cfg->first_line_bpg_offset; 194 195 /* PPS 28, 29 */ 196 pps_payload->nfl_bpg_offset = 197 cpu_to_be16(dsc_cfg->nfl_bpg_offset); 198 199 /* PPS 30, 31 */ 200 pps_payload->slice_bpg_offset = 201 cpu_to_be16(dsc_cfg->slice_bpg_offset); 202 203 /* PPS 32, 33 */ 204 pps_payload->initial_offset = 205 cpu_to_be16(dsc_cfg->initial_offset); 206 207 /* PPS 34, 35 */ 208 pps_payload->final_offset = cpu_to_be16(dsc_cfg->final_offset); 209 210 /* PPS 36 */ 211 pps_payload->flatness_min_qp = dsc_cfg->flatness_min_qp; 212 213 /* PPS 37 */ 214 pps_payload->flatness_max_qp = dsc_cfg->flatness_max_qp; 215 216 /* PPS 38, 39 */ 217 pps_payload->rc_model_size = cpu_to_be16(dsc_cfg->rc_model_size); 218 219 /* PPS 40 */ 220 pps_payload->rc_edge_factor = DSC_RC_EDGE_FACTOR_CONST; 221 222 /* PPS 41 */ 223 pps_payload->rc_quant_incr_limit0 = 224 dsc_cfg->rc_quant_incr_limit0; 225 226 /* PPS 42 */ 227 pps_payload->rc_quant_incr_limit1 = 228 dsc_cfg->rc_quant_incr_limit1; 229 230 /* PPS 43 */ 231 pps_payload->rc_tgt_offset = DSC_RC_TGT_OFFSET_LO_CONST | 232 DSC_RC_TGT_OFFSET_HI_CONST << DSC_PPS_RC_TGT_OFFSET_HI_SHIFT; 233 234 /* PPS 44 - 57 */ 235 for (i = 0; i < DSC_NUM_BUF_RANGES - 1; i++) 236 pps_payload->rc_buf_thresh[i] = 237 dsc_cfg->rc_buf_thresh[i]; 238 239 /* PPS 58 - 87 */ 240 /* 241 * For DSC sink programming the RC Range parameter fields 242 * are as follows: Min_qp[15:11], max_qp[10:6], offset[5:0] 243 */ 244 for (i = 0; i < DSC_NUM_BUF_RANGES; i++) { 245 pps_payload->rc_range_parameters[i] = 246 cpu_to_be16((dsc_cfg->rc_range_params[i].range_min_qp << 247 DSC_PPS_RC_RANGE_MINQP_SHIFT) | 248 (dsc_cfg->rc_range_params[i].range_max_qp << 249 DSC_PPS_RC_RANGE_MAXQP_SHIFT) | 250 (dsc_cfg->rc_range_params[i].range_bpg_offset)); 251 } 252 253 /* PPS 88 */ 254 pps_payload->native_422_420 = dsc_cfg->native_422 | 255 dsc_cfg->native_420 << DSC_PPS_NATIVE_420_SHIFT; 256 257 /* PPS 89 */ 258 pps_payload->second_line_bpg_offset = 259 dsc_cfg->second_line_bpg_offset; 260 261 /* PPS 90, 91 */ 262 pps_payload->nsl_bpg_offset = 263 cpu_to_be16(dsc_cfg->nsl_bpg_offset); 264 265 /* PPS 92, 93 */ 266 pps_payload->second_line_offset_adj = 267 cpu_to_be16(dsc_cfg->second_line_offset_adj); 268 269 /* PPS 94 - 127 are O */ 270 } 271 EXPORT_SYMBOL(drm_dsc_pps_payload_pack); 272 273 /* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */ 274 static const u16 drm_dsc_rc_buf_thresh[] = { 275 896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616, 276 7744, 7872, 8000, 8064 277 }; 278 279 /** 280 * drm_dsc_set_rc_buf_thresh() - Set thresholds for the RC model 281 * in accordance with the DSC 1.2 specification. 282 * 283 * @vdsc_cfg: DSC Configuration data partially filled by driver 284 */ 285 void drm_dsc_set_rc_buf_thresh(struct drm_dsc_config *vdsc_cfg) 286 { 287 int i; 288 289 BUILD_BUG_ON(ARRAY_SIZE(drm_dsc_rc_buf_thresh) != 290 DSC_NUM_BUF_RANGES - 1); 291 BUILD_BUG_ON(ARRAY_SIZE(drm_dsc_rc_buf_thresh) != 292 ARRAY_SIZE(vdsc_cfg->rc_buf_thresh)); 293 294 for (i = 0; i < ARRAY_SIZE(drm_dsc_rc_buf_thresh); i++) 295 vdsc_cfg->rc_buf_thresh[i] = drm_dsc_rc_buf_thresh[i] >> 6; 296 297 /* 298 * For 6bpp, RC Buffer threshold 12 and 13 need a different value 299 * as per C Model 300 */ 301 if (vdsc_cfg->bits_per_pixel == 6 << 4) { 302 vdsc_cfg->rc_buf_thresh[12] = 7936 >> 6; 303 vdsc_cfg->rc_buf_thresh[13] = 8000 >> 6; 304 } 305 } 306 EXPORT_SYMBOL(drm_dsc_set_rc_buf_thresh); 307 308 struct rc_parameters { 309 u16 initial_xmit_delay; 310 u8 first_line_bpg_offset; 311 u16 initial_offset; 312 u8 flatness_min_qp; 313 u8 flatness_max_qp; 314 u8 rc_quant_incr_limit0; 315 u8 rc_quant_incr_limit1; 316 struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; 317 }; 318 319 struct rc_parameters_data { 320 u8 bpp; 321 u8 bpc; 322 struct rc_parameters params; 323 }; 324 325 #define DSC_BPP(bpp) ((bpp) << 4) 326 327 /* 328 * Rate Control Related Parameter Recommended Values from DSC_v1.1 spec prior 329 * to DSC 1.1 fractional bpp underflow SCR (DSC_v1.1_E1.pdf) 330 * 331 * Cross-checked against C Model releases: DSC_model_20161212 and 20210623 332 */ 333 static const struct rc_parameters_data rc_parameters_pre_scr[] = { 334 { 335 .bpp = DSC_BPP(6), .bpc = 8, 336 { 683, 15, 6144, 3, 13, 11, 11, { 337 { 0, 2, 0 }, { 1, 4, -2 }, { 3, 6, -2 }, { 4, 6, -4 }, 338 { 5, 7, -6 }, { 5, 7, -6 }, { 6, 7, -6 }, { 6, 8, -8 }, 339 { 7, 9, -8 }, { 8, 10, -10 }, { 9, 11, -10 }, { 10, 12, -12 }, 340 { 10, 13, -12 }, { 12, 14, -12 }, { 15, 15, -12 } 341 } 342 } 343 }, 344 { 345 .bpp = DSC_BPP(8), .bpc = 8, 346 { 512, 12, 6144, 3, 12, 11, 11, { 347 { 0, 4, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 }, 348 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 349 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 11, -10 }, { 5, 12, -12 }, 350 { 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 } 351 } 352 } 353 }, 354 { 355 .bpp = DSC_BPP(8), .bpc = 10, 356 { 512, 12, 6144, 7, 16, 15, 15, { 357 /* 358 * DSC model/pre-SCR-cfg has 8 for range_max_qp[0], however 359 * VESA DSC 1.1 Table E-5 sets it to 4. 360 */ 361 { 0, 4, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 5, 10, -2 }, 362 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 363 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 15, -10 }, { 9, 16, -12 }, 364 { 9, 17, -12 }, { 11, 17, -12 }, { 17, 19, -12 } 365 } 366 } 367 }, 368 { 369 .bpp = DSC_BPP(8), .bpc = 12, 370 { 512, 12, 6144, 11, 20, 19, 19, { 371 { 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 }, 372 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 373 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 19, -10 }, 374 { 13, 20, -12 }, { 13, 21, -12 }, { 15, 21, -12 }, 375 { 21, 23, -12 } 376 } 377 } 378 }, 379 { 380 .bpp = DSC_BPP(10), .bpc = 8, 381 { 410, 12, 5632, 3, 12, 11, 11, { 382 { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 }, 383 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 384 { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 11, -10 }, 385 { 5, 12, -12 }, { 7, 13, -12 }, { 13, 15, -12 } 386 } 387 } 388 }, 389 { 390 .bpp = DSC_BPP(10), .bpc = 10, 391 { 410, 12, 5632, 7, 16, 15, 15, { 392 { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 }, 393 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 394 { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 15, -10 }, 395 { 9, 16, -12 }, { 11, 17, -12 }, { 17, 19, -12 } 396 } 397 } 398 }, 399 { 400 .bpp = DSC_BPP(10), .bpc = 12, 401 { 410, 12, 5632, 11, 20, 19, 19, { 402 { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 }, 403 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 404 { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 }, 405 { 13, 19, -10 }, { 13, 20, -12 }, { 15, 21, -12 }, 406 { 21, 23, -12 } 407 } 408 } 409 }, 410 { 411 .bpp = DSC_BPP(12), .bpc = 8, 412 { 341, 15, 2048, 3, 12, 11, 11, { 413 { 0, 2, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 }, 414 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 415 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 11, -10 }, 416 { 5, 12, -12 }, { 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 } 417 } 418 } 419 }, 420 { 421 .bpp = DSC_BPP(12), .bpc = 10, 422 { 341, 15, 2048, 7, 16, 15, 15, { 423 { 0, 2, 2 }, { 2, 5, 0 }, { 3, 7, 0 }, { 4, 8, -2 }, 424 { 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 425 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 15, -10 }, { 9, 16, -12 }, 426 { 9, 17, -12 }, { 11, 17, -12 }, { 17, 19, -12 } 427 } 428 } 429 }, 430 { 431 .bpp = DSC_BPP(12), .bpc = 12, 432 { 341, 15, 2048, 11, 20, 19, 19, { 433 { 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 }, 434 { 10, 13, -4 }, { 11, 14, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 435 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 19, -10 }, 436 { 13, 20, -12 }, { 13, 21, -12 }, { 15, 21, -12 }, 437 { 21, 23, -12 } 438 } 439 } 440 }, 441 { 442 .bpp = DSC_BPP(15), .bpc = 8, 443 { 273, 15, 2048, 3, 12, 11, 11, { 444 { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 }, 445 { 1, 2, 2 }, { 1, 3, 0 }, { 1, 4, -2 }, { 2, 4, -4 }, 446 { 3, 4, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 5, 7, -10 }, 447 { 5, 8, -12 }, { 7, 13, -12 }, { 13, 15, -12 } 448 } 449 } 450 }, 451 { 452 .bpp = DSC_BPP(15), .bpc = 10, 453 { 273, 15, 2048, 7, 16, 15, 15, { 454 { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 }, 455 { 5, 6, 2 }, { 5, 7, 0 }, { 5, 8, -2 }, { 6, 8, -4 }, 456 { 7, 8, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 9, 11, -10 }, 457 { 9, 12, -12 }, { 11, 17, -12 }, { 17, 19, -12 } 458 } 459 } 460 }, 461 { 462 .bpp = DSC_BPP(15), .bpc = 12, 463 { 273, 15, 2048, 11, 20, 19, 19, { 464 { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 }, 465 { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 }, 466 { 11, 12, -6 }, { 11, 13, -8 }, { 12, 14, -10 }, 467 { 13, 15, -10 }, { 13, 16, -12 }, { 15, 21, -12 }, 468 { 21, 23, -12 } 469 } 470 } 471 }, 472 { /* sentinel */ } 473 }; 474 475 /* 476 * Selected Rate Control Related Parameter Recommended Values from DSC v1.2, v1.2a, v1.2b and 477 * DSC_v1.1_E1 specs. 478 * 479 * Cross-checked against C Model releases: DSC_model_20161212 and 20210623 480 */ 481 static const struct rc_parameters_data rc_parameters_1_2_444[] = { 482 { 483 .bpp = DSC_BPP(6), .bpc = 8, 484 { 768, 15, 6144, 3, 13, 11, 11, { 485 { 0, 4, 0 }, { 1, 6, -2 }, { 3, 8, -2 }, { 4, 8, -4 }, 486 { 5, 9, -6 }, { 5, 9, -6 }, { 6, 9, -6 }, { 6, 10, -8 }, 487 { 7, 11, -8 }, { 8, 12, -10 }, { 9, 12, -10 }, { 10, 12, -12 }, 488 { 10, 12, -12 }, { 11, 12, -12 }, { 13, 14, -12 } 489 } 490 } 491 }, 492 { 493 .bpp = DSC_BPP(6), .bpc = 10, 494 { 768, 15, 6144, 7, 17, 15, 15, { 495 { 0, 8, 0 }, { 3, 10, -2 }, { 7, 12, -2 }, { 8, 12, -4 }, 496 { 9, 13, -6 }, { 9, 13, -6 }, { 10, 13, -6 }, { 10, 14, -8 }, 497 { 11, 15, -8 }, { 12, 16, -10 }, { 13, 16, -10 }, 498 { 14, 16, -12 }, { 14, 16, -12 }, { 15, 16, -12 }, 499 { 17, 18, -12 } 500 } 501 } 502 }, 503 { 504 .bpp = DSC_BPP(6), .bpc = 12, 505 { 768, 15, 6144, 11, 21, 19, 19, { 506 { 0, 12, 0 }, { 5, 14, -2 }, { 11, 16, -2 }, { 12, 16, -4 }, 507 { 13, 17, -6 }, { 13, 17, -6 }, { 14, 17, -6 }, { 14, 18, -8 }, 508 { 15, 19, -8 }, { 16, 20, -10 }, { 17, 20, -10 }, 509 { 18, 20, -12 }, { 18, 20, -12 }, { 19, 20, -12 }, 510 { 21, 22, -12 } 511 } 512 } 513 }, 514 { 515 .bpp = DSC_BPP(6), .bpc = 14, 516 { 768, 15, 6144, 15, 25, 23, 23, { 517 { 0, 16, 0 }, { 7, 18, -2 }, { 15, 20, -2 }, { 16, 20, -4 }, 518 { 17, 21, -6 }, { 17, 21, -6 }, { 18, 21, -6 }, { 18, 22, -8 }, 519 { 19, 23, -8 }, { 20, 24, -10 }, { 21, 24, -10 }, 520 { 22, 24, -12 }, { 22, 24, -12 }, { 23, 24, -12 }, 521 { 25, 26, -12 } 522 } 523 } 524 }, 525 { 526 .bpp = DSC_BPP(6), .bpc = 16, 527 { 768, 15, 6144, 19, 29, 27, 27, { 528 { 0, 20, 0 }, { 9, 22, -2 }, { 19, 24, -2 }, { 20, 24, -4 }, 529 { 21, 25, -6 }, { 21, 25, -6 }, { 22, 25, -6 }, { 22, 26, -8 }, 530 { 23, 27, -8 }, { 24, 28, -10 }, { 25, 28, -10 }, 531 { 26, 28, -12 }, { 26, 28, -12 }, { 27, 28, -12 }, 532 { 29, 30, -12 } 533 } 534 } 535 }, 536 { 537 .bpp = DSC_BPP(8), .bpc = 8, 538 { 512, 12, 6144, 3, 12, 11, 11, { 539 { 0, 4, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 }, 540 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 541 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 10, -10 }, { 5, 11, -12 }, 542 { 5, 11, -12 }, { 9, 12, -12 }, { 12, 13, -12 } 543 } 544 } 545 }, 546 { 547 .bpp = DSC_BPP(8), .bpc = 10, 548 { 512, 12, 6144, 7, 16, 15, 15, { 549 { 0, 8, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 5, 10, -2 }, 550 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 551 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 14, -10 }, { 9, 15, -12 }, 552 { 9, 15, -12 }, { 13, 16, -12 }, { 16, 17, -12 } 553 } 554 } 555 }, 556 { 557 .bpp = DSC_BPP(8), .bpc = 12, 558 { 512, 12, 6144, 11, 20, 19, 19, { 559 { 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 }, 560 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 561 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 18, -10 }, 562 { 13, 19, -12 }, { 13, 19, -12 }, { 17, 20, -12 }, 563 { 20, 21, -12 } 564 } 565 } 566 }, 567 { 568 .bpp = DSC_BPP(8), .bpc = 14, 569 { 512, 12, 6144, 15, 24, 23, 23, { 570 { 0, 12, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 12, 17, -2 }, 571 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 }, 572 { 15, 21, -8 }, { 15, 22, -10 }, { 17, 22, -10 }, 573 { 17, 23, -12 }, { 17, 23, -12 }, { 21, 24, -12 }, 574 { 24, 25, -12 } 575 } 576 } 577 }, 578 { 579 .bpp = DSC_BPP(8), .bpc = 16, 580 { 512, 12, 6144, 19, 28, 27, 27, { 581 { 0, 12, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 15, 20, -2 }, 582 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 }, 583 { 19, 25, -8 }, { 19, 26, -10 }, { 21, 26, -10 }, 584 { 21, 27, -12 }, { 21, 27, -12 }, { 25, 28, -12 }, 585 { 28, 29, -12 } 586 } 587 } 588 }, 589 { 590 .bpp = DSC_BPP(10), .bpc = 8, 591 { 410, 15, 5632, 3, 12, 11, 11, { 592 { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 }, 593 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 594 { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 10, -10 }, 595 { 5, 11, -12 }, { 7, 11, -12 }, { 11, 12, -12 } 596 } 597 } 598 }, 599 { 600 .bpp = DSC_BPP(10), .bpc = 10, 601 { 410, 15, 5632, 7, 16, 15, 15, { 602 { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 }, 603 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 604 { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 14, -10 }, 605 { 9, 15, -12 }, { 11, 15, -12 }, { 15, 16, -12 } 606 } 607 } 608 }, 609 { 610 .bpp = DSC_BPP(10), .bpc = 12, 611 { 410, 15, 5632, 11, 20, 19, 19, { 612 { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 }, 613 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 614 { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 }, 615 { 13, 18, -10 }, { 13, 19, -12 }, { 15, 19, -12 }, 616 { 19, 20, -12 } 617 } 618 } 619 }, 620 { 621 .bpp = DSC_BPP(10), .bpc = 14, 622 { 410, 15, 5632, 15, 24, 23, 23, { 623 { 0, 11, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 13, 18, -2 }, 624 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 }, 625 { 15, 21, -8 }, { 15, 21, -10 }, { 17, 22, -10 }, 626 { 17, 22, -10 }, { 17, 23, -12 }, { 19, 23, -12 }, 627 { 23, 24, -12 } 628 } 629 } 630 }, 631 { 632 .bpp = DSC_BPP(10), .bpc = 16, 633 { 410, 15, 5632, 19, 28, 27, 27, { 634 { 0, 11, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 16, 20, -2 }, 635 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 }, 636 { 19, 25, -8 }, { 19, 25, -10 }, { 21, 26, -10 }, 637 { 21, 26, -10 }, { 21, 27, -12 }, { 23, 27, -12 }, 638 { 27, 28, -12 } 639 } 640 } 641 }, 642 { 643 .bpp = DSC_BPP(12), .bpc = 8, 644 { 341, 15, 2048, 3, 12, 11, 11, { 645 { 0, 2, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 }, 646 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 647 { 3, 8, -8 }, { 3, 9, -10 }, { 5, 9, -10 }, { 5, 9, -12 }, 648 { 5, 9, -12 }, { 7, 10, -12 }, { 10, 11, -12 } 649 } 650 } 651 }, 652 { 653 .bpp = DSC_BPP(12), .bpc = 10, 654 { 341, 15, 2048, 7, 16, 15, 15, { 655 { 0, 2, 2 }, { 2, 5, 0 }, { 3, 7, 0 }, { 4, 8, -2 }, 656 { 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 657 { 7, 12, -8 }, { 7, 13, -10 }, { 9, 13, -10 }, { 9, 13, -12 }, 658 { 9, 13, -12 }, { 11, 14, -12 }, { 14, 15, -12 } 659 } 660 } 661 }, 662 { 663 .bpp = DSC_BPP(12), .bpc = 12, 664 { 341, 15, 2048, 11, 20, 19, 19, { 665 { 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 }, 666 { 10, 13, -4 }, { 11, 14, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 667 { 11, 16, -8 }, { 11, 17, -10 }, { 13, 17, -10 }, 668 { 13, 17, -12 }, { 13, 17, -12 }, { 15, 18, -12 }, 669 { 18, 19, -12 } 670 } 671 } 672 }, 673 { 674 .bpp = DSC_BPP(12), .bpc = 14, 675 { 341, 15, 2048, 15, 24, 23, 23, { 676 { 0, 6, 2 }, { 7, 10, 0 }, { 9, 13, 0 }, { 11, 16, -2 }, 677 { 14, 17, -4 }, { 15, 18, -6 }, { 15, 19, -8 }, { 15, 20, -8 }, 678 { 15, 20, -8 }, { 15, 21, -10 }, { 17, 21, -10 }, 679 { 17, 21, -12 }, { 17, 21, -12 }, { 19, 22, -12 }, 680 { 22, 23, -12 } 681 } 682 } 683 }, 684 { 685 .bpp = DSC_BPP(12), .bpc = 16, 686 { 341, 15, 2048, 19, 28, 27, 27, { 687 { 0, 6, 2 }, { 6, 11, 0 }, { 11, 15, 0 }, { 14, 18, -2 }, 688 { 18, 21, -4 }, { 19, 22, -6 }, { 19, 23, -8 }, { 19, 24, -8 }, 689 { 19, 24, -8 }, { 19, 25, -10 }, { 21, 25, -10 }, 690 { 21, 25, -12 }, { 21, 25, -12 }, { 23, 26, -12 }, 691 { 26, 27, -12 } 692 } 693 } 694 }, 695 { 696 .bpp = DSC_BPP(15), .bpc = 8, 697 { 273, 15, 2048, 3, 12, 11, 11, { 698 { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 }, 699 { 1, 2, 2 }, { 1, 3, 0 }, { 1, 3, -2 }, { 2, 4, -4 }, 700 { 2, 5, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 4, 7, -10 }, 701 { 5, 7, -12 }, { 7, 8, -12 }, { 8, 9, -12 } 702 } 703 } 704 }, 705 { 706 .bpp = DSC_BPP(15), .bpc = 10, 707 { 273, 15, 2048, 7, 16, 15, 15, { 708 { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 }, 709 { 5, 6, 2 }, { 5, 7, 0 }, { 5, 7, -2 }, { 6, 8, -4 }, 710 { 6, 9, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 8, 11, -10 }, 711 { 9, 11, -12 }, { 11, 12, -12 }, { 12, 13, -12 } 712 } 713 } 714 }, 715 { 716 .bpp = DSC_BPP(15), .bpc = 12, 717 { 273, 15, 2048, 11, 20, 19, 19, { 718 { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 }, 719 { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 }, 720 { 11, 13, -6 }, { 11, 13, -8 }, { 12, 14, -10 }, 721 { 13, 15, -10 }, { 13, 15, -12 }, { 15, 16, -12 }, 722 { 16, 17, -12 } 723 } 724 } 725 }, 726 { 727 .bpp = DSC_BPP(15), .bpc = 14, 728 { 273, 15, 2048, 15, 24, 23, 23, { 729 { 0, 4, 10 }, { 3, 8, 8 }, { 6, 11, 6 }, { 9, 14, 4 }, 730 { 13, 15, 2 }, { 13, 15, 0 }, { 13, 16, -2 }, { 14, 16, -4 }, 731 { 15, 17, -6 }, { 15, 17, -8 }, { 16, 18, -10 }, 732 { 17, 19, -10 }, { 17, 19, -12 }, { 19, 20, -12 }, 733 { 20, 21, -12 } 734 } 735 } 736 }, 737 { 738 .bpp = DSC_BPP(15), .bpc = 16, 739 { 273, 15, 2048, 19, 28, 27, 27, { 740 { 0, 4, 10 }, { 4, 9, 8 }, { 8, 13, 6 }, { 12, 17, 4 }, 741 { 17, 19, 2 }, { 17, 20, 0 }, { 17, 20, -2 }, { 18, 20, -4 }, 742 { 19, 21, -6 }, { 19, 21, -8 }, { 20, 22, -10 }, 743 { 21, 23, -10 }, { 21, 23, -12 }, { 23, 24, -12 }, 744 { 24, 25, -12 } 745 } 746 } 747 }, 748 { /* sentinel */ } 749 }; 750 751 /* 752 * Selected Rate Control Related Parameter Recommended Values for 4:2:2 from 753 * DSC v1.2, v1.2a, v1.2b 754 * 755 * Cross-checked against C Model releases: DSC_model_20161212 and 20210623 756 */ 757 static const struct rc_parameters_data rc_parameters_1_2_422[] = { 758 { 759 .bpp = DSC_BPP(6), .bpc = 8, 760 { 512, 15, 6144, 3, 12, 11, 11, { 761 { 0, 4, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 }, 762 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 763 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 10, -10 }, { 5, 11, -12 }, 764 { 5, 11, -12 }, { 9, 12, -12 }, { 12, 13, -12 } 765 } 766 } 767 }, 768 { 769 .bpp = DSC_BPP(6), .bpc = 10, 770 { 512, 15, 6144, 7, 16, 15, 15, { 771 { 0, 8, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 5, 10, -2 }, 772 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 773 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 14, -10 }, { 9, 15, -12 }, 774 { 9, 15, -12 }, { 13, 16, -12 }, { 16, 17, -12 } 775 } 776 } 777 }, 778 { 779 .bpp = DSC_BPP(6), .bpc = 12, 780 { 512, 15, 6144, 11, 20, 19, 19, { 781 { 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 }, 782 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 783 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 18, -10 }, 784 { 13, 19, -12 }, { 13, 19, -12 }, { 17, 20, -12 }, 785 { 20, 21, -12 } 786 } 787 } 788 }, 789 { 790 .bpp = DSC_BPP(6), .bpc = 14, 791 { 512, 15, 6144, 15, 24, 23, 23, { 792 { 0, 12, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 12, 17, -2 }, 793 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 }, 794 { 15, 21, -8 }, { 15, 22, -10 }, { 17, 22, -10 }, 795 { 17, 23, -12 }, { 17, 23, -12 }, { 21, 24, -12 }, 796 { 24, 25, -12 } 797 } 798 } 799 }, 800 { 801 .bpp = DSC_BPP(6), .bpc = 16, 802 { 512, 15, 6144, 19, 28, 27, 27, { 803 { 0, 12, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 15, 20, -2 }, 804 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 }, 805 { 19, 25, -8 }, { 19, 26, -10 }, { 21, 26, -10 }, 806 { 21, 27, -12 }, { 21, 27, -12 }, { 25, 28, -12 }, 807 { 28, 29, -12 } 808 } 809 } 810 }, 811 { 812 .bpp = DSC_BPP(7), .bpc = 8, 813 { 410, 15, 5632, 3, 12, 11, 11, { 814 { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 }, 815 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 816 { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 10, -10 }, 817 { 5, 11, -12 }, { 7, 11, -12 }, { 11, 12, -12 } 818 } 819 } 820 }, 821 { 822 .bpp = DSC_BPP(7), .bpc = 10, 823 { 410, 15, 5632, 7, 16, 15, 15, { 824 { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 }, 825 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 826 { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 14, -10 }, 827 { 9, 15, -12 }, { 11, 15, -12 }, { 15, 16, -12 } 828 } 829 } 830 }, 831 { 832 .bpp = DSC_BPP(7), .bpc = 12, 833 { 410, 15, 5632, 11, 20, 19, 19, { 834 { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 }, 835 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 836 { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 }, 837 { 13, 18, -10 }, { 13, 19, -12 }, { 15, 19, -12 }, 838 { 19, 20, -12 } 839 } 840 } 841 }, 842 { 843 .bpp = DSC_BPP(7), .bpc = 14, 844 { 410, 15, 5632, 15, 24, 23, 23, { 845 { 0, 11, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 13, 18, -2 }, 846 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 }, 847 { 15, 21, -8 }, { 15, 21, -10 }, { 17, 22, -10 }, 848 { 17, 22, -10 }, { 17, 23, -12 }, { 19, 23, -12 }, 849 { 23, 24, -12 } 850 } 851 } 852 }, 853 { 854 .bpp = DSC_BPP(7), .bpc = 16, 855 { 410, 15, 5632, 19, 28, 27, 27, { 856 { 0, 11, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 16, 20, -2 }, 857 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 }, 858 { 19, 25, -8 }, { 19, 25, -10 }, { 21, 26, -10 }, 859 { 21, 26, -10 }, { 21, 27, -12 }, { 23, 27, -12 }, 860 { 27, 28, -12 } 861 } 862 } 863 }, 864 { 865 .bpp = DSC_BPP(8), .bpc = 8, 866 { 341, 15, 2048, 3, 12, 11, 11, { 867 { 0, 2, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 }, 868 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 869 { 3, 8, -8 }, { 3, 9, -10 }, { 5, 9, -10 }, { 5, 9, -12 }, 870 { 5, 9, -12 }, { 7, 10, -12 }, { 10, 11, -12 } 871 } 872 } 873 }, 874 { 875 .bpp = DSC_BPP(8), .bpc = 10, 876 { 341, 15, 2048, 7, 16, 15, 15, { 877 { 0, 2, 2 }, { 2, 5, 0 }, { 3, 7, 0 }, { 4, 8, -2 }, 878 { 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 879 { 7, 12, -8 }, { 7, 13, -10 }, { 9, 13, -10 }, { 9, 13, -12 }, 880 { 9, 13, -12 }, { 11, 14, -12 }, { 14, 15, -12 } 881 } 882 } 883 }, 884 { 885 .bpp = DSC_BPP(8), .bpc = 12, 886 { 341, 15, 2048, 11, 20, 19, 19, { 887 { 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 }, 888 { 10, 13, -4 }, { 11, 14, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 889 { 11, 16, -8 }, { 11, 17, -10 }, { 13, 17, -10 }, 890 { 13, 17, -12 }, { 13, 17, -12 }, { 15, 18, -12 }, 891 { 18, 19, -12 } 892 } 893 } 894 }, 895 { 896 .bpp = DSC_BPP(8), .bpc = 14, 897 { 341, 15, 2048, 15, 24, 23, 23, { 898 { 0, 6, 2 }, { 7, 10, 0 }, { 9, 13, 0 }, { 11, 16, -2 }, 899 { 14, 17, -4 }, { 15, 18, -6 }, { 15, 19, -8 }, { 15, 20, -8 }, 900 { 15, 20, -8 }, { 15, 21, -10 }, { 17, 21, -10 }, 901 { 17, 21, -12 }, { 17, 21, -12 }, { 19, 22, -12 }, 902 { 22, 23, -12 } 903 } 904 } 905 }, 906 { 907 .bpp = DSC_BPP(8), .bpc = 16, 908 { 341, 15, 2048, 19, 28, 27, 27, { 909 { 0, 6, 2 }, { 6, 11, 0 }, { 11, 15, 0 }, { 14, 18, -2 }, 910 { 18, 21, -4 }, { 19, 22, -6 }, { 19, 23, -8 }, { 19, 24, -8 }, 911 { 19, 24, -8 }, { 19, 25, -10 }, { 21, 25, -10 }, 912 { 21, 25, -12 }, { 21, 25, -12 }, { 23, 26, -12 }, 913 { 26, 27, -12 } 914 } 915 } 916 }, 917 { 918 .bpp = DSC_BPP(10), .bpc = 8, 919 { 273, 15, 2048, 3, 12, 11, 11, { 920 { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 }, 921 { 1, 2, 2 }, { 1, 3, 0 }, { 1, 3, -2 }, { 2, 4, -4 }, 922 { 2, 5, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 4, 7, -10 }, 923 { 5, 7, -12 }, { 7, 8, -12 }, { 8, 9, -12 } 924 } 925 } 926 }, 927 { 928 .bpp = DSC_BPP(10), .bpc = 10, 929 { 273, 15, 2048, 7, 16, 15, 15, { 930 { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 }, 931 { 5, 6, 2 }, { 5, 7, 0 }, { 5, 7, -2 }, { 6, 8, -4 }, 932 { 6, 9, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 8, 11, -10 }, 933 { 9, 11, -12 }, { 11, 12, -12 }, { 12, 13, -12 } 934 } 935 } 936 }, 937 { 938 .bpp = DSC_BPP(10), .bpc = 12, 939 { 273, 15, 2048, 11, 20, 19, 19, { 940 { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 }, 941 { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 }, 942 { 11, 13, -6 }, { 11, 13, -8 }, { 12, 14, -10 }, 943 { 13, 15, -10 }, { 13, 15, -12 }, { 15, 16, -12 }, 944 { 16, 17, -12 } 945 } 946 } 947 }, 948 { 949 .bpp = DSC_BPP(10), .bpc = 14, 950 { 273, 15, 2048, 15, 24, 23, 23, { 951 { 0, 4, 10 }, { 3, 8, 8 }, { 6, 11, 6 }, { 9, 14, 4 }, 952 { 13, 15, 2 }, { 13, 15, 0 }, { 13, 16, -2 }, { 14, 16, -4 }, 953 { 15, 17, -6 }, { 15, 17, -8 }, { 16, 18, -10 }, 954 { 17, 19, -10 }, { 17, 19, -12 }, { 19, 20, -12 }, 955 { 20, 21, -12 } 956 } 957 } 958 }, 959 { 960 .bpp = DSC_BPP(10), .bpc = 16, 961 { 273, 15, 2048, 19, 28, 27, 27, { 962 { 0, 4, 10 }, { 4, 9, 8 }, { 8, 13, 6 }, { 12, 17, 4 }, 963 { 17, 19, 2 }, { 17, 20, 0 }, { 17, 20, -2 }, { 18, 20, -4 }, 964 { 19, 21, -6 }, { 19, 21, -8 }, { 20, 22, -10 }, 965 { 21, 23, -10 }, { 21, 23, -12 }, { 23, 24, -12 }, 966 { 24, 25, -12 } 967 } 968 } 969 }, 970 { /* sentinel */ } 971 }; 972 973 /* 974 * Selected Rate Control Related Parameter Recommended Values for 4:2:2 from 975 * DSC v1.2, v1.2a, v1.2b 976 * 977 * Cross-checked against C Model releases: DSC_model_20161212 and 20210623 978 */ 979 static const struct rc_parameters_data rc_parameters_1_2_420[] = { 980 { 981 .bpp = DSC_BPP(4), .bpc = 8, 982 { 512, 12, 6144, 3, 12, 11, 11, { 983 { 0, 4, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 }, 984 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 985 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 10, -10 }, { 5, 11, -12 }, 986 { 5, 11, -12 }, { 9, 12, -12 }, { 12, 13, -12 } 987 } 988 } 989 }, 990 { 991 .bpp = DSC_BPP(4), .bpc = 10, 992 { 512, 12, 6144, 7, 16, 15, 15, { 993 { 0, 8, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 5, 10, -2 }, 994 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 995 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 14, -10 }, { 9, 15, -12 }, 996 { 9, 15, -12 }, { 13, 16, -12 }, { 16, 17, -12 } 997 } 998 } 999 }, 1000 { 1001 .bpp = DSC_BPP(4), .bpc = 12, 1002 { 512, 12, 6144, 11, 20, 19, 19, { 1003 { 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 }, 1004 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 1005 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 18, -10 }, 1006 { 13, 19, -12 }, { 13, 19, -12 }, { 17, 20, -12 }, 1007 { 20, 21, -12 } 1008 } 1009 } 1010 }, 1011 { 1012 .bpp = DSC_BPP(4), .bpc = 14, 1013 { 512, 12, 6144, 15, 24, 23, 23, { 1014 { 0, 12, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 12, 17, -2 }, 1015 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 }, 1016 { 15, 21, -8 }, { 15, 22, -10 }, { 17, 22, -10 }, 1017 { 17, 23, -12 }, { 17, 23, -12 }, { 21, 24, -12 }, 1018 { 24, 25, -12 } 1019 } 1020 } 1021 }, 1022 { 1023 .bpp = DSC_BPP(4), .bpc = 16, 1024 { 512, 12, 6144, 19, 28, 27, 27, { 1025 { 0, 12, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 15, 20, -2 }, 1026 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 }, 1027 { 19, 25, -8 }, { 19, 26, -10 }, { 21, 26, -10 }, 1028 { 21, 27, -12 }, { 21, 27, -12 }, { 25, 28, -12 }, 1029 { 28, 29, -12 } 1030 } 1031 } 1032 }, 1033 { 1034 .bpp = DSC_BPP(5), .bpc = 8, 1035 { 410, 15, 5632, 3, 12, 11, 11, { 1036 { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 }, 1037 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 1038 { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 10, -10 }, 1039 { 5, 11, -12 }, { 7, 11, -12 }, { 11, 12, -12 } 1040 } 1041 } 1042 }, 1043 { 1044 .bpp = DSC_BPP(5), .bpc = 10, 1045 { 410, 15, 5632, 7, 16, 15, 15, { 1046 { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 }, 1047 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 1048 { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 14, -10 }, 1049 { 9, 15, -12 }, { 11, 15, -12 }, { 15, 16, -12 } 1050 } 1051 } 1052 }, 1053 { 1054 .bpp = DSC_BPP(5), .bpc = 12, 1055 { 410, 15, 5632, 11, 20, 19, 19, { 1056 { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 }, 1057 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 1058 { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 }, 1059 { 13, 18, -10 }, { 13, 19, -12 }, { 15, 19, -12 }, 1060 { 19, 20, -12 } 1061 } 1062 } 1063 }, 1064 { 1065 .bpp = DSC_BPP(5), .bpc = 14, 1066 { 410, 15, 5632, 15, 24, 23, 23, { 1067 { 0, 11, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 13, 18, -2 }, 1068 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 }, 1069 { 15, 21, -8 }, { 15, 21, -10 }, { 17, 22, -10 }, 1070 { 17, 22, -10 }, { 17, 23, -12 }, { 19, 23, -12 }, 1071 { 23, 24, -12 } 1072 } 1073 } 1074 }, 1075 { 1076 .bpp = DSC_BPP(5), .bpc = 16, 1077 { 410, 15, 5632, 19, 28, 27, 27, { 1078 { 0, 11, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 16, 20, -2 }, 1079 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 }, 1080 { 19, 25, -8 }, { 19, 25, -10 }, { 21, 26, -10 }, 1081 { 21, 26, -10 }, { 21, 27, -12 }, { 23, 27, -12 }, 1082 { 27, 28, -12 } 1083 } 1084 } 1085 }, 1086 { 1087 .bpp = DSC_BPP(6), .bpc = 8, 1088 { 341, 15, 2048, 3, 12, 11, 11, { 1089 { 0, 2, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 }, 1090 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 }, 1091 { 3, 8, -8 }, { 3, 9, -10 }, { 5, 9, -10 }, { 5, 9, -12 }, 1092 { 5, 9, -12 }, { 7, 10, -12 }, { 10, 12, -12 } 1093 } 1094 } 1095 }, 1096 { 1097 .bpp = DSC_BPP(6), .bpc = 10, 1098 { 341, 15, 2048, 7, 16, 15, 15, { 1099 { 0, 2, 2 }, { 2, 5, 0 }, { 3, 7, 0 }, { 4, 8, -2 }, 1100 { 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 }, 1101 { 7, 12, -8 }, { 7, 13, -10 }, { 9, 13, -10 }, { 9, 13, -12 }, 1102 { 9, 13, -12 }, { 11, 14, -12 }, { 14, 15, -12 } 1103 } 1104 } 1105 }, 1106 { 1107 .bpp = DSC_BPP(6), .bpc = 12, 1108 { 341, 15, 2048, 11, 20, 19, 19, { 1109 { 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 }, 1110 { 10, 13, -4 }, { 11, 14, -6 }, { 11, 15, -8 }, { 11, 16, -8 }, 1111 { 11, 16, -8 }, { 11, 17, -10 }, { 13, 17, -10 }, 1112 { 13, 17, -12 }, { 13, 17, -12 }, { 15, 18, -12 }, 1113 { 18, 19, -12 } 1114 } 1115 } 1116 }, 1117 { 1118 .bpp = DSC_BPP(6), .bpc = 14, 1119 { 341, 15, 2048, 15, 24, 23, 23, { 1120 { 0, 6, 2 }, { 7, 10, 0 }, { 9, 13, 0 }, { 11, 16, -2 }, 1121 { 14, 17, -4 }, { 15, 18, -6 }, { 15, 19, -8 }, { 15, 20, -8 }, 1122 { 15, 20, -8 }, { 15, 21, -10 }, { 17, 21, -10 }, 1123 { 17, 21, -12 }, { 17, 21, -12 }, { 19, 22, -12 }, 1124 { 22, 23, -12 } 1125 } 1126 } 1127 }, 1128 { 1129 .bpp = DSC_BPP(6), .bpc = 16, 1130 { 341, 15, 2048, 19, 28, 27, 27, { 1131 { 0, 6, 2 }, { 6, 11, 0 }, { 11, 15, 0 }, { 14, 18, -2 }, 1132 { 18, 21, -4 }, { 19, 22, -6 }, { 19, 23, -8 }, { 19, 24, -8 }, 1133 { 19, 24, -8 }, { 19, 25, -10 }, { 21, 25, -10 }, 1134 { 21, 25, -12 }, { 21, 25, -12 }, { 23, 26, -12 }, 1135 { 26, 27, -12 } 1136 } 1137 } 1138 }, 1139 { 1140 .bpp = DSC_BPP(8), .bpc = 8, 1141 { 256, 15, 2048, 3, 12, 11, 11, { 1142 { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 }, 1143 { 1, 2, 2 }, { 1, 3, 0 }, { 1, 3, -2 }, { 2, 4, -4 }, 1144 { 2, 5, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 4, 7, -10 }, 1145 { 5, 7, -12 }, { 7, 8, -12 }, { 8, 9, -12 } 1146 } 1147 } 1148 }, 1149 { 1150 .bpp = DSC_BPP(8), .bpc = 10, 1151 { 256, 15, 2048, 7, 16, 15, 15, { 1152 { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 }, 1153 { 5, 6, 2 }, { 5, 7, 0 }, { 5, 7, -2 }, { 6, 8, -4 }, 1154 { 6, 9, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 8, 11, -10 }, 1155 { 9, 11, -12 }, { 11, 12, -12 }, { 12, 13, -12 } 1156 } 1157 } 1158 }, 1159 { 1160 .bpp = DSC_BPP(8), .bpc = 12, 1161 { 256, 15, 2048, 11, 20, 19, 19, { 1162 { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 }, 1163 { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 }, 1164 { 11, 13, -6 }, { 11, 13, -8 }, { 12, 14, -10 }, 1165 { 13, 15, -10 }, { 13, 15, -12 }, { 15, 16, -12 }, 1166 { 16, 17, -12 } 1167 } 1168 } 1169 }, 1170 { 1171 .bpp = DSC_BPP(8), .bpc = 14, 1172 { 256, 15, 2048, 15, 24, 23, 23, { 1173 { 0, 4, 10 }, { 3, 8, 8 }, { 6, 11, 6 }, { 9, 14, 4 }, 1174 { 13, 15, 2 }, { 13, 15, 0 }, { 13, 16, -2 }, { 14, 16, -4 }, 1175 { 15, 17, -6 }, { 15, 17, -8 }, { 16, 18, -10 }, 1176 { 17, 19, -10 }, { 17, 19, -12 }, { 19, 20, -12 }, 1177 { 20, 21, -12 } 1178 } 1179 } 1180 }, 1181 { 1182 .bpp = DSC_BPP(8), .bpc = 16, 1183 { 256, 15, 2048, 19, 28, 27, 27, { 1184 { 0, 4, 10 }, { 4, 9, 8 }, { 8, 13, 6 }, { 12, 17, 4 }, 1185 { 17, 19, 2 }, { 17, 20, 0 }, { 17, 20, -2 }, { 18, 20, -4 }, 1186 { 19, 21, -6 }, { 19, 21, -8 }, { 20, 22, -10 }, 1187 { 21, 23, -10 }, { 21, 23, -12 }, { 23, 24, -12 }, 1188 { 24, 25, -12 } 1189 } 1190 } 1191 }, 1192 { /* sentinel */ } 1193 }; 1194 1195 static const struct rc_parameters *get_rc_params(const struct rc_parameters_data *rc_parameters, 1196 u16 dsc_bpp, 1197 u8 bits_per_component) 1198 { 1199 int i; 1200 1201 for (i = 0; rc_parameters[i].bpp; i++) 1202 if (rc_parameters[i].bpp == dsc_bpp && 1203 rc_parameters[i].bpc == bits_per_component) 1204 return &rc_parameters[i].params; 1205 1206 return NULL; 1207 } 1208 1209 /** 1210 * drm_dsc_setup_rc_params() - Set parameters and limits for RC model in 1211 * accordance with the DSC 1.1 or 1.2 specification and DSC C Model 1212 * Required bits_per_pixel and bits_per_component to be set before calling this 1213 * function. 1214 * 1215 * @vdsc_cfg: DSC Configuration data partially filled by driver 1216 * @type: operating mode and standard to follow 1217 * 1218 * Return: 0 or -error code in case of an error 1219 */ 1220 int drm_dsc_setup_rc_params(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type) 1221 { 1222 const struct rc_parameters_data *data; 1223 const struct rc_parameters *rc_params; 1224 int i; 1225 1226 if (WARN_ON_ONCE(!vdsc_cfg->bits_per_pixel || 1227 !vdsc_cfg->bits_per_component)) 1228 return -EINVAL; 1229 1230 switch (type) { 1231 case DRM_DSC_1_2_444: 1232 data = rc_parameters_1_2_444; 1233 break; 1234 case DRM_DSC_1_1_PRE_SCR: 1235 data = rc_parameters_pre_scr; 1236 break; 1237 case DRM_DSC_1_2_422: 1238 data = rc_parameters_1_2_422; 1239 break; 1240 case DRM_DSC_1_2_420: 1241 data = rc_parameters_1_2_420; 1242 break; 1243 default: 1244 return -EINVAL; 1245 } 1246 1247 rc_params = get_rc_params(data, 1248 vdsc_cfg->bits_per_pixel, 1249 vdsc_cfg->bits_per_component); 1250 if (!rc_params) 1251 return -EINVAL; 1252 1253 vdsc_cfg->first_line_bpg_offset = rc_params->first_line_bpg_offset; 1254 vdsc_cfg->initial_xmit_delay = rc_params->initial_xmit_delay; 1255 vdsc_cfg->initial_offset = rc_params->initial_offset; 1256 vdsc_cfg->flatness_min_qp = rc_params->flatness_min_qp; 1257 vdsc_cfg->flatness_max_qp = rc_params->flatness_max_qp; 1258 vdsc_cfg->rc_quant_incr_limit0 = rc_params->rc_quant_incr_limit0; 1259 vdsc_cfg->rc_quant_incr_limit1 = rc_params->rc_quant_incr_limit1; 1260 1261 for (i = 0; i < DSC_NUM_BUF_RANGES; i++) { 1262 vdsc_cfg->rc_range_params[i].range_min_qp = 1263 rc_params->rc_range_params[i].range_min_qp; 1264 vdsc_cfg->rc_range_params[i].range_max_qp = 1265 rc_params->rc_range_params[i].range_max_qp; 1266 /* 1267 * Range BPG Offset uses 2's complement and is only a 6 bits. So 1268 * mask it to get only 6 bits. 1269 */ 1270 vdsc_cfg->rc_range_params[i].range_bpg_offset = 1271 rc_params->rc_range_params[i].range_bpg_offset & 1272 DSC_RANGE_BPG_OFFSET_MASK; 1273 } 1274 1275 return 0; 1276 } 1277 EXPORT_SYMBOL(drm_dsc_setup_rc_params); 1278 1279 /** 1280 * drm_dsc_compute_rc_parameters() - Write rate control 1281 * parameters to the dsc configuration defined in 1282 * &struct drm_dsc_config in accordance with the DSC 1.2 1283 * specification. Some configuration fields must be present 1284 * beforehand. 1285 * 1286 * @vdsc_cfg: 1287 * DSC Configuration data partially filled by driver 1288 */ 1289 int drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg) 1290 { 1291 unsigned long groups_per_line = 0; 1292 unsigned long groups_total = 0; 1293 unsigned long num_extra_mux_bits = 0; 1294 unsigned long slice_bits = 0; 1295 unsigned long hrd_delay = 0; 1296 unsigned long final_scale = 0; 1297 unsigned long rbs_min = 0; 1298 1299 if (vdsc_cfg->native_420 || vdsc_cfg->native_422) { 1300 /* Number of groups used to code each line of a slice */ 1301 groups_per_line = DIV_ROUND_UP(vdsc_cfg->slice_width / 2, 1302 DSC_RC_PIXELS_PER_GROUP); 1303 1304 /* chunksize in Bytes */ 1305 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width / 2 * 1306 vdsc_cfg->bits_per_pixel, 1307 (8 * 16)); 1308 } else { 1309 /* Number of groups used to code each line of a slice */ 1310 groups_per_line = DIV_ROUND_UP(vdsc_cfg->slice_width, 1311 DSC_RC_PIXELS_PER_GROUP); 1312 1313 /* chunksize in Bytes */ 1314 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width * 1315 vdsc_cfg->bits_per_pixel, 1316 (8 * 16)); 1317 } 1318 1319 if (vdsc_cfg->convert_rgb) 1320 num_extra_mux_bits = 3 * (vdsc_cfg->mux_word_size + 1321 (4 * vdsc_cfg->bits_per_component + 4) 1322 - 2); 1323 else if (vdsc_cfg->native_422) 1324 num_extra_mux_bits = 4 * vdsc_cfg->mux_word_size + 1325 (4 * vdsc_cfg->bits_per_component + 4) + 1326 3 * (4 * vdsc_cfg->bits_per_component) - 2; 1327 else 1328 num_extra_mux_bits = 3 * vdsc_cfg->mux_word_size + 1329 (4 * vdsc_cfg->bits_per_component + 4) + 1330 2 * (4 * vdsc_cfg->bits_per_component) - 2; 1331 /* Number of bits in one Slice */ 1332 slice_bits = 8 * vdsc_cfg->slice_chunk_size * vdsc_cfg->slice_height; 1333 1334 while ((num_extra_mux_bits > 0) && 1335 ((slice_bits - num_extra_mux_bits) % vdsc_cfg->mux_word_size)) 1336 num_extra_mux_bits--; 1337 1338 if (groups_per_line < vdsc_cfg->initial_scale_value - 8) 1339 vdsc_cfg->initial_scale_value = groups_per_line + 8; 1340 1341 /* scale_decrement_interval calculation according to DSC spec 1.11 */ 1342 if (vdsc_cfg->initial_scale_value > 8) 1343 vdsc_cfg->scale_decrement_interval = groups_per_line / 1344 (vdsc_cfg->initial_scale_value - 8); 1345 else 1346 vdsc_cfg->scale_decrement_interval = DSC_SCALE_DECREMENT_INTERVAL_MAX; 1347 1348 vdsc_cfg->final_offset = vdsc_cfg->rc_model_size - 1349 (vdsc_cfg->initial_xmit_delay * 1350 vdsc_cfg->bits_per_pixel + 8) / 16 + num_extra_mux_bits; 1351 1352 if (vdsc_cfg->final_offset >= vdsc_cfg->rc_model_size) { 1353 DRM_DEBUG_KMS("FinalOfs < RcModelSze for this InitialXmitDelay\n"); 1354 return -ERANGE; 1355 } 1356 1357 final_scale = (vdsc_cfg->rc_model_size * 8) / 1358 (vdsc_cfg->rc_model_size - vdsc_cfg->final_offset); 1359 if (vdsc_cfg->slice_height > 1) 1360 /* 1361 * NflBpgOffset is 16 bit value with 11 fractional bits 1362 * hence we multiply by 2^11 for preserving the 1363 * fractional part 1364 */ 1365 vdsc_cfg->nfl_bpg_offset = DIV_ROUND_UP((vdsc_cfg->first_line_bpg_offset << 11), 1366 (vdsc_cfg->slice_height - 1)); 1367 else 1368 vdsc_cfg->nfl_bpg_offset = 0; 1369 1370 /* Number of groups used to code the entire slice */ 1371 groups_total = groups_per_line * vdsc_cfg->slice_height; 1372 1373 /* slice_bpg_offset is 16 bit value with 11 fractional bits */ 1374 vdsc_cfg->slice_bpg_offset = DIV_ROUND_UP(((vdsc_cfg->rc_model_size - 1375 vdsc_cfg->initial_offset + 1376 num_extra_mux_bits) << 11), 1377 groups_total); 1378 1379 if (final_scale > 9) { 1380 /* 1381 * ScaleIncrementInterval = 1382 * finaloffset/((NflBpgOffset + SliceBpgOffset)*8(finalscale - 1.125)) 1383 * as (NflBpgOffset + SliceBpgOffset) has 11 bit fractional value, 1384 * we need divide by 2^11 from pstDscCfg values 1385 */ 1386 vdsc_cfg->scale_increment_interval = 1387 (vdsc_cfg->final_offset * (1 << 11)) / 1388 ((vdsc_cfg->nfl_bpg_offset + 1389 vdsc_cfg->slice_bpg_offset) * 1390 (final_scale - 9)); 1391 } else { 1392 /* 1393 * If finalScaleValue is less than or equal to 9, a value of 0 should 1394 * be used to disable the scale increment at the end of the slice 1395 */ 1396 vdsc_cfg->scale_increment_interval = 0; 1397 } 1398 1399 /* 1400 * DSC spec mentions that bits_per_pixel specifies the target 1401 * bits/pixel (bpp) rate that is used by the encoder, 1402 * in steps of 1/16 of a bit per pixel 1403 */ 1404 rbs_min = vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset + 1405 DIV_ROUND_UP(vdsc_cfg->initial_xmit_delay * 1406 vdsc_cfg->bits_per_pixel, 16) + 1407 groups_per_line * vdsc_cfg->first_line_bpg_offset; 1408 1409 hrd_delay = DIV_ROUND_UP((rbs_min * 16), vdsc_cfg->bits_per_pixel); 1410 vdsc_cfg->rc_bits = (hrd_delay * vdsc_cfg->bits_per_pixel) / 16; 1411 vdsc_cfg->initial_dec_delay = hrd_delay - vdsc_cfg->initial_xmit_delay; 1412 1413 return 0; 1414 } 1415 EXPORT_SYMBOL(drm_dsc_compute_rc_parameters); 1416