1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2018 Renesas Electronics 4 * 5 * Copyright (C) 2016 Atmel 6 * Bo Shen <voice.shen@atmel.com> 7 * 8 * Authors: Bo Shen <voice.shen@atmel.com> 9 * Boris Brezillon <boris.brezillon@free-electrons.com> 10 * Wu, Songjun <Songjun.Wu@atmel.com> 11 * 12 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. 13 */ 14 15 #include <linux/gpio/consumer.h> 16 #include <linux/i2c-mux.h> 17 #include <linux/i2c.h> 18 #include <linux/module.h> 19 #include <linux/regmap.h> 20 #include <linux/clk.h> 21 22 #include <drm/drm_atomic_helper.h> 23 #include <drm/drm_drv.h> 24 #include <drm/drm_edid.h> 25 #include <drm/drm_print.h> 26 #include <drm/drm_probe_helper.h> 27 28 #include <sound/hdmi-codec.h> 29 30 #define SII902X_TPI_VIDEO_DATA 0x0 31 32 #define SII902X_TPI_PIXEL_REPETITION 0x8 33 #define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5) 34 #define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4) 35 #define SII902X_TPI_AVI_PIXEL_REP_4X 3 36 #define SII902X_TPI_AVI_PIXEL_REP_2X 1 37 #define SII902X_TPI_AVI_PIXEL_REP_NONE 0 38 #define SII902X_TPI_CLK_RATIO_HALF (0 << 6) 39 #define SII902X_TPI_CLK_RATIO_1X (1 << 6) 40 #define SII902X_TPI_CLK_RATIO_2X (2 << 6) 41 #define SII902X_TPI_CLK_RATIO_4X (3 << 6) 42 43 #define SII902X_TPI_AVI_IN_FORMAT 0x9 44 #define SII902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7) 45 #define SII902X_TPI_AVI_INPUT_DITHER BIT(6) 46 #define SII902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2) 47 #define SII902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2) 48 #define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2) 49 #define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0) 50 #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0) 51 #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0) 52 #define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0) 53 54 #define SII902X_TPI_AVI_INFOFRAME 0x0c 55 56 #define SII902X_SYS_CTRL_DATA 0x1a 57 #define SII902X_SYS_CTRL_PWR_DWN BIT(4) 58 #define SII902X_SYS_CTRL_AV_MUTE BIT(3) 59 #define SII902X_SYS_CTRL_DDC_BUS_REQ BIT(2) 60 #define SII902X_SYS_CTRL_DDC_BUS_GRTD BIT(1) 61 #define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0) 62 #define SII902X_SYS_CTRL_OUTPUT_HDMI 1 63 #define SII902X_SYS_CTRL_OUTPUT_DVI 0 64 65 #define SII902X_REG_CHIPID(n) (0x1b + (n)) 66 67 #define SII902X_PWR_STATE_CTRL 0x1e 68 #define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0) 69 #define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK) 70 71 /* Audio */ 72 #define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f 73 #define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0) 74 #define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0) 75 #define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0) 76 #define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0) 77 #define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2) 78 #define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3) 79 #define SII902X_TPI_I2S_SELECT_SD0 (0 << 4) 80 #define SII902X_TPI_I2S_SELECT_SD1 (1 << 4) 81 #define SII902X_TPI_I2S_SELECT_SD2 (2 << 4) 82 #define SII902X_TPI_I2S_SELECT_SD3 (3 << 4) 83 #define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7) 84 85 #define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20 86 #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0) 87 #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0) 88 #define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1) 89 #define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1) 90 #define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2) 91 #define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2) 92 #define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3) 93 #define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3) 94 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4) 95 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4) 96 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4) 97 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4) 98 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4) 99 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4) 100 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4) 101 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4) 102 #define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7) 103 #define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7) 104 105 #define SII902X_TPI_I2S_STRM_HDR_BASE 0x21 106 #define SII902X_TPI_I2S_STRM_HDR_SIZE 5 107 108 #define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26 109 #define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0) 110 #define SII902X_TPI_AUDIO_CODING_PCM (1 << 0) 111 #define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0) 112 #define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0) 113 #define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0) 114 #define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0) 115 #define SII902X_TPI_AUDIO_CODING_AAC (6 << 0) 116 #define SII902X_TPI_AUDIO_CODING_DTS (7 << 0) 117 #define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0) 118 #define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4) 119 #define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4) 120 #define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5) 121 #define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5) 122 #define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6) 123 #define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6) 124 #define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6) 125 126 #define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27 127 #define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3) 128 #define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3) 129 #define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3) 130 #define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3) 131 #define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3) 132 #define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3) 133 #define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3) 134 #define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3) 135 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6) 136 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6) 137 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6) 138 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6) 139 140 #define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28 141 142 #define SII902X_INT_ENABLE 0x3c 143 #define SII902X_INT_STATUS 0x3d 144 #define SII902X_HOTPLUG_EVENT BIT(0) 145 #define SII902X_PLUGGED_STATUS BIT(2) 146 147 #define SII902X_REG_TPI_RQB 0xc7 148 149 /* Indirect internal register access */ 150 #define SII902X_IND_SET_PAGE 0xbc 151 #define SII902X_IND_OFFSET 0xbd 152 #define SII902X_IND_VALUE 0xbe 153 154 #define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf 155 #define SII902X_TPI_MISC_INFOFRAME_END 0xde 156 #define SII902X_TPI_MISC_INFOFRAME_SIZE \ 157 (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE) 158 159 #define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500 160 161 struct sii902x { 162 struct i2c_client *i2c; 163 struct regmap *regmap; 164 struct drm_bridge bridge; 165 struct drm_connector connector; 166 struct gpio_desc *reset_gpio; 167 struct i2c_mux_core *i2cmux; 168 /* 169 * Mutex protects audio and video functions from interfering 170 * each other, by keeping their i2c command sequences atomic. 171 */ 172 struct mutex mutex; 173 struct sii902x_audio { 174 struct platform_device *pdev; 175 struct clk *mclk; 176 u32 i2s_fifo_sequence[4]; 177 } audio; 178 }; 179 180 static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val) 181 { 182 union i2c_smbus_data data; 183 int ret; 184 185 ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags, 186 I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data); 187 188 if (ret < 0) 189 return ret; 190 191 *val = data.byte; 192 return 0; 193 } 194 195 static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val) 196 { 197 union i2c_smbus_data data; 198 199 data.byte = val; 200 201 return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags, 202 I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA, 203 &data); 204 } 205 206 static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask, 207 u8 val) 208 { 209 int ret; 210 u8 status; 211 212 ret = sii902x_read_unlocked(i2c, reg, &status); 213 if (ret) 214 return ret; 215 status &= ~mask; 216 status |= val & mask; 217 return sii902x_write_unlocked(i2c, reg, status); 218 } 219 220 static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge) 221 { 222 return container_of(bridge, struct sii902x, bridge); 223 } 224 225 static inline struct sii902x *connector_to_sii902x(struct drm_connector *con) 226 { 227 return container_of(con, struct sii902x, connector); 228 } 229 230 static void sii902x_reset(struct sii902x *sii902x) 231 { 232 if (!sii902x->reset_gpio) 233 return; 234 235 gpiod_set_value(sii902x->reset_gpio, 1); 236 237 /* The datasheet says treset-min = 100us. Make it 150us to be sure. */ 238 usleep_range(150, 200); 239 240 gpiod_set_value(sii902x->reset_gpio, 0); 241 } 242 243 static enum drm_connector_status 244 sii902x_connector_detect(struct drm_connector *connector, bool force) 245 { 246 struct sii902x *sii902x = connector_to_sii902x(connector); 247 unsigned int status; 248 249 mutex_lock(&sii902x->mutex); 250 251 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status); 252 253 mutex_unlock(&sii902x->mutex); 254 255 return (status & SII902X_PLUGGED_STATUS) ? 256 connector_status_connected : connector_status_disconnected; 257 } 258 259 static const struct drm_connector_funcs sii902x_connector_funcs = { 260 .detect = sii902x_connector_detect, 261 .fill_modes = drm_helper_probe_single_connector_modes, 262 .destroy = drm_connector_cleanup, 263 .reset = drm_atomic_helper_connector_reset, 264 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 265 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 266 }; 267 268 static int sii902x_get_modes(struct drm_connector *connector) 269 { 270 struct sii902x *sii902x = connector_to_sii902x(connector); 271 u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24; 272 u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI; 273 struct edid *edid; 274 int num = 0, ret; 275 276 mutex_lock(&sii902x->mutex); 277 278 edid = drm_get_edid(connector, sii902x->i2cmux->adapter[0]); 279 drm_connector_update_edid_property(connector, edid); 280 if (edid) { 281 if (drm_detect_hdmi_monitor(edid)) 282 output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI; 283 284 num = drm_add_edid_modes(connector, edid); 285 kfree(edid); 286 } 287 288 ret = drm_display_info_set_bus_formats(&connector->display_info, 289 &bus_format, 1); 290 if (ret) 291 goto error_out; 292 293 ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, 294 SII902X_SYS_CTRL_OUTPUT_MODE, output_mode); 295 if (ret) 296 goto error_out; 297 298 ret = num; 299 300 error_out: 301 mutex_unlock(&sii902x->mutex); 302 303 return ret; 304 } 305 306 static enum drm_mode_status sii902x_mode_valid(struct drm_connector *connector, 307 struct drm_display_mode *mode) 308 { 309 /* TODO: check mode */ 310 311 return MODE_OK; 312 } 313 314 static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = { 315 .get_modes = sii902x_get_modes, 316 .mode_valid = sii902x_mode_valid, 317 }; 318 319 static void sii902x_bridge_disable(struct drm_bridge *bridge) 320 { 321 struct sii902x *sii902x = bridge_to_sii902x(bridge); 322 323 mutex_lock(&sii902x->mutex); 324 325 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, 326 SII902X_SYS_CTRL_PWR_DWN, 327 SII902X_SYS_CTRL_PWR_DWN); 328 329 mutex_unlock(&sii902x->mutex); 330 } 331 332 static void sii902x_bridge_enable(struct drm_bridge *bridge) 333 { 334 struct sii902x *sii902x = bridge_to_sii902x(bridge); 335 336 mutex_lock(&sii902x->mutex); 337 338 regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL, 339 SII902X_AVI_POWER_STATE_MSK, 340 SII902X_AVI_POWER_STATE_D(0)); 341 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, 342 SII902X_SYS_CTRL_PWR_DWN, 0); 343 344 mutex_unlock(&sii902x->mutex); 345 } 346 347 static void sii902x_bridge_mode_set(struct drm_bridge *bridge, 348 const struct drm_display_mode *mode, 349 const struct drm_display_mode *adj) 350 { 351 struct sii902x *sii902x = bridge_to_sii902x(bridge); 352 struct regmap *regmap = sii902x->regmap; 353 u8 buf[HDMI_INFOFRAME_SIZE(AVI)]; 354 struct hdmi_avi_infoframe frame; 355 u16 pixel_clock_10kHz = adj->clock / 10; 356 int ret; 357 358 buf[0] = pixel_clock_10kHz & 0xff; 359 buf[1] = pixel_clock_10kHz >> 8; 360 buf[2] = adj->vrefresh; 361 buf[3] = 0x00; 362 buf[4] = adj->hdisplay; 363 buf[5] = adj->hdisplay >> 8; 364 buf[6] = adj->vdisplay; 365 buf[7] = adj->vdisplay >> 8; 366 buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE | 367 SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT; 368 buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO | 369 SII902X_TPI_AVI_INPUT_COLORSPACE_RGB; 370 371 mutex_lock(&sii902x->mutex); 372 373 ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10); 374 if (ret) 375 goto out; 376 377 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame, 378 &sii902x->connector, adj); 379 if (ret < 0) { 380 DRM_ERROR("couldn't fill AVI infoframe\n"); 381 goto out; 382 } 383 384 ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf)); 385 if (ret < 0) { 386 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret); 387 goto out; 388 } 389 390 /* Do not send the infoframe header, but keep the CRC field. */ 391 regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME, 392 buf + HDMI_INFOFRAME_HEADER_SIZE - 1, 393 HDMI_AVI_INFOFRAME_SIZE + 1); 394 395 out: 396 mutex_unlock(&sii902x->mutex); 397 } 398 399 static int sii902x_bridge_attach(struct drm_bridge *bridge) 400 { 401 struct sii902x *sii902x = bridge_to_sii902x(bridge); 402 struct drm_device *drm = bridge->dev; 403 int ret; 404 405 drm_connector_helper_add(&sii902x->connector, 406 &sii902x_connector_helper_funcs); 407 408 if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) { 409 dev_err(&sii902x->i2c->dev, 410 "sii902x driver is only compatible with DRM devices supporting atomic updates\n"); 411 return -ENOTSUPP; 412 } 413 414 ret = drm_connector_init(drm, &sii902x->connector, 415 &sii902x_connector_funcs, 416 DRM_MODE_CONNECTOR_HDMIA); 417 if (ret) 418 return ret; 419 420 if (sii902x->i2c->irq > 0) 421 sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD; 422 else 423 sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT; 424 425 drm_connector_attach_encoder(&sii902x->connector, bridge->encoder); 426 427 return 0; 428 } 429 430 static const struct drm_bridge_funcs sii902x_bridge_funcs = { 431 .attach = sii902x_bridge_attach, 432 .mode_set = sii902x_bridge_mode_set, 433 .disable = sii902x_bridge_disable, 434 .enable = sii902x_bridge_enable, 435 }; 436 437 static int sii902x_mute(struct sii902x *sii902x, bool mute) 438 { 439 struct device *dev = &sii902x->i2c->dev; 440 unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE : 441 SII902X_TPI_AUDIO_MUTE_DISABLE; 442 443 dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted"); 444 445 return regmap_update_bits(sii902x->regmap, 446 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, 447 SII902X_TPI_AUDIO_MUTE_ENABLE, val); 448 } 449 450 static const int sii902x_mclk_div_table[] = { 451 128, 256, 384, 512, 768, 1024, 1152, 192 }; 452 453 static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate, 454 unsigned int mclk) 455 { 456 int div = mclk / rate; 457 int distance = 100000; 458 u8 i, nearest = 0; 459 460 for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) { 461 unsigned int d = abs(div - sii902x_mclk_div_table[i]); 462 463 if (d >= distance) 464 continue; 465 466 nearest = i; 467 distance = d; 468 if (d == 0) 469 break; 470 } 471 472 *i2s_config_reg |= nearest << 4; 473 474 return sii902x_mclk_div_table[nearest]; 475 } 476 477 static const struct sii902x_sample_freq { 478 u32 freq; 479 u8 val; 480 } sii902x_sample_freq[] = { 481 { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ }, 482 { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ }, 483 { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ }, 484 { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ }, 485 { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ }, 486 { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ }, 487 { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ }, 488 }; 489 490 static int sii902x_audio_hw_params(struct device *dev, void *data, 491 struct hdmi_codec_daifmt *daifmt, 492 struct hdmi_codec_params *params) 493 { 494 struct sii902x *sii902x = dev_get_drvdata(dev); 495 u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST; 496 u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S | 497 SII902X_TPI_AUDIO_MUTE_ENABLE | 498 SII902X_TPI_AUDIO_CODING_PCM); 499 u8 config_byte3_reg = 0; 500 u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)]; 501 unsigned long mclk_rate; 502 int i, ret; 503 504 if (daifmt->bit_clk_master || daifmt->frame_clk_master) { 505 dev_dbg(dev, "%s: I2S master mode not supported\n", __func__); 506 return -EINVAL; 507 } 508 509 switch (daifmt->fmt) { 510 case HDMI_I2S: 511 i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES | 512 SII902X_TPI_I2S_SD_JUSTIFY_LEFT; 513 break; 514 case HDMI_RIGHT_J: 515 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT; 516 break; 517 case HDMI_LEFT_J: 518 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT; 519 break; 520 default: 521 dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__, 522 daifmt->fmt); 523 return -EINVAL; 524 } 525 526 if (daifmt->bit_clk_inv) 527 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING; 528 else 529 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING; 530 531 if (daifmt->frame_clk_inv) 532 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW; 533 else 534 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH; 535 536 if (params->channels > 2) 537 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS; 538 else 539 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS; 540 541 switch (params->sample_width) { 542 case 16: 543 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16; 544 break; 545 case 20: 546 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20; 547 break; 548 case 24: 549 case 32: 550 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24; 551 break; 552 default: 553 dev_err(dev, "%s: Unsupported sample width %u\n", __func__, 554 params->sample_width); 555 return -EINVAL; 556 } 557 558 for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) { 559 if (params->sample_rate == sii902x_sample_freq[i].freq) { 560 config_byte3_reg |= sii902x_sample_freq[i].val; 561 break; 562 } 563 } 564 565 ret = clk_prepare_enable(sii902x->audio.mclk); 566 if (ret) { 567 dev_err(dev, "Enabling mclk failed: %d\n", ret); 568 return ret; 569 } 570 571 mclk_rate = clk_get_rate(sii902x->audio.mclk); 572 573 ret = sii902x_select_mclk_div(&i2s_config_reg, params->sample_rate, 574 mclk_rate); 575 if (mclk_rate != ret * params->sample_rate) 576 dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n", 577 mclk_rate, ret, params->sample_rate); 578 579 mutex_lock(&sii902x->mutex); 580 581 ret = regmap_write(sii902x->regmap, 582 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, 583 config_byte2_reg); 584 if (ret < 0) 585 goto out; 586 587 ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG, 588 i2s_config_reg); 589 if (ret) 590 goto out; 591 592 for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) && 593 sii902x->audio.i2s_fifo_sequence[i]; i++) 594 regmap_write(sii902x->regmap, 595 SII902X_TPI_I2S_ENABLE_MAPPING_REG, 596 sii902x->audio.i2s_fifo_sequence[i]); 597 598 ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG, 599 config_byte3_reg); 600 if (ret) 601 goto out; 602 603 ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE, 604 params->iec.status, 605 min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE, 606 sizeof(params->iec.status))); 607 if (ret) 608 goto out; 609 610 ret = hdmi_audio_infoframe_pack(¶ms->cea, infoframe_buf, 611 sizeof(infoframe_buf)); 612 if (ret < 0) { 613 dev_err(dev, "%s: Failed to pack audio infoframe: %d\n", 614 __func__, ret); 615 goto out; 616 } 617 618 ret = regmap_bulk_write(sii902x->regmap, 619 SII902X_TPI_MISC_INFOFRAME_BASE, 620 infoframe_buf, 621 min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE)); 622 if (ret) 623 goto out; 624 625 /* Decode Level 0 Packets */ 626 ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02); 627 if (ret) 628 goto out; 629 630 ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24); 631 if (ret) 632 goto out; 633 634 ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02); 635 if (ret) 636 goto out; 637 638 dev_dbg(dev, "%s: hdmi audio enabled\n", __func__); 639 out: 640 mutex_unlock(&sii902x->mutex); 641 642 if (ret) { 643 clk_disable_unprepare(sii902x->audio.mclk); 644 dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__, 645 ret); 646 } 647 648 return ret; 649 } 650 651 static void sii902x_audio_shutdown(struct device *dev, void *data) 652 { 653 struct sii902x *sii902x = dev_get_drvdata(dev); 654 655 mutex_lock(&sii902x->mutex); 656 657 regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, 658 SII902X_TPI_AUDIO_INTERFACE_DISABLE); 659 660 mutex_unlock(&sii902x->mutex); 661 662 clk_disable_unprepare(sii902x->audio.mclk); 663 } 664 665 int sii902x_audio_digital_mute(struct device *dev, void *data, bool enable) 666 { 667 struct sii902x *sii902x = dev_get_drvdata(dev); 668 669 mutex_lock(&sii902x->mutex); 670 671 sii902x_mute(sii902x, enable); 672 673 mutex_unlock(&sii902x->mutex); 674 675 return 0; 676 } 677 678 static int sii902x_audio_get_eld(struct device *dev, void *data, 679 uint8_t *buf, size_t len) 680 { 681 struct sii902x *sii902x = dev_get_drvdata(dev); 682 683 mutex_lock(&sii902x->mutex); 684 685 memcpy(buf, sii902x->connector.eld, 686 min(sizeof(sii902x->connector.eld), len)); 687 688 mutex_unlock(&sii902x->mutex); 689 690 return 0; 691 } 692 693 static const struct hdmi_codec_ops sii902x_audio_codec_ops = { 694 .hw_params = sii902x_audio_hw_params, 695 .audio_shutdown = sii902x_audio_shutdown, 696 .digital_mute = sii902x_audio_digital_mute, 697 .get_eld = sii902x_audio_get_eld, 698 }; 699 700 static int sii902x_audio_codec_init(struct sii902x *sii902x, 701 struct device *dev) 702 { 703 static const u8 audio_fifo_id[] = { 704 SII902X_TPI_I2S_CONFIG_FIFO0, 705 SII902X_TPI_I2S_CONFIG_FIFO1, 706 SII902X_TPI_I2S_CONFIG_FIFO2, 707 SII902X_TPI_I2S_CONFIG_FIFO3, 708 }; 709 static const u8 i2s_lane_id[] = { 710 SII902X_TPI_I2S_SELECT_SD0, 711 SII902X_TPI_I2S_SELECT_SD1, 712 SII902X_TPI_I2S_SELECT_SD2, 713 SII902X_TPI_I2S_SELECT_SD3, 714 }; 715 struct hdmi_codec_pdata codec_data = { 716 .ops = &sii902x_audio_codec_ops, 717 .i2s = 1, /* Only i2s support for now. */ 718 .spdif = 0, 719 .max_i2s_channels = 0, 720 }; 721 u8 lanes[4]; 722 int num_lanes, i; 723 724 if (!of_property_read_bool(dev->of_node, "#sound-dai-cells")) { 725 dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n", 726 __func__); 727 return 0; 728 } 729 730 num_lanes = of_property_read_variable_u8_array(dev->of_node, 731 "sil,i2s-data-lanes", 732 lanes, 1, 733 ARRAY_SIZE(lanes)); 734 735 if (num_lanes == -EINVAL) { 736 dev_dbg(dev, 737 "%s: No \"sil,i2s-data-lanes\", use default <0>\n", 738 __func__); 739 num_lanes = 1; 740 lanes[0] = 0; 741 } else if (num_lanes < 0) { 742 dev_err(dev, 743 "%s: Error gettin \"sil,i2s-data-lanes\": %d\n", 744 __func__, num_lanes); 745 return num_lanes; 746 } 747 codec_data.max_i2s_channels = 2 * num_lanes; 748 749 for (i = 0; i < num_lanes; i++) 750 sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] | 751 i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE; 752 753 if (IS_ERR(sii902x->audio.mclk)) { 754 dev_err(dev, "%s: No clock (audio mclk) found: %ld\n", 755 __func__, PTR_ERR(sii902x->audio.mclk)); 756 return 0; 757 } 758 759 sii902x->audio.pdev = platform_device_register_data( 760 dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO, 761 &codec_data, sizeof(codec_data)); 762 763 return PTR_ERR_OR_ZERO(sii902x->audio.pdev); 764 } 765 766 static const struct regmap_range sii902x_volatile_ranges[] = { 767 { .range_min = 0, .range_max = 0xff }, 768 }; 769 770 static const struct regmap_access_table sii902x_volatile_table = { 771 .yes_ranges = sii902x_volatile_ranges, 772 .n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges), 773 }; 774 775 static const struct regmap_config sii902x_regmap_config = { 776 .reg_bits = 8, 777 .val_bits = 8, 778 .disable_locking = true, /* struct sii902x mutex should be enough */ 779 .max_register = SII902X_TPI_MISC_INFOFRAME_END, 780 .volatile_table = &sii902x_volatile_table, 781 .cache_type = REGCACHE_NONE, 782 }; 783 784 static irqreturn_t sii902x_interrupt(int irq, void *data) 785 { 786 struct sii902x *sii902x = data; 787 unsigned int status = 0; 788 789 mutex_lock(&sii902x->mutex); 790 791 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status); 792 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status); 793 794 mutex_unlock(&sii902x->mutex); 795 796 if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev) 797 drm_helper_hpd_irq_event(sii902x->bridge.dev); 798 799 return IRQ_HANDLED; 800 } 801 802 /* 803 * The purpose of sii902x_i2c_bypass_select is to enable the pass through 804 * mode of the HDMI transmitter. Do not use regmap from within this function, 805 * only use sii902x_*_unlocked functions to read/modify/write registers. 806 * We are holding the parent adapter lock here, keep this in mind before 807 * adding more i2c transactions. 808 * 809 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere 810 * in this driver, we need to make sure that we only touch 0x1A[2:1] from 811 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that 812 * we leave the remaining bits as we have found them. 813 */ 814 static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id) 815 { 816 struct sii902x *sii902x = i2c_mux_priv(mux); 817 struct device *dev = &sii902x->i2c->dev; 818 unsigned long timeout; 819 u8 status; 820 int ret; 821 822 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 823 SII902X_SYS_CTRL_DDC_BUS_REQ, 824 SII902X_SYS_CTRL_DDC_BUS_REQ); 825 if (ret) 826 return ret; 827 828 timeout = jiffies + 829 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS); 830 do { 831 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 832 &status); 833 if (ret) 834 return ret; 835 } while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) && 836 time_before(jiffies, timeout)); 837 838 if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) { 839 dev_err(dev, "Failed to acquire the i2c bus\n"); 840 return -ETIMEDOUT; 841 } 842 843 return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 844 status); 845 } 846 847 /* 848 * The purpose of sii902x_i2c_bypass_deselect is to disable the pass through 849 * mode of the HDMI transmitter. Do not use regmap from within this function, 850 * only use sii902x_*_unlocked functions to read/modify/write registers. 851 * We are holding the parent adapter lock here, keep this in mind before 852 * adding more i2c transactions. 853 * 854 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere 855 * in this driver, we need to make sure that we only touch 0x1A[2:1] from 856 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that 857 * we leave the remaining bits as we have found them. 858 */ 859 static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id) 860 { 861 struct sii902x *sii902x = i2c_mux_priv(mux); 862 struct device *dev = &sii902x->i2c->dev; 863 unsigned long timeout; 864 unsigned int retries; 865 u8 status; 866 int ret; 867 868 /* 869 * When the HDMI transmitter is in pass through mode, we need an 870 * (undocumented) additional delay between STOP and START conditions 871 * to guarantee the bus won't get stuck. 872 */ 873 udelay(30); 874 875 /* 876 * Sometimes the I2C bus can stall after failure to use the 877 * EDID channel. Retry a few times to see if things clear 878 * up, else continue anyway. 879 */ 880 retries = 5; 881 do { 882 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 883 &status); 884 retries--; 885 } while (ret && retries); 886 if (ret) { 887 dev_err(dev, "failed to read status (%d)\n", ret); 888 return ret; 889 } 890 891 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 892 SII902X_SYS_CTRL_DDC_BUS_REQ | 893 SII902X_SYS_CTRL_DDC_BUS_GRTD, 0); 894 if (ret) 895 return ret; 896 897 timeout = jiffies + 898 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS); 899 do { 900 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 901 &status); 902 if (ret) 903 return ret; 904 } while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ | 905 SII902X_SYS_CTRL_DDC_BUS_GRTD) && 906 time_before(jiffies, timeout)); 907 908 if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ | 909 SII902X_SYS_CTRL_DDC_BUS_GRTD)) { 910 dev_err(dev, "failed to release the i2c bus\n"); 911 return -ETIMEDOUT; 912 } 913 914 return 0; 915 } 916 917 static const struct drm_bridge_timings default_sii902x_timings = { 918 .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE 919 | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE 920 | DRM_BUS_FLAG_DE_HIGH, 921 }; 922 923 static int sii902x_probe(struct i2c_client *client, 924 const struct i2c_device_id *id) 925 { 926 struct device *dev = &client->dev; 927 unsigned int status = 0; 928 struct sii902x *sii902x; 929 u8 chipid[4]; 930 int ret; 931 932 ret = i2c_check_functionality(client->adapter, 933 I2C_FUNC_SMBUS_BYTE_DATA); 934 if (!ret) { 935 dev_err(dev, "I2C adapter not suitable\n"); 936 return -EIO; 937 } 938 939 sii902x = devm_kzalloc(dev, sizeof(*sii902x), GFP_KERNEL); 940 if (!sii902x) 941 return -ENOMEM; 942 943 sii902x->i2c = client; 944 sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config); 945 if (IS_ERR(sii902x->regmap)) 946 return PTR_ERR(sii902x->regmap); 947 948 sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset", 949 GPIOD_OUT_LOW); 950 if (IS_ERR(sii902x->reset_gpio)) { 951 dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n", 952 PTR_ERR(sii902x->reset_gpio)); 953 return PTR_ERR(sii902x->reset_gpio); 954 } 955 956 mutex_init(&sii902x->mutex); 957 958 sii902x_reset(sii902x); 959 960 ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0); 961 if (ret) 962 return ret; 963 964 ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0), 965 &chipid, 4); 966 if (ret) { 967 dev_err(dev, "regmap_read failed %d\n", ret); 968 return ret; 969 } 970 971 if (chipid[0] != 0xb0) { 972 dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n", 973 chipid[0]); 974 return -EINVAL; 975 } 976 977 /* Clear all pending interrupts */ 978 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status); 979 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status); 980 981 if (client->irq > 0) { 982 regmap_write(sii902x->regmap, SII902X_INT_ENABLE, 983 SII902X_HOTPLUG_EVENT); 984 985 ret = devm_request_threaded_irq(dev, client->irq, NULL, 986 sii902x_interrupt, 987 IRQF_ONESHOT, dev_name(dev), 988 sii902x); 989 if (ret) 990 return ret; 991 } 992 993 sii902x->bridge.funcs = &sii902x_bridge_funcs; 994 sii902x->bridge.of_node = dev->of_node; 995 sii902x->bridge.timings = &default_sii902x_timings; 996 drm_bridge_add(&sii902x->bridge); 997 998 sii902x_audio_codec_init(sii902x, dev); 999 1000 i2c_set_clientdata(client, sii902x); 1001 1002 sii902x->i2cmux = i2c_mux_alloc(client->adapter, dev, 1003 1, 0, I2C_MUX_GATE, 1004 sii902x_i2c_bypass_select, 1005 sii902x_i2c_bypass_deselect); 1006 if (!sii902x->i2cmux) 1007 return -ENOMEM; 1008 1009 sii902x->i2cmux->priv = sii902x; 1010 return i2c_mux_add_adapter(sii902x->i2cmux, 0, 0, 0); 1011 } 1012 1013 static int sii902x_remove(struct i2c_client *client) 1014 1015 { 1016 struct sii902x *sii902x = i2c_get_clientdata(client); 1017 1018 i2c_mux_del_adapters(sii902x->i2cmux); 1019 drm_bridge_remove(&sii902x->bridge); 1020 1021 return 0; 1022 } 1023 1024 static const struct of_device_id sii902x_dt_ids[] = { 1025 { .compatible = "sil,sii9022", }, 1026 { } 1027 }; 1028 MODULE_DEVICE_TABLE(of, sii902x_dt_ids); 1029 1030 static const struct i2c_device_id sii902x_i2c_ids[] = { 1031 { "sii9022", 0 }, 1032 { }, 1033 }; 1034 MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids); 1035 1036 static struct i2c_driver sii902x_driver = { 1037 .probe = sii902x_probe, 1038 .remove = sii902x_remove, 1039 .driver = { 1040 .name = "sii902x", 1041 .of_match_table = sii902x_dt_ids, 1042 }, 1043 .id_table = sii902x_i2c_ids, 1044 }; 1045 module_i2c_driver(sii902x_driver); 1046 1047 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>"); 1048 MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges"); 1049 MODULE_LICENSE("GPL"); 1050