xref: /openbmc/linux/drivers/gpu/drm/bridge/sii902x.c (revision 5a158981)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2018 Renesas Electronics
4  *
5  * Copyright (C) 2016 Atmel
6  *		      Bo Shen <voice.shen@atmel.com>
7  *
8  * Authors:	      Bo Shen <voice.shen@atmel.com>
9  *		      Boris Brezillon <boris.brezillon@free-electrons.com>
10  *		      Wu, Songjun <Songjun.Wu@atmel.com>
11  *
12  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
13  */
14 
15 #include <linux/gpio/consumer.h>
16 #include <linux/i2c-mux.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/regmap.h>
20 #include <linux/clk.h>
21 
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_bridge.h>
24 #include <drm/drm_drv.h>
25 #include <drm/drm_edid.h>
26 #include <drm/drm_print.h>
27 #include <drm/drm_probe_helper.h>
28 
29 #include <sound/hdmi-codec.h>
30 
31 #define SII902X_TPI_VIDEO_DATA			0x0
32 
33 #define SII902X_TPI_PIXEL_REPETITION		0x8
34 #define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT     BIT(5)
35 #define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE   BIT(4)
36 #define SII902X_TPI_AVI_PIXEL_REP_4X		3
37 #define SII902X_TPI_AVI_PIXEL_REP_2X		1
38 #define SII902X_TPI_AVI_PIXEL_REP_NONE		0
39 #define SII902X_TPI_CLK_RATIO_HALF		(0 << 6)
40 #define SII902X_TPI_CLK_RATIO_1X		(1 << 6)
41 #define SII902X_TPI_CLK_RATIO_2X		(2 << 6)
42 #define SII902X_TPI_CLK_RATIO_4X		(3 << 6)
43 
44 #define SII902X_TPI_AVI_IN_FORMAT		0x9
45 #define SII902X_TPI_AVI_INPUT_BITMODE_12BIT	BIT(7)
46 #define SII902X_TPI_AVI_INPUT_DITHER		BIT(6)
47 #define SII902X_TPI_AVI_INPUT_RANGE_LIMITED	(2 << 2)
48 #define SII902X_TPI_AVI_INPUT_RANGE_FULL	(1 << 2)
49 #define SII902X_TPI_AVI_INPUT_RANGE_AUTO	(0 << 2)
50 #define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK	(3 << 0)
51 #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422	(2 << 0)
52 #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444	(1 << 0)
53 #define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB	(0 << 0)
54 
55 #define SII902X_TPI_AVI_INFOFRAME		0x0c
56 
57 #define SII902X_SYS_CTRL_DATA			0x1a
58 #define SII902X_SYS_CTRL_PWR_DWN		BIT(4)
59 #define SII902X_SYS_CTRL_AV_MUTE		BIT(3)
60 #define SII902X_SYS_CTRL_DDC_BUS_REQ		BIT(2)
61 #define SII902X_SYS_CTRL_DDC_BUS_GRTD		BIT(1)
62 #define SII902X_SYS_CTRL_OUTPUT_MODE		BIT(0)
63 #define SII902X_SYS_CTRL_OUTPUT_HDMI		1
64 #define SII902X_SYS_CTRL_OUTPUT_DVI		0
65 
66 #define SII902X_REG_CHIPID(n)			(0x1b + (n))
67 
68 #define SII902X_PWR_STATE_CTRL			0x1e
69 #define SII902X_AVI_POWER_STATE_MSK		GENMASK(1, 0)
70 #define SII902X_AVI_POWER_STATE_D(l)		((l) & SII902X_AVI_POWER_STATE_MSK)
71 
72 /* Audio  */
73 #define SII902X_TPI_I2S_ENABLE_MAPPING_REG	0x1f
74 #define SII902X_TPI_I2S_CONFIG_FIFO0			(0 << 0)
75 #define SII902X_TPI_I2S_CONFIG_FIFO1			(1 << 0)
76 #define SII902X_TPI_I2S_CONFIG_FIFO2			(2 << 0)
77 #define SII902X_TPI_I2S_CONFIG_FIFO3			(3 << 0)
78 #define SII902X_TPI_I2S_LEFT_RIGHT_SWAP			(1 << 2)
79 #define SII902X_TPI_I2S_AUTO_DOWNSAMPLE			(1 << 3)
80 #define SII902X_TPI_I2S_SELECT_SD0			(0 << 4)
81 #define SII902X_TPI_I2S_SELECT_SD1			(1 << 4)
82 #define SII902X_TPI_I2S_SELECT_SD2			(2 << 4)
83 #define SII902X_TPI_I2S_SELECT_SD3			(3 << 4)
84 #define SII902X_TPI_I2S_FIFO_ENABLE			(1 << 7)
85 
86 #define SII902X_TPI_I2S_INPUT_CONFIG_REG	0x20
87 #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES		(0 << 0)
88 #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO		(1 << 0)
89 #define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST		(0 << 1)
90 #define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST		(1 << 1)
91 #define SII902X_TPI_I2S_SD_JUSTIFY_LEFT			(0 << 2)
92 #define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT		(1 << 2)
93 #define SII902X_TPI_I2S_WS_POLARITY_LOW			(0 << 3)
94 #define SII902X_TPI_I2S_WS_POLARITY_HIGH		(1 << 3)
95 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_128		(0 << 4)
96 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_256		(1 << 4)
97 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_384		(2 << 4)
98 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_512		(3 << 4)
99 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_768		(4 << 4)
100 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024		(5 << 4)
101 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152		(6 << 4)
102 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_192		(7 << 4)
103 #define SII902X_TPI_I2S_SCK_EDGE_FALLING		(0 << 7)
104 #define SII902X_TPI_I2S_SCK_EDGE_RISING			(1 << 7)
105 
106 #define SII902X_TPI_I2S_STRM_HDR_BASE	0x21
107 #define SII902X_TPI_I2S_STRM_HDR_SIZE	5
108 
109 #define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG	0x26
110 #define SII902X_TPI_AUDIO_CODING_STREAM_HEADER		(0 << 0)
111 #define SII902X_TPI_AUDIO_CODING_PCM			(1 << 0)
112 #define SII902X_TPI_AUDIO_CODING_AC3			(2 << 0)
113 #define SII902X_TPI_AUDIO_CODING_MPEG1			(3 << 0)
114 #define SII902X_TPI_AUDIO_CODING_MP3			(4 << 0)
115 #define SII902X_TPI_AUDIO_CODING_MPEG2			(5 << 0)
116 #define SII902X_TPI_AUDIO_CODING_AAC			(6 << 0)
117 #define SII902X_TPI_AUDIO_CODING_DTS			(7 << 0)
118 #define SII902X_TPI_AUDIO_CODING_ATRAC			(8 << 0)
119 #define SII902X_TPI_AUDIO_MUTE_DISABLE			(0 << 4)
120 #define SII902X_TPI_AUDIO_MUTE_ENABLE			(1 << 4)
121 #define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS		(0 << 5)
122 #define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS		(1 << 5)
123 #define SII902X_TPI_AUDIO_INTERFACE_DISABLE		(0 << 6)
124 #define SII902X_TPI_AUDIO_INTERFACE_SPDIF		(1 << 6)
125 #define SII902X_TPI_AUDIO_INTERFACE_I2S			(2 << 6)
126 
127 #define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG	0x27
128 #define SII902X_TPI_AUDIO_FREQ_STREAM			(0 << 3)
129 #define SII902X_TPI_AUDIO_FREQ_32KHZ			(1 << 3)
130 #define SII902X_TPI_AUDIO_FREQ_44KHZ			(2 << 3)
131 #define SII902X_TPI_AUDIO_FREQ_48KHZ			(3 << 3)
132 #define SII902X_TPI_AUDIO_FREQ_88KHZ			(4 << 3)
133 #define SII902X_TPI_AUDIO_FREQ_96KHZ			(5 << 3)
134 #define SII902X_TPI_AUDIO_FREQ_176KHZ			(6 << 3)
135 #define SII902X_TPI_AUDIO_FREQ_192KHZ			(7 << 3)
136 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM		(0 << 6)
137 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_16		(1 << 6)
138 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_20		(2 << 6)
139 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_24		(3 << 6)
140 
141 #define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG	0x28
142 
143 #define SII902X_INT_ENABLE			0x3c
144 #define SII902X_INT_STATUS			0x3d
145 #define SII902X_HOTPLUG_EVENT			BIT(0)
146 #define SII902X_PLUGGED_STATUS			BIT(2)
147 
148 #define SII902X_REG_TPI_RQB			0xc7
149 
150 /* Indirect internal register access */
151 #define SII902X_IND_SET_PAGE			0xbc
152 #define SII902X_IND_OFFSET			0xbd
153 #define SII902X_IND_VALUE			0xbe
154 
155 #define SII902X_TPI_MISC_INFOFRAME_BASE		0xbf
156 #define SII902X_TPI_MISC_INFOFRAME_END		0xde
157 #define SII902X_TPI_MISC_INFOFRAME_SIZE	\
158 	(SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE)
159 
160 #define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS	500
161 
162 #define SII902X_AUDIO_PORT_INDEX		3
163 
164 struct sii902x {
165 	struct i2c_client *i2c;
166 	struct regmap *regmap;
167 	struct drm_bridge bridge;
168 	struct drm_connector connector;
169 	struct gpio_desc *reset_gpio;
170 	struct i2c_mux_core *i2cmux;
171 	/*
172 	 * Mutex protects audio and video functions from interfering
173 	 * each other, by keeping their i2c command sequences atomic.
174 	 */
175 	struct mutex mutex;
176 	struct sii902x_audio {
177 		struct platform_device *pdev;
178 		struct clk *mclk;
179 		u32 i2s_fifo_sequence[4];
180 	} audio;
181 };
182 
183 static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val)
184 {
185 	union i2c_smbus_data data;
186 	int ret;
187 
188 	ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
189 			       I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data);
190 
191 	if (ret < 0)
192 		return ret;
193 
194 	*val = data.byte;
195 	return 0;
196 }
197 
198 static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val)
199 {
200 	union i2c_smbus_data data;
201 
202 	data.byte = val;
203 
204 	return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
205 				I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA,
206 				&data);
207 }
208 
209 static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask,
210 					u8 val)
211 {
212 	int ret;
213 	u8 status;
214 
215 	ret = sii902x_read_unlocked(i2c, reg, &status);
216 	if (ret)
217 		return ret;
218 	status &= ~mask;
219 	status |= val & mask;
220 	return sii902x_write_unlocked(i2c, reg, status);
221 }
222 
223 static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge)
224 {
225 	return container_of(bridge, struct sii902x, bridge);
226 }
227 
228 static inline struct sii902x *connector_to_sii902x(struct drm_connector *con)
229 {
230 	return container_of(con, struct sii902x, connector);
231 }
232 
233 static void sii902x_reset(struct sii902x *sii902x)
234 {
235 	if (!sii902x->reset_gpio)
236 		return;
237 
238 	gpiod_set_value(sii902x->reset_gpio, 1);
239 
240 	/* The datasheet says treset-min = 100us. Make it 150us to be sure. */
241 	usleep_range(150, 200);
242 
243 	gpiod_set_value(sii902x->reset_gpio, 0);
244 }
245 
246 static enum drm_connector_status
247 sii902x_connector_detect(struct drm_connector *connector, bool force)
248 {
249 	struct sii902x *sii902x = connector_to_sii902x(connector);
250 	unsigned int status;
251 
252 	mutex_lock(&sii902x->mutex);
253 
254 	regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
255 
256 	mutex_unlock(&sii902x->mutex);
257 
258 	return (status & SII902X_PLUGGED_STATUS) ?
259 	       connector_status_connected : connector_status_disconnected;
260 }
261 
262 static const struct drm_connector_funcs sii902x_connector_funcs = {
263 	.detect = sii902x_connector_detect,
264 	.fill_modes = drm_helper_probe_single_connector_modes,
265 	.destroy = drm_connector_cleanup,
266 	.reset = drm_atomic_helper_connector_reset,
267 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
268 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
269 };
270 
271 static int sii902x_get_modes(struct drm_connector *connector)
272 {
273 	struct sii902x *sii902x = connector_to_sii902x(connector);
274 	u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
275 	u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI;
276 	struct edid *edid;
277 	int num = 0, ret;
278 
279 	mutex_lock(&sii902x->mutex);
280 
281 	edid = drm_get_edid(connector, sii902x->i2cmux->adapter[0]);
282 	drm_connector_update_edid_property(connector, edid);
283 	if (edid) {
284 		if (drm_detect_hdmi_monitor(edid))
285 			output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI;
286 
287 		num = drm_add_edid_modes(connector, edid);
288 		kfree(edid);
289 	}
290 
291 	ret = drm_display_info_set_bus_formats(&connector->display_info,
292 					       &bus_format, 1);
293 	if (ret)
294 		goto error_out;
295 
296 	ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
297 				 SII902X_SYS_CTRL_OUTPUT_MODE, output_mode);
298 	if (ret)
299 		goto error_out;
300 
301 	ret = num;
302 
303 error_out:
304 	mutex_unlock(&sii902x->mutex);
305 
306 	return ret;
307 }
308 
309 static enum drm_mode_status sii902x_mode_valid(struct drm_connector *connector,
310 					       struct drm_display_mode *mode)
311 {
312 	/* TODO: check mode */
313 
314 	return MODE_OK;
315 }
316 
317 static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = {
318 	.get_modes = sii902x_get_modes,
319 	.mode_valid = sii902x_mode_valid,
320 };
321 
322 static void sii902x_bridge_disable(struct drm_bridge *bridge)
323 {
324 	struct sii902x *sii902x = bridge_to_sii902x(bridge);
325 
326 	mutex_lock(&sii902x->mutex);
327 
328 	regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
329 			   SII902X_SYS_CTRL_PWR_DWN,
330 			   SII902X_SYS_CTRL_PWR_DWN);
331 
332 	mutex_unlock(&sii902x->mutex);
333 }
334 
335 static void sii902x_bridge_enable(struct drm_bridge *bridge)
336 {
337 	struct sii902x *sii902x = bridge_to_sii902x(bridge);
338 
339 	mutex_lock(&sii902x->mutex);
340 
341 	regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL,
342 			   SII902X_AVI_POWER_STATE_MSK,
343 			   SII902X_AVI_POWER_STATE_D(0));
344 	regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
345 			   SII902X_SYS_CTRL_PWR_DWN, 0);
346 
347 	mutex_unlock(&sii902x->mutex);
348 }
349 
350 static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
351 				    const struct drm_display_mode *mode,
352 				    const struct drm_display_mode *adj)
353 {
354 	struct sii902x *sii902x = bridge_to_sii902x(bridge);
355 	struct regmap *regmap = sii902x->regmap;
356 	u8 buf[HDMI_INFOFRAME_SIZE(AVI)];
357 	struct hdmi_avi_infoframe frame;
358 	u16 pixel_clock_10kHz = adj->clock / 10;
359 	int ret;
360 
361 	buf[0] = pixel_clock_10kHz & 0xff;
362 	buf[1] = pixel_clock_10kHz >> 8;
363 	buf[2] = adj->vrefresh;
364 	buf[3] = 0x00;
365 	buf[4] = adj->hdisplay;
366 	buf[5] = adj->hdisplay >> 8;
367 	buf[6] = adj->vdisplay;
368 	buf[7] = adj->vdisplay >> 8;
369 	buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE |
370 		 SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT;
371 	buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO |
372 		 SII902X_TPI_AVI_INPUT_COLORSPACE_RGB;
373 
374 	mutex_lock(&sii902x->mutex);
375 
376 	ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10);
377 	if (ret)
378 		goto out;
379 
380 	ret = drm_hdmi_avi_infoframe_from_display_mode(&frame,
381 						       &sii902x->connector, adj);
382 	if (ret < 0) {
383 		DRM_ERROR("couldn't fill AVI infoframe\n");
384 		goto out;
385 	}
386 
387 	ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf));
388 	if (ret < 0) {
389 		DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
390 		goto out;
391 	}
392 
393 	/* Do not send the infoframe header, but keep the CRC field. */
394 	regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME,
395 			  buf + HDMI_INFOFRAME_HEADER_SIZE - 1,
396 			  HDMI_AVI_INFOFRAME_SIZE + 1);
397 
398 out:
399 	mutex_unlock(&sii902x->mutex);
400 }
401 
402 static int sii902x_bridge_attach(struct drm_bridge *bridge)
403 {
404 	struct sii902x *sii902x = bridge_to_sii902x(bridge);
405 	struct drm_device *drm = bridge->dev;
406 	int ret;
407 
408 	drm_connector_helper_add(&sii902x->connector,
409 				 &sii902x_connector_helper_funcs);
410 
411 	if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) {
412 		dev_err(&sii902x->i2c->dev,
413 			"sii902x driver is only compatible with DRM devices supporting atomic updates\n");
414 		return -ENOTSUPP;
415 	}
416 
417 	ret = drm_connector_init(drm, &sii902x->connector,
418 				 &sii902x_connector_funcs,
419 				 DRM_MODE_CONNECTOR_HDMIA);
420 	if (ret)
421 		return ret;
422 
423 	if (sii902x->i2c->irq > 0)
424 		sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD;
425 	else
426 		sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT;
427 
428 	drm_connector_attach_encoder(&sii902x->connector, bridge->encoder);
429 
430 	return 0;
431 }
432 
433 static const struct drm_bridge_funcs sii902x_bridge_funcs = {
434 	.attach = sii902x_bridge_attach,
435 	.mode_set = sii902x_bridge_mode_set,
436 	.disable = sii902x_bridge_disable,
437 	.enable = sii902x_bridge_enable,
438 };
439 
440 static int sii902x_mute(struct sii902x *sii902x, bool mute)
441 {
442 	struct device *dev = &sii902x->i2c->dev;
443 	unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE :
444 		SII902X_TPI_AUDIO_MUTE_DISABLE;
445 
446 	dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted");
447 
448 	return regmap_update_bits(sii902x->regmap,
449 				  SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
450 				  SII902X_TPI_AUDIO_MUTE_ENABLE, val);
451 }
452 
453 static const int sii902x_mclk_div_table[] = {
454 	128, 256, 384, 512, 768, 1024, 1152, 192 };
455 
456 static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate,
457 				   unsigned int mclk)
458 {
459 	int div = mclk / rate;
460 	int distance = 100000;
461 	u8 i, nearest = 0;
462 
463 	for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) {
464 		unsigned int d = abs(div - sii902x_mclk_div_table[i]);
465 
466 		if (d >= distance)
467 			continue;
468 
469 		nearest = i;
470 		distance = d;
471 		if (d == 0)
472 			break;
473 	}
474 
475 	*i2s_config_reg |= nearest << 4;
476 
477 	return sii902x_mclk_div_table[nearest];
478 }
479 
480 static const struct sii902x_sample_freq {
481 	u32 freq;
482 	u8 val;
483 } sii902x_sample_freq[] = {
484 	{ .freq = 32000,	.val = SII902X_TPI_AUDIO_FREQ_32KHZ },
485 	{ .freq = 44000,	.val = SII902X_TPI_AUDIO_FREQ_44KHZ },
486 	{ .freq = 48000,	.val = SII902X_TPI_AUDIO_FREQ_48KHZ },
487 	{ .freq = 88000,	.val = SII902X_TPI_AUDIO_FREQ_88KHZ },
488 	{ .freq = 96000,	.val = SII902X_TPI_AUDIO_FREQ_96KHZ },
489 	{ .freq = 176000,	.val = SII902X_TPI_AUDIO_FREQ_176KHZ },
490 	{ .freq = 192000,	.val = SII902X_TPI_AUDIO_FREQ_192KHZ },
491 };
492 
493 static int sii902x_audio_hw_params(struct device *dev, void *data,
494 				   struct hdmi_codec_daifmt *daifmt,
495 				   struct hdmi_codec_params *params)
496 {
497 	struct sii902x *sii902x = dev_get_drvdata(dev);
498 	u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST;
499 	u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S |
500 			       SII902X_TPI_AUDIO_MUTE_ENABLE |
501 			       SII902X_TPI_AUDIO_CODING_PCM);
502 	u8 config_byte3_reg = 0;
503 	u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)];
504 	unsigned long mclk_rate;
505 	int i, ret;
506 
507 	if (daifmt->bit_clk_master || daifmt->frame_clk_master) {
508 		dev_dbg(dev, "%s: I2S master mode not supported\n", __func__);
509 		return -EINVAL;
510 	}
511 
512 	switch (daifmt->fmt) {
513 	case HDMI_I2S:
514 		i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |
515 			SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
516 		break;
517 	case HDMI_RIGHT_J:
518 		i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;
519 		break;
520 	case HDMI_LEFT_J:
521 		i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
522 		break;
523 	default:
524 		dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__,
525 			daifmt->fmt);
526 		return -EINVAL;
527 	}
528 
529 	if (daifmt->bit_clk_inv)
530 		i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING;
531 	else
532 		i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING;
533 
534 	if (daifmt->frame_clk_inv)
535 		i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW;
536 	else
537 		i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH;
538 
539 	if (params->channels > 2)
540 		config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS;
541 	else
542 		config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS;
543 
544 	switch (params->sample_width) {
545 	case 16:
546 		config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16;
547 		break;
548 	case 20:
549 		config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20;
550 		break;
551 	case 24:
552 	case 32:
553 		config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24;
554 		break;
555 	default:
556 		dev_err(dev, "%s: Unsupported sample width %u\n", __func__,
557 			params->sample_width);
558 		return -EINVAL;
559 	}
560 
561 	for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) {
562 		if (params->sample_rate == sii902x_sample_freq[i].freq) {
563 			config_byte3_reg |= sii902x_sample_freq[i].val;
564 			break;
565 		}
566 	}
567 
568 	ret = clk_prepare_enable(sii902x->audio.mclk);
569 	if (ret) {
570 		dev_err(dev, "Enabling mclk failed: %d\n", ret);
571 		return ret;
572 	}
573 
574 	if (sii902x->audio.mclk) {
575 		mclk_rate = clk_get_rate(sii902x->audio.mclk);
576 		ret = sii902x_select_mclk_div(&i2s_config_reg,
577 					      params->sample_rate, mclk_rate);
578 		if (mclk_rate != ret * params->sample_rate)
579 			dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n",
580 				mclk_rate, ret, params->sample_rate);
581 	}
582 
583 	mutex_lock(&sii902x->mutex);
584 
585 	ret = regmap_write(sii902x->regmap,
586 			   SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
587 			   config_byte2_reg);
588 	if (ret < 0)
589 		goto out;
590 
591 	ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG,
592 			   i2s_config_reg);
593 	if (ret)
594 		goto out;
595 
596 	for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) &&
597 		    sii902x->audio.i2s_fifo_sequence[i]; i++)
598 		regmap_write(sii902x->regmap,
599 			     SII902X_TPI_I2S_ENABLE_MAPPING_REG,
600 			     sii902x->audio.i2s_fifo_sequence[i]);
601 
602 	ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG,
603 			   config_byte3_reg);
604 	if (ret)
605 		goto out;
606 
607 	ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE,
608 				params->iec.status,
609 				min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE,
610 				    sizeof(params->iec.status)));
611 	if (ret)
612 		goto out;
613 
614 	ret = hdmi_audio_infoframe_pack(&params->cea, infoframe_buf,
615 					sizeof(infoframe_buf));
616 	if (ret < 0) {
617 		dev_err(dev, "%s: Failed to pack audio infoframe: %d\n",
618 			__func__, ret);
619 		goto out;
620 	}
621 
622 	ret = regmap_bulk_write(sii902x->regmap,
623 				SII902X_TPI_MISC_INFOFRAME_BASE,
624 				infoframe_buf,
625 				min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE));
626 	if (ret)
627 		goto out;
628 
629 	/* Decode Level 0 Packets */
630 	ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02);
631 	if (ret)
632 		goto out;
633 
634 	ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24);
635 	if (ret)
636 		goto out;
637 
638 	ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02);
639 	if (ret)
640 		goto out;
641 
642 	dev_dbg(dev, "%s: hdmi audio enabled\n", __func__);
643 out:
644 	mutex_unlock(&sii902x->mutex);
645 
646 	if (ret) {
647 		clk_disable_unprepare(sii902x->audio.mclk);
648 		dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__,
649 			ret);
650 	}
651 
652 	return ret;
653 }
654 
655 static void sii902x_audio_shutdown(struct device *dev, void *data)
656 {
657 	struct sii902x *sii902x = dev_get_drvdata(dev);
658 
659 	mutex_lock(&sii902x->mutex);
660 
661 	regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
662 		     SII902X_TPI_AUDIO_INTERFACE_DISABLE);
663 
664 	mutex_unlock(&sii902x->mutex);
665 
666 	clk_disable_unprepare(sii902x->audio.mclk);
667 }
668 
669 static int sii902x_audio_digital_mute(struct device *dev,
670 				      void *data, bool enable)
671 {
672 	struct sii902x *sii902x = dev_get_drvdata(dev);
673 
674 	mutex_lock(&sii902x->mutex);
675 
676 	sii902x_mute(sii902x, enable);
677 
678 	mutex_unlock(&sii902x->mutex);
679 
680 	return 0;
681 }
682 
683 static int sii902x_audio_get_eld(struct device *dev, void *data,
684 				 uint8_t *buf, size_t len)
685 {
686 	struct sii902x *sii902x = dev_get_drvdata(dev);
687 
688 	mutex_lock(&sii902x->mutex);
689 
690 	memcpy(buf, sii902x->connector.eld,
691 	       min(sizeof(sii902x->connector.eld), len));
692 
693 	mutex_unlock(&sii902x->mutex);
694 
695 	return 0;
696 }
697 
698 static int sii902x_audio_get_dai_id(struct snd_soc_component *component,
699 				    struct device_node *endpoint)
700 {
701 	struct of_endpoint of_ep;
702 	int ret;
703 
704 	ret = of_graph_parse_endpoint(endpoint, &of_ep);
705 	if (ret < 0)
706 		return ret;
707 
708 	/*
709 	 * HDMI sound should be located at reg = <3>
710 	 * Return expected DAI index 0.
711 	 */
712 	if (of_ep.port == SII902X_AUDIO_PORT_INDEX)
713 		return 0;
714 
715 	return -EINVAL;
716 }
717 
718 static const struct hdmi_codec_ops sii902x_audio_codec_ops = {
719 	.hw_params = sii902x_audio_hw_params,
720 	.audio_shutdown = sii902x_audio_shutdown,
721 	.digital_mute = sii902x_audio_digital_mute,
722 	.get_eld = sii902x_audio_get_eld,
723 	.get_dai_id = sii902x_audio_get_dai_id,
724 };
725 
726 static int sii902x_audio_codec_init(struct sii902x *sii902x,
727 				    struct device *dev)
728 {
729 	static const u8 audio_fifo_id[] = {
730 		SII902X_TPI_I2S_CONFIG_FIFO0,
731 		SII902X_TPI_I2S_CONFIG_FIFO1,
732 		SII902X_TPI_I2S_CONFIG_FIFO2,
733 		SII902X_TPI_I2S_CONFIG_FIFO3,
734 	};
735 	static const u8 i2s_lane_id[] = {
736 		SII902X_TPI_I2S_SELECT_SD0,
737 		SII902X_TPI_I2S_SELECT_SD1,
738 		SII902X_TPI_I2S_SELECT_SD2,
739 		SII902X_TPI_I2S_SELECT_SD3,
740 	};
741 	struct hdmi_codec_pdata codec_data = {
742 		.ops = &sii902x_audio_codec_ops,
743 		.i2s = 1, /* Only i2s support for now. */
744 		.spdif = 0,
745 		.max_i2s_channels = 0,
746 	};
747 	u8 lanes[4];
748 	int num_lanes, i;
749 
750 	if (!of_property_read_bool(dev->of_node, "#sound-dai-cells")) {
751 		dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n",
752 			__func__);
753 		return 0;
754 	}
755 
756 	num_lanes = of_property_read_variable_u8_array(dev->of_node,
757 						       "sil,i2s-data-lanes",
758 						       lanes, 1,
759 						       ARRAY_SIZE(lanes));
760 
761 	if (num_lanes == -EINVAL) {
762 		dev_dbg(dev,
763 			"%s: No \"sil,i2s-data-lanes\", use default <0>\n",
764 			__func__);
765 		num_lanes = 1;
766 		lanes[0] = 0;
767 	} else if (num_lanes < 0) {
768 		dev_err(dev,
769 			"%s: Error gettin \"sil,i2s-data-lanes\": %d\n",
770 			__func__, num_lanes);
771 		return num_lanes;
772 	}
773 	codec_data.max_i2s_channels = 2 * num_lanes;
774 
775 	for (i = 0; i < num_lanes; i++)
776 		sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] |
777 			i2s_lane_id[lanes[i]] |	SII902X_TPI_I2S_FIFO_ENABLE;
778 
779 	sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk");
780 	if (IS_ERR(sii902x->audio.mclk)) {
781 		dev_err(dev, "%s: No clock (audio mclk) found: %ld\n",
782 			__func__, PTR_ERR(sii902x->audio.mclk));
783 		return PTR_ERR(sii902x->audio.mclk);
784 	}
785 
786 	sii902x->audio.pdev = platform_device_register_data(
787 		dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
788 		&codec_data, sizeof(codec_data));
789 
790 	return PTR_ERR_OR_ZERO(sii902x->audio.pdev);
791 }
792 
793 static const struct regmap_range sii902x_volatile_ranges[] = {
794 	{ .range_min = 0, .range_max = 0xff },
795 };
796 
797 static const struct regmap_access_table sii902x_volatile_table = {
798 	.yes_ranges = sii902x_volatile_ranges,
799 	.n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges),
800 };
801 
802 static const struct regmap_config sii902x_regmap_config = {
803 	.reg_bits = 8,
804 	.val_bits = 8,
805 	.disable_locking = true, /* struct sii902x mutex should be enough */
806 	.max_register = SII902X_TPI_MISC_INFOFRAME_END,
807 	.volatile_table = &sii902x_volatile_table,
808 	.cache_type = REGCACHE_NONE,
809 };
810 
811 static irqreturn_t sii902x_interrupt(int irq, void *data)
812 {
813 	struct sii902x *sii902x = data;
814 	unsigned int status = 0;
815 
816 	mutex_lock(&sii902x->mutex);
817 
818 	regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
819 	regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
820 
821 	mutex_unlock(&sii902x->mutex);
822 
823 	if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev)
824 		drm_helper_hpd_irq_event(sii902x->bridge.dev);
825 
826 	return IRQ_HANDLED;
827 }
828 
829 /*
830  * The purpose of sii902x_i2c_bypass_select is to enable the pass through
831  * mode of the HDMI transmitter. Do not use regmap from within this function,
832  * only use sii902x_*_unlocked functions to read/modify/write registers.
833  * We are holding the parent adapter lock here, keep this in mind before
834  * adding more i2c transactions.
835  *
836  * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
837  * in this driver, we need to make sure that we only touch 0x1A[2:1] from
838  * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
839  * we leave the remaining bits as we have found them.
840  */
841 static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id)
842 {
843 	struct sii902x *sii902x = i2c_mux_priv(mux);
844 	struct device *dev = &sii902x->i2c->dev;
845 	unsigned long timeout;
846 	u8 status;
847 	int ret;
848 
849 	ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
850 					   SII902X_SYS_CTRL_DDC_BUS_REQ,
851 					   SII902X_SYS_CTRL_DDC_BUS_REQ);
852 	if (ret)
853 		return ret;
854 
855 	timeout = jiffies +
856 		  msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
857 	do {
858 		ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
859 					    &status);
860 		if (ret)
861 			return ret;
862 	} while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
863 		 time_before(jiffies, timeout));
864 
865 	if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
866 		dev_err(dev, "Failed to acquire the i2c bus\n");
867 		return -ETIMEDOUT;
868 	}
869 
870 	return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
871 				      status);
872 }
873 
874 /*
875  * The purpose of sii902x_i2c_bypass_deselect is to disable the pass through
876  * mode of the HDMI transmitter. Do not use regmap from within this function,
877  * only use sii902x_*_unlocked functions to read/modify/write registers.
878  * We are holding the parent adapter lock here, keep this in mind before
879  * adding more i2c transactions.
880  *
881  * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
882  * in this driver, we need to make sure that we only touch 0x1A[2:1] from
883  * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
884  * we leave the remaining bits as we have found them.
885  */
886 static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)
887 {
888 	struct sii902x *sii902x = i2c_mux_priv(mux);
889 	struct device *dev = &sii902x->i2c->dev;
890 	unsigned long timeout;
891 	unsigned int retries;
892 	u8 status;
893 	int ret;
894 
895 	/*
896 	 * When the HDMI transmitter is in pass through mode, we need an
897 	 * (undocumented) additional delay between STOP and START conditions
898 	 * to guarantee the bus won't get stuck.
899 	 */
900 	udelay(30);
901 
902 	/*
903 	 * Sometimes the I2C bus can stall after failure to use the
904 	 * EDID channel. Retry a few times to see if things clear
905 	 * up, else continue anyway.
906 	 */
907 	retries = 5;
908 	do {
909 		ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
910 					    &status);
911 		retries--;
912 	} while (ret && retries);
913 	if (ret) {
914 		dev_err(dev, "failed to read status (%d)\n", ret);
915 		return ret;
916 	}
917 
918 	ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
919 					   SII902X_SYS_CTRL_DDC_BUS_REQ |
920 					   SII902X_SYS_CTRL_DDC_BUS_GRTD, 0);
921 	if (ret)
922 		return ret;
923 
924 	timeout = jiffies +
925 		  msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
926 	do {
927 		ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
928 					    &status);
929 		if (ret)
930 			return ret;
931 	} while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
932 			   SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
933 		 time_before(jiffies, timeout));
934 
935 	if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
936 		      SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
937 		dev_err(dev, "failed to release the i2c bus\n");
938 		return -ETIMEDOUT;
939 	}
940 
941 	return 0;
942 }
943 
944 static const struct drm_bridge_timings default_sii902x_timings = {
945 	.input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE
946 		 | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE
947 		 | DRM_BUS_FLAG_DE_HIGH,
948 };
949 
950 static int sii902x_probe(struct i2c_client *client,
951 			 const struct i2c_device_id *id)
952 {
953 	struct device *dev = &client->dev;
954 	unsigned int status = 0;
955 	struct sii902x *sii902x;
956 	u8 chipid[4];
957 	int ret;
958 
959 	ret = i2c_check_functionality(client->adapter,
960 				      I2C_FUNC_SMBUS_BYTE_DATA);
961 	if (!ret) {
962 		dev_err(dev, "I2C adapter not suitable\n");
963 		return -EIO;
964 	}
965 
966 	sii902x = devm_kzalloc(dev, sizeof(*sii902x), GFP_KERNEL);
967 	if (!sii902x)
968 		return -ENOMEM;
969 
970 	sii902x->i2c = client;
971 	sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config);
972 	if (IS_ERR(sii902x->regmap))
973 		return PTR_ERR(sii902x->regmap);
974 
975 	sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset",
976 						      GPIOD_OUT_LOW);
977 	if (IS_ERR(sii902x->reset_gpio)) {
978 		dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n",
979 			PTR_ERR(sii902x->reset_gpio));
980 		return PTR_ERR(sii902x->reset_gpio);
981 	}
982 
983 	mutex_init(&sii902x->mutex);
984 
985 	sii902x_reset(sii902x);
986 
987 	ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0);
988 	if (ret)
989 		return ret;
990 
991 	ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0),
992 			       &chipid, 4);
993 	if (ret) {
994 		dev_err(dev, "regmap_read failed %d\n", ret);
995 		return ret;
996 	}
997 
998 	if (chipid[0] != 0xb0) {
999 		dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n",
1000 			chipid[0]);
1001 		return -EINVAL;
1002 	}
1003 
1004 	/* Clear all pending interrupts */
1005 	regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
1006 	regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
1007 
1008 	if (client->irq > 0) {
1009 		regmap_write(sii902x->regmap, SII902X_INT_ENABLE,
1010 			     SII902X_HOTPLUG_EVENT);
1011 
1012 		ret = devm_request_threaded_irq(dev, client->irq, NULL,
1013 						sii902x_interrupt,
1014 						IRQF_ONESHOT, dev_name(dev),
1015 						sii902x);
1016 		if (ret)
1017 			return ret;
1018 	}
1019 
1020 	sii902x->bridge.funcs = &sii902x_bridge_funcs;
1021 	sii902x->bridge.of_node = dev->of_node;
1022 	sii902x->bridge.timings = &default_sii902x_timings;
1023 	drm_bridge_add(&sii902x->bridge);
1024 
1025 	sii902x_audio_codec_init(sii902x, dev);
1026 
1027 	i2c_set_clientdata(client, sii902x);
1028 
1029 	sii902x->i2cmux = i2c_mux_alloc(client->adapter, dev,
1030 					1, 0, I2C_MUX_GATE,
1031 					sii902x_i2c_bypass_select,
1032 					sii902x_i2c_bypass_deselect);
1033 	if (!sii902x->i2cmux)
1034 		return -ENOMEM;
1035 
1036 	sii902x->i2cmux->priv = sii902x;
1037 	return i2c_mux_add_adapter(sii902x->i2cmux, 0, 0, 0);
1038 }
1039 
1040 static int sii902x_remove(struct i2c_client *client)
1041 
1042 {
1043 	struct sii902x *sii902x = i2c_get_clientdata(client);
1044 
1045 	i2c_mux_del_adapters(sii902x->i2cmux);
1046 	drm_bridge_remove(&sii902x->bridge);
1047 
1048 	return 0;
1049 }
1050 
1051 static const struct of_device_id sii902x_dt_ids[] = {
1052 	{ .compatible = "sil,sii9022", },
1053 	{ }
1054 };
1055 MODULE_DEVICE_TABLE(of, sii902x_dt_ids);
1056 
1057 static const struct i2c_device_id sii902x_i2c_ids[] = {
1058 	{ "sii9022", 0 },
1059 	{ },
1060 };
1061 MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids);
1062 
1063 static struct i2c_driver sii902x_driver = {
1064 	.probe = sii902x_probe,
1065 	.remove = sii902x_remove,
1066 	.driver = {
1067 		.name = "sii902x",
1068 		.of_match_table = sii902x_dt_ids,
1069 	},
1070 	.id_table = sii902x_i2c_ids,
1071 };
1072 module_i2c_driver(sii902x_driver);
1073 
1074 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
1075 MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges");
1076 MODULE_LICENSE("GPL");
1077