1# SPDX-License-Identifier: GPL-2.0-only
2config DRM_CDNS_MHDP8546
3	tristate "Cadence DPI/DP bridge"
4	select DRM_KMS_HELPER
5	select DRM_PANEL_BRIDGE
6	depends on OF
7	help
8	  Support Cadence DPI to DP bridge. This is an internal
9	  bridge and is meant to be directly embedded in a SoC.
10	  It takes a DPI stream as input and outputs it encoded
11	  in DP format.
12
13if DRM_CDNS_MHDP8546
14
15config DRM_CDNS_MHDP8546_J721E
16	depends on ARCH_K3_J721E_SOC || COMPILE_TEST
17	bool "J721E Cadence DPI/DP wrapper support"
18	default y
19	help
20	  Support J721E Cadence DPI/DP wrapper. This is a wrapper
21	  which adds support for J721E related platform ops. It
22	  initializes the J721E Display Port and sets up the
23	  clock and data muxes.
24endif
25