1 /* 2 * Header file for Analogix DP (Display Port) core interface driver. 3 * 4 * Copyright (C) 2012 Samsung Electronics Co., Ltd. 5 * Author: Jingoo Han <jg1.han@samsung.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13 #ifndef _ANALOGIX_DP_CORE_H 14 #define _ANALOGIX_DP_CORE_H 15 16 #include <drm/drm_crtc.h> 17 #include <drm/drm_dp_helper.h> 18 19 #define DP_TIMEOUT_LOOP_COUNT 100 20 #define MAX_CR_LOOP 5 21 #define MAX_EQ_LOOP 5 22 23 /* I2C EDID Chip ID, Slave Address */ 24 #define I2C_EDID_DEVICE_ADDR 0x50 25 #define I2C_E_EDID_DEVICE_ADDR 0x30 26 27 #define EDID_BLOCK_LENGTH 0x80 28 #define EDID_HEADER_PATTERN 0x00 29 #define EDID_EXTENSION_FLAG 0x7e 30 #define EDID_CHECKSUM 0x7f 31 32 /* DP_MAX_LANE_COUNT */ 33 #define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1) 34 #define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f) 35 36 /* DP_LANE_COUNT_SET */ 37 #define DPCD_LANE_COUNT_SET(x) ((x) & 0x1f) 38 39 /* DP_TRAINING_LANE0_SET */ 40 #define DPCD_PRE_EMPHASIS_SET(x) (((x) & 0x3) << 3) 41 #define DPCD_PRE_EMPHASIS_GET(x) (((x) >> 3) & 0x3) 42 #define DPCD_VOLTAGE_SWING_SET(x) (((x) & 0x3) << 0) 43 #define DPCD_VOLTAGE_SWING_GET(x) (((x) >> 0) & 0x3) 44 45 enum link_lane_count_type { 46 LANE_COUNT1 = 1, 47 LANE_COUNT2 = 2, 48 LANE_COUNT4 = 4 49 }; 50 51 enum link_training_state { 52 START, 53 CLOCK_RECOVERY, 54 EQUALIZER_TRAINING, 55 FINISHED, 56 FAILED 57 }; 58 59 enum voltage_swing_level { 60 VOLTAGE_LEVEL_0, 61 VOLTAGE_LEVEL_1, 62 VOLTAGE_LEVEL_2, 63 VOLTAGE_LEVEL_3, 64 }; 65 66 enum pre_emphasis_level { 67 PRE_EMPHASIS_LEVEL_0, 68 PRE_EMPHASIS_LEVEL_1, 69 PRE_EMPHASIS_LEVEL_2, 70 PRE_EMPHASIS_LEVEL_3, 71 }; 72 73 enum pattern_set { 74 PRBS7, 75 D10_2, 76 TRAINING_PTN1, 77 TRAINING_PTN2, 78 DP_NONE 79 }; 80 81 enum color_space { 82 COLOR_RGB, 83 COLOR_YCBCR422, 84 COLOR_YCBCR444 85 }; 86 87 enum color_depth { 88 COLOR_6, 89 COLOR_8, 90 COLOR_10, 91 COLOR_12 92 }; 93 94 enum color_coefficient { 95 COLOR_YCBCR601, 96 COLOR_YCBCR709 97 }; 98 99 enum dynamic_range { 100 VESA, 101 CEA 102 }; 103 104 enum pll_status { 105 PLL_UNLOCKED, 106 PLL_LOCKED 107 }; 108 109 enum clock_recovery_m_value_type { 110 CALCULATED_M, 111 REGISTER_M 112 }; 113 114 enum video_timing_recognition_type { 115 VIDEO_TIMING_FROM_CAPTURE, 116 VIDEO_TIMING_FROM_REGISTER 117 }; 118 119 enum analog_power_block { 120 AUX_BLOCK, 121 CH0_BLOCK, 122 CH1_BLOCK, 123 CH2_BLOCK, 124 CH3_BLOCK, 125 ANALOG_TOTAL, 126 POWER_ALL 127 }; 128 129 enum dp_irq_type { 130 DP_IRQ_TYPE_HP_CABLE_IN, 131 DP_IRQ_TYPE_HP_CABLE_OUT, 132 DP_IRQ_TYPE_HP_CHANGE, 133 DP_IRQ_TYPE_UNKNOWN, 134 }; 135 136 struct video_info { 137 char *name; 138 139 bool h_sync_polarity; 140 bool v_sync_polarity; 141 bool interlaced; 142 143 enum color_space color_space; 144 enum dynamic_range dynamic_range; 145 enum color_coefficient ycbcr_coeff; 146 enum color_depth color_depth; 147 148 int max_link_rate; 149 enum link_lane_count_type max_lane_count; 150 }; 151 152 struct link_train { 153 int eq_loop; 154 int cr_loop[4]; 155 156 u8 link_rate; 157 u8 lane_count; 158 u8 training_lane[4]; 159 160 enum link_training_state lt_state; 161 }; 162 163 struct analogix_dp_device { 164 struct drm_encoder *encoder; 165 struct device *dev; 166 struct drm_device *drm_dev; 167 struct drm_connector connector; 168 struct drm_bridge *bridge; 169 struct clk *clock; 170 unsigned int irq; 171 void __iomem *reg_base; 172 173 struct video_info video_info; 174 struct link_train link_train; 175 struct phy *phy; 176 int dpms_mode; 177 int hpd_gpio; 178 bool force_hpd; 179 unsigned char edid[EDID_BLOCK_LENGTH * 2]; 180 181 struct analogix_dp_plat_data *plat_data; 182 }; 183 184 /* analogix_dp_reg.c */ 185 void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable); 186 void analogix_dp_stop_video(struct analogix_dp_device *dp); 187 void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable); 188 void analogix_dp_init_analog_param(struct analogix_dp_device *dp); 189 void analogix_dp_init_interrupt(struct analogix_dp_device *dp); 190 void analogix_dp_reset(struct analogix_dp_device *dp); 191 void analogix_dp_swreset(struct analogix_dp_device *dp); 192 void analogix_dp_config_interrupt(struct analogix_dp_device *dp); 193 void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp); 194 void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp); 195 enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp); 196 void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable); 197 void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp, 198 enum analog_power_block block, 199 bool enable); 200 void analogix_dp_init_analog_func(struct analogix_dp_device *dp); 201 void analogix_dp_init_hpd(struct analogix_dp_device *dp); 202 void analogix_dp_force_hpd(struct analogix_dp_device *dp); 203 enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp); 204 void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp); 205 void analogix_dp_reset_aux(struct analogix_dp_device *dp); 206 void analogix_dp_init_aux(struct analogix_dp_device *dp); 207 int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp); 208 void analogix_dp_enable_sw_function(struct analogix_dp_device *dp); 209 int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp); 210 int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp, 211 unsigned int reg_addr, 212 unsigned char data); 213 int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp, 214 unsigned int reg_addr, 215 unsigned char *data); 216 int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp, 217 unsigned int reg_addr, 218 unsigned int count, 219 unsigned char data[]); 220 int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp, 221 unsigned int reg_addr, 222 unsigned int count, 223 unsigned char data[]); 224 int analogix_dp_select_i2c_device(struct analogix_dp_device *dp, 225 unsigned int device_addr, 226 unsigned int reg_addr); 227 int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp, 228 unsigned int device_addr, 229 unsigned int reg_addr, 230 unsigned int *data); 231 int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp, 232 unsigned int device_addr, 233 unsigned int reg_addr, 234 unsigned int count, 235 unsigned char edid[]); 236 void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype); 237 void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype); 238 void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count); 239 void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count); 240 void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp, 241 bool enable); 242 void analogix_dp_set_training_pattern(struct analogix_dp_device *dp, 243 enum pattern_set pattern); 244 void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp, 245 u32 level); 246 void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp, 247 u32 level); 248 void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp, 249 u32 level); 250 void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp, 251 u32 level); 252 void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp, 253 u32 training_lane); 254 void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp, 255 u32 training_lane); 256 void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp, 257 u32 training_lane); 258 void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp, 259 u32 training_lane); 260 u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp); 261 u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp); 262 u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp); 263 u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp); 264 void analogix_dp_reset_macro(struct analogix_dp_device *dp); 265 void analogix_dp_init_video(struct analogix_dp_device *dp); 266 267 void analogix_dp_set_video_color_format(struct analogix_dp_device *dp); 268 int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp); 269 void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp, 270 enum clock_recovery_m_value_type type, 271 u32 m_value, 272 u32 n_value); 273 void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type); 274 void analogix_dp_enable_video_master(struct analogix_dp_device *dp, 275 bool enable); 276 void analogix_dp_start_video(struct analogix_dp_device *dp); 277 int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp); 278 void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp); 279 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp); 280 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp); 281 #endif /* _ANALOGIX_DP_CORE_H */ 282