1 /* 2 * Header file for Analogix DP (Display Port) core interface driver. 3 * 4 * Copyright (C) 2012 Samsung Electronics Co., Ltd. 5 * Author: Jingoo Han <jg1.han@samsung.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13 #ifndef _ANALOGIX_DP_CORE_H 14 #define _ANALOGIX_DP_CORE_H 15 16 #include <drm/drm_crtc.h> 17 #include <drm/drm_dp_helper.h> 18 19 #define DP_TIMEOUT_LOOP_COUNT 100 20 #define MAX_CR_LOOP 5 21 #define MAX_EQ_LOOP 5 22 #define MAX_PLL_LOCK_LOOP 5 23 24 /* Training takes 22ms if AUX channel comm fails. Use this as retry interval */ 25 #define DP_TIMEOUT_TRAINING_US 22000 26 #define DP_TIMEOUT_PSR_LOOP_MS 300 27 28 /* DP_MAX_LANE_COUNT */ 29 #define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1) 30 #define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f) 31 32 /* DP_LANE_COUNT_SET */ 33 #define DPCD_LANE_COUNT_SET(x) ((x) & 0x1f) 34 35 /* DP_TRAINING_LANE0_SET */ 36 #define DPCD_PRE_EMPHASIS_SET(x) (((x) & 0x3) << 3) 37 #define DPCD_PRE_EMPHASIS_GET(x) (((x) >> 3) & 0x3) 38 #define DPCD_VOLTAGE_SWING_SET(x) (((x) & 0x3) << 0) 39 #define DPCD_VOLTAGE_SWING_GET(x) (((x) >> 0) & 0x3) 40 41 enum link_lane_count_type { 42 LANE_COUNT1 = 1, 43 LANE_COUNT2 = 2, 44 LANE_COUNT4 = 4 45 }; 46 47 enum link_training_state { 48 START, 49 CLOCK_RECOVERY, 50 EQUALIZER_TRAINING, 51 FINISHED, 52 FAILED 53 }; 54 55 enum voltage_swing_level { 56 VOLTAGE_LEVEL_0, 57 VOLTAGE_LEVEL_1, 58 VOLTAGE_LEVEL_2, 59 VOLTAGE_LEVEL_3, 60 }; 61 62 enum pre_emphasis_level { 63 PRE_EMPHASIS_LEVEL_0, 64 PRE_EMPHASIS_LEVEL_1, 65 PRE_EMPHASIS_LEVEL_2, 66 PRE_EMPHASIS_LEVEL_3, 67 }; 68 69 enum pattern_set { 70 PRBS7, 71 D10_2, 72 TRAINING_PTN1, 73 TRAINING_PTN2, 74 DP_NONE 75 }; 76 77 enum color_space { 78 COLOR_RGB, 79 COLOR_YCBCR422, 80 COLOR_YCBCR444 81 }; 82 83 enum color_depth { 84 COLOR_6, 85 COLOR_8, 86 COLOR_10, 87 COLOR_12 88 }; 89 90 enum color_coefficient { 91 COLOR_YCBCR601, 92 COLOR_YCBCR709 93 }; 94 95 enum dynamic_range { 96 VESA, 97 CEA 98 }; 99 100 enum pll_status { 101 PLL_UNLOCKED, 102 PLL_LOCKED 103 }; 104 105 enum clock_recovery_m_value_type { 106 CALCULATED_M, 107 REGISTER_M 108 }; 109 110 enum video_timing_recognition_type { 111 VIDEO_TIMING_FROM_CAPTURE, 112 VIDEO_TIMING_FROM_REGISTER 113 }; 114 115 enum analog_power_block { 116 AUX_BLOCK, 117 CH0_BLOCK, 118 CH1_BLOCK, 119 CH2_BLOCK, 120 CH3_BLOCK, 121 ANALOG_TOTAL, 122 POWER_ALL 123 }; 124 125 enum dp_irq_type { 126 DP_IRQ_TYPE_HP_CABLE_IN = BIT(0), 127 DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1), 128 DP_IRQ_TYPE_HP_CHANGE = BIT(2), 129 DP_IRQ_TYPE_UNKNOWN = BIT(3), 130 }; 131 132 struct video_info { 133 char *name; 134 135 bool h_sync_polarity; 136 bool v_sync_polarity; 137 bool interlaced; 138 139 enum color_space color_space; 140 enum dynamic_range dynamic_range; 141 enum color_coefficient ycbcr_coeff; 142 enum color_depth color_depth; 143 144 int max_link_rate; 145 enum link_lane_count_type max_lane_count; 146 }; 147 148 struct link_train { 149 int eq_loop; 150 int cr_loop[4]; 151 152 u8 link_rate; 153 u8 lane_count; 154 u8 training_lane[4]; 155 156 enum link_training_state lt_state; 157 }; 158 159 struct analogix_dp_device { 160 struct drm_encoder *encoder; 161 struct device *dev; 162 struct drm_device *drm_dev; 163 struct drm_connector connector; 164 struct drm_bridge *bridge; 165 struct drm_dp_aux aux; 166 struct clk *clock; 167 unsigned int irq; 168 void __iomem *reg_base; 169 170 struct video_info video_info; 171 struct link_train link_train; 172 struct phy *phy; 173 int dpms_mode; 174 int hpd_gpio; 175 bool force_hpd; 176 bool psr_enable; 177 bool fast_train_enable; 178 179 struct mutex panel_lock; 180 bool panel_is_modeset; 181 182 struct analogix_dp_plat_data *plat_data; 183 }; 184 185 /* analogix_dp_reg.c */ 186 void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable); 187 void analogix_dp_stop_video(struct analogix_dp_device *dp); 188 void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable); 189 void analogix_dp_init_analog_param(struct analogix_dp_device *dp); 190 void analogix_dp_init_interrupt(struct analogix_dp_device *dp); 191 void analogix_dp_reset(struct analogix_dp_device *dp); 192 void analogix_dp_swreset(struct analogix_dp_device *dp); 193 void analogix_dp_config_interrupt(struct analogix_dp_device *dp); 194 void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp); 195 void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp); 196 enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp); 197 void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable); 198 void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp, 199 enum analog_power_block block, 200 bool enable); 201 int analogix_dp_init_analog_func(struct analogix_dp_device *dp); 202 void analogix_dp_init_hpd(struct analogix_dp_device *dp); 203 void analogix_dp_force_hpd(struct analogix_dp_device *dp); 204 enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp); 205 void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp); 206 void analogix_dp_reset_aux(struct analogix_dp_device *dp); 207 void analogix_dp_init_aux(struct analogix_dp_device *dp); 208 int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp); 209 void analogix_dp_enable_sw_function(struct analogix_dp_device *dp); 210 void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype); 211 void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype); 212 void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count); 213 void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count); 214 void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp, 215 bool enable); 216 void analogix_dp_set_training_pattern(struct analogix_dp_device *dp, 217 enum pattern_set pattern); 218 void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp, 219 u32 level); 220 void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp, 221 u32 level); 222 void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp, 223 u32 level); 224 void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp, 225 u32 level); 226 void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp, 227 u32 training_lane); 228 void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp, 229 u32 training_lane); 230 void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp, 231 u32 training_lane); 232 void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp, 233 u32 training_lane); 234 u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp); 235 u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp); 236 u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp); 237 u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp); 238 void analogix_dp_reset_macro(struct analogix_dp_device *dp); 239 void analogix_dp_init_video(struct analogix_dp_device *dp); 240 241 void analogix_dp_set_video_color_format(struct analogix_dp_device *dp); 242 int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp); 243 void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp, 244 enum clock_recovery_m_value_type type, 245 u32 m_value, 246 u32 n_value); 247 void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type); 248 void analogix_dp_enable_video_master(struct analogix_dp_device *dp, 249 bool enable); 250 void analogix_dp_start_video(struct analogix_dp_device *dp); 251 int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp); 252 void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp); 253 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp); 254 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp); 255 void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp); 256 int analogix_dp_send_psr_spd(struct analogix_dp_device *dp, 257 struct edp_vsc_psr *vsc, bool blocking); 258 ssize_t analogix_dp_transfer(struct analogix_dp_device *dp, 259 struct drm_dp_aux_msg *msg); 260 261 #endif /* _ANALOGIX_DP_CORE_H */ 262