1 /* 2 * Analog Devices ADV7511 HDMI transmitter driver 3 * 4 * Copyright 2012 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2. 7 */ 8 9 #ifndef __DRM_I2C_ADV7511_H__ 10 #define __DRM_I2C_ADV7511_H__ 11 12 #include <linux/hdmi.h> 13 #include <linux/i2c.h> 14 #include <linux/regmap.h> 15 16 #include <drm/drm_crtc_helper.h> 17 #include <drm/drm_mipi_dsi.h> 18 19 #define ADV7511_REG_CHIP_REVISION 0x00 20 #define ADV7511_REG_N0 0x01 21 #define ADV7511_REG_N1 0x02 22 #define ADV7511_REG_N2 0x03 23 #define ADV7511_REG_SPDIF_FREQ 0x04 24 #define ADV7511_REG_CTS_AUTOMATIC1 0x05 25 #define ADV7511_REG_CTS_AUTOMATIC2 0x06 26 #define ADV7511_REG_CTS_MANUAL0 0x07 27 #define ADV7511_REG_CTS_MANUAL1 0x08 28 #define ADV7511_REG_CTS_MANUAL2 0x09 29 #define ADV7511_REG_AUDIO_SOURCE 0x0a 30 #define ADV7511_REG_AUDIO_CONFIG 0x0b 31 #define ADV7511_REG_I2S_CONFIG 0x0c 32 #define ADV7511_REG_I2S_WIDTH 0x0d 33 #define ADV7511_REG_AUDIO_SUB_SRC0 0x0e 34 #define ADV7511_REG_AUDIO_SUB_SRC1 0x0f 35 #define ADV7511_REG_AUDIO_SUB_SRC2 0x10 36 #define ADV7511_REG_AUDIO_SUB_SRC3 0x11 37 #define ADV7511_REG_AUDIO_CFG1 0x12 38 #define ADV7511_REG_AUDIO_CFG2 0x13 39 #define ADV7511_REG_AUDIO_CFG3 0x14 40 #define ADV7511_REG_I2C_FREQ_ID_CFG 0x15 41 #define ADV7511_REG_VIDEO_INPUT_CFG1 0x16 42 #define ADV7511_REG_CSC_UPPER(x) (0x18 + (x) * 2) 43 #define ADV7511_REG_CSC_LOWER(x) (0x19 + (x) * 2) 44 #define ADV7511_REG_SYNC_DECODER(x) (0x30 + (x)) 45 #define ADV7511_REG_DE_GENERATOR (0x35 + (x)) 46 #define ADV7511_REG_PIXEL_REPETITION 0x3b 47 #define ADV7511_REG_VIC_MANUAL 0x3c 48 #define ADV7511_REG_VIC_SEND 0x3d 49 #define ADV7511_REG_VIC_DETECTED 0x3e 50 #define ADV7511_REG_AUX_VIC_DETECTED 0x3f 51 #define ADV7511_REG_PACKET_ENABLE0 0x40 52 #define ADV7511_REG_POWER 0x41 53 #define ADV7511_REG_STATUS 0x42 54 #define ADV7511_REG_EDID_I2C_ADDR 0x43 55 #define ADV7511_REG_PACKET_ENABLE1 0x44 56 #define ADV7511_REG_PACKET_I2C_ADDR 0x45 57 #define ADV7511_REG_DSD_ENABLE 0x46 58 #define ADV7511_REG_VIDEO_INPUT_CFG2 0x48 59 #define ADV7511_REG_INFOFRAME_UPDATE 0x4a 60 #define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */ 61 #define ADV7511_REG_AVI_INFOFRAME_VERSION 0x52 62 #define ADV7511_REG_AVI_INFOFRAME_LENGTH 0x53 63 #define ADV7511_REG_AVI_INFOFRAME_CHECKSUM 0x54 64 #define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */ 65 #define ADV7511_REG_AUDIO_INFOFRAME_VERSION 0x70 66 #define ADV7511_REG_AUDIO_INFOFRAME_LENGTH 0x71 67 #define ADV7511_REG_AUDIO_INFOFRAME_CHECKSUM 0x72 68 #define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */ 69 #define ADV7511_REG_INT_ENABLE(x) (0x94 + (x)) 70 #define ADV7511_REG_INT(x) (0x96 + (x)) 71 #define ADV7511_REG_INPUT_CLK_DIV 0x9d 72 #define ADV7511_REG_PLL_STATUS 0x9e 73 #define ADV7511_REG_HDMI_POWER 0xa1 74 #define ADV7511_REG_HDCP_HDMI_CFG 0xaf 75 #define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */ 76 #define ADV7511_REG_HDCP_STATUS 0xb8 77 #define ADV7511_REG_BCAPS 0xbe 78 #define ADV7511_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */ 79 #define ADV7511_REG_EDID_SEGMENT 0xc4 80 #define ADV7511_REG_DDC_STATUS 0xc8 81 #define ADV7511_REG_EDID_READ_CTRL 0xc9 82 #define ADV7511_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */ 83 #define ADV7511_REG_TIMING_GEN_SEQ 0xd0 84 #define ADV7511_REG_POWER2 0xd6 85 #define ADV7511_REG_HSYNC_PLACEMENT_MSB 0xfa 86 87 #define ADV7511_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */ 88 #define ADV7511_REG_TMDS_CLOCK_INV 0xde 89 #define ADV7511_REG_ARC_CTRL 0xdf 90 #define ADV7511_REG_CEC_I2C_ADDR 0xe1 91 #define ADV7511_REG_CEC_CTRL 0xe2 92 #define ADV7511_REG_CHIP_ID_HIGH 0xf5 93 #define ADV7511_REG_CHIP_ID_LOW 0xf6 94 95 #define ADV7511_CSC_ENABLE BIT(7) 96 #define ADV7511_CSC_UPDATE_MODE BIT(5) 97 98 #define ADV7511_INT0_HPD BIT(7) 99 #define ADV7511_INT0_VSYNC BIT(5) 100 #define ADV7511_INT0_AUDIO_FIFO_FULL BIT(4) 101 #define ADV7511_INT0_EDID_READY BIT(2) 102 #define ADV7511_INT0_HDCP_AUTHENTICATED BIT(1) 103 104 #define ADV7511_INT1_DDC_ERROR BIT(7) 105 #define ADV7511_INT1_BKSV BIT(6) 106 #define ADV7511_INT1_CEC_TX_READY BIT(5) 107 #define ADV7511_INT1_CEC_TX_ARBIT_LOST BIT(4) 108 #define ADV7511_INT1_CEC_TX_RETRY_TIMEOUT BIT(3) 109 #define ADV7511_INT1_CEC_RX_READY3 BIT(2) 110 #define ADV7511_INT1_CEC_RX_READY2 BIT(1) 111 #define ADV7511_INT1_CEC_RX_READY1 BIT(0) 112 113 #define ADV7511_ARC_CTRL_POWER_DOWN BIT(0) 114 115 #define ADV7511_CEC_CTRL_POWER_DOWN BIT(0) 116 117 #define ADV7511_POWER_POWER_DOWN BIT(6) 118 119 #define ADV7511_HDMI_CFG_MODE_MASK 0x2 120 #define ADV7511_HDMI_CFG_MODE_DVI 0x0 121 #define ADV7511_HDMI_CFG_MODE_HDMI 0x2 122 123 #define ADV7511_AUDIO_SELECT_I2C 0x0 124 #define ADV7511_AUDIO_SELECT_SPDIF 0x1 125 #define ADV7511_AUDIO_SELECT_DSD 0x2 126 #define ADV7511_AUDIO_SELECT_HBR 0x3 127 #define ADV7511_AUDIO_SELECT_DST 0x4 128 129 #define ADV7511_I2S_SAMPLE_LEN_16 0x2 130 #define ADV7511_I2S_SAMPLE_LEN_20 0x3 131 #define ADV7511_I2S_SAMPLE_LEN_18 0x4 132 #define ADV7511_I2S_SAMPLE_LEN_22 0x5 133 #define ADV7511_I2S_SAMPLE_LEN_19 0x8 134 #define ADV7511_I2S_SAMPLE_LEN_23 0x9 135 #define ADV7511_I2S_SAMPLE_LEN_24 0xb 136 #define ADV7511_I2S_SAMPLE_LEN_17 0xc 137 #define ADV7511_I2S_SAMPLE_LEN_21 0xd 138 139 #define ADV7511_SAMPLE_FREQ_44100 0x0 140 #define ADV7511_SAMPLE_FREQ_48000 0x2 141 #define ADV7511_SAMPLE_FREQ_32000 0x3 142 #define ADV7511_SAMPLE_FREQ_88200 0x8 143 #define ADV7511_SAMPLE_FREQ_96000 0xa 144 #define ADV7511_SAMPLE_FREQ_176400 0xc 145 #define ADV7511_SAMPLE_FREQ_192000 0xe 146 147 #define ADV7511_STATUS_POWER_DOWN_POLARITY BIT(7) 148 #define ADV7511_STATUS_HPD BIT(6) 149 #define ADV7511_STATUS_MONITOR_SENSE BIT(5) 150 #define ADV7511_STATUS_I2S_32BIT_MODE BIT(3) 151 152 #define ADV7511_PACKET_ENABLE_N_CTS BIT(8+6) 153 #define ADV7511_PACKET_ENABLE_AUDIO_SAMPLE BIT(8+5) 154 #define ADV7511_PACKET_ENABLE_AVI_INFOFRAME BIT(8+4) 155 #define ADV7511_PACKET_ENABLE_AUDIO_INFOFRAME BIT(8+3) 156 #define ADV7511_PACKET_ENABLE_GC BIT(7) 157 #define ADV7511_PACKET_ENABLE_SPD BIT(6) 158 #define ADV7511_PACKET_ENABLE_MPEG BIT(5) 159 #define ADV7511_PACKET_ENABLE_ACP BIT(4) 160 #define ADV7511_PACKET_ENABLE_ISRC BIT(3) 161 #define ADV7511_PACKET_ENABLE_GM BIT(2) 162 #define ADV7511_PACKET_ENABLE_SPARE2 BIT(1) 163 #define ADV7511_PACKET_ENABLE_SPARE1 BIT(0) 164 165 #define ADV7511_REG_POWER2_HPD_SRC_MASK 0xc0 166 #define ADV7511_REG_POWER2_HPD_SRC_BOTH 0x00 167 #define ADV7511_REG_POWER2_HPD_SRC_HPD 0x40 168 #define ADV7511_REG_POWER2_HPD_SRC_CEC 0x80 169 #define ADV7511_REG_POWER2_HPD_SRC_NONE 0xc0 170 #define ADV7511_REG_POWER2_TDMS_ENABLE BIT(4) 171 #define ADV7511_REG_POWER2_GATE_INPUT_CLK BIT(0) 172 173 #define ADV7511_LOW_REFRESH_RATE_NONE 0x0 174 #define ADV7511_LOW_REFRESH_RATE_24HZ 0x1 175 #define ADV7511_LOW_REFRESH_RATE_25HZ 0x2 176 #define ADV7511_LOW_REFRESH_RATE_30HZ 0x3 177 178 #define ADV7511_AUDIO_CFG3_LEN_MASK 0x0f 179 #define ADV7511_I2C_FREQ_ID_CFG_RATE_MASK 0xf0 180 181 #define ADV7511_AUDIO_SOURCE_I2S 0 182 #define ADV7511_AUDIO_SOURCE_SPDIF 1 183 184 #define ADV7511_I2S_FORMAT_I2S 0 185 #define ADV7511_I2S_FORMAT_RIGHT_J 1 186 #define ADV7511_I2S_FORMAT_LEFT_J 2 187 188 #define ADV7511_PACKET(p, x) ((p) * 0x20 + (x)) 189 #define ADV7511_PACKET_SDP(x) ADV7511_PACKET(0, x) 190 #define ADV7511_PACKET_MPEG(x) ADV7511_PACKET(1, x) 191 #define ADV7511_PACKET_ACP(x) ADV7511_PACKET(2, x) 192 #define ADV7511_PACKET_ISRC1(x) ADV7511_PACKET(3, x) 193 #define ADV7511_PACKET_ISRC2(x) ADV7511_PACKET(4, x) 194 #define ADV7511_PACKET_GM(x) ADV7511_PACKET(5, x) 195 #define ADV7511_PACKET_SPARE(x) ADV7511_PACKET(6, x) 196 197 enum adv7511_input_clock { 198 ADV7511_INPUT_CLOCK_1X, 199 ADV7511_INPUT_CLOCK_2X, 200 ADV7511_INPUT_CLOCK_DDR, 201 }; 202 203 enum adv7511_input_justification { 204 ADV7511_INPUT_JUSTIFICATION_EVENLY = 0, 205 ADV7511_INPUT_JUSTIFICATION_RIGHT = 1, 206 ADV7511_INPUT_JUSTIFICATION_LEFT = 2, 207 }; 208 209 enum adv7511_input_sync_pulse { 210 ADV7511_INPUT_SYNC_PULSE_DE = 0, 211 ADV7511_INPUT_SYNC_PULSE_HSYNC = 1, 212 ADV7511_INPUT_SYNC_PULSE_VSYNC = 2, 213 ADV7511_INPUT_SYNC_PULSE_NONE = 3, 214 }; 215 216 /** 217 * enum adv7511_sync_polarity - Polarity for the input sync signals 218 * @ADV7511_SYNC_POLARITY_PASSTHROUGH: Sync polarity matches that of 219 * the currently configured mode. 220 * @ADV7511_SYNC_POLARITY_LOW: Sync polarity is low 221 * @ADV7511_SYNC_POLARITY_HIGH: Sync polarity is high 222 * 223 * If the polarity is set to either LOW or HIGH the driver will configure the 224 * ADV7511 to internally invert the sync signal if required to match the sync 225 * polarity setting for the currently selected output mode. 226 * 227 * If the polarity is set to PASSTHROUGH, the ADV7511 will route the signal 228 * unchanged. This is used when the upstream graphics core already generates 229 * the sync signals with the correct polarity. 230 */ 231 enum adv7511_sync_polarity { 232 ADV7511_SYNC_POLARITY_PASSTHROUGH, 233 ADV7511_SYNC_POLARITY_LOW, 234 ADV7511_SYNC_POLARITY_HIGH, 235 }; 236 237 /** 238 * struct adv7511_link_config - Describes adv7511 hardware configuration 239 * @input_color_depth: Number of bits per color component (8, 10 or 12) 240 * @input_colorspace: The input colorspace (RGB, YUV444, YUV422) 241 * @input_clock: The input video clock style (1x, 2x, DDR) 242 * @input_style: The input component arrangement variant 243 * @input_justification: Video input format bit justification 244 * @clock_delay: Clock delay for the input clock (in ps) 245 * @embedded_sync: Video input uses BT.656-style embedded sync 246 * @sync_pulse: Select the sync pulse 247 * @vsync_polarity: vsync input signal configuration 248 * @hsync_polarity: hsync input signal configuration 249 */ 250 struct adv7511_link_config { 251 unsigned int input_color_depth; 252 enum hdmi_colorspace input_colorspace; 253 enum adv7511_input_clock input_clock; 254 unsigned int input_style; 255 enum adv7511_input_justification input_justification; 256 257 int clock_delay; 258 259 bool embedded_sync; 260 enum adv7511_input_sync_pulse sync_pulse; 261 enum adv7511_sync_polarity vsync_polarity; 262 enum adv7511_sync_polarity hsync_polarity; 263 }; 264 265 /** 266 * enum adv7511_csc_scaling - Scaling factor for the ADV7511 CSC 267 * @ADV7511_CSC_SCALING_1: CSC results are not scaled 268 * @ADV7511_CSC_SCALING_2: CSC results are scaled by a factor of two 269 * @ADV7511_CSC_SCALING_4: CSC results are scalled by a factor of four 270 */ 271 enum adv7511_csc_scaling { 272 ADV7511_CSC_SCALING_1 = 0, 273 ADV7511_CSC_SCALING_2 = 1, 274 ADV7511_CSC_SCALING_4 = 2, 275 }; 276 277 /** 278 * struct adv7511_video_config - Describes adv7511 hardware configuration 279 * @csc_enable: Whether to enable color space conversion 280 * @csc_scaling_factor: Color space conversion scaling factor 281 * @csc_coefficents: Color space conversion coefficents 282 * @hdmi_mode: Whether to use HDMI or DVI output mode 283 * @avi_infoframe: HDMI infoframe 284 */ 285 struct adv7511_video_config { 286 bool csc_enable; 287 enum adv7511_csc_scaling csc_scaling_factor; 288 const uint16_t *csc_coefficents; 289 290 bool hdmi_mode; 291 struct hdmi_avi_infoframe avi_infoframe; 292 }; 293 294 enum adv7511_type { 295 ADV7511, 296 ADV7533, 297 }; 298 299 struct adv7511 { 300 struct i2c_client *i2c_main; 301 struct i2c_client *i2c_edid; 302 struct i2c_client *i2c_cec; 303 304 struct regmap *regmap; 305 struct regmap *regmap_cec; 306 enum drm_connector_status status; 307 bool powered; 308 309 struct drm_display_mode curr_mode; 310 311 unsigned int f_tmds; 312 313 unsigned int current_edid_segment; 314 uint8_t edid_buf[256]; 315 bool edid_read; 316 317 wait_queue_head_t wq; 318 struct drm_bridge bridge; 319 struct drm_connector connector; 320 321 bool embedded_sync; 322 enum adv7511_sync_polarity vsync_polarity; 323 enum adv7511_sync_polarity hsync_polarity; 324 bool rgb; 325 326 struct edid *edid; 327 328 struct gpio_desc *gpio_pd; 329 330 /* ADV7533 DSI RX related params */ 331 struct device_node *host_node; 332 struct mipi_dsi_device *dsi; 333 u8 num_dsi_lanes; 334 bool use_timing_gen; 335 336 enum adv7511_type type; 337 }; 338 339 #ifdef CONFIG_DRM_I2C_ADV7533 340 void adv7533_dsi_power_on(struct adv7511 *adv); 341 void adv7533_dsi_power_off(struct adv7511 *adv); 342 void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode); 343 int adv7533_patch_registers(struct adv7511 *adv); 344 void adv7533_uninit_cec(struct adv7511 *adv); 345 int adv7533_init_cec(struct adv7511 *adv); 346 int adv7533_attach_dsi(struct adv7511 *adv); 347 void adv7533_detach_dsi(struct adv7511 *adv); 348 int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv); 349 #else 350 static inline void adv7533_dsi_power_on(struct adv7511 *adv) 351 { 352 } 353 354 static inline void adv7533_dsi_power_off(struct adv7511 *adv) 355 { 356 } 357 358 static inline void adv7533_mode_set(struct adv7511 *adv, 359 struct drm_display_mode *mode) 360 { 361 } 362 363 static inline int adv7533_patch_registers(struct adv7511 *adv) 364 { 365 return -ENODEV; 366 } 367 368 static inline void adv7533_uninit_cec(struct adv7511 *adv) 369 { 370 } 371 372 static inline int adv7533_init_cec(struct adv7511 *adv) 373 { 374 return -ENODEV; 375 } 376 377 static inline int adv7533_attach_dsi(struct adv7511 *adv) 378 { 379 return -ENODEV; 380 } 381 382 static inline void adv7533_detach_dsi(struct adv7511 *adv) 383 { 384 } 385 386 static inline int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv) 387 { 388 return -ENODEV; 389 } 390 #endif 391 392 #endif /* __DRM_I2C_ADV7511_H__ */ 393