1 /* 2 * Analog Devices ADV7511 HDMI transmitter driver 3 * 4 * Copyright 2012 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2. 7 */ 8 9 #ifndef __DRM_I2C_ADV7511_H__ 10 #define __DRM_I2C_ADV7511_H__ 11 12 #include <linux/hdmi.h> 13 #include <linux/i2c.h> 14 #include <linux/regmap.h> 15 #include <linux/regulator/consumer.h> 16 17 #include <drm/drm_crtc_helper.h> 18 #include <drm/drm_mipi_dsi.h> 19 20 #define ADV7511_REG_CHIP_REVISION 0x00 21 #define ADV7511_REG_N0 0x01 22 #define ADV7511_REG_N1 0x02 23 #define ADV7511_REG_N2 0x03 24 #define ADV7511_REG_SPDIF_FREQ 0x04 25 #define ADV7511_REG_CTS_AUTOMATIC1 0x05 26 #define ADV7511_REG_CTS_AUTOMATIC2 0x06 27 #define ADV7511_REG_CTS_MANUAL0 0x07 28 #define ADV7511_REG_CTS_MANUAL1 0x08 29 #define ADV7511_REG_CTS_MANUAL2 0x09 30 #define ADV7511_REG_AUDIO_SOURCE 0x0a 31 #define ADV7511_REG_AUDIO_CONFIG 0x0b 32 #define ADV7511_REG_I2S_CONFIG 0x0c 33 #define ADV7511_REG_I2S_WIDTH 0x0d 34 #define ADV7511_REG_AUDIO_SUB_SRC0 0x0e 35 #define ADV7511_REG_AUDIO_SUB_SRC1 0x0f 36 #define ADV7511_REG_AUDIO_SUB_SRC2 0x10 37 #define ADV7511_REG_AUDIO_SUB_SRC3 0x11 38 #define ADV7511_REG_AUDIO_CFG1 0x12 39 #define ADV7511_REG_AUDIO_CFG2 0x13 40 #define ADV7511_REG_AUDIO_CFG3 0x14 41 #define ADV7511_REG_I2C_FREQ_ID_CFG 0x15 42 #define ADV7511_REG_VIDEO_INPUT_CFG1 0x16 43 #define ADV7511_REG_CSC_UPPER(x) (0x18 + (x) * 2) 44 #define ADV7511_REG_CSC_LOWER(x) (0x19 + (x) * 2) 45 #define ADV7511_REG_SYNC_DECODER(x) (0x30 + (x)) 46 #define ADV7511_REG_DE_GENERATOR (0x35 + (x)) 47 #define ADV7511_REG_PIXEL_REPETITION 0x3b 48 #define ADV7511_REG_VIC_MANUAL 0x3c 49 #define ADV7511_REG_VIC_SEND 0x3d 50 #define ADV7511_REG_VIC_DETECTED 0x3e 51 #define ADV7511_REG_AUX_VIC_DETECTED 0x3f 52 #define ADV7511_REG_PACKET_ENABLE0 0x40 53 #define ADV7511_REG_POWER 0x41 54 #define ADV7511_REG_STATUS 0x42 55 #define ADV7511_REG_EDID_I2C_ADDR 0x43 56 #define ADV7511_REG_PACKET_ENABLE1 0x44 57 #define ADV7511_REG_PACKET_I2C_ADDR 0x45 58 #define ADV7511_REG_DSD_ENABLE 0x46 59 #define ADV7511_REG_VIDEO_INPUT_CFG2 0x48 60 #define ADV7511_REG_INFOFRAME_UPDATE 0x4a 61 #define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */ 62 #define ADV7511_REG_AVI_INFOFRAME_VERSION 0x52 63 #define ADV7511_REG_AVI_INFOFRAME_LENGTH 0x53 64 #define ADV7511_REG_AVI_INFOFRAME_CHECKSUM 0x54 65 #define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */ 66 #define ADV7511_REG_AUDIO_INFOFRAME_VERSION 0x70 67 #define ADV7511_REG_AUDIO_INFOFRAME_LENGTH 0x71 68 #define ADV7511_REG_AUDIO_INFOFRAME_CHECKSUM 0x72 69 #define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */ 70 #define ADV7511_REG_INT_ENABLE(x) (0x94 + (x)) 71 #define ADV7511_REG_INT(x) (0x96 + (x)) 72 #define ADV7511_REG_INPUT_CLK_DIV 0x9d 73 #define ADV7511_REG_PLL_STATUS 0x9e 74 #define ADV7511_REG_HDMI_POWER 0xa1 75 #define ADV7511_REG_HDCP_HDMI_CFG 0xaf 76 #define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */ 77 #define ADV7511_REG_HDCP_STATUS 0xb8 78 #define ADV7511_REG_BCAPS 0xbe 79 #define ADV7511_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */ 80 #define ADV7511_REG_EDID_SEGMENT 0xc4 81 #define ADV7511_REG_DDC_STATUS 0xc8 82 #define ADV7511_REG_EDID_READ_CTRL 0xc9 83 #define ADV7511_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */ 84 #define ADV7511_REG_TIMING_GEN_SEQ 0xd0 85 #define ADV7511_REG_POWER2 0xd6 86 #define ADV7511_REG_HSYNC_PLACEMENT_MSB 0xfa 87 88 #define ADV7511_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */ 89 #define ADV7511_REG_TMDS_CLOCK_INV 0xde 90 #define ADV7511_REG_ARC_CTRL 0xdf 91 #define ADV7511_REG_CEC_I2C_ADDR 0xe1 92 #define ADV7511_REG_CEC_CTRL 0xe2 93 #define ADV7511_REG_CHIP_ID_HIGH 0xf5 94 #define ADV7511_REG_CHIP_ID_LOW 0xf6 95 96 #define ADV7511_CSC_ENABLE BIT(7) 97 #define ADV7511_CSC_UPDATE_MODE BIT(5) 98 99 #define ADV7511_INT0_HPD BIT(7) 100 #define ADV7511_INT0_VSYNC BIT(5) 101 #define ADV7511_INT0_AUDIO_FIFO_FULL BIT(4) 102 #define ADV7511_INT0_EDID_READY BIT(2) 103 #define ADV7511_INT0_HDCP_AUTHENTICATED BIT(1) 104 105 #define ADV7511_INT1_DDC_ERROR BIT(7) 106 #define ADV7511_INT1_BKSV BIT(6) 107 #define ADV7511_INT1_CEC_TX_READY BIT(5) 108 #define ADV7511_INT1_CEC_TX_ARBIT_LOST BIT(4) 109 #define ADV7511_INT1_CEC_TX_RETRY_TIMEOUT BIT(3) 110 #define ADV7511_INT1_CEC_RX_READY3 BIT(2) 111 #define ADV7511_INT1_CEC_RX_READY2 BIT(1) 112 #define ADV7511_INT1_CEC_RX_READY1 BIT(0) 113 114 #define ADV7511_ARC_CTRL_POWER_DOWN BIT(0) 115 116 #define ADV7511_CEC_CTRL_POWER_DOWN BIT(0) 117 118 #define ADV7511_POWER_POWER_DOWN BIT(6) 119 120 #define ADV7511_HDMI_CFG_MODE_MASK 0x2 121 #define ADV7511_HDMI_CFG_MODE_DVI 0x0 122 #define ADV7511_HDMI_CFG_MODE_HDMI 0x2 123 124 #define ADV7511_AUDIO_SELECT_I2C 0x0 125 #define ADV7511_AUDIO_SELECT_SPDIF 0x1 126 #define ADV7511_AUDIO_SELECT_DSD 0x2 127 #define ADV7511_AUDIO_SELECT_HBR 0x3 128 #define ADV7511_AUDIO_SELECT_DST 0x4 129 130 #define ADV7511_I2S_SAMPLE_LEN_16 0x2 131 #define ADV7511_I2S_SAMPLE_LEN_20 0x3 132 #define ADV7511_I2S_SAMPLE_LEN_18 0x4 133 #define ADV7511_I2S_SAMPLE_LEN_22 0x5 134 #define ADV7511_I2S_SAMPLE_LEN_19 0x8 135 #define ADV7511_I2S_SAMPLE_LEN_23 0x9 136 #define ADV7511_I2S_SAMPLE_LEN_24 0xb 137 #define ADV7511_I2S_SAMPLE_LEN_17 0xc 138 #define ADV7511_I2S_SAMPLE_LEN_21 0xd 139 140 #define ADV7511_SAMPLE_FREQ_44100 0x0 141 #define ADV7511_SAMPLE_FREQ_48000 0x2 142 #define ADV7511_SAMPLE_FREQ_32000 0x3 143 #define ADV7511_SAMPLE_FREQ_88200 0x8 144 #define ADV7511_SAMPLE_FREQ_96000 0xa 145 #define ADV7511_SAMPLE_FREQ_176400 0xc 146 #define ADV7511_SAMPLE_FREQ_192000 0xe 147 148 #define ADV7511_STATUS_POWER_DOWN_POLARITY BIT(7) 149 #define ADV7511_STATUS_HPD BIT(6) 150 #define ADV7511_STATUS_MONITOR_SENSE BIT(5) 151 #define ADV7511_STATUS_I2S_32BIT_MODE BIT(3) 152 153 #define ADV7511_PACKET_ENABLE_N_CTS BIT(8+6) 154 #define ADV7511_PACKET_ENABLE_AUDIO_SAMPLE BIT(8+5) 155 #define ADV7511_PACKET_ENABLE_AVI_INFOFRAME BIT(8+4) 156 #define ADV7511_PACKET_ENABLE_AUDIO_INFOFRAME BIT(8+3) 157 #define ADV7511_PACKET_ENABLE_GC BIT(7) 158 #define ADV7511_PACKET_ENABLE_SPD BIT(6) 159 #define ADV7511_PACKET_ENABLE_MPEG BIT(5) 160 #define ADV7511_PACKET_ENABLE_ACP BIT(4) 161 #define ADV7511_PACKET_ENABLE_ISRC BIT(3) 162 #define ADV7511_PACKET_ENABLE_GM BIT(2) 163 #define ADV7511_PACKET_ENABLE_SPARE2 BIT(1) 164 #define ADV7511_PACKET_ENABLE_SPARE1 BIT(0) 165 166 #define ADV7511_REG_POWER2_HPD_SRC_MASK 0xc0 167 #define ADV7511_REG_POWER2_HPD_SRC_BOTH 0x00 168 #define ADV7511_REG_POWER2_HPD_SRC_HPD 0x40 169 #define ADV7511_REG_POWER2_HPD_SRC_CEC 0x80 170 #define ADV7511_REG_POWER2_HPD_SRC_NONE 0xc0 171 #define ADV7511_REG_POWER2_TDMS_ENABLE BIT(4) 172 #define ADV7511_REG_POWER2_GATE_INPUT_CLK BIT(0) 173 174 #define ADV7511_LOW_REFRESH_RATE_NONE 0x0 175 #define ADV7511_LOW_REFRESH_RATE_24HZ 0x1 176 #define ADV7511_LOW_REFRESH_RATE_25HZ 0x2 177 #define ADV7511_LOW_REFRESH_RATE_30HZ 0x3 178 179 #define ADV7511_AUDIO_CFG3_LEN_MASK 0x0f 180 #define ADV7511_I2C_FREQ_ID_CFG_RATE_MASK 0xf0 181 182 #define ADV7511_AUDIO_SOURCE_I2S 0 183 #define ADV7511_AUDIO_SOURCE_SPDIF 1 184 185 #define ADV7511_I2S_FORMAT_I2S 0 186 #define ADV7511_I2S_FORMAT_RIGHT_J 1 187 #define ADV7511_I2S_FORMAT_LEFT_J 2 188 189 #define ADV7511_PACKET(p, x) ((p) * 0x20 + (x)) 190 #define ADV7511_PACKET_SDP(x) ADV7511_PACKET(0, x) 191 #define ADV7511_PACKET_MPEG(x) ADV7511_PACKET(1, x) 192 #define ADV7511_PACKET_ACP(x) ADV7511_PACKET(2, x) 193 #define ADV7511_PACKET_ISRC1(x) ADV7511_PACKET(3, x) 194 #define ADV7511_PACKET_ISRC2(x) ADV7511_PACKET(4, x) 195 #define ADV7511_PACKET_GM(x) ADV7511_PACKET(5, x) 196 #define ADV7511_PACKET_SPARE(x) ADV7511_PACKET(6, x) 197 198 #define ADV7511_REG_CEC_TX_FRAME_HDR 0x00 199 #define ADV7511_REG_CEC_TX_FRAME_DATA0 0x01 200 #define ADV7511_REG_CEC_TX_FRAME_LEN 0x10 201 #define ADV7511_REG_CEC_TX_ENABLE 0x11 202 #define ADV7511_REG_CEC_TX_RETRY 0x12 203 #define ADV7511_REG_CEC_TX_LOW_DRV_CNT 0x14 204 #define ADV7511_REG_CEC_RX_FRAME_HDR 0x15 205 #define ADV7511_REG_CEC_RX_FRAME_DATA0 0x16 206 #define ADV7511_REG_CEC_RX_FRAME_LEN 0x25 207 #define ADV7511_REG_CEC_RX_ENABLE 0x26 208 #define ADV7511_REG_CEC_RX_BUFFERS 0x4a 209 #define ADV7511_REG_CEC_LOG_ADDR_MASK 0x4b 210 #define ADV7511_REG_CEC_LOG_ADDR_0_1 0x4c 211 #define ADV7511_REG_CEC_LOG_ADDR_2 0x4d 212 #define ADV7511_REG_CEC_CLK_DIV 0x4e 213 #define ADV7511_REG_CEC_SOFT_RESET 0x50 214 215 #define ADV7533_REG_CEC_OFFSET 0x70 216 217 enum adv7511_input_clock { 218 ADV7511_INPUT_CLOCK_1X, 219 ADV7511_INPUT_CLOCK_2X, 220 ADV7511_INPUT_CLOCK_DDR, 221 }; 222 223 enum adv7511_input_justification { 224 ADV7511_INPUT_JUSTIFICATION_EVENLY = 0, 225 ADV7511_INPUT_JUSTIFICATION_RIGHT = 1, 226 ADV7511_INPUT_JUSTIFICATION_LEFT = 2, 227 }; 228 229 enum adv7511_input_sync_pulse { 230 ADV7511_INPUT_SYNC_PULSE_DE = 0, 231 ADV7511_INPUT_SYNC_PULSE_HSYNC = 1, 232 ADV7511_INPUT_SYNC_PULSE_VSYNC = 2, 233 ADV7511_INPUT_SYNC_PULSE_NONE = 3, 234 }; 235 236 /** 237 * enum adv7511_sync_polarity - Polarity for the input sync signals 238 * @ADV7511_SYNC_POLARITY_PASSTHROUGH: Sync polarity matches that of 239 * the currently configured mode. 240 * @ADV7511_SYNC_POLARITY_LOW: Sync polarity is low 241 * @ADV7511_SYNC_POLARITY_HIGH: Sync polarity is high 242 * 243 * If the polarity is set to either LOW or HIGH the driver will configure the 244 * ADV7511 to internally invert the sync signal if required to match the sync 245 * polarity setting for the currently selected output mode. 246 * 247 * If the polarity is set to PASSTHROUGH, the ADV7511 will route the signal 248 * unchanged. This is used when the upstream graphics core already generates 249 * the sync signals with the correct polarity. 250 */ 251 enum adv7511_sync_polarity { 252 ADV7511_SYNC_POLARITY_PASSTHROUGH, 253 ADV7511_SYNC_POLARITY_LOW, 254 ADV7511_SYNC_POLARITY_HIGH, 255 }; 256 257 /** 258 * struct adv7511_link_config - Describes adv7511 hardware configuration 259 * @input_color_depth: Number of bits per color component (8, 10 or 12) 260 * @input_colorspace: The input colorspace (RGB, YUV444, YUV422) 261 * @input_clock: The input video clock style (1x, 2x, DDR) 262 * @input_style: The input component arrangement variant 263 * @input_justification: Video input format bit justification 264 * @clock_delay: Clock delay for the input clock (in ps) 265 * @embedded_sync: Video input uses BT.656-style embedded sync 266 * @sync_pulse: Select the sync pulse 267 * @vsync_polarity: vsync input signal configuration 268 * @hsync_polarity: hsync input signal configuration 269 */ 270 struct adv7511_link_config { 271 unsigned int input_color_depth; 272 enum hdmi_colorspace input_colorspace; 273 enum adv7511_input_clock input_clock; 274 unsigned int input_style; 275 enum adv7511_input_justification input_justification; 276 277 int clock_delay; 278 279 bool embedded_sync; 280 enum adv7511_input_sync_pulse sync_pulse; 281 enum adv7511_sync_polarity vsync_polarity; 282 enum adv7511_sync_polarity hsync_polarity; 283 }; 284 285 /** 286 * enum adv7511_csc_scaling - Scaling factor for the ADV7511 CSC 287 * @ADV7511_CSC_SCALING_1: CSC results are not scaled 288 * @ADV7511_CSC_SCALING_2: CSC results are scaled by a factor of two 289 * @ADV7511_CSC_SCALING_4: CSC results are scalled by a factor of four 290 */ 291 enum adv7511_csc_scaling { 292 ADV7511_CSC_SCALING_1 = 0, 293 ADV7511_CSC_SCALING_2 = 1, 294 ADV7511_CSC_SCALING_4 = 2, 295 }; 296 297 /** 298 * struct adv7511_video_config - Describes adv7511 hardware configuration 299 * @csc_enable: Whether to enable color space conversion 300 * @csc_scaling_factor: Color space conversion scaling factor 301 * @csc_coefficents: Color space conversion coefficents 302 * @hdmi_mode: Whether to use HDMI or DVI output mode 303 * @avi_infoframe: HDMI infoframe 304 */ 305 struct adv7511_video_config { 306 bool csc_enable; 307 enum adv7511_csc_scaling csc_scaling_factor; 308 const uint16_t *csc_coefficents; 309 310 bool hdmi_mode; 311 struct hdmi_avi_infoframe avi_infoframe; 312 }; 313 314 enum adv7511_type { 315 ADV7511, 316 ADV7533, 317 }; 318 319 #define ADV7511_MAX_ADDRS 3 320 321 struct adv7511 { 322 struct i2c_client *i2c_main; 323 struct i2c_client *i2c_edid; 324 struct i2c_client *i2c_cec; 325 326 struct regmap *regmap; 327 struct regmap *regmap_cec; 328 enum drm_connector_status status; 329 bool powered; 330 331 struct drm_display_mode curr_mode; 332 333 unsigned int f_tmds; 334 unsigned int f_audio; 335 unsigned int audio_source; 336 337 unsigned int current_edid_segment; 338 uint8_t edid_buf[256]; 339 bool edid_read; 340 341 wait_queue_head_t wq; 342 struct work_struct hpd_work; 343 344 struct drm_bridge bridge; 345 struct drm_connector connector; 346 347 bool embedded_sync; 348 enum adv7511_sync_polarity vsync_polarity; 349 enum adv7511_sync_polarity hsync_polarity; 350 bool rgb; 351 352 struct gpio_desc *gpio_pd; 353 354 struct regulator_bulk_data *supplies; 355 unsigned int num_supplies; 356 357 /* ADV7533 DSI RX related params */ 358 struct device_node *host_node; 359 struct mipi_dsi_device *dsi; 360 u8 num_dsi_lanes; 361 bool use_timing_gen; 362 363 enum adv7511_type type; 364 struct platform_device *audio_pdev; 365 366 struct cec_adapter *cec_adap; 367 u8 cec_addr[ADV7511_MAX_ADDRS]; 368 u8 cec_valid_addrs; 369 bool cec_enabled_adap; 370 struct clk *cec_clk; 371 u32 cec_clk_freq; 372 }; 373 374 #ifdef CONFIG_DRM_I2C_ADV7511_CEC 375 int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511); 376 void adv7511_cec_irq_process(struct adv7511 *adv7511, unsigned int irq1); 377 #else 378 static inline int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511) 379 { 380 unsigned int offset = adv7511->type == ADV7533 ? 381 ADV7533_REG_CEC_OFFSET : 0; 382 383 regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset, 384 ADV7511_CEC_CTRL_POWER_DOWN); 385 return 0; 386 } 387 #endif 388 389 #ifdef CONFIG_DRM_I2C_ADV7533 390 void adv7533_dsi_power_on(struct adv7511 *adv); 391 void adv7533_dsi_power_off(struct adv7511 *adv); 392 void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode); 393 int adv7533_patch_registers(struct adv7511 *adv); 394 int adv7533_patch_cec_registers(struct adv7511 *adv); 395 int adv7533_attach_dsi(struct adv7511 *adv); 396 void adv7533_detach_dsi(struct adv7511 *adv); 397 int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv); 398 #else 399 static inline void adv7533_dsi_power_on(struct adv7511 *adv) 400 { 401 } 402 403 static inline void adv7533_dsi_power_off(struct adv7511 *adv) 404 { 405 } 406 407 static inline void adv7533_mode_set(struct adv7511 *adv, 408 struct drm_display_mode *mode) 409 { 410 } 411 412 static inline int adv7533_patch_registers(struct adv7511 *adv) 413 { 414 return -ENODEV; 415 } 416 417 static inline int adv7533_patch_cec_registers(struct adv7511 *adv) 418 { 419 return -ENODEV; 420 } 421 422 static inline int adv7533_attach_dsi(struct adv7511 *adv) 423 { 424 return -ENODEV; 425 } 426 427 static inline void adv7533_detach_dsi(struct adv7511 *adv) 428 { 429 } 430 431 static inline int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv) 432 { 433 return -ENODEV; 434 } 435 #endif 436 437 #ifdef CONFIG_DRM_I2C_ADV7511_AUDIO 438 int adv7511_audio_init(struct device *dev, struct adv7511 *adv7511); 439 void adv7511_audio_exit(struct adv7511 *adv7511); 440 #else /*CONFIG_DRM_I2C_ADV7511_AUDIO */ 441 static inline int adv7511_audio_init(struct device *dev, struct adv7511 *adv7511) 442 { 443 return 0; 444 } 445 static inline void adv7511_audio_exit(struct adv7511 *adv7511) 446 { 447 } 448 #endif /* CONFIG_DRM_I2C_ADV7511_AUDIO */ 449 450 #endif /* __DRM_I2C_ADV7511_H__ */ 451