1 /* 2 * Copyright (C) 2014 Traphandler 3 * Copyright (C) 2014 Free Electrons 4 * Copyright (C) 2014 Atmel 5 * 6 * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com> 7 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License version 2 as published by 11 * the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but WITHOUT 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 16 * more details. 17 * 18 * You should have received a copy of the GNU General Public License along with 19 * this program. If not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #ifndef DRM_ATMEL_HLCDC_H 23 #define DRM_ATMEL_HLCDC_H 24 25 #include <linux/clk.h> 26 #include <linux/irqdomain.h> 27 #include <linux/pwm.h> 28 29 #include <drm/drm_crtc.h> 30 #include <drm/drm_crtc_helper.h> 31 #include <drm/drm_fb_cma_helper.h> 32 #include <drm/drm_gem_cma_helper.h> 33 #include <drm/drm_panel.h> 34 #include <drm/drmP.h> 35 36 #include "atmel_hlcdc_layer.h" 37 38 #define ATMEL_HLCDC_MAX_LAYERS 5 39 40 /** 41 * Atmel HLCDC Display Controller description structure. 42 * 43 * This structure describe the HLCDC IP capabilities and depends on the 44 * HLCDC IP version (or Atmel SoC family). 45 * 46 * @min_width: minimum width supported by the Display Controller 47 * @min_height: minimum height supported by the Display Controller 48 * @max_width: maximum width supported by the Display Controller 49 * @max_height: maximum height supported by the Display Controller 50 * @layers: a layer description table describing available layers 51 * @nlayers: layer description table size 52 */ 53 struct atmel_hlcdc_dc_desc { 54 int min_width; 55 int min_height; 56 int max_width; 57 int max_height; 58 const struct atmel_hlcdc_layer_desc *layers; 59 int nlayers; 60 }; 61 62 /** 63 * Atmel HLCDC Plane properties. 64 * 65 * This structure stores plane property definitions. 66 * 67 * @alpha: alpha blending (or transparency) property 68 * @rotation: rotation property 69 */ 70 struct atmel_hlcdc_plane_properties { 71 struct drm_property *alpha; 72 struct drm_property *rotation; 73 }; 74 75 /** 76 * Atmel HLCDC Plane. 77 * 78 * @base: base DRM plane structure 79 * @layer: HLCDC layer structure 80 * @properties: pointer to the property definitions structure 81 * @rotation: current rotation status 82 */ 83 struct atmel_hlcdc_plane { 84 struct drm_plane base; 85 struct atmel_hlcdc_layer layer; 86 struct atmel_hlcdc_plane_properties *properties; 87 unsigned int rotation; 88 }; 89 90 static inline struct atmel_hlcdc_plane * 91 drm_plane_to_atmel_hlcdc_plane(struct drm_plane *p) 92 { 93 return container_of(p, struct atmel_hlcdc_plane, base); 94 } 95 96 static inline struct atmel_hlcdc_plane * 97 atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *l) 98 { 99 return container_of(l, struct atmel_hlcdc_plane, layer); 100 } 101 102 /** 103 * Atmel HLCDC Plane update request structure. 104 * 105 * @crtc_x: x position of the plane relative to the CRTC 106 * @crtc_y: y position of the plane relative to the CRTC 107 * @crtc_w: visible width of the plane 108 * @crtc_h: visible height of the plane 109 * @src_x: x buffer position 110 * @src_y: y buffer position 111 * @src_w: buffer width 112 * @src_h: buffer height 113 * @fb: framebuffer object object 114 * @bpp: bytes per pixel deduced from pixel_format 115 * @offsets: offsets to apply to the GEM buffers 116 * @xstride: value to add to the pixel pointer between each line 117 * @pstride: value to add to the pixel pointer between each pixel 118 * @nplanes: number of planes (deduced from pixel_format) 119 */ 120 struct atmel_hlcdc_plane_update_req { 121 int crtc_x; 122 int crtc_y; 123 unsigned int crtc_w; 124 unsigned int crtc_h; 125 uint32_t src_x; 126 uint32_t src_y; 127 uint32_t src_w; 128 uint32_t src_h; 129 struct drm_framebuffer *fb; 130 131 /* These fields are private and should not be touched */ 132 int bpp[ATMEL_HLCDC_MAX_PLANES]; 133 unsigned int offsets[ATMEL_HLCDC_MAX_PLANES]; 134 int xstride[ATMEL_HLCDC_MAX_PLANES]; 135 int pstride[ATMEL_HLCDC_MAX_PLANES]; 136 int nplanes; 137 }; 138 139 /** 140 * Atmel HLCDC Planes. 141 * 142 * This structure stores the instantiated HLCDC Planes and can be accessed by 143 * the HLCDC Display Controller or the HLCDC CRTC. 144 * 145 * @primary: primary plane 146 * @cursor: hardware cursor plane 147 * @overlays: overlay plane table 148 * @noverlays: number of overlay planes 149 */ 150 struct atmel_hlcdc_planes { 151 struct atmel_hlcdc_plane *primary; 152 struct atmel_hlcdc_plane *cursor; 153 struct atmel_hlcdc_plane **overlays; 154 int noverlays; 155 }; 156 157 /** 158 * Atmel HLCDC Display Controller. 159 * 160 * @desc: HLCDC Display Controller description 161 * @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device 162 * @fbdev: framebuffer device attached to the Display Controller 163 * @crtc: CRTC provided by the display controller 164 * @planes: instantiated planes 165 * @layers: active HLCDC layer 166 * @wq: display controller workqueue 167 */ 168 struct atmel_hlcdc_dc { 169 const struct atmel_hlcdc_dc_desc *desc; 170 struct atmel_hlcdc *hlcdc; 171 struct drm_fbdev_cma *fbdev; 172 struct drm_crtc *crtc; 173 struct atmel_hlcdc_planes *planes; 174 struct atmel_hlcdc_layer *layers[ATMEL_HLCDC_MAX_LAYERS]; 175 struct workqueue_struct *wq; 176 }; 177 178 extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_formats; 179 extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_and_yuv_formats; 180 181 int atmel_hlcdc_dc_mode_valid(struct atmel_hlcdc_dc *dc, 182 struct drm_display_mode *mode); 183 184 struct atmel_hlcdc_planes * 185 atmel_hlcdc_create_planes(struct drm_device *dev); 186 187 int atmel_hlcdc_plane_prepare_update_req(struct drm_plane *p, 188 struct atmel_hlcdc_plane_update_req *req, 189 const struct drm_display_mode *mode); 190 191 int atmel_hlcdc_plane_apply_update_req(struct drm_plane *p, 192 struct atmel_hlcdc_plane_update_req *req); 193 194 int atmel_hlcdc_plane_update_with_mode(struct drm_plane *p, 195 struct drm_crtc *crtc, 196 struct drm_framebuffer *fb, 197 int crtc_x, int crtc_y, 198 unsigned int crtc_w, 199 unsigned int crtc_h, 200 uint32_t src_x, uint32_t src_y, 201 uint32_t src_w, uint32_t src_h, 202 const struct drm_display_mode *mode); 203 204 void atmel_hlcdc_crtc_irq(struct drm_crtc *c); 205 206 void atmel_hlcdc_crtc_cancel_page_flip(struct drm_crtc *crtc, 207 struct drm_file *file); 208 209 int atmel_hlcdc_crtc_create(struct drm_device *dev); 210 211 int atmel_hlcdc_create_outputs(struct drm_device *dev); 212 213 #endif /* DRM_ATMEL_HLCDC_H */ 214