1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * Parts based on xf86-video-ast 4312fec14SDave Airlie * Copyright (c) 2005 ASPEED Technology Inc. 5312fec14SDave Airlie * 6312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 7312fec14SDave Airlie * copy of this software and associated documentation files (the 8312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 9312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 10312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 11312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 12312fec14SDave Airlie * the following conditions: 13312fec14SDave Airlie * 14312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 21312fec14SDave Airlie * 22312fec14SDave Airlie * The above copyright notice and this permission notice (including the 23312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 24312fec14SDave Airlie * of the Software. 25312fec14SDave Airlie * 26312fec14SDave Airlie */ 27312fec14SDave Airlie /* 28312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 29312fec14SDave Airlie */ 30fbbbd160SSam Ravnborg 31312fec14SDave Airlie #include <linux/export.h> 32fbbbd160SSam Ravnborg #include <linux/pci.h> 33fbbbd160SSam Ravnborg 34ae46a57dSThomas Zimmermann #include <drm/drm_atomic.h> 35a6ff807bSThomas Zimmermann #include <drm/drm_atomic_helper.h> 36a6ff807bSThomas Zimmermann #include <drm/drm_atomic_state_helper.h> 37760285e7SDavid Howells #include <drm/drm_crtc.h> 38760285e7SDavid Howells #include <drm/drm_crtc_helper.h> 39fbbbd160SSam Ravnborg #include <drm/drm_fourcc.h> 404d36cf07SThomas Zimmermann #include <drm/drm_gem_atomic_helper.h> 41e6949ff3SThomas Zimmermann #include <drm/drm_gem_framebuffer_helper.h> 42fbbbd160SSam Ravnborg #include <drm/drm_gem_vram_helper.h> 433cb9ae4fSDaniel Vetter #include <drm/drm_plane_helper.h> 44fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h> 454220fdf0SThomas Zimmermann #include <drm/drm_simple_kms_helper.h> 46312fec14SDave Airlie 47fbbbd160SSam Ravnborg #include "ast_drv.h" 48312fec14SDave Airlie #include "ast_tables.h" 49312fec14SDave Airlie 50312fec14SDave Airlie static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev); 51312fec14SDave Airlie static void ast_i2c_destroy(struct ast_i2c_chan *i2c); 5202f3bb75SThomas Zimmermann 53312fec14SDave Airlie static inline void ast_load_palette_index(struct ast_private *ast, 54312fec14SDave Airlie u8 index, u8 red, u8 green, 55312fec14SDave Airlie u8 blue) 56312fec14SDave Airlie { 57312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index); 58312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 59312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_DATA, red); 60312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 61312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_DATA, green); 62312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 63312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_DATA, blue); 64312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 65312fec14SDave Airlie } 66312fec14SDave Airlie 67ae37025dSThomas Zimmermann static void ast_crtc_load_lut(struct ast_private *ast, struct drm_crtc *crtc) 68312fec14SDave Airlie { 693bffd962SPeter Rosin u16 *r, *g, *b; 70312fec14SDave Airlie int i; 71312fec14SDave Airlie 72312fec14SDave Airlie if (!crtc->enabled) 73312fec14SDave Airlie return; 74312fec14SDave Airlie 753bffd962SPeter Rosin r = crtc->gamma_store; 763bffd962SPeter Rosin g = r + crtc->gamma_size; 773bffd962SPeter Rosin b = g + crtc->gamma_size; 783bffd962SPeter Rosin 79312fec14SDave Airlie for (i = 0; i < 256; i++) 803bffd962SPeter Rosin ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8); 81312fec14SDave Airlie } 82312fec14SDave Airlie 83ae37025dSThomas Zimmermann static bool ast_get_vbios_mode_info(const struct drm_format_info *format, 84259d14a7SThomas Zimmermann const struct drm_display_mode *mode, 85312fec14SDave Airlie struct drm_display_mode *adjusted_mode, 86312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 87312fec14SDave Airlie { 88259d14a7SThomas Zimmermann u32 refresh_rate_index = 0, refresh_rate; 8922acdbb1SBenjamin Herrenschmidt const struct ast_vbios_enhtable *best = NULL; 90312fec14SDave Airlie u32 hborder, vborder; 9194d12b13SY.C. Chen bool check_sync; 92312fec14SDave Airlie 93ae37025dSThomas Zimmermann switch (format->cpp[0] * 8) { 94312fec14SDave Airlie case 8: 95312fec14SDave Airlie vbios_mode->std_table = &vbios_stdtable[VGAModeIndex]; 96312fec14SDave Airlie break; 97312fec14SDave Airlie case 16: 98312fec14SDave Airlie vbios_mode->std_table = &vbios_stdtable[HiCModeIndex]; 99312fec14SDave Airlie break; 100312fec14SDave Airlie case 24: 101312fec14SDave Airlie case 32: 102312fec14SDave Airlie vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex]; 103312fec14SDave Airlie break; 104312fec14SDave Airlie default: 105312fec14SDave Airlie return false; 106312fec14SDave Airlie } 107312fec14SDave Airlie 108259d14a7SThomas Zimmermann switch (mode->crtc_hdisplay) { 109312fec14SDave Airlie case 640: 110312fec14SDave Airlie vbios_mode->enh_table = &res_640x480[refresh_rate_index]; 111312fec14SDave Airlie break; 112312fec14SDave Airlie case 800: 113312fec14SDave Airlie vbios_mode->enh_table = &res_800x600[refresh_rate_index]; 114312fec14SDave Airlie break; 115312fec14SDave Airlie case 1024: 116312fec14SDave Airlie vbios_mode->enh_table = &res_1024x768[refresh_rate_index]; 117312fec14SDave Airlie break; 118312fec14SDave Airlie case 1280: 119259d14a7SThomas Zimmermann if (mode->crtc_vdisplay == 800) 120312fec14SDave Airlie vbios_mode->enh_table = &res_1280x800[refresh_rate_index]; 121312fec14SDave Airlie else 122312fec14SDave Airlie vbios_mode->enh_table = &res_1280x1024[refresh_rate_index]; 123312fec14SDave Airlie break; 124f1f62f2cSDave Airlie case 1360: 125f1f62f2cSDave Airlie vbios_mode->enh_table = &res_1360x768[refresh_rate_index]; 126f1f62f2cSDave Airlie break; 127312fec14SDave Airlie case 1440: 128312fec14SDave Airlie vbios_mode->enh_table = &res_1440x900[refresh_rate_index]; 129312fec14SDave Airlie break; 130312fec14SDave Airlie case 1600: 131259d14a7SThomas Zimmermann if (mode->crtc_vdisplay == 900) 132f1f62f2cSDave Airlie vbios_mode->enh_table = &res_1600x900[refresh_rate_index]; 133f1f62f2cSDave Airlie else 134312fec14SDave Airlie vbios_mode->enh_table = &res_1600x1200[refresh_rate_index]; 135312fec14SDave Airlie break; 136312fec14SDave Airlie case 1680: 137312fec14SDave Airlie vbios_mode->enh_table = &res_1680x1050[refresh_rate_index]; 138312fec14SDave Airlie break; 139312fec14SDave Airlie case 1920: 140259d14a7SThomas Zimmermann if (mode->crtc_vdisplay == 1080) 141312fec14SDave Airlie vbios_mode->enh_table = &res_1920x1080[refresh_rate_index]; 142312fec14SDave Airlie else 143312fec14SDave Airlie vbios_mode->enh_table = &res_1920x1200[refresh_rate_index]; 144312fec14SDave Airlie break; 145312fec14SDave Airlie default: 146312fec14SDave Airlie return false; 147312fec14SDave Airlie } 148312fec14SDave Airlie 149312fec14SDave Airlie refresh_rate = drm_mode_vrefresh(mode); 15094d12b13SY.C. Chen check_sync = vbios_mode->enh_table->flags & WideScreenMode; 151259d14a7SThomas Zimmermann 152259d14a7SThomas Zimmermann while (1) { 15322acdbb1SBenjamin Herrenschmidt const struct ast_vbios_enhtable *loop = vbios_mode->enh_table; 15494d12b13SY.C. Chen 15594d12b13SY.C. Chen while (loop->refresh_rate != 0xff) { 15694d12b13SY.C. Chen if ((check_sync) && 15794d12b13SY.C. Chen (((mode->flags & DRM_MODE_FLAG_NVSYNC) && 15894d12b13SY.C. Chen (loop->flags & PVSync)) || 15994d12b13SY.C. Chen ((mode->flags & DRM_MODE_FLAG_PVSYNC) && 16094d12b13SY.C. Chen (loop->flags & NVSync)) || 16194d12b13SY.C. Chen ((mode->flags & DRM_MODE_FLAG_NHSYNC) && 16294d12b13SY.C. Chen (loop->flags & PHSync)) || 16394d12b13SY.C. Chen ((mode->flags & DRM_MODE_FLAG_PHSYNC) && 16494d12b13SY.C. Chen (loop->flags & NHSync)))) { 16594d12b13SY.C. Chen loop++; 16694d12b13SY.C. Chen continue; 16794d12b13SY.C. Chen } 16894d12b13SY.C. Chen if (loop->refresh_rate <= refresh_rate 16994d12b13SY.C. Chen && (!best || loop->refresh_rate > best->refresh_rate)) 17094d12b13SY.C. Chen best = loop; 17194d12b13SY.C. Chen loop++; 17294d12b13SY.C. Chen } 17394d12b13SY.C. Chen if (best || !check_sync) 174312fec14SDave Airlie break; 17594d12b13SY.C. Chen check_sync = 0; 176259d14a7SThomas Zimmermann } 177259d14a7SThomas Zimmermann 17894d12b13SY.C. Chen if (best) 17994d12b13SY.C. Chen vbios_mode->enh_table = best; 180312fec14SDave Airlie 181312fec14SDave Airlie hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0; 182312fec14SDave Airlie vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0; 183312fec14SDave Airlie 184312fec14SDave Airlie adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht; 185312fec14SDave Airlie adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder; 186312fec14SDave Airlie adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder; 187312fec14SDave Airlie adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder + 188312fec14SDave Airlie vbios_mode->enh_table->hfp; 189312fec14SDave Airlie adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder + 190312fec14SDave Airlie vbios_mode->enh_table->hfp + 191312fec14SDave Airlie vbios_mode->enh_table->hsync); 192312fec14SDave Airlie 193312fec14SDave Airlie adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt; 194312fec14SDave Airlie adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder; 195312fec14SDave Airlie adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder; 196312fec14SDave Airlie adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder + 197312fec14SDave Airlie vbios_mode->enh_table->vfp; 198312fec14SDave Airlie adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder + 199312fec14SDave Airlie vbios_mode->enh_table->vfp + 200312fec14SDave Airlie vbios_mode->enh_table->vsync); 201312fec14SDave Airlie 202259d14a7SThomas Zimmermann return true; 203259d14a7SThomas Zimmermann } 204259d14a7SThomas Zimmermann 205ae37025dSThomas Zimmermann static void ast_set_vbios_color_reg(struct ast_private *ast, 206ae37025dSThomas Zimmermann const struct drm_format_info *format, 207259d14a7SThomas Zimmermann const struct ast_vbios_mode_info *vbios_mode) 208259d14a7SThomas Zimmermann { 209259d14a7SThomas Zimmermann u32 color_index; 210259d14a7SThomas Zimmermann 211ae37025dSThomas Zimmermann switch (format->cpp[0]) { 212259d14a7SThomas Zimmermann case 1: 213259d14a7SThomas Zimmermann color_index = VGAModeIndex - 1; 214259d14a7SThomas Zimmermann break; 215259d14a7SThomas Zimmermann case 2: 216259d14a7SThomas Zimmermann color_index = HiCModeIndex; 217259d14a7SThomas Zimmermann break; 218259d14a7SThomas Zimmermann case 3: 219259d14a7SThomas Zimmermann case 4: 220259d14a7SThomas Zimmermann color_index = TrueCModeIndex; 221291ddeb6SColin Ian King break; 222259d14a7SThomas Zimmermann default: 223259d14a7SThomas Zimmermann return; 224259d14a7SThomas Zimmermann } 225259d14a7SThomas Zimmermann 226259d14a7SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0x0f) << 4)); 227259d14a7SThomas Zimmermann 228259d14a7SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00); 229259d14a7SThomas Zimmermann 230259d14a7SThomas Zimmermann if (vbios_mode->enh_table->flags & NewModeInfo) { 231259d14a7SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); 232ae37025dSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, format->cpp[0] * 8); 233259d14a7SThomas Zimmermann } 234259d14a7SThomas Zimmermann } 235259d14a7SThomas Zimmermann 236ae37025dSThomas Zimmermann static void ast_set_vbios_mode_reg(struct ast_private *ast, 237259d14a7SThomas Zimmermann const struct drm_display_mode *adjusted_mode, 238259d14a7SThomas Zimmermann const struct ast_vbios_mode_info *vbios_mode) 239259d14a7SThomas Zimmermann { 240259d14a7SThomas Zimmermann u32 refresh_rate_index, mode_id; 241259d14a7SThomas Zimmermann 242312fec14SDave Airlie refresh_rate_index = vbios_mode->enh_table->refresh_rate_index; 243312fec14SDave Airlie mode_id = vbios_mode->enh_table->mode_id; 244312fec14SDave Airlie 245312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff); 246312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff); 247312fec14SDave Airlie 248f1f62f2cSDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00); 249259d14a7SThomas Zimmermann 250f1f62f2cSDave Airlie if (vbios_mode->enh_table->flags & NewModeInfo) { 251312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); 252312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000); 253312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay); 254312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8); 255312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay); 256312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8); 257312fec14SDave Airlie } 258f1f62f2cSDave Airlie } 259312fec14SDave Airlie 260ae37025dSThomas Zimmermann static void ast_set_std_reg(struct ast_private *ast, 261ae37025dSThomas Zimmermann struct drm_display_mode *mode, 262312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 263312fec14SDave Airlie { 26422acdbb1SBenjamin Herrenschmidt const struct ast_vbios_stdtable *stdtable; 265312fec14SDave Airlie u32 i; 266312fec14SDave Airlie u8 jreg; 267312fec14SDave Airlie 268312fec14SDave Airlie stdtable = vbios_mode->std_table; 269312fec14SDave Airlie 270312fec14SDave Airlie jreg = stdtable->misc; 271312fec14SDave Airlie ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); 272312fec14SDave Airlie 2732fbeec03SThomas Zimmermann /* Set SEQ; except Screen Disable field */ 274312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03); 2752fbeec03SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x01, 0xdf, stdtable->seq[0]); 2762fbeec03SThomas Zimmermann for (i = 1; i < 4; i++) { 277312fec14SDave Airlie jreg = stdtable->seq[i]; 278312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg); 279312fec14SDave Airlie } 280312fec14SDave Airlie 281a21fdd7aSThomas Zimmermann /* Set CRTC; except base address and offset */ 282312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); 283a21fdd7aSThomas Zimmermann for (i = 0; i < 12; i++) 284a21fdd7aSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 285a21fdd7aSThomas Zimmermann for (i = 14; i < 19; i++) 286a21fdd7aSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 287a21fdd7aSThomas Zimmermann for (i = 20; i < 25; i++) 288312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 289312fec14SDave Airlie 290312fec14SDave Airlie /* set AR */ 291312fec14SDave Airlie jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 292312fec14SDave Airlie for (i = 0; i < 20; i++) { 293312fec14SDave Airlie jreg = stdtable->ar[i]; 294312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i); 295312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg); 296312fec14SDave Airlie } 297312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14); 298312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00); 299312fec14SDave Airlie 300312fec14SDave Airlie jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 301312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20); 302312fec14SDave Airlie 303312fec14SDave Airlie /* Set GR */ 304312fec14SDave Airlie for (i = 0; i < 9; i++) 305312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]); 306312fec14SDave Airlie } 307312fec14SDave Airlie 308ae37025dSThomas Zimmermann static void ast_set_crtc_reg(struct ast_private *ast, 309ae37025dSThomas Zimmermann struct drm_display_mode *mode, 310312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 311312fec14SDave Airlie { 312312fec14SDave Airlie u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; 3139f93c8b3SY.C. Chen u16 temp, precache = 0; 3149f93c8b3SY.C. Chen 3159f93c8b3SY.C. Chen if ((ast->chip == AST2500) && 3169f93c8b3SY.C. Chen (vbios_mode->enh_table->flags & AST2500PreCatchCRT)) 3179f93c8b3SY.C. Chen precache = 40; 318312fec14SDave Airlie 319312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); 320312fec14SDave Airlie 321312fec14SDave Airlie temp = (mode->crtc_htotal >> 3) - 5; 322312fec14SDave Airlie if (temp & 0x100) 323312fec14SDave Airlie jregAC |= 0x01; /* HT D[8] */ 324312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp); 325312fec14SDave Airlie 326312fec14SDave Airlie temp = (mode->crtc_hdisplay >> 3) - 1; 327312fec14SDave Airlie if (temp & 0x100) 328312fec14SDave Airlie jregAC |= 0x04; /* HDE D[8] */ 329312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp); 330312fec14SDave Airlie 331312fec14SDave Airlie temp = (mode->crtc_hblank_start >> 3) - 1; 332312fec14SDave Airlie if (temp & 0x100) 333312fec14SDave Airlie jregAC |= 0x10; /* HBS D[8] */ 334312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp); 335312fec14SDave Airlie 336312fec14SDave Airlie temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; 337312fec14SDave Airlie if (temp & 0x20) 338312fec14SDave Airlie jreg05 |= 0x80; /* HBE D[5] */ 339312fec14SDave Airlie if (temp & 0x40) 340312fec14SDave Airlie jregAD |= 0x01; /* HBE D[5] */ 341312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f)); 342312fec14SDave Airlie 3439f93c8b3SY.C. Chen temp = ((mode->crtc_hsync_start-precache) >> 3) - 1; 344312fec14SDave Airlie if (temp & 0x100) 345312fec14SDave Airlie jregAC |= 0x40; /* HRS D[5] */ 346312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp); 347312fec14SDave Airlie 3489f93c8b3SY.C. Chen temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f; 349312fec14SDave Airlie if (temp & 0x20) 350312fec14SDave Airlie jregAD |= 0x04; /* HRE D[5] */ 351312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); 352312fec14SDave Airlie 353312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC); 354312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD); 355312fec14SDave Airlie 356312fec14SDave Airlie /* vert timings */ 357312fec14SDave Airlie temp = (mode->crtc_vtotal) - 2; 358312fec14SDave Airlie if (temp & 0x100) 359312fec14SDave Airlie jreg07 |= 0x01; 360312fec14SDave Airlie if (temp & 0x200) 361312fec14SDave Airlie jreg07 |= 0x20; 362312fec14SDave Airlie if (temp & 0x400) 363312fec14SDave Airlie jregAE |= 0x01; 364312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp); 365312fec14SDave Airlie 366312fec14SDave Airlie temp = (mode->crtc_vsync_start) - 1; 367312fec14SDave Airlie if (temp & 0x100) 368312fec14SDave Airlie jreg07 |= 0x04; 369312fec14SDave Airlie if (temp & 0x200) 370312fec14SDave Airlie jreg07 |= 0x80; 371312fec14SDave Airlie if (temp & 0x400) 372312fec14SDave Airlie jregAE |= 0x08; 373312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp); 374312fec14SDave Airlie 375312fec14SDave Airlie temp = (mode->crtc_vsync_end - 1) & 0x3f; 376312fec14SDave Airlie if (temp & 0x10) 377312fec14SDave Airlie jregAE |= 0x20; 378312fec14SDave Airlie if (temp & 0x20) 379312fec14SDave Airlie jregAE |= 0x40; 380312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf); 381312fec14SDave Airlie 382312fec14SDave Airlie temp = mode->crtc_vdisplay - 1; 383312fec14SDave Airlie if (temp & 0x100) 384312fec14SDave Airlie jreg07 |= 0x02; 385312fec14SDave Airlie if (temp & 0x200) 386312fec14SDave Airlie jreg07 |= 0x40; 387312fec14SDave Airlie if (temp & 0x400) 388312fec14SDave Airlie jregAE |= 0x02; 389312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp); 390312fec14SDave Airlie 391312fec14SDave Airlie temp = mode->crtc_vblank_start - 1; 392312fec14SDave Airlie if (temp & 0x100) 393312fec14SDave Airlie jreg07 |= 0x08; 394312fec14SDave Airlie if (temp & 0x200) 395312fec14SDave Airlie jreg09 |= 0x20; 396312fec14SDave Airlie if (temp & 0x400) 397312fec14SDave Airlie jregAE |= 0x04; 398312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp); 399312fec14SDave Airlie 400312fec14SDave Airlie temp = mode->crtc_vblank_end - 1; 401312fec14SDave Airlie if (temp & 0x100) 402312fec14SDave Airlie jregAE |= 0x10; 403312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp); 404312fec14SDave Airlie 405312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07); 406312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09); 407312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80)); 408312fec14SDave Airlie 4099f93c8b3SY.C. Chen if (precache) 4109f93c8b3SY.C. Chen ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80); 4119f93c8b3SY.C. Chen else 4129f93c8b3SY.C. Chen ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00); 4139f93c8b3SY.C. Chen 414312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80); 415312fec14SDave Airlie } 416312fec14SDave Airlie 417ae37025dSThomas Zimmermann static void ast_set_offset_reg(struct ast_private *ast, 418ae37025dSThomas Zimmermann struct drm_framebuffer *fb) 419312fec14SDave Airlie { 420312fec14SDave Airlie u16 offset; 421312fec14SDave Airlie 4227445283aSVille Syrjälä offset = fb->pitches[0] >> 3; 423312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff)); 424312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f); 425312fec14SDave Airlie } 426312fec14SDave Airlie 427ae37025dSThomas Zimmermann static void ast_set_dclk_reg(struct ast_private *ast, 428ae37025dSThomas Zimmermann struct drm_display_mode *mode, 429312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 430312fec14SDave Airlie { 43122acdbb1SBenjamin Herrenschmidt const struct ast_vbios_dclk_info *clk_info; 432312fec14SDave Airlie 4339f93c8b3SY.C. Chen if (ast->chip == AST2500) 4349f93c8b3SY.C. Chen clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index]; 4359f93c8b3SY.C. Chen else 436312fec14SDave Airlie clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; 437312fec14SDave Airlie 438312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1); 439312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2); 440312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f, 4419f93c8b3SY.C. Chen (clk_info->param3 & 0xc0) | 4429f93c8b3SY.C. Chen ((clk_info->param3 & 0x3) << 4)); 443312fec14SDave Airlie } 444312fec14SDave Airlie 445ae37025dSThomas Zimmermann static void ast_set_color_reg(struct ast_private *ast, 446ae37025dSThomas Zimmermann const struct drm_format_info *format) 447312fec14SDave Airlie { 448312fec14SDave Airlie u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; 449312fec14SDave Airlie 450ae37025dSThomas Zimmermann switch (format->cpp[0] * 8) { 451312fec14SDave Airlie case 8: 452312fec14SDave Airlie jregA0 = 0x70; 453312fec14SDave Airlie jregA3 = 0x01; 454312fec14SDave Airlie jregA8 = 0x00; 455312fec14SDave Airlie break; 456312fec14SDave Airlie case 15: 457312fec14SDave Airlie case 16: 458312fec14SDave Airlie jregA0 = 0x70; 459312fec14SDave Airlie jregA3 = 0x04; 460312fec14SDave Airlie jregA8 = 0x02; 461312fec14SDave Airlie break; 462312fec14SDave Airlie case 32: 463312fec14SDave Airlie jregA0 = 0x70; 464312fec14SDave Airlie jregA3 = 0x08; 465312fec14SDave Airlie jregA8 = 0x02; 466312fec14SDave Airlie break; 467312fec14SDave Airlie } 468312fec14SDave Airlie 469312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0); 470312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3); 471312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8); 4720d45ad98SThomas Zimmermann } 4730d45ad98SThomas Zimmermann 474ae37025dSThomas Zimmermann static void ast_set_crtthd_reg(struct ast_private *ast) 4750d45ad98SThomas Zimmermann { 476312fec14SDave Airlie /* Set Threshold */ 4779f93c8b3SY.C. Chen if (ast->chip == AST2300 || ast->chip == AST2400 || 4789f93c8b3SY.C. Chen ast->chip == AST2500) { 479312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78); 480312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60); 481312fec14SDave Airlie } else if (ast->chip == AST2100 || 482312fec14SDave Airlie ast->chip == AST1100 || 483312fec14SDave Airlie ast->chip == AST2200 || 484312fec14SDave Airlie ast->chip == AST2150) { 485312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f); 486312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f); 487312fec14SDave Airlie } else { 488312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f); 489312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f); 490312fec14SDave Airlie } 491312fec14SDave Airlie } 492312fec14SDave Airlie 493ae37025dSThomas Zimmermann static void ast_set_sync_reg(struct ast_private *ast, 494ae37025dSThomas Zimmermann struct drm_display_mode *mode, 495312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 496312fec14SDave Airlie { 497312fec14SDave Airlie u8 jreg; 498312fec14SDave Airlie 499312fec14SDave Airlie jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ); 50094d12b13SY.C. Chen jreg &= ~0xC0; 50194d12b13SY.C. Chen if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80; 50294d12b13SY.C. Chen if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40; 503312fec14SDave Airlie ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); 504312fec14SDave Airlie } 505312fec14SDave Airlie 506ae37025dSThomas Zimmermann static void ast_set_start_address_crt1(struct ast_private *ast, 507ae37025dSThomas Zimmermann unsigned offset) 508312fec14SDave Airlie { 509312fec14SDave Airlie u32 addr; 510312fec14SDave Airlie 511312fec14SDave Airlie addr = offset >> 2; 512312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff)); 513312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff)); 514312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff)); 515312fec14SDave Airlie 516312fec14SDave Airlie } 517312fec14SDave Airlie 51839edb287SThomas Zimmermann static void ast_wait_for_vretrace(struct ast_private *ast) 51939edb287SThomas Zimmermann { 52039edb287SThomas Zimmermann unsigned long timeout = jiffies + HZ; 52139edb287SThomas Zimmermann u8 vgair1; 52239edb287SThomas Zimmermann 52339edb287SThomas Zimmermann do { 52439edb287SThomas Zimmermann vgair1 = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 52539edb287SThomas Zimmermann } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout)); 52639edb287SThomas Zimmermann } 52739edb287SThomas Zimmermann 528a6ff807bSThomas Zimmermann /* 529a6ff807bSThomas Zimmermann * Primary plane 530a6ff807bSThomas Zimmermann */ 531a6ff807bSThomas Zimmermann 532a6ff807bSThomas Zimmermann static const uint32_t ast_primary_plane_formats[] = { 533a6ff807bSThomas Zimmermann DRM_FORMAT_XRGB8888, 534a6ff807bSThomas Zimmermann DRM_FORMAT_RGB565, 535a6ff807bSThomas Zimmermann DRM_FORMAT_C8, 536a6ff807bSThomas Zimmermann }; 537a6ff807bSThomas Zimmermann 538ae46a57dSThomas Zimmermann static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane, 5397c11b99aSMaxime Ripard struct drm_atomic_state *state) 540a6ff807bSThomas Zimmermann { 5417c11b99aSMaxime Ripard struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 5427c11b99aSMaxime Ripard plane); 543ae46a57dSThomas Zimmermann struct drm_crtc_state *crtc_state; 5443339fdf5SThomas Zimmermann struct ast_crtc_state *ast_crtc_state; 545ae46a57dSThomas Zimmermann int ret; 546ae46a57dSThomas Zimmermann 547ba5c1649SMaxime Ripard if (!new_plane_state->crtc) 548ae46a57dSThomas Zimmermann return 0; 549ae46a57dSThomas Zimmermann 550dec92020SMaxime Ripard crtc_state = drm_atomic_get_new_crtc_state(state, 551ba5c1649SMaxime Ripard new_plane_state->crtc); 552ae46a57dSThomas Zimmermann 553ba5c1649SMaxime Ripard ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, 554ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 555ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 556ae46a57dSThomas Zimmermann false, true); 557ae46a57dSThomas Zimmermann if (ret) 558ae46a57dSThomas Zimmermann return ret; 559ae46a57dSThomas Zimmermann 560ba5c1649SMaxime Ripard if (!new_plane_state->visible) 5613339fdf5SThomas Zimmermann return 0; 5623339fdf5SThomas Zimmermann 5633339fdf5SThomas Zimmermann ast_crtc_state = to_ast_crtc_state(crtc_state); 5643339fdf5SThomas Zimmermann 565ba5c1649SMaxime Ripard ast_crtc_state->format = new_plane_state->fb->format; 5663339fdf5SThomas Zimmermann 567a6ff807bSThomas Zimmermann return 0; 568a6ff807bSThomas Zimmermann } 569a6ff807bSThomas Zimmermann 5703a53230eSSamuel Zou static void 5713a53230eSSamuel Zou ast_primary_plane_helper_atomic_update(struct drm_plane *plane, 572977697e2SMaxime Ripard struct drm_atomic_state *state) 573a6ff807bSThomas Zimmermann { 574977697e2SMaxime Ripard struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, 575977697e2SMaxime Ripard plane); 5761a19b4cbSThomas Zimmermann struct drm_device *dev = plane->dev; 5771a19b4cbSThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 57837418bf1SMaxime Ripard struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, 57937418bf1SMaxime Ripard plane); 580a6ff807bSThomas Zimmermann struct drm_gem_vram_object *gbo; 581a6ff807bSThomas Zimmermann s64 gpu_addr; 58241016fe1SMaxime Ripard struct drm_framebuffer *fb = new_state->fb; 5835638c82cSThomas Zimmermann struct drm_framebuffer *old_fb = old_state->fb; 584a6ff807bSThomas Zimmermann 5855638c82cSThomas Zimmermann if (!old_fb || (fb->format != old_fb->format)) { 58641016fe1SMaxime Ripard struct drm_crtc_state *crtc_state = new_state->crtc->state; 5875638c82cSThomas Zimmermann struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 5885638c82cSThomas Zimmermann struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info; 5895638c82cSThomas Zimmermann 5905638c82cSThomas Zimmermann ast_set_color_reg(ast, fb->format); 5915638c82cSThomas Zimmermann ast_set_vbios_color_reg(ast, fb->format, vbios_mode_info); 5925638c82cSThomas Zimmermann } 5935638c82cSThomas Zimmermann 5945638c82cSThomas Zimmermann gbo = drm_gem_vram_of_gem(fb->obj[0]); 595a6ff807bSThomas Zimmermann gpu_addr = drm_gem_vram_offset(gbo); 5961a19b4cbSThomas Zimmermann if (drm_WARN_ON_ONCE(dev, gpu_addr < 0)) 597a6ff807bSThomas Zimmermann return; /* Bug: we didn't pin the BO to VRAM in prepare_fb. */ 598a6ff807bSThomas Zimmermann 5995638c82cSThomas Zimmermann ast_set_offset_reg(ast, fb); 600ae37025dSThomas Zimmermann ast_set_start_address_crt1(ast, (u32)gpu_addr); 6012fbeec03SThomas Zimmermann 6022fbeec03SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x00); 6032fbeec03SThomas Zimmermann } 6042fbeec03SThomas Zimmermann 6052fbeec03SThomas Zimmermann static void 6062fbeec03SThomas Zimmermann ast_primary_plane_helper_atomic_disable(struct drm_plane *plane, 607977697e2SMaxime Ripard struct drm_atomic_state *state) 6082fbeec03SThomas Zimmermann { 609fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(plane->dev); 6102fbeec03SThomas Zimmermann 6112fbeec03SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20); 612a6ff807bSThomas Zimmermann } 613a6ff807bSThomas Zimmermann 614a6ff807bSThomas Zimmermann static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = { 615*f8bd3dbbSDaniel Vetter DRM_GEM_VRAM_PLANE_HELPER_FUNCS, 616a6ff807bSThomas Zimmermann .atomic_check = ast_primary_plane_helper_atomic_check, 617a6ff807bSThomas Zimmermann .atomic_update = ast_primary_plane_helper_atomic_update, 6182fbeec03SThomas Zimmermann .atomic_disable = ast_primary_plane_helper_atomic_disable, 619a6ff807bSThomas Zimmermann }; 620a6ff807bSThomas Zimmermann 621a6ff807bSThomas Zimmermann static const struct drm_plane_funcs ast_primary_plane_funcs = { 622a6ff807bSThomas Zimmermann .update_plane = drm_atomic_helper_update_plane, 623a6ff807bSThomas Zimmermann .disable_plane = drm_atomic_helper_disable_plane, 624a6ff807bSThomas Zimmermann .destroy = drm_plane_cleanup, 625a6ff807bSThomas Zimmermann .reset = drm_atomic_helper_plane_reset, 626a6ff807bSThomas Zimmermann .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 627a6ff807bSThomas Zimmermann .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 628a6ff807bSThomas Zimmermann }; 629a6ff807bSThomas Zimmermann 630616048afSThomas Zimmermann static int ast_primary_plane_init(struct ast_private *ast) 631616048afSThomas Zimmermann { 632616048afSThomas Zimmermann struct drm_device *dev = &ast->base; 633616048afSThomas Zimmermann struct drm_plane *primary_plane = &ast->primary_plane; 634616048afSThomas Zimmermann int ret; 635616048afSThomas Zimmermann 636616048afSThomas Zimmermann ret = drm_universal_plane_init(dev, primary_plane, 0x01, 637616048afSThomas Zimmermann &ast_primary_plane_funcs, 638616048afSThomas Zimmermann ast_primary_plane_formats, 639616048afSThomas Zimmermann ARRAY_SIZE(ast_primary_plane_formats), 640616048afSThomas Zimmermann NULL, DRM_PLANE_TYPE_PRIMARY, NULL); 641616048afSThomas Zimmermann if (ret) { 642616048afSThomas Zimmermann drm_err(dev, "drm_universal_plane_init() failed: %d\n", ret); 643616048afSThomas Zimmermann return ret; 644616048afSThomas Zimmermann } 645616048afSThomas Zimmermann drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs); 646616048afSThomas Zimmermann 647616048afSThomas Zimmermann return 0; 648616048afSThomas Zimmermann } 649616048afSThomas Zimmermann 650a6ff807bSThomas Zimmermann /* 65102f3bb75SThomas Zimmermann * Cursor plane 65202f3bb75SThomas Zimmermann */ 65302f3bb75SThomas Zimmermann 654718c2286SThomas Zimmermann static void ast_update_cursor_image(u8 __iomem *dst, const u8 *src, int width, int height) 655718c2286SThomas Zimmermann { 656718c2286SThomas Zimmermann union { 657718c2286SThomas Zimmermann u32 ul; 658718c2286SThomas Zimmermann u8 b[4]; 659718c2286SThomas Zimmermann } srcdata32[2], data32; 660718c2286SThomas Zimmermann union { 661718c2286SThomas Zimmermann u16 us; 662718c2286SThomas Zimmermann u8 b[2]; 663718c2286SThomas Zimmermann } data16; 664718c2286SThomas Zimmermann u32 csum = 0; 665718c2286SThomas Zimmermann s32 alpha_dst_delta, last_alpha_dst_delta; 666718c2286SThomas Zimmermann u8 __iomem *dstxor; 667718c2286SThomas Zimmermann const u8 *srcxor; 668718c2286SThomas Zimmermann int i, j; 669718c2286SThomas Zimmermann u32 per_pixel_copy, two_pixel_copy; 670718c2286SThomas Zimmermann 671718c2286SThomas Zimmermann alpha_dst_delta = AST_MAX_HWC_WIDTH << 1; 672718c2286SThomas Zimmermann last_alpha_dst_delta = alpha_dst_delta - (width << 1); 673718c2286SThomas Zimmermann 674718c2286SThomas Zimmermann srcxor = src; 675718c2286SThomas Zimmermann dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta; 676718c2286SThomas Zimmermann per_pixel_copy = width & 1; 677718c2286SThomas Zimmermann two_pixel_copy = width >> 1; 678718c2286SThomas Zimmermann 679718c2286SThomas Zimmermann for (j = 0; j < height; j++) { 680718c2286SThomas Zimmermann for (i = 0; i < two_pixel_copy; i++) { 681718c2286SThomas Zimmermann srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; 682718c2286SThomas Zimmermann srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0; 683718c2286SThomas Zimmermann data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); 684718c2286SThomas Zimmermann data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); 685718c2286SThomas Zimmermann data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4); 686718c2286SThomas Zimmermann data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4); 687718c2286SThomas Zimmermann 688718c2286SThomas Zimmermann writel(data32.ul, dstxor); 689718c2286SThomas Zimmermann csum += data32.ul; 690718c2286SThomas Zimmermann 691718c2286SThomas Zimmermann dstxor += 4; 692718c2286SThomas Zimmermann srcxor += 8; 693718c2286SThomas Zimmermann 694718c2286SThomas Zimmermann } 695718c2286SThomas Zimmermann 696718c2286SThomas Zimmermann for (i = 0; i < per_pixel_copy; i++) { 697718c2286SThomas Zimmermann srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; 698718c2286SThomas Zimmermann data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); 699718c2286SThomas Zimmermann data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); 700718c2286SThomas Zimmermann writew(data16.us, dstxor); 701718c2286SThomas Zimmermann csum += (u32)data16.us; 702718c2286SThomas Zimmermann 703718c2286SThomas Zimmermann dstxor += 2; 704718c2286SThomas Zimmermann srcxor += 4; 705718c2286SThomas Zimmermann } 706718c2286SThomas Zimmermann dstxor += last_alpha_dst_delta; 707718c2286SThomas Zimmermann } 708718c2286SThomas Zimmermann 709718c2286SThomas Zimmermann /* write checksum + signature */ 710718c2286SThomas Zimmermann dst += AST_HWC_SIZE; 711718c2286SThomas Zimmermann writel(csum, dst); 712718c2286SThomas Zimmermann writel(width, dst + AST_HWC_SIGNATURE_SizeX); 713718c2286SThomas Zimmermann writel(height, dst + AST_HWC_SIGNATURE_SizeY); 714718c2286SThomas Zimmermann writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX); 715718c2286SThomas Zimmermann writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY); 716718c2286SThomas Zimmermann } 717718c2286SThomas Zimmermann 718718c2286SThomas Zimmermann static void ast_set_cursor_base(struct ast_private *ast, u64 address) 719718c2286SThomas Zimmermann { 720718c2286SThomas Zimmermann u8 addr0 = (address >> 3) & 0xff; 721718c2286SThomas Zimmermann u8 addr1 = (address >> 11) & 0xff; 722718c2286SThomas Zimmermann u8 addr2 = (address >> 19) & 0xff; 723718c2286SThomas Zimmermann 724718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, addr0); 725718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, addr1); 726718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, addr2); 727718c2286SThomas Zimmermann } 728718c2286SThomas Zimmermann 729718c2286SThomas Zimmermann static void ast_set_cursor_location(struct ast_private *ast, u16 x, u16 y, 730718c2286SThomas Zimmermann u8 x_offset, u8 y_offset) 731718c2286SThomas Zimmermann { 732718c2286SThomas Zimmermann u8 x0 = (x & 0x00ff); 733718c2286SThomas Zimmermann u8 x1 = (x & 0x0f00) >> 8; 734718c2286SThomas Zimmermann u8 y0 = (y & 0x00ff); 735718c2286SThomas Zimmermann u8 y1 = (y & 0x0700) >> 8; 736718c2286SThomas Zimmermann 737718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset); 738718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset); 739718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, x0); 740718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, x1); 741718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, y0); 742718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, y1); 743718c2286SThomas Zimmermann } 744718c2286SThomas Zimmermann 745718c2286SThomas Zimmermann static void ast_set_cursor_enabled(struct ast_private *ast, bool enabled) 746718c2286SThomas Zimmermann { 747718c2286SThomas Zimmermann static const u8 mask = (u8)~(AST_IO_VGACRCB_HWC_16BPP | 748718c2286SThomas Zimmermann AST_IO_VGACRCB_HWC_ENABLED); 749718c2286SThomas Zimmermann 750718c2286SThomas Zimmermann u8 vgacrcb = AST_IO_VGACRCB_HWC_16BPP; 751718c2286SThomas Zimmermann 752718c2286SThomas Zimmermann if (enabled) 753718c2286SThomas Zimmermann vgacrcb |= AST_IO_VGACRCB_HWC_ENABLED; 754718c2286SThomas Zimmermann 755718c2286SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, mask, vgacrcb); 756718c2286SThomas Zimmermann } 757718c2286SThomas Zimmermann 75802f3bb75SThomas Zimmermann static const uint32_t ast_cursor_plane_formats[] = { 75902f3bb75SThomas Zimmermann DRM_FORMAT_ARGB8888, 76002f3bb75SThomas Zimmermann }; 76102f3bb75SThomas Zimmermann 76202f3bb75SThomas Zimmermann static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane, 7637c11b99aSMaxime Ripard struct drm_atomic_state *state) 76402f3bb75SThomas Zimmermann { 7657c11b99aSMaxime Ripard struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 7667c11b99aSMaxime Ripard plane); 767ba5c1649SMaxime Ripard struct drm_framebuffer *fb = new_plane_state->fb; 768ae46a57dSThomas Zimmermann struct drm_crtc_state *crtc_state; 769ae46a57dSThomas Zimmermann int ret; 770ae46a57dSThomas Zimmermann 771ba5c1649SMaxime Ripard if (!new_plane_state->crtc) 772ae46a57dSThomas Zimmermann return 0; 773ae46a57dSThomas Zimmermann 774dec92020SMaxime Ripard crtc_state = drm_atomic_get_new_crtc_state(state, 775ba5c1649SMaxime Ripard new_plane_state->crtc); 776ae46a57dSThomas Zimmermann 777ba5c1649SMaxime Ripard ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, 778ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 779ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 780ae46a57dSThomas Zimmermann true, true); 781ae46a57dSThomas Zimmermann if (ret) 782ae46a57dSThomas Zimmermann return ret; 783ae46a57dSThomas Zimmermann 784ba5c1649SMaxime Ripard if (!new_plane_state->visible) 785ae46a57dSThomas Zimmermann return 0; 786ae46a57dSThomas Zimmermann 787ae46a57dSThomas Zimmermann if (fb->width > AST_MAX_HWC_WIDTH || fb->height > AST_MAX_HWC_HEIGHT) 788ae46a57dSThomas Zimmermann return -EINVAL; 789ae46a57dSThomas Zimmermann 79002f3bb75SThomas Zimmermann return 0; 79102f3bb75SThomas Zimmermann } 79202f3bb75SThomas Zimmermann 79302f3bb75SThomas Zimmermann static void 79402f3bb75SThomas Zimmermann ast_cursor_plane_helper_atomic_update(struct drm_plane *plane, 795977697e2SMaxime Ripard struct drm_atomic_state *state) 79602f3bb75SThomas Zimmermann { 797afee7e95SThomas Zimmermann struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane); 798977697e2SMaxime Ripard struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, 799977697e2SMaxime Ripard plane); 80037418bf1SMaxime Ripard struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, 80137418bf1SMaxime Ripard plane); 80241016fe1SMaxime Ripard struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(new_state); 80341016fe1SMaxime Ripard struct drm_framebuffer *fb = new_state->fb; 804365c0e70SThomas Zimmermann struct ast_private *ast = to_ast_private(plane->dev); 8054d36cf07SThomas Zimmermann struct dma_buf_map dst_map = 8064d36cf07SThomas Zimmermann ast_cursor_plane->hwc[ast_cursor_plane->next_hwc_index].map; 807385131f3SThomas Zimmermann u64 dst_off = 808385131f3SThomas Zimmermann ast_cursor_plane->hwc[ast_cursor_plane->next_hwc_index].off; 8094d36cf07SThomas Zimmermann struct dma_buf_map src_map = shadow_plane_state->map[0]; 81081039adcSThomas Zimmermann unsigned int offset_x, offset_y; 811718c2286SThomas Zimmermann u16 x, y; 812718c2286SThomas Zimmermann u8 x_offset, y_offset; 813718c2286SThomas Zimmermann u8 __iomem *dst; 814718c2286SThomas Zimmermann u8 __iomem *sig; 8154d36cf07SThomas Zimmermann const u8 *src; 816718c2286SThomas Zimmermann 8174d36cf07SThomas Zimmermann src = src_map.vaddr; /* TODO: Use mapping abstraction properly */ 8184d36cf07SThomas Zimmermann dst = dst_map.vaddr_iomem; /* TODO: Use mapping abstraction properly */ 8194d36cf07SThomas Zimmermann sig = dst + AST_HWC_SIZE; /* TODO: Use mapping abstraction properly */ 8204d36cf07SThomas Zimmermann 8214d36cf07SThomas Zimmermann /* 8224d36cf07SThomas Zimmermann * Do data transfer to HW cursor BO. If a new cursor image was installed, 8234d36cf07SThomas Zimmermann * point the scanout engine to dst_gbo's offset and page-flip the HWC buffers. 8244d36cf07SThomas Zimmermann */ 8254d36cf07SThomas Zimmermann 8264d36cf07SThomas Zimmermann ast_update_cursor_image(dst, src, fb->width, fb->height); 827718c2286SThomas Zimmermann 82841016fe1SMaxime Ripard if (new_state->fb != old_state->fb) { 829385131f3SThomas Zimmermann ast_set_cursor_base(ast, dst_off); 830718c2286SThomas Zimmermann 831afee7e95SThomas Zimmermann ++ast_cursor_plane->next_hwc_index; 832afee7e95SThomas Zimmermann ast_cursor_plane->next_hwc_index %= ARRAY_SIZE(ast_cursor_plane->hwc); 833718c2286SThomas Zimmermann } 834718c2286SThomas Zimmermann 8354d36cf07SThomas Zimmermann /* 8364d36cf07SThomas Zimmermann * Update location in HWC signature and registers. 8374d36cf07SThomas Zimmermann */ 838718c2286SThomas Zimmermann 83941016fe1SMaxime Ripard writel(new_state->crtc_x, sig + AST_HWC_SIGNATURE_X); 84041016fe1SMaxime Ripard writel(new_state->crtc_y, sig + AST_HWC_SIGNATURE_Y); 841718c2286SThomas Zimmermann 84281039adcSThomas Zimmermann offset_x = AST_MAX_HWC_WIDTH - fb->width; 843ee4a92d6SThomas Zimmermann offset_y = AST_MAX_HWC_HEIGHT - fb->height; 84402f3bb75SThomas Zimmermann 84541016fe1SMaxime Ripard if (new_state->crtc_x < 0) { 84641016fe1SMaxime Ripard x_offset = (-new_state->crtc_x) + offset_x; 847718c2286SThomas Zimmermann x = 0; 848718c2286SThomas Zimmermann } else { 849718c2286SThomas Zimmermann x_offset = offset_x; 85041016fe1SMaxime Ripard x = new_state->crtc_x; 851718c2286SThomas Zimmermann } 85241016fe1SMaxime Ripard if (new_state->crtc_y < 0) { 85341016fe1SMaxime Ripard y_offset = (-new_state->crtc_y) + offset_y; 854718c2286SThomas Zimmermann y = 0; 855718c2286SThomas Zimmermann } else { 856718c2286SThomas Zimmermann y_offset = offset_y; 85741016fe1SMaxime Ripard y = new_state->crtc_y; 85802f3bb75SThomas Zimmermann } 85902f3bb75SThomas Zimmermann 860718c2286SThomas Zimmermann ast_set_cursor_location(ast, x, y, x_offset, y_offset); 861718c2286SThomas Zimmermann 8624d36cf07SThomas Zimmermann /* Dummy write to enable HWC and make the HW pick-up the changes. */ 863718c2286SThomas Zimmermann ast_set_cursor_enabled(ast, true); 86402f3bb75SThomas Zimmermann } 86502f3bb75SThomas Zimmermann 86602f3bb75SThomas Zimmermann static void 86702f3bb75SThomas Zimmermann ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane, 868977697e2SMaxime Ripard struct drm_atomic_state *state) 86902f3bb75SThomas Zimmermann { 870fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(plane->dev); 87102f3bb75SThomas Zimmermann 872718c2286SThomas Zimmermann ast_set_cursor_enabled(ast, false); 87302f3bb75SThomas Zimmermann } 87402f3bb75SThomas Zimmermann 87502f3bb75SThomas Zimmermann static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = { 8764d36cf07SThomas Zimmermann DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 87702f3bb75SThomas Zimmermann .atomic_check = ast_cursor_plane_helper_atomic_check, 87802f3bb75SThomas Zimmermann .atomic_update = ast_cursor_plane_helper_atomic_update, 87902f3bb75SThomas Zimmermann .atomic_disable = ast_cursor_plane_helper_atomic_disable, 88002f3bb75SThomas Zimmermann }; 88102f3bb75SThomas Zimmermann 88222b6591fSThomas Zimmermann static void ast_cursor_plane_destroy(struct drm_plane *plane) 88322b6591fSThomas Zimmermann { 884afee7e95SThomas Zimmermann struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane); 88522b6591fSThomas Zimmermann size_t i; 88622b6591fSThomas Zimmermann struct drm_gem_vram_object *gbo; 88784810d6aSThomas Zimmermann struct dma_buf_map map; 88822b6591fSThomas Zimmermann 889afee7e95SThomas Zimmermann for (i = 0; i < ARRAY_SIZE(ast_cursor_plane->hwc); ++i) { 890afee7e95SThomas Zimmermann gbo = ast_cursor_plane->hwc[i].gbo; 89184810d6aSThomas Zimmermann map = ast_cursor_plane->hwc[i].map; 89284810d6aSThomas Zimmermann drm_gem_vram_vunmap(gbo, &map); 89322b6591fSThomas Zimmermann drm_gem_vram_unpin(gbo); 89422b6591fSThomas Zimmermann drm_gem_vram_put(gbo); 89522b6591fSThomas Zimmermann } 89622b6591fSThomas Zimmermann 89722b6591fSThomas Zimmermann drm_plane_cleanup(plane); 89822b6591fSThomas Zimmermann } 89922b6591fSThomas Zimmermann 90002f3bb75SThomas Zimmermann static const struct drm_plane_funcs ast_cursor_plane_funcs = { 90102f3bb75SThomas Zimmermann .update_plane = drm_atomic_helper_update_plane, 90202f3bb75SThomas Zimmermann .disable_plane = drm_atomic_helper_disable_plane, 90322b6591fSThomas Zimmermann .destroy = ast_cursor_plane_destroy, 9044d36cf07SThomas Zimmermann DRM_GEM_SHADOW_PLANE_FUNCS, 90502f3bb75SThomas Zimmermann }; 90602f3bb75SThomas Zimmermann 907616048afSThomas Zimmermann static int ast_cursor_plane_init(struct ast_private *ast) 908616048afSThomas Zimmermann { 909616048afSThomas Zimmermann struct drm_device *dev = &ast->base; 910a0ba992dSThomas Zimmermann struct ast_cursor_plane *ast_cursor_plane = &ast->cursor_plane; 911a0ba992dSThomas Zimmermann struct drm_plane *cursor_plane = &ast_cursor_plane->base; 91222b6591fSThomas Zimmermann size_t size, i; 91322b6591fSThomas Zimmermann struct drm_gem_vram_object *gbo; 91484810d6aSThomas Zimmermann struct dma_buf_map map; 915616048afSThomas Zimmermann int ret; 916385131f3SThomas Zimmermann s64 off; 917616048afSThomas Zimmermann 91822b6591fSThomas Zimmermann /* 91922b6591fSThomas Zimmermann * Allocate backing storage for cursors. The BOs are permanently 92022b6591fSThomas Zimmermann * pinned to the top end of the VRAM. 92122b6591fSThomas Zimmermann */ 92222b6591fSThomas Zimmermann 92322b6591fSThomas Zimmermann size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE); 92422b6591fSThomas Zimmermann 925afee7e95SThomas Zimmermann for (i = 0; i < ARRAY_SIZE(ast_cursor_plane->hwc); ++i) { 92622b6591fSThomas Zimmermann gbo = drm_gem_vram_create(dev, size, 0); 92722b6591fSThomas Zimmermann if (IS_ERR(gbo)) { 92822b6591fSThomas Zimmermann ret = PTR_ERR(gbo); 92922b6591fSThomas Zimmermann goto err_hwc; 93022b6591fSThomas Zimmermann } 93122b6591fSThomas Zimmermann ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM | 93222b6591fSThomas Zimmermann DRM_GEM_VRAM_PL_FLAG_TOPDOWN); 93322b6591fSThomas Zimmermann if (ret) 93422b6591fSThomas Zimmermann goto err_drm_gem_vram_put; 93584810d6aSThomas Zimmermann ret = drm_gem_vram_vmap(gbo, &map); 93684810d6aSThomas Zimmermann if (ret) 93784810d6aSThomas Zimmermann goto err_drm_gem_vram_unpin; 938385131f3SThomas Zimmermann off = drm_gem_vram_offset(gbo); 939385131f3SThomas Zimmermann if (off < 0) { 940385131f3SThomas Zimmermann ret = off; 941385131f3SThomas Zimmermann goto err_drm_gem_vram_vunmap; 942385131f3SThomas Zimmermann } 943afee7e95SThomas Zimmermann ast_cursor_plane->hwc[i].gbo = gbo; 94484810d6aSThomas Zimmermann ast_cursor_plane->hwc[i].map = map; 945385131f3SThomas Zimmermann ast_cursor_plane->hwc[i].off = off; 94622b6591fSThomas Zimmermann } 94722b6591fSThomas Zimmermann 94822b6591fSThomas Zimmermann /* 94922b6591fSThomas Zimmermann * Create the cursor plane. The plane's destroy callback will release 95022b6591fSThomas Zimmermann * the backing storages' BO memory. 95122b6591fSThomas Zimmermann */ 95222b6591fSThomas Zimmermann 953616048afSThomas Zimmermann ret = drm_universal_plane_init(dev, cursor_plane, 0x01, 954616048afSThomas Zimmermann &ast_cursor_plane_funcs, 955616048afSThomas Zimmermann ast_cursor_plane_formats, 956616048afSThomas Zimmermann ARRAY_SIZE(ast_cursor_plane_formats), 957616048afSThomas Zimmermann NULL, DRM_PLANE_TYPE_CURSOR, NULL); 958616048afSThomas Zimmermann if (ret) { 95922b6591fSThomas Zimmermann drm_err(dev, "drm_universal_plane failed(): %d\n", ret); 96022b6591fSThomas Zimmermann goto err_hwc; 961616048afSThomas Zimmermann } 962616048afSThomas Zimmermann drm_plane_helper_add(cursor_plane, &ast_cursor_plane_helper_funcs); 963616048afSThomas Zimmermann 964616048afSThomas Zimmermann return 0; 96522b6591fSThomas Zimmermann 96622b6591fSThomas Zimmermann err_hwc: 96722b6591fSThomas Zimmermann while (i) { 96822b6591fSThomas Zimmermann --i; 969afee7e95SThomas Zimmermann gbo = ast_cursor_plane->hwc[i].gbo; 97084810d6aSThomas Zimmermann map = ast_cursor_plane->hwc[i].map; 971385131f3SThomas Zimmermann err_drm_gem_vram_vunmap: 97284810d6aSThomas Zimmermann drm_gem_vram_vunmap(gbo, &map); 97384810d6aSThomas Zimmermann err_drm_gem_vram_unpin: 97422b6591fSThomas Zimmermann drm_gem_vram_unpin(gbo); 97522b6591fSThomas Zimmermann err_drm_gem_vram_put: 97622b6591fSThomas Zimmermann drm_gem_vram_put(gbo); 97722b6591fSThomas Zimmermann } 97822b6591fSThomas Zimmermann return ret; 979616048afSThomas Zimmermann } 980616048afSThomas Zimmermann 98102f3bb75SThomas Zimmermann /* 982a6ff807bSThomas Zimmermann * CRTC 983a6ff807bSThomas Zimmermann */ 984a6ff807bSThomas Zimmermann 985312fec14SDave Airlie static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) 986312fec14SDave Airlie { 987fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(crtc->dev); 988312fec14SDave Airlie 9892fbeec03SThomas Zimmermann /* TODO: Maybe control display signal generation with 9902fbeec03SThomas Zimmermann * Sync Enable (bit CR17.7). 9912fbeec03SThomas Zimmermann */ 992312fec14SDave Airlie switch (mode) { 993312fec14SDave Airlie case DRM_MODE_DPMS_ON: 994312fec14SDave Airlie case DRM_MODE_DPMS_STANDBY: 995312fec14SDave Airlie case DRM_MODE_DPMS_SUSPEND: 99683c6620bSDave Airlie if (ast->tx_chip_type == AST_TX_DP501) 99783c6620bSDave Airlie ast_set_dp501_video_output(crtc->dev, 1); 998312fec14SDave Airlie break; 999312fec14SDave Airlie case DRM_MODE_DPMS_OFF: 100083c6620bSDave Airlie if (ast->tx_chip_type == AST_TX_DP501) 100183c6620bSDave Airlie ast_set_dp501_video_output(crtc->dev, 0); 1002312fec14SDave Airlie break; 1003312fec14SDave Airlie } 1004312fec14SDave Airlie } 1005312fec14SDave Airlie 1006b48e1b6fSThomas Zimmermann static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc, 100729b77ad7SMaxime Ripard struct drm_atomic_state *state) 1008b48e1b6fSThomas Zimmermann { 100929b77ad7SMaxime Ripard struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 101029b77ad7SMaxime Ripard crtc); 10115638c82cSThomas Zimmermann struct drm_device *dev = crtc->dev; 1012e7d70cd4SThomas Zimmermann struct ast_crtc_state *ast_state; 10133339fdf5SThomas Zimmermann const struct drm_format_info *format; 1014b48e1b6fSThomas Zimmermann bool succ; 1015b48e1b6fSThomas Zimmermann 101629b77ad7SMaxime Ripard if (!crtc_state->enable) 1017d6ddbd5cSThomas Zimmermann return 0; /* no mode checks if CRTC is being disabled */ 1018d6ddbd5cSThomas Zimmermann 101929b77ad7SMaxime Ripard ast_state = to_ast_crtc_state(crtc_state); 1020b48e1b6fSThomas Zimmermann 10213339fdf5SThomas Zimmermann format = ast_state->format; 10225638c82cSThomas Zimmermann if (drm_WARN_ON_ONCE(dev, !format)) 10235638c82cSThomas Zimmermann return -EINVAL; /* BUG: We didn't set format in primary check(). */ 1024e7d70cd4SThomas Zimmermann 102529b77ad7SMaxime Ripard succ = ast_get_vbios_mode_info(format, &crtc_state->mode, 102629b77ad7SMaxime Ripard &crtc_state->adjusted_mode, 1027e7d70cd4SThomas Zimmermann &ast_state->vbios_mode_info); 1028b48e1b6fSThomas Zimmermann if (!succ) 1029b48e1b6fSThomas Zimmermann return -EINVAL; 1030b48e1b6fSThomas Zimmermann 1031b48e1b6fSThomas Zimmermann return 0; 1032b48e1b6fSThomas Zimmermann } 1033b48e1b6fSThomas Zimmermann 1034f3901b5fSThomas Zimmermann static void 1035f6ebe9f9SMaxime Ripard ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, 1036f6ebe9f9SMaxime Ripard struct drm_atomic_state *state) 10378e3784dfSThomas Zimmermann { 1038253f28b6SMaxime Ripard struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 1039253f28b6SMaxime Ripard crtc); 1040f6ebe9f9SMaxime Ripard struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 1041f6ebe9f9SMaxime Ripard crtc); 10428e3784dfSThomas Zimmermann struct ast_private *ast = to_ast_private(crtc->dev); 1043253f28b6SMaxime Ripard struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 10448e3784dfSThomas Zimmermann struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state); 10458e3784dfSThomas Zimmermann 10468e3784dfSThomas Zimmermann /* 10478e3784dfSThomas Zimmermann * The gamma LUT has to be reloaded after changing the primary 10488e3784dfSThomas Zimmermann * plane's color format. 10498e3784dfSThomas Zimmermann */ 10508e3784dfSThomas Zimmermann if (old_ast_crtc_state->format != ast_crtc_state->format) 10518e3784dfSThomas Zimmermann ast_crtc_load_lut(ast, crtc); 10528e3784dfSThomas Zimmermann } 10538e3784dfSThomas Zimmermann 10548e3784dfSThomas Zimmermann static void 1055f3901b5fSThomas Zimmermann ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, 1056351f950dSMaxime Ripard struct drm_atomic_state *state) 1057b48e1b6fSThomas Zimmermann { 105871d873ccSThomas Zimmermann struct drm_device *dev = crtc->dev; 1059fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 10605638c82cSThomas Zimmermann struct drm_crtc_state *crtc_state = crtc->state; 10615638c82cSThomas Zimmermann struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 10625638c82cSThomas Zimmermann struct ast_vbios_mode_info *vbios_mode_info = 10635638c82cSThomas Zimmermann &ast_crtc_state->vbios_mode_info; 10645638c82cSThomas Zimmermann struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 1065b48e1b6fSThomas Zimmermann 1066e7d70cd4SThomas Zimmermann ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info); 1067b48e1b6fSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06); 1068e7d70cd4SThomas Zimmermann ast_set_std_reg(ast, adjusted_mode, vbios_mode_info); 1069e7d70cd4SThomas Zimmermann ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info); 1070e7d70cd4SThomas Zimmermann ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info); 1071ae37025dSThomas Zimmermann ast_set_crtthd_reg(ast); 1072e7d70cd4SThomas Zimmermann ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info); 1073b48e1b6fSThomas Zimmermann 1074b48e1b6fSThomas Zimmermann ast_crtc_dpms(crtc, DRM_MODE_DPMS_ON); 1075b48e1b6fSThomas Zimmermann } 1076b48e1b6fSThomas Zimmermann 1077b48e1b6fSThomas Zimmermann static void 1078b48e1b6fSThomas Zimmermann ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, 1079351f950dSMaxime Ripard struct drm_atomic_state *state) 1080b48e1b6fSThomas Zimmermann { 1081351f950dSMaxime Ripard struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 1082351f950dSMaxime Ripard crtc); 108339edb287SThomas Zimmermann struct drm_device *dev = crtc->dev; 108439edb287SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 108539edb287SThomas Zimmermann 1086b48e1b6fSThomas Zimmermann ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 108739edb287SThomas Zimmermann 108839edb287SThomas Zimmermann /* 108939edb287SThomas Zimmermann * HW cursors require the underlying primary plane and CRTC to 109039edb287SThomas Zimmermann * display a valid mode and image. This is not the case during 109139edb287SThomas Zimmermann * full modeset operations. So we temporarily disable any active 109239edb287SThomas Zimmermann * plane, including the HW cursor. Each plane's atomic_update() 109339edb287SThomas Zimmermann * helper will re-enable it if necessary. 109439edb287SThomas Zimmermann * 109539edb287SThomas Zimmermann * We only do this during *full* modesets. It does not affect 109639edb287SThomas Zimmermann * simple pageflips on the planes. 109739edb287SThomas Zimmermann */ 109839edb287SThomas Zimmermann drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false); 109939edb287SThomas Zimmermann 110039edb287SThomas Zimmermann /* 110139edb287SThomas Zimmermann * Ensure that no scanout takes place before reprogramming mode 110239edb287SThomas Zimmermann * and format registers. 110339edb287SThomas Zimmermann */ 110439edb287SThomas Zimmermann ast_wait_for_vretrace(ast); 1105b48e1b6fSThomas Zimmermann } 1106312fec14SDave Airlie 1107312fec14SDave Airlie static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { 1108b48e1b6fSThomas Zimmermann .atomic_check = ast_crtc_helper_atomic_check, 11098e3784dfSThomas Zimmermann .atomic_flush = ast_crtc_helper_atomic_flush, 1110b48e1b6fSThomas Zimmermann .atomic_enable = ast_crtc_helper_atomic_enable, 1111b48e1b6fSThomas Zimmermann .atomic_disable = ast_crtc_helper_atomic_disable, 1112312fec14SDave Airlie }; 1113312fec14SDave Airlie 1114f0adbc38SThomas Zimmermann static void ast_crtc_reset(struct drm_crtc *crtc) 1115f0adbc38SThomas Zimmermann { 1116f0adbc38SThomas Zimmermann struct ast_crtc_state *ast_state = 1117f0adbc38SThomas Zimmermann kzalloc(sizeof(*ast_state), GFP_KERNEL); 1118f0adbc38SThomas Zimmermann 1119f0adbc38SThomas Zimmermann if (crtc->state) 1120f0adbc38SThomas Zimmermann crtc->funcs->atomic_destroy_state(crtc, crtc->state); 1121f0adbc38SThomas Zimmermann 1122f0adbc38SThomas Zimmermann __drm_atomic_helper_crtc_reset(crtc, &ast_state->base); 1123f0adbc38SThomas Zimmermann } 1124f0adbc38SThomas Zimmermann 112583be6a3cSThomas Zimmermann static struct drm_crtc_state * 112683be6a3cSThomas Zimmermann ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 112783be6a3cSThomas Zimmermann { 1128e7d70cd4SThomas Zimmermann struct ast_crtc_state *new_ast_state, *ast_state; 11291a19b4cbSThomas Zimmermann struct drm_device *dev = crtc->dev; 113083be6a3cSThomas Zimmermann 11311a19b4cbSThomas Zimmermann if (drm_WARN_ON(dev, !crtc->state)) 113283be6a3cSThomas Zimmermann return NULL; 113383be6a3cSThomas Zimmermann 113483be6a3cSThomas Zimmermann new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL); 113583be6a3cSThomas Zimmermann if (!new_ast_state) 113683be6a3cSThomas Zimmermann return NULL; 113783be6a3cSThomas Zimmermann __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base); 113883be6a3cSThomas Zimmermann 1139e7d70cd4SThomas Zimmermann ast_state = to_ast_crtc_state(crtc->state); 1140e7d70cd4SThomas Zimmermann 11413339fdf5SThomas Zimmermann new_ast_state->format = ast_state->format; 1142e7d70cd4SThomas Zimmermann memcpy(&new_ast_state->vbios_mode_info, &ast_state->vbios_mode_info, 1143e7d70cd4SThomas Zimmermann sizeof(new_ast_state->vbios_mode_info)); 1144e7d70cd4SThomas Zimmermann 114583be6a3cSThomas Zimmermann return &new_ast_state->base; 114683be6a3cSThomas Zimmermann } 114783be6a3cSThomas Zimmermann 114883be6a3cSThomas Zimmermann static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc, 114983be6a3cSThomas Zimmermann struct drm_crtc_state *state) 115083be6a3cSThomas Zimmermann { 115183be6a3cSThomas Zimmermann struct ast_crtc_state *ast_state = to_ast_crtc_state(state); 115283be6a3cSThomas Zimmermann 115383be6a3cSThomas Zimmermann __drm_atomic_helper_crtc_destroy_state(&ast_state->base); 115483be6a3cSThomas Zimmermann kfree(ast_state); 115583be6a3cSThomas Zimmermann } 115683be6a3cSThomas Zimmermann 1157312fec14SDave Airlie static const struct drm_crtc_funcs ast_crtc_funcs = { 1158f0adbc38SThomas Zimmermann .reset = ast_crtc_reset, 11596a470dc2SThomas Zimmermann .destroy = drm_crtc_cleanup, 11604961eb60SThomas Zimmermann .set_config = drm_atomic_helper_set_config, 11614961eb60SThomas Zimmermann .page_flip = drm_atomic_helper_page_flip, 116283be6a3cSThomas Zimmermann .atomic_duplicate_state = ast_crtc_atomic_duplicate_state, 116383be6a3cSThomas Zimmermann .atomic_destroy_state = ast_crtc_atomic_destroy_state, 1164312fec14SDave Airlie }; 1165312fec14SDave Airlie 11667f5ccd44SRashika static int ast_crtc_init(struct drm_device *dev) 1167312fec14SDave Airlie { 1168fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 11696a470dc2SThomas Zimmermann struct drm_crtc *crtc = &ast->crtc; 1170a6ff807bSThomas Zimmermann int ret; 1171312fec14SDave Airlie 1172c35da0edSThomas Zimmermann ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane, 1173a0ba992dSThomas Zimmermann &ast->cursor_plane.base, &ast_crtc_funcs, 117402f3bb75SThomas Zimmermann NULL); 1175a6ff807bSThomas Zimmermann if (ret) 11766a470dc2SThomas Zimmermann return ret; 1177a6ff807bSThomas Zimmermann 1178c35da0edSThomas Zimmermann drm_mode_crtc_set_gamma_size(crtc, 256); 1179c35da0edSThomas Zimmermann drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs); 1180c35da0edSThomas Zimmermann 1181312fec14SDave Airlie return 0; 1182312fec14SDave Airlie } 1183312fec14SDave Airlie 11844961eb60SThomas Zimmermann /* 11854961eb60SThomas Zimmermann * Encoder 11864961eb60SThomas Zimmermann */ 11874961eb60SThomas Zimmermann 11887f5ccd44SRashika static int ast_encoder_init(struct drm_device *dev) 1189312fec14SDave Airlie { 1190fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 11914220fdf0SThomas Zimmermann struct drm_encoder *encoder = &ast->encoder; 11924220fdf0SThomas Zimmermann int ret; 1193312fec14SDave Airlie 11944220fdf0SThomas Zimmermann ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC); 11954220fdf0SThomas Zimmermann if (ret) 11964220fdf0SThomas Zimmermann return ret; 1197312fec14SDave Airlie 11984220fdf0SThomas Zimmermann encoder->possible_crtcs = 1; 1199312fec14SDave Airlie 1200312fec14SDave Airlie return 0; 1201312fec14SDave Airlie } 1202312fec14SDave Airlie 12034961eb60SThomas Zimmermann /* 12044961eb60SThomas Zimmermann * Connector 12054961eb60SThomas Zimmermann */ 12064961eb60SThomas Zimmermann 1207312fec14SDave Airlie static int ast_get_modes(struct drm_connector *connector) 1208312fec14SDave Airlie { 1209312fec14SDave Airlie struct ast_connector *ast_connector = to_ast_connector(connector); 1210fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(connector->dev); 1211312fec14SDave Airlie struct edid *edid; 1212312fec14SDave Airlie int ret; 121383c6620bSDave Airlie bool flags = false; 121483c6620bSDave Airlie if (ast->tx_chip_type == AST_TX_DP501) { 121583c6620bSDave Airlie ast->dp501_maxclk = 0xff; 121683c6620bSDave Airlie edid = kmalloc(128, GFP_KERNEL); 121783c6620bSDave Airlie if (!edid) 121883c6620bSDave Airlie return -ENOMEM; 1219312fec14SDave Airlie 122083c6620bSDave Airlie flags = ast_dp501_read_edid(connector->dev, (u8 *)edid); 122183c6620bSDave Airlie if (flags) 122283c6620bSDave Airlie ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev); 122383c6620bSDave Airlie else 122483c6620bSDave Airlie kfree(edid); 122583c6620bSDave Airlie } 122683c6620bSDave Airlie if (!flags) 1227312fec14SDave Airlie edid = drm_get_edid(connector, &ast_connector->i2c->adapter); 1228312fec14SDave Airlie if (edid) { 1229c555f023SDaniel Vetter drm_connector_update_edid_property(&ast_connector->base, edid); 1230312fec14SDave Airlie ret = drm_add_edid_modes(connector, edid); 1231993dcb05SJani Nikula kfree(edid); 1232312fec14SDave Airlie return ret; 1233312fec14SDave Airlie } else 1234c555f023SDaniel Vetter drm_connector_update_edid_property(&ast_connector->base, NULL); 1235312fec14SDave Airlie return 0; 1236312fec14SDave Airlie } 1237312fec14SDave Airlie 1238602b14a0SLuc Van Oostenryck static enum drm_mode_status ast_mode_valid(struct drm_connector *connector, 1239312fec14SDave Airlie struct drm_display_mode *mode) 1240312fec14SDave Airlie { 1241fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(connector->dev); 1242f1f62f2cSDave Airlie int flags = MODE_NOMODE; 1243f1f62f2cSDave Airlie uint32_t jtemp; 1244f1f62f2cSDave Airlie 1245f1f62f2cSDave Airlie if (ast->support_wide_screen) { 1246f1f62f2cSDave Airlie if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050)) 1247312fec14SDave Airlie return MODE_OK; 1248f1f62f2cSDave Airlie if ((mode->hdisplay == 1280) && (mode->vdisplay == 800)) 1249f1f62f2cSDave Airlie return MODE_OK; 1250f1f62f2cSDave Airlie if ((mode->hdisplay == 1440) && (mode->vdisplay == 900)) 1251f1f62f2cSDave Airlie return MODE_OK; 1252f1f62f2cSDave Airlie if ((mode->hdisplay == 1360) && (mode->vdisplay == 768)) 1253f1f62f2cSDave Airlie return MODE_OK; 1254f1f62f2cSDave Airlie if ((mode->hdisplay == 1600) && (mode->vdisplay == 900)) 1255f1f62f2cSDave Airlie return MODE_OK; 1256f1f62f2cSDave Airlie 12579f93c8b3SY.C. Chen if ((ast->chip == AST2100) || (ast->chip == AST2200) || 12589f93c8b3SY.C. Chen (ast->chip == AST2300) || (ast->chip == AST2400) || 125905f13f5bSThomas Zimmermann (ast->chip == AST2500)) { 1260f1f62f2cSDave Airlie if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080)) 1261f1f62f2cSDave Airlie return MODE_OK; 1262f1f62f2cSDave Airlie 1263f1f62f2cSDave Airlie if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) { 1264f1f62f2cSDave Airlie jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 1265f1f62f2cSDave Airlie if (jtemp & 0x01) 1266f1f62f2cSDave Airlie return MODE_NOMODE; 1267f1f62f2cSDave Airlie else 1268f1f62f2cSDave Airlie return MODE_OK; 1269f1f62f2cSDave Airlie } 1270f1f62f2cSDave Airlie } 1271f1f62f2cSDave Airlie } 1272f1f62f2cSDave Airlie switch (mode->hdisplay) { 1273f1f62f2cSDave Airlie case 640: 1274f1f62f2cSDave Airlie if (mode->vdisplay == 480) flags = MODE_OK; 1275f1f62f2cSDave Airlie break; 1276f1f62f2cSDave Airlie case 800: 1277f1f62f2cSDave Airlie if (mode->vdisplay == 600) flags = MODE_OK; 1278f1f62f2cSDave Airlie break; 1279f1f62f2cSDave Airlie case 1024: 1280f1f62f2cSDave Airlie if (mode->vdisplay == 768) flags = MODE_OK; 1281f1f62f2cSDave Airlie break; 1282f1f62f2cSDave Airlie case 1280: 1283f1f62f2cSDave Airlie if (mode->vdisplay == 1024) flags = MODE_OK; 1284f1f62f2cSDave Airlie break; 1285f1f62f2cSDave Airlie case 1600: 1286f1f62f2cSDave Airlie if (mode->vdisplay == 1200) flags = MODE_OK; 1287f1f62f2cSDave Airlie break; 1288f1f62f2cSDave Airlie default: 1289f1f62f2cSDave Airlie return flags; 1290f1f62f2cSDave Airlie } 1291f1f62f2cSDave Airlie 1292f1f62f2cSDave Airlie return flags; 1293312fec14SDave Airlie } 1294312fec14SDave Airlie 1295aae74ff9SAinux static enum drm_connector_status ast_connector_detect(struct drm_connector 1296aae74ff9SAinux *connector, bool force) 1297aae74ff9SAinux { 1298aae74ff9SAinux int r; 1299aae74ff9SAinux 1300aae74ff9SAinux r = ast_get_modes(connector); 1301aae74ff9SAinux if (r < 0) 1302aae74ff9SAinux return connector_status_disconnected; 1303aae74ff9SAinux 1304aae74ff9SAinux return connector_status_connected; 1305aae74ff9SAinux } 1306aae74ff9SAinux 1307312fec14SDave Airlie static void ast_connector_destroy(struct drm_connector *connector) 1308312fec14SDave Airlie { 1309312fec14SDave Airlie struct ast_connector *ast_connector = to_ast_connector(connector); 1310312fec14SDave Airlie ast_i2c_destroy(ast_connector->i2c); 1311312fec14SDave Airlie drm_connector_cleanup(connector); 1312312fec14SDave Airlie } 1313312fec14SDave Airlie 1314312fec14SDave Airlie static const struct drm_connector_helper_funcs ast_connector_helper_funcs = { 1315312fec14SDave Airlie .get_modes = ast_get_modes, 13164961eb60SThomas Zimmermann .mode_valid = ast_mode_valid, 1317312fec14SDave Airlie }; 1318312fec14SDave Airlie 1319312fec14SDave Airlie static const struct drm_connector_funcs ast_connector_funcs = { 13204961eb60SThomas Zimmermann .reset = drm_atomic_helper_connector_reset, 1321aae74ff9SAinux .detect = ast_connector_detect, 1322312fec14SDave Airlie .fill_modes = drm_helper_probe_single_connector_modes, 1323312fec14SDave Airlie .destroy = ast_connector_destroy, 13244961eb60SThomas Zimmermann .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 13254961eb60SThomas Zimmermann .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 1326312fec14SDave Airlie }; 1327312fec14SDave Airlie 13287f5ccd44SRashika static int ast_connector_init(struct drm_device *dev) 1329312fec14SDave Airlie { 13306a470dc2SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 13316a470dc2SThomas Zimmermann struct ast_connector *ast_connector = &ast->connector; 13326a470dc2SThomas Zimmermann struct drm_connector *connector = &ast_connector->base; 13336a470dc2SThomas Zimmermann struct drm_encoder *encoder = &ast->encoder; 1334312fec14SDave Airlie 1335350fd554SAndrzej Pietrasiewicz ast_connector->i2c = ast_i2c_create(dev); 1336350fd554SAndrzej Pietrasiewicz if (!ast_connector->i2c) 13371a19b4cbSThomas Zimmermann drm_err(dev, "failed to add ddc bus for connector\n"); 1338350fd554SAndrzej Pietrasiewicz 1339350fd554SAndrzej Pietrasiewicz drm_connector_init_with_ddc(dev, connector, 1340350fd554SAndrzej Pietrasiewicz &ast_connector_funcs, 1341350fd554SAndrzej Pietrasiewicz DRM_MODE_CONNECTOR_VGA, 1342350fd554SAndrzej Pietrasiewicz &ast_connector->i2c->adapter); 1343312fec14SDave Airlie 1344312fec14SDave Airlie drm_connector_helper_add(connector, &ast_connector_helper_funcs); 1345312fec14SDave Airlie 1346312fec14SDave Airlie connector->interlace_allowed = 0; 1347312fec14SDave Airlie connector->doublescan_allowed = 0; 1348312fec14SDave Airlie 1349aae74ff9SAinux connector->polled = DRM_CONNECTOR_POLL_CONNECT | 1350aae74ff9SAinux DRM_CONNECTOR_POLL_DISCONNECT; 1351312fec14SDave Airlie 1352cde4c44dSDaniel Vetter drm_connector_attach_encoder(connector, encoder); 1353312fec14SDave Airlie 1354312fec14SDave Airlie return 0; 1355312fec14SDave Airlie } 1356312fec14SDave Airlie 1357e6949ff3SThomas Zimmermann /* 1358e6949ff3SThomas Zimmermann * Mode config 1359e6949ff3SThomas Zimmermann */ 1360e6949ff3SThomas Zimmermann 13612f0ddd89SThomas Zimmermann static const struct drm_mode_config_helper_funcs 13622f0ddd89SThomas Zimmermann ast_mode_config_helper_funcs = { 13632f0ddd89SThomas Zimmermann .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 13642f0ddd89SThomas Zimmermann }; 13652f0ddd89SThomas Zimmermann 1366e6949ff3SThomas Zimmermann static const struct drm_mode_config_funcs ast_mode_config_funcs = { 1367e6949ff3SThomas Zimmermann .fb_create = drm_gem_fb_create, 1368e6949ff3SThomas Zimmermann .mode_valid = drm_vram_helper_mode_valid, 1369e6949ff3SThomas Zimmermann .atomic_check = drm_atomic_helper_check, 1370e6949ff3SThomas Zimmermann .atomic_commit = drm_atomic_helper_commit, 1371e6949ff3SThomas Zimmermann }; 1372e6949ff3SThomas Zimmermann 1373e6949ff3SThomas Zimmermann int ast_mode_config_init(struct ast_private *ast) 1374312fec14SDave Airlie { 1375e0f5a738SThomas Zimmermann struct drm_device *dev = &ast->base; 137646fb883cSThomas Zimmermann struct pci_dev *pdev = to_pci_dev(dev->dev); 1377a6ff807bSThomas Zimmermann int ret; 1378a6ff807bSThomas Zimmermann 1379e6949ff3SThomas Zimmermann ret = drmm_mode_config_init(dev); 1380e6949ff3SThomas Zimmermann if (ret) 1381e6949ff3SThomas Zimmermann return ret; 1382e6949ff3SThomas Zimmermann 1383e6949ff3SThomas Zimmermann dev->mode_config.funcs = &ast_mode_config_funcs; 1384e6949ff3SThomas Zimmermann dev->mode_config.min_width = 0; 1385e6949ff3SThomas Zimmermann dev->mode_config.min_height = 0; 1386e6949ff3SThomas Zimmermann dev->mode_config.preferred_depth = 24; 1387e6949ff3SThomas Zimmermann dev->mode_config.prefer_shadow = 1; 138846fb883cSThomas Zimmermann dev->mode_config.fb_base = pci_resource_start(pdev, 0); 1389e6949ff3SThomas Zimmermann 1390e6949ff3SThomas Zimmermann if (ast->chip == AST2100 || 1391e6949ff3SThomas Zimmermann ast->chip == AST2200 || 1392e6949ff3SThomas Zimmermann ast->chip == AST2300 || 1393e6949ff3SThomas Zimmermann ast->chip == AST2400 || 1394e6949ff3SThomas Zimmermann ast->chip == AST2500) { 1395e6949ff3SThomas Zimmermann dev->mode_config.max_width = 1920; 1396e6949ff3SThomas Zimmermann dev->mode_config.max_height = 2048; 1397e6949ff3SThomas Zimmermann } else { 1398e6949ff3SThomas Zimmermann dev->mode_config.max_width = 1600; 1399e6949ff3SThomas Zimmermann dev->mode_config.max_height = 1200; 1400e6949ff3SThomas Zimmermann } 1401e6949ff3SThomas Zimmermann 14022f0ddd89SThomas Zimmermann dev->mode_config.helper_private = &ast_mode_config_helper_funcs; 14032f0ddd89SThomas Zimmermann 1404a6ff807bSThomas Zimmermann 1405616048afSThomas Zimmermann ret = ast_primary_plane_init(ast); 1406616048afSThomas Zimmermann if (ret) 140702f3bb75SThomas Zimmermann return ret; 1408616048afSThomas Zimmermann 1409616048afSThomas Zimmermann ret = ast_cursor_plane_init(ast); 1410616048afSThomas Zimmermann if (ret) 1411616048afSThomas Zimmermann return ret; 141202f3bb75SThomas Zimmermann 1413312fec14SDave Airlie ast_crtc_init(dev); 1414312fec14SDave Airlie ast_encoder_init(dev); 1415312fec14SDave Airlie ast_connector_init(dev); 1416a6ff807bSThomas Zimmermann 1417e6949ff3SThomas Zimmermann drm_mode_config_reset(dev); 1418e6949ff3SThomas Zimmermann 1419aae74ff9SAinux drm_kms_helper_poll_init(dev); 1420aae74ff9SAinux 1421312fec14SDave Airlie return 0; 1422312fec14SDave Airlie } 1423312fec14SDave Airlie 1424312fec14SDave Airlie static int get_clock(void *i2c_priv) 1425312fec14SDave Airlie { 1426312fec14SDave Airlie struct ast_i2c_chan *i2c = i2c_priv; 1427fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(i2c->dev); 142830062562SY.C. Chen uint32_t val, val2, count, pass; 1429312fec14SDave Airlie 143030062562SY.C. Chen count = 0; 143130062562SY.C. Chen pass = 0; 143230062562SY.C. Chen val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01; 143330062562SY.C. Chen do { 143430062562SY.C. Chen val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01; 143530062562SY.C. Chen if (val == val2) { 143630062562SY.C. Chen pass++; 143730062562SY.C. Chen } else { 143830062562SY.C. Chen pass = 0; 143930062562SY.C. Chen val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01; 144030062562SY.C. Chen } 144130062562SY.C. Chen } while ((pass < 5) && (count++ < 0x10000)); 144230062562SY.C. Chen 1443312fec14SDave Airlie return val & 1 ? 1 : 0; 1444312fec14SDave Airlie } 1445312fec14SDave Airlie 1446312fec14SDave Airlie static int get_data(void *i2c_priv) 1447312fec14SDave Airlie { 1448312fec14SDave Airlie struct ast_i2c_chan *i2c = i2c_priv; 1449fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(i2c->dev); 145030062562SY.C. Chen uint32_t val, val2, count, pass; 1451312fec14SDave Airlie 145230062562SY.C. Chen count = 0; 145330062562SY.C. Chen pass = 0; 145430062562SY.C. Chen val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01; 145530062562SY.C. Chen do { 145630062562SY.C. Chen val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01; 145730062562SY.C. Chen if (val == val2) { 145830062562SY.C. Chen pass++; 145930062562SY.C. Chen } else { 146030062562SY.C. Chen pass = 0; 146130062562SY.C. Chen val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01; 146230062562SY.C. Chen } 146330062562SY.C. Chen } while ((pass < 5) && (count++ < 0x10000)); 146430062562SY.C. Chen 1465312fec14SDave Airlie return val & 1 ? 1 : 0; 1466312fec14SDave Airlie } 1467312fec14SDave Airlie 1468312fec14SDave Airlie static void set_clock(void *i2c_priv, int clock) 1469312fec14SDave Airlie { 1470312fec14SDave Airlie struct ast_i2c_chan *i2c = i2c_priv; 1471fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(i2c->dev); 1472312fec14SDave Airlie int i; 1473312fec14SDave Airlie u8 ujcrb7, jtemp; 1474312fec14SDave Airlie 1475312fec14SDave Airlie for (i = 0; i < 0x10000; i++) { 1476312fec14SDave Airlie ujcrb7 = ((clock & 0x01) ? 0 : 1); 147730062562SY.C. Chen ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4, ujcrb7); 1478312fec14SDave Airlie jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01); 1479312fec14SDave Airlie if (ujcrb7 == jtemp) 1480312fec14SDave Airlie break; 1481312fec14SDave Airlie } 1482312fec14SDave Airlie } 1483312fec14SDave Airlie 1484312fec14SDave Airlie static void set_data(void *i2c_priv, int data) 1485312fec14SDave Airlie { 1486312fec14SDave Airlie struct ast_i2c_chan *i2c = i2c_priv; 1487fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(i2c->dev); 1488312fec14SDave Airlie int i; 1489312fec14SDave Airlie u8 ujcrb7, jtemp; 1490312fec14SDave Airlie 1491312fec14SDave Airlie for (i = 0; i < 0x10000; i++) { 1492312fec14SDave Airlie ujcrb7 = ((data & 0x01) ? 0 : 1) << 2; 149330062562SY.C. Chen ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1, ujcrb7); 1494312fec14SDave Airlie jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04); 1495312fec14SDave Airlie if (ujcrb7 == jtemp) 1496312fec14SDave Airlie break; 1497312fec14SDave Airlie } 1498312fec14SDave Airlie } 1499312fec14SDave Airlie 1500312fec14SDave Airlie static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev) 1501312fec14SDave Airlie { 1502312fec14SDave Airlie struct ast_i2c_chan *i2c; 1503312fec14SDave Airlie int ret; 1504312fec14SDave Airlie 1505312fec14SDave Airlie i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL); 1506312fec14SDave Airlie if (!i2c) 1507312fec14SDave Airlie return NULL; 1508312fec14SDave Airlie 1509312fec14SDave Airlie i2c->adapter.owner = THIS_MODULE; 1510312fec14SDave Airlie i2c->adapter.class = I2C_CLASS_DDC; 151146fb883cSThomas Zimmermann i2c->adapter.dev.parent = dev->dev; 1512312fec14SDave Airlie i2c->dev = dev; 1513312fec14SDave Airlie i2c_set_adapdata(&i2c->adapter, i2c); 1514312fec14SDave Airlie snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), 1515312fec14SDave Airlie "AST i2c bit bus"); 1516312fec14SDave Airlie i2c->adapter.algo_data = &i2c->bit; 1517312fec14SDave Airlie 1518312fec14SDave Airlie i2c->bit.udelay = 20; 1519312fec14SDave Airlie i2c->bit.timeout = 2; 1520312fec14SDave Airlie i2c->bit.data = i2c; 1521312fec14SDave Airlie i2c->bit.setsda = set_data; 1522312fec14SDave Airlie i2c->bit.setscl = set_clock; 1523312fec14SDave Airlie i2c->bit.getsda = get_data; 1524312fec14SDave Airlie i2c->bit.getscl = get_clock; 1525312fec14SDave Airlie ret = i2c_bit_add_bus(&i2c->adapter); 1526312fec14SDave Airlie if (ret) { 15271a19b4cbSThomas Zimmermann drm_err(dev, "Failed to register bit i2c\n"); 1528312fec14SDave Airlie goto out_free; 1529312fec14SDave Airlie } 1530312fec14SDave Airlie 1531312fec14SDave Airlie return i2c; 1532312fec14SDave Airlie out_free: 1533312fec14SDave Airlie kfree(i2c); 1534312fec14SDave Airlie return NULL; 1535312fec14SDave Airlie } 1536312fec14SDave Airlie 1537312fec14SDave Airlie static void ast_i2c_destroy(struct ast_i2c_chan *i2c) 1538312fec14SDave Airlie { 1539312fec14SDave Airlie if (!i2c) 1540312fec14SDave Airlie return; 1541312fec14SDave Airlie i2c_del_adapter(&i2c->adapter); 1542312fec14SDave Airlie kfree(i2c); 1543312fec14SDave Airlie } 1544