1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * Parts based on xf86-video-ast 4312fec14SDave Airlie * Copyright (c) 2005 ASPEED Technology Inc. 5312fec14SDave Airlie * 6312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 7312fec14SDave Airlie * copy of this software and associated documentation files (the 8312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 9312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 10312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 11312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 12312fec14SDave Airlie * the following conditions: 13312fec14SDave Airlie * 14312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 21312fec14SDave Airlie * 22312fec14SDave Airlie * The above copyright notice and this permission notice (including the 23312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 24312fec14SDave Airlie * of the Software. 25312fec14SDave Airlie * 26312fec14SDave Airlie */ 27312fec14SDave Airlie /* 28312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 29312fec14SDave Airlie */ 30fbbbd160SSam Ravnborg 31312fec14SDave Airlie #include <linux/export.h> 32fbbbd160SSam Ravnborg #include <linux/pci.h> 33fbbbd160SSam Ravnborg 34ae46a57dSThomas Zimmermann #include <drm/drm_atomic.h> 35a6ff807bSThomas Zimmermann #include <drm/drm_atomic_helper.h> 36a6ff807bSThomas Zimmermann #include <drm/drm_atomic_state_helper.h> 37760285e7SDavid Howells #include <drm/drm_crtc.h> 38760285e7SDavid Howells #include <drm/drm_crtc_helper.h> 39fbbbd160SSam Ravnborg #include <drm/drm_fourcc.h> 404d36cf07SThomas Zimmermann #include <drm/drm_gem_atomic_helper.h> 41e6949ff3SThomas Zimmermann #include <drm/drm_gem_framebuffer_helper.h> 42fbbbd160SSam Ravnborg #include <drm/drm_gem_vram_helper.h> 433cb9ae4fSDaniel Vetter #include <drm/drm_plane_helper.h> 44fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h> 454220fdf0SThomas Zimmermann #include <drm/drm_simple_kms_helper.h> 46312fec14SDave Airlie 47fbbbd160SSam Ravnborg #include "ast_drv.h" 48312fec14SDave Airlie #include "ast_tables.h" 49312fec14SDave Airlie 50312fec14SDave Airlie static inline void ast_load_palette_index(struct ast_private *ast, 51312fec14SDave Airlie u8 index, u8 red, u8 green, 52312fec14SDave Airlie u8 blue) 53312fec14SDave Airlie { 54312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index); 55312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 56312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_DATA, red); 57312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 58312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_DATA, green); 59312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 60312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_DATA, blue); 61312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 62312fec14SDave Airlie } 63312fec14SDave Airlie 64ae37025dSThomas Zimmermann static void ast_crtc_load_lut(struct ast_private *ast, struct drm_crtc *crtc) 65312fec14SDave Airlie { 663bffd962SPeter Rosin u16 *r, *g, *b; 67312fec14SDave Airlie int i; 68312fec14SDave Airlie 69312fec14SDave Airlie if (!crtc->enabled) 70312fec14SDave Airlie return; 71312fec14SDave Airlie 723bffd962SPeter Rosin r = crtc->gamma_store; 733bffd962SPeter Rosin g = r + crtc->gamma_size; 743bffd962SPeter Rosin b = g + crtc->gamma_size; 753bffd962SPeter Rosin 76312fec14SDave Airlie for (i = 0; i < 256; i++) 773bffd962SPeter Rosin ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8); 78312fec14SDave Airlie } 79312fec14SDave Airlie 80ae37025dSThomas Zimmermann static bool ast_get_vbios_mode_info(const struct drm_format_info *format, 81259d14a7SThomas Zimmermann const struct drm_display_mode *mode, 82312fec14SDave Airlie struct drm_display_mode *adjusted_mode, 83312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 84312fec14SDave Airlie { 85259d14a7SThomas Zimmermann u32 refresh_rate_index = 0, refresh_rate; 8622acdbb1SBenjamin Herrenschmidt const struct ast_vbios_enhtable *best = NULL; 87312fec14SDave Airlie u32 hborder, vborder; 8894d12b13SY.C. Chen bool check_sync; 89312fec14SDave Airlie 90ae37025dSThomas Zimmermann switch (format->cpp[0] * 8) { 91312fec14SDave Airlie case 8: 92312fec14SDave Airlie vbios_mode->std_table = &vbios_stdtable[VGAModeIndex]; 93312fec14SDave Airlie break; 94312fec14SDave Airlie case 16: 95312fec14SDave Airlie vbios_mode->std_table = &vbios_stdtable[HiCModeIndex]; 96312fec14SDave Airlie break; 97312fec14SDave Airlie case 24: 98312fec14SDave Airlie case 32: 99312fec14SDave Airlie vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex]; 100312fec14SDave Airlie break; 101312fec14SDave Airlie default: 102312fec14SDave Airlie return false; 103312fec14SDave Airlie } 104312fec14SDave Airlie 105259d14a7SThomas Zimmermann switch (mode->crtc_hdisplay) { 106312fec14SDave Airlie case 640: 107312fec14SDave Airlie vbios_mode->enh_table = &res_640x480[refresh_rate_index]; 108312fec14SDave Airlie break; 109312fec14SDave Airlie case 800: 110312fec14SDave Airlie vbios_mode->enh_table = &res_800x600[refresh_rate_index]; 111312fec14SDave Airlie break; 112312fec14SDave Airlie case 1024: 113312fec14SDave Airlie vbios_mode->enh_table = &res_1024x768[refresh_rate_index]; 114312fec14SDave Airlie break; 115312fec14SDave Airlie case 1280: 116259d14a7SThomas Zimmermann if (mode->crtc_vdisplay == 800) 117312fec14SDave Airlie vbios_mode->enh_table = &res_1280x800[refresh_rate_index]; 118312fec14SDave Airlie else 119312fec14SDave Airlie vbios_mode->enh_table = &res_1280x1024[refresh_rate_index]; 120312fec14SDave Airlie break; 121f1f62f2cSDave Airlie case 1360: 122f1f62f2cSDave Airlie vbios_mode->enh_table = &res_1360x768[refresh_rate_index]; 123f1f62f2cSDave Airlie break; 124312fec14SDave Airlie case 1440: 125312fec14SDave Airlie vbios_mode->enh_table = &res_1440x900[refresh_rate_index]; 126312fec14SDave Airlie break; 127312fec14SDave Airlie case 1600: 128259d14a7SThomas Zimmermann if (mode->crtc_vdisplay == 900) 129f1f62f2cSDave Airlie vbios_mode->enh_table = &res_1600x900[refresh_rate_index]; 130f1f62f2cSDave Airlie else 131312fec14SDave Airlie vbios_mode->enh_table = &res_1600x1200[refresh_rate_index]; 132312fec14SDave Airlie break; 133312fec14SDave Airlie case 1680: 134312fec14SDave Airlie vbios_mode->enh_table = &res_1680x1050[refresh_rate_index]; 135312fec14SDave Airlie break; 136312fec14SDave Airlie case 1920: 137259d14a7SThomas Zimmermann if (mode->crtc_vdisplay == 1080) 138312fec14SDave Airlie vbios_mode->enh_table = &res_1920x1080[refresh_rate_index]; 139312fec14SDave Airlie else 140312fec14SDave Airlie vbios_mode->enh_table = &res_1920x1200[refresh_rate_index]; 141312fec14SDave Airlie break; 142312fec14SDave Airlie default: 143312fec14SDave Airlie return false; 144312fec14SDave Airlie } 145312fec14SDave Airlie 146312fec14SDave Airlie refresh_rate = drm_mode_vrefresh(mode); 14794d12b13SY.C. Chen check_sync = vbios_mode->enh_table->flags & WideScreenMode; 148259d14a7SThomas Zimmermann 149259d14a7SThomas Zimmermann while (1) { 15022acdbb1SBenjamin Herrenschmidt const struct ast_vbios_enhtable *loop = vbios_mode->enh_table; 15194d12b13SY.C. Chen 15294d12b13SY.C. Chen while (loop->refresh_rate != 0xff) { 15394d12b13SY.C. Chen if ((check_sync) && 15494d12b13SY.C. Chen (((mode->flags & DRM_MODE_FLAG_NVSYNC) && 15594d12b13SY.C. Chen (loop->flags & PVSync)) || 15694d12b13SY.C. Chen ((mode->flags & DRM_MODE_FLAG_PVSYNC) && 15794d12b13SY.C. Chen (loop->flags & NVSync)) || 15894d12b13SY.C. Chen ((mode->flags & DRM_MODE_FLAG_NHSYNC) && 15994d12b13SY.C. Chen (loop->flags & PHSync)) || 16094d12b13SY.C. Chen ((mode->flags & DRM_MODE_FLAG_PHSYNC) && 16194d12b13SY.C. Chen (loop->flags & NHSync)))) { 16294d12b13SY.C. Chen loop++; 16394d12b13SY.C. Chen continue; 16494d12b13SY.C. Chen } 16594d12b13SY.C. Chen if (loop->refresh_rate <= refresh_rate 16694d12b13SY.C. Chen && (!best || loop->refresh_rate > best->refresh_rate)) 16794d12b13SY.C. Chen best = loop; 16894d12b13SY.C. Chen loop++; 16994d12b13SY.C. Chen } 17094d12b13SY.C. Chen if (best || !check_sync) 171312fec14SDave Airlie break; 17294d12b13SY.C. Chen check_sync = 0; 173259d14a7SThomas Zimmermann } 174259d14a7SThomas Zimmermann 17594d12b13SY.C. Chen if (best) 17694d12b13SY.C. Chen vbios_mode->enh_table = best; 177312fec14SDave Airlie 178312fec14SDave Airlie hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0; 179312fec14SDave Airlie vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0; 180312fec14SDave Airlie 181312fec14SDave Airlie adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht; 182312fec14SDave Airlie adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder; 183312fec14SDave Airlie adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder; 184312fec14SDave Airlie adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder + 185312fec14SDave Airlie vbios_mode->enh_table->hfp; 186312fec14SDave Airlie adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder + 187312fec14SDave Airlie vbios_mode->enh_table->hfp + 188312fec14SDave Airlie vbios_mode->enh_table->hsync); 189312fec14SDave Airlie 190312fec14SDave Airlie adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt; 191312fec14SDave Airlie adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder; 192312fec14SDave Airlie adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder; 193312fec14SDave Airlie adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder + 194312fec14SDave Airlie vbios_mode->enh_table->vfp; 195312fec14SDave Airlie adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder + 196312fec14SDave Airlie vbios_mode->enh_table->vfp + 197312fec14SDave Airlie vbios_mode->enh_table->vsync); 198312fec14SDave Airlie 199259d14a7SThomas Zimmermann return true; 200259d14a7SThomas Zimmermann } 201259d14a7SThomas Zimmermann 202ae37025dSThomas Zimmermann static void ast_set_vbios_color_reg(struct ast_private *ast, 203ae37025dSThomas Zimmermann const struct drm_format_info *format, 204259d14a7SThomas Zimmermann const struct ast_vbios_mode_info *vbios_mode) 205259d14a7SThomas Zimmermann { 206259d14a7SThomas Zimmermann u32 color_index; 207259d14a7SThomas Zimmermann 208ae37025dSThomas Zimmermann switch (format->cpp[0]) { 209259d14a7SThomas Zimmermann case 1: 210259d14a7SThomas Zimmermann color_index = VGAModeIndex - 1; 211259d14a7SThomas Zimmermann break; 212259d14a7SThomas Zimmermann case 2: 213259d14a7SThomas Zimmermann color_index = HiCModeIndex; 214259d14a7SThomas Zimmermann break; 215259d14a7SThomas Zimmermann case 3: 216259d14a7SThomas Zimmermann case 4: 217259d14a7SThomas Zimmermann color_index = TrueCModeIndex; 218291ddeb6SColin Ian King break; 219259d14a7SThomas Zimmermann default: 220259d14a7SThomas Zimmermann return; 221259d14a7SThomas Zimmermann } 222259d14a7SThomas Zimmermann 223259d14a7SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0x0f) << 4)); 224259d14a7SThomas Zimmermann 225259d14a7SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00); 226259d14a7SThomas Zimmermann 227259d14a7SThomas Zimmermann if (vbios_mode->enh_table->flags & NewModeInfo) { 228259d14a7SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); 229ae37025dSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, format->cpp[0] * 8); 230259d14a7SThomas Zimmermann } 231259d14a7SThomas Zimmermann } 232259d14a7SThomas Zimmermann 233ae37025dSThomas Zimmermann static void ast_set_vbios_mode_reg(struct ast_private *ast, 234259d14a7SThomas Zimmermann const struct drm_display_mode *adjusted_mode, 235259d14a7SThomas Zimmermann const struct ast_vbios_mode_info *vbios_mode) 236259d14a7SThomas Zimmermann { 237259d14a7SThomas Zimmermann u32 refresh_rate_index, mode_id; 238259d14a7SThomas Zimmermann 239312fec14SDave Airlie refresh_rate_index = vbios_mode->enh_table->refresh_rate_index; 240312fec14SDave Airlie mode_id = vbios_mode->enh_table->mode_id; 241312fec14SDave Airlie 242312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff); 243312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff); 244312fec14SDave Airlie 245f1f62f2cSDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00); 246259d14a7SThomas Zimmermann 247f1f62f2cSDave Airlie if (vbios_mode->enh_table->flags & NewModeInfo) { 248312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); 249312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000); 250312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay); 251312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8); 252312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay); 253312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8); 254312fec14SDave Airlie } 255f1f62f2cSDave Airlie } 256312fec14SDave Airlie 257ae37025dSThomas Zimmermann static void ast_set_std_reg(struct ast_private *ast, 258ae37025dSThomas Zimmermann struct drm_display_mode *mode, 259312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 260312fec14SDave Airlie { 26122acdbb1SBenjamin Herrenschmidt const struct ast_vbios_stdtable *stdtable; 262312fec14SDave Airlie u32 i; 263312fec14SDave Airlie u8 jreg; 264312fec14SDave Airlie 265312fec14SDave Airlie stdtable = vbios_mode->std_table; 266312fec14SDave Airlie 267312fec14SDave Airlie jreg = stdtable->misc; 268312fec14SDave Airlie ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); 269312fec14SDave Airlie 2702fbeec03SThomas Zimmermann /* Set SEQ; except Screen Disable field */ 271312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03); 2722fbeec03SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x01, 0xdf, stdtable->seq[0]); 2732fbeec03SThomas Zimmermann for (i = 1; i < 4; i++) { 274312fec14SDave Airlie jreg = stdtable->seq[i]; 275312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1), jreg); 276312fec14SDave Airlie } 277312fec14SDave Airlie 278a21fdd7aSThomas Zimmermann /* Set CRTC; except base address and offset */ 279312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); 280a21fdd7aSThomas Zimmermann for (i = 0; i < 12; i++) 281a21fdd7aSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 282a21fdd7aSThomas Zimmermann for (i = 14; i < 19; i++) 283a21fdd7aSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 284a21fdd7aSThomas Zimmermann for (i = 20; i < 25; i++) 285312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 286312fec14SDave Airlie 287312fec14SDave Airlie /* set AR */ 288312fec14SDave Airlie jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 289312fec14SDave Airlie for (i = 0; i < 20; i++) { 290312fec14SDave Airlie jreg = stdtable->ar[i]; 291312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i); 292312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg); 293312fec14SDave Airlie } 294312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14); 295312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00); 296312fec14SDave Airlie 297312fec14SDave Airlie jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 298312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20); 299312fec14SDave Airlie 300312fec14SDave Airlie /* Set GR */ 301312fec14SDave Airlie for (i = 0; i < 9; i++) 302312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]); 303312fec14SDave Airlie } 304312fec14SDave Airlie 305ae37025dSThomas Zimmermann static void ast_set_crtc_reg(struct ast_private *ast, 306ae37025dSThomas Zimmermann struct drm_display_mode *mode, 307312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 308312fec14SDave Airlie { 309312fec14SDave Airlie u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; 3109f93c8b3SY.C. Chen u16 temp, precache = 0; 3119f93c8b3SY.C. Chen 3129f93c8b3SY.C. Chen if ((ast->chip == AST2500) && 3139f93c8b3SY.C. Chen (vbios_mode->enh_table->flags & AST2500PreCatchCRT)) 3149f93c8b3SY.C. Chen precache = 40; 315312fec14SDave Airlie 316312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); 317312fec14SDave Airlie 318312fec14SDave Airlie temp = (mode->crtc_htotal >> 3) - 5; 319312fec14SDave Airlie if (temp & 0x100) 320312fec14SDave Airlie jregAC |= 0x01; /* HT D[8] */ 321312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp); 322312fec14SDave Airlie 323312fec14SDave Airlie temp = (mode->crtc_hdisplay >> 3) - 1; 324312fec14SDave Airlie if (temp & 0x100) 325312fec14SDave Airlie jregAC |= 0x04; /* HDE D[8] */ 326312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp); 327312fec14SDave Airlie 328312fec14SDave Airlie temp = (mode->crtc_hblank_start >> 3) - 1; 329312fec14SDave Airlie if (temp & 0x100) 330312fec14SDave Airlie jregAC |= 0x10; /* HBS D[8] */ 331312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp); 332312fec14SDave Airlie 333312fec14SDave Airlie temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; 334312fec14SDave Airlie if (temp & 0x20) 335312fec14SDave Airlie jreg05 |= 0x80; /* HBE D[5] */ 336312fec14SDave Airlie if (temp & 0x40) 337312fec14SDave Airlie jregAD |= 0x01; /* HBE D[5] */ 338312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f)); 339312fec14SDave Airlie 3409f93c8b3SY.C. Chen temp = ((mode->crtc_hsync_start-precache) >> 3) - 1; 341312fec14SDave Airlie if (temp & 0x100) 342312fec14SDave Airlie jregAC |= 0x40; /* HRS D[5] */ 343312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp); 344312fec14SDave Airlie 3459f93c8b3SY.C. Chen temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f; 346312fec14SDave Airlie if (temp & 0x20) 347312fec14SDave Airlie jregAD |= 0x04; /* HRE D[5] */ 348312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); 349312fec14SDave Airlie 350312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC); 351312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD); 352312fec14SDave Airlie 353312fec14SDave Airlie /* vert timings */ 354312fec14SDave Airlie temp = (mode->crtc_vtotal) - 2; 355312fec14SDave Airlie if (temp & 0x100) 356312fec14SDave Airlie jreg07 |= 0x01; 357312fec14SDave Airlie if (temp & 0x200) 358312fec14SDave Airlie jreg07 |= 0x20; 359312fec14SDave Airlie if (temp & 0x400) 360312fec14SDave Airlie jregAE |= 0x01; 361312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp); 362312fec14SDave Airlie 363312fec14SDave Airlie temp = (mode->crtc_vsync_start) - 1; 364312fec14SDave Airlie if (temp & 0x100) 365312fec14SDave Airlie jreg07 |= 0x04; 366312fec14SDave Airlie if (temp & 0x200) 367312fec14SDave Airlie jreg07 |= 0x80; 368312fec14SDave Airlie if (temp & 0x400) 369312fec14SDave Airlie jregAE |= 0x08; 370312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp); 371312fec14SDave Airlie 372312fec14SDave Airlie temp = (mode->crtc_vsync_end - 1) & 0x3f; 373312fec14SDave Airlie if (temp & 0x10) 374312fec14SDave Airlie jregAE |= 0x20; 375312fec14SDave Airlie if (temp & 0x20) 376312fec14SDave Airlie jregAE |= 0x40; 377312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf); 378312fec14SDave Airlie 379312fec14SDave Airlie temp = mode->crtc_vdisplay - 1; 380312fec14SDave Airlie if (temp & 0x100) 381312fec14SDave Airlie jreg07 |= 0x02; 382312fec14SDave Airlie if (temp & 0x200) 383312fec14SDave Airlie jreg07 |= 0x40; 384312fec14SDave Airlie if (temp & 0x400) 385312fec14SDave Airlie jregAE |= 0x02; 386312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp); 387312fec14SDave Airlie 388312fec14SDave Airlie temp = mode->crtc_vblank_start - 1; 389312fec14SDave Airlie if (temp & 0x100) 390312fec14SDave Airlie jreg07 |= 0x08; 391312fec14SDave Airlie if (temp & 0x200) 392312fec14SDave Airlie jreg09 |= 0x20; 393312fec14SDave Airlie if (temp & 0x400) 394312fec14SDave Airlie jregAE |= 0x04; 395312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp); 396312fec14SDave Airlie 397312fec14SDave Airlie temp = mode->crtc_vblank_end - 1; 398312fec14SDave Airlie if (temp & 0x100) 399312fec14SDave Airlie jregAE |= 0x10; 400312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp); 401312fec14SDave Airlie 402312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07); 403312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09); 404312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80)); 405312fec14SDave Airlie 4069f93c8b3SY.C. Chen if (precache) 4079f93c8b3SY.C. Chen ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80); 4089f93c8b3SY.C. Chen else 4099f93c8b3SY.C. Chen ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00); 4109f93c8b3SY.C. Chen 411312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80); 412312fec14SDave Airlie } 413312fec14SDave Airlie 414ae37025dSThomas Zimmermann static void ast_set_offset_reg(struct ast_private *ast, 415ae37025dSThomas Zimmermann struct drm_framebuffer *fb) 416312fec14SDave Airlie { 417312fec14SDave Airlie u16 offset; 418312fec14SDave Airlie 4197445283aSVille Syrjälä offset = fb->pitches[0] >> 3; 420312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff)); 421312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f); 422312fec14SDave Airlie } 423312fec14SDave Airlie 424ae37025dSThomas Zimmermann static void ast_set_dclk_reg(struct ast_private *ast, 425ae37025dSThomas Zimmermann struct drm_display_mode *mode, 426312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 427312fec14SDave Airlie { 42822acdbb1SBenjamin Herrenschmidt const struct ast_vbios_dclk_info *clk_info; 429312fec14SDave Airlie 4309f93c8b3SY.C. Chen if (ast->chip == AST2500) 4319f93c8b3SY.C. Chen clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index]; 4329f93c8b3SY.C. Chen else 433312fec14SDave Airlie clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; 434312fec14SDave Airlie 435312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1); 436312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2); 437312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f, 4389f93c8b3SY.C. Chen (clk_info->param3 & 0xc0) | 4399f93c8b3SY.C. Chen ((clk_info->param3 & 0x3) << 4)); 440312fec14SDave Airlie } 441312fec14SDave Airlie 442ae37025dSThomas Zimmermann static void ast_set_color_reg(struct ast_private *ast, 443ae37025dSThomas Zimmermann const struct drm_format_info *format) 444312fec14SDave Airlie { 445312fec14SDave Airlie u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; 446312fec14SDave Airlie 447ae37025dSThomas Zimmermann switch (format->cpp[0] * 8) { 448312fec14SDave Airlie case 8: 449312fec14SDave Airlie jregA0 = 0x70; 450312fec14SDave Airlie jregA3 = 0x01; 451312fec14SDave Airlie jregA8 = 0x00; 452312fec14SDave Airlie break; 453312fec14SDave Airlie case 15: 454312fec14SDave Airlie case 16: 455312fec14SDave Airlie jregA0 = 0x70; 456312fec14SDave Airlie jregA3 = 0x04; 457312fec14SDave Airlie jregA8 = 0x02; 458312fec14SDave Airlie break; 459312fec14SDave Airlie case 32: 460312fec14SDave Airlie jregA0 = 0x70; 461312fec14SDave Airlie jregA3 = 0x08; 462312fec14SDave Airlie jregA8 = 0x02; 463312fec14SDave Airlie break; 464312fec14SDave Airlie } 465312fec14SDave Airlie 466312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0); 467312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3); 468312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8); 4690d45ad98SThomas Zimmermann } 4700d45ad98SThomas Zimmermann 471ae37025dSThomas Zimmermann static void ast_set_crtthd_reg(struct ast_private *ast) 4720d45ad98SThomas Zimmermann { 473312fec14SDave Airlie /* Set Threshold */ 474bcc77411SKuoHsiang Chou if (ast->chip == AST2600) { 475bcc77411SKuoHsiang Chou ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0xe0); 476bcc77411SKuoHsiang Chou ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0xa0); 477bcc77411SKuoHsiang Chou } else if (ast->chip == AST2300 || ast->chip == AST2400 || 4789f93c8b3SY.C. Chen ast->chip == AST2500) { 479312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78); 480312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60); 481312fec14SDave Airlie } else if (ast->chip == AST2100 || 482312fec14SDave Airlie ast->chip == AST1100 || 483312fec14SDave Airlie ast->chip == AST2200 || 484312fec14SDave Airlie ast->chip == AST2150) { 485312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f); 486312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f); 487312fec14SDave Airlie } else { 488312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f); 489312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f); 490312fec14SDave Airlie } 491312fec14SDave Airlie } 492312fec14SDave Airlie 493ae37025dSThomas Zimmermann static void ast_set_sync_reg(struct ast_private *ast, 494ae37025dSThomas Zimmermann struct drm_display_mode *mode, 495312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 496312fec14SDave Airlie { 497312fec14SDave Airlie u8 jreg; 498312fec14SDave Airlie 499312fec14SDave Airlie jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ); 50094d12b13SY.C. Chen jreg &= ~0xC0; 5016c9bd443SGregory Williams if (vbios_mode->enh_table->flags & NVSync) 5026c9bd443SGregory Williams jreg |= 0x80; 5036c9bd443SGregory Williams if (vbios_mode->enh_table->flags & NHSync) 5046c9bd443SGregory Williams jreg |= 0x40; 505312fec14SDave Airlie ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); 506312fec14SDave Airlie } 507312fec14SDave Airlie 508ae37025dSThomas Zimmermann static void ast_set_start_address_crt1(struct ast_private *ast, 5096c9bd443SGregory Williams unsigned int offset) 510312fec14SDave Airlie { 511312fec14SDave Airlie u32 addr; 512312fec14SDave Airlie 513312fec14SDave Airlie addr = offset >> 2; 514312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff)); 515312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff)); 516312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff)); 517312fec14SDave Airlie 518312fec14SDave Airlie } 519312fec14SDave Airlie 52039edb287SThomas Zimmermann static void ast_wait_for_vretrace(struct ast_private *ast) 52139edb287SThomas Zimmermann { 52239edb287SThomas Zimmermann unsigned long timeout = jiffies + HZ; 52339edb287SThomas Zimmermann u8 vgair1; 52439edb287SThomas Zimmermann 52539edb287SThomas Zimmermann do { 52639edb287SThomas Zimmermann vgair1 = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 52739edb287SThomas Zimmermann } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout)); 52839edb287SThomas Zimmermann } 52939edb287SThomas Zimmermann 530a6ff807bSThomas Zimmermann /* 531a6ff807bSThomas Zimmermann * Primary plane 532a6ff807bSThomas Zimmermann */ 533a6ff807bSThomas Zimmermann 534a6ff807bSThomas Zimmermann static const uint32_t ast_primary_plane_formats[] = { 535a6ff807bSThomas Zimmermann DRM_FORMAT_XRGB8888, 536a6ff807bSThomas Zimmermann DRM_FORMAT_RGB565, 537a6ff807bSThomas Zimmermann DRM_FORMAT_C8, 538a6ff807bSThomas Zimmermann }; 539a6ff807bSThomas Zimmermann 540ae46a57dSThomas Zimmermann static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane, 5417c11b99aSMaxime Ripard struct drm_atomic_state *state) 542a6ff807bSThomas Zimmermann { 5437c11b99aSMaxime Ripard struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 5447c11b99aSMaxime Ripard plane); 545ae46a57dSThomas Zimmermann struct drm_crtc_state *crtc_state; 5463339fdf5SThomas Zimmermann struct ast_crtc_state *ast_crtc_state; 547ae46a57dSThomas Zimmermann int ret; 548ae46a57dSThomas Zimmermann 549ba5c1649SMaxime Ripard if (!new_plane_state->crtc) 550ae46a57dSThomas Zimmermann return 0; 551ae46a57dSThomas Zimmermann 552dec92020SMaxime Ripard crtc_state = drm_atomic_get_new_crtc_state(state, 553ba5c1649SMaxime Ripard new_plane_state->crtc); 554ae46a57dSThomas Zimmermann 555ba5c1649SMaxime Ripard ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, 556ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 557ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 558ae46a57dSThomas Zimmermann false, true); 559ae46a57dSThomas Zimmermann if (ret) 560ae46a57dSThomas Zimmermann return ret; 561ae46a57dSThomas Zimmermann 562ba5c1649SMaxime Ripard if (!new_plane_state->visible) 5633339fdf5SThomas Zimmermann return 0; 5643339fdf5SThomas Zimmermann 5653339fdf5SThomas Zimmermann ast_crtc_state = to_ast_crtc_state(crtc_state); 5663339fdf5SThomas Zimmermann 567ba5c1649SMaxime Ripard ast_crtc_state->format = new_plane_state->fb->format; 5683339fdf5SThomas Zimmermann 569a6ff807bSThomas Zimmermann return 0; 570a6ff807bSThomas Zimmermann } 571a6ff807bSThomas Zimmermann 5723a53230eSSamuel Zou static void 5733a53230eSSamuel Zou ast_primary_plane_helper_atomic_update(struct drm_plane *plane, 574977697e2SMaxime Ripard struct drm_atomic_state *state) 575a6ff807bSThomas Zimmermann { 576977697e2SMaxime Ripard struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, 577977697e2SMaxime Ripard plane); 5781a19b4cbSThomas Zimmermann struct drm_device *dev = plane->dev; 5791a19b4cbSThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 58037418bf1SMaxime Ripard struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, 58137418bf1SMaxime Ripard plane); 582a6ff807bSThomas Zimmermann struct drm_gem_vram_object *gbo; 583a6ff807bSThomas Zimmermann s64 gpu_addr; 58441016fe1SMaxime Ripard struct drm_framebuffer *fb = new_state->fb; 5855638c82cSThomas Zimmermann struct drm_framebuffer *old_fb = old_state->fb; 586a6ff807bSThomas Zimmermann 5875638c82cSThomas Zimmermann if (!old_fb || (fb->format != old_fb->format)) { 58841016fe1SMaxime Ripard struct drm_crtc_state *crtc_state = new_state->crtc->state; 5895638c82cSThomas Zimmermann struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 5905638c82cSThomas Zimmermann struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info; 5915638c82cSThomas Zimmermann 5925638c82cSThomas Zimmermann ast_set_color_reg(ast, fb->format); 5935638c82cSThomas Zimmermann ast_set_vbios_color_reg(ast, fb->format, vbios_mode_info); 5945638c82cSThomas Zimmermann } 5955638c82cSThomas Zimmermann 5965638c82cSThomas Zimmermann gbo = drm_gem_vram_of_gem(fb->obj[0]); 597a6ff807bSThomas Zimmermann gpu_addr = drm_gem_vram_offset(gbo); 5981a19b4cbSThomas Zimmermann if (drm_WARN_ON_ONCE(dev, gpu_addr < 0)) 599a6ff807bSThomas Zimmermann return; /* Bug: we didn't pin the BO to VRAM in prepare_fb. */ 600a6ff807bSThomas Zimmermann 6015638c82cSThomas Zimmermann ast_set_offset_reg(ast, fb); 602ae37025dSThomas Zimmermann ast_set_start_address_crt1(ast, (u32)gpu_addr); 6032fbeec03SThomas Zimmermann 6042fbeec03SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x00); 6052fbeec03SThomas Zimmermann } 6062fbeec03SThomas Zimmermann 6072fbeec03SThomas Zimmermann static void 6082fbeec03SThomas Zimmermann ast_primary_plane_helper_atomic_disable(struct drm_plane *plane, 609977697e2SMaxime Ripard struct drm_atomic_state *state) 6102fbeec03SThomas Zimmermann { 611fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(plane->dev); 6122fbeec03SThomas Zimmermann 6132fbeec03SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20); 614a6ff807bSThomas Zimmermann } 615a6ff807bSThomas Zimmermann 616a6ff807bSThomas Zimmermann static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = { 617f8bd3dbbSDaniel Vetter DRM_GEM_VRAM_PLANE_HELPER_FUNCS, 618a6ff807bSThomas Zimmermann .atomic_check = ast_primary_plane_helper_atomic_check, 619a6ff807bSThomas Zimmermann .atomic_update = ast_primary_plane_helper_atomic_update, 6202fbeec03SThomas Zimmermann .atomic_disable = ast_primary_plane_helper_atomic_disable, 621a6ff807bSThomas Zimmermann }; 622a6ff807bSThomas Zimmermann 623a6ff807bSThomas Zimmermann static const struct drm_plane_funcs ast_primary_plane_funcs = { 624a6ff807bSThomas Zimmermann .update_plane = drm_atomic_helper_update_plane, 625a6ff807bSThomas Zimmermann .disable_plane = drm_atomic_helper_disable_plane, 626a6ff807bSThomas Zimmermann .destroy = drm_plane_cleanup, 627a6ff807bSThomas Zimmermann .reset = drm_atomic_helper_plane_reset, 628a6ff807bSThomas Zimmermann .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 629a6ff807bSThomas Zimmermann .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 630a6ff807bSThomas Zimmermann }; 631a6ff807bSThomas Zimmermann 632616048afSThomas Zimmermann static int ast_primary_plane_init(struct ast_private *ast) 633616048afSThomas Zimmermann { 634616048afSThomas Zimmermann struct drm_device *dev = &ast->base; 635616048afSThomas Zimmermann struct drm_plane *primary_plane = &ast->primary_plane; 636616048afSThomas Zimmermann int ret; 637616048afSThomas Zimmermann 638616048afSThomas Zimmermann ret = drm_universal_plane_init(dev, primary_plane, 0x01, 639616048afSThomas Zimmermann &ast_primary_plane_funcs, 640616048afSThomas Zimmermann ast_primary_plane_formats, 641616048afSThomas Zimmermann ARRAY_SIZE(ast_primary_plane_formats), 642616048afSThomas Zimmermann NULL, DRM_PLANE_TYPE_PRIMARY, NULL); 643616048afSThomas Zimmermann if (ret) { 644616048afSThomas Zimmermann drm_err(dev, "drm_universal_plane_init() failed: %d\n", ret); 645616048afSThomas Zimmermann return ret; 646616048afSThomas Zimmermann } 647616048afSThomas Zimmermann drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs); 648616048afSThomas Zimmermann 649616048afSThomas Zimmermann return 0; 650616048afSThomas Zimmermann } 651616048afSThomas Zimmermann 652a6ff807bSThomas Zimmermann /* 65302f3bb75SThomas Zimmermann * Cursor plane 65402f3bb75SThomas Zimmermann */ 65502f3bb75SThomas Zimmermann 656718c2286SThomas Zimmermann static void ast_update_cursor_image(u8 __iomem *dst, const u8 *src, int width, int height) 657718c2286SThomas Zimmermann { 658718c2286SThomas Zimmermann union { 659718c2286SThomas Zimmermann u32 ul; 660718c2286SThomas Zimmermann u8 b[4]; 661718c2286SThomas Zimmermann } srcdata32[2], data32; 662718c2286SThomas Zimmermann union { 663718c2286SThomas Zimmermann u16 us; 664718c2286SThomas Zimmermann u8 b[2]; 665718c2286SThomas Zimmermann } data16; 666718c2286SThomas Zimmermann u32 csum = 0; 667718c2286SThomas Zimmermann s32 alpha_dst_delta, last_alpha_dst_delta; 668718c2286SThomas Zimmermann u8 __iomem *dstxor; 669718c2286SThomas Zimmermann const u8 *srcxor; 670718c2286SThomas Zimmermann int i, j; 671718c2286SThomas Zimmermann u32 per_pixel_copy, two_pixel_copy; 672718c2286SThomas Zimmermann 673718c2286SThomas Zimmermann alpha_dst_delta = AST_MAX_HWC_WIDTH << 1; 674718c2286SThomas Zimmermann last_alpha_dst_delta = alpha_dst_delta - (width << 1); 675718c2286SThomas Zimmermann 676718c2286SThomas Zimmermann srcxor = src; 677718c2286SThomas Zimmermann dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta; 678718c2286SThomas Zimmermann per_pixel_copy = width & 1; 679718c2286SThomas Zimmermann two_pixel_copy = width >> 1; 680718c2286SThomas Zimmermann 681718c2286SThomas Zimmermann for (j = 0; j < height; j++) { 682718c2286SThomas Zimmermann for (i = 0; i < two_pixel_copy; i++) { 683718c2286SThomas Zimmermann srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; 684718c2286SThomas Zimmermann srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0; 685718c2286SThomas Zimmermann data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); 686718c2286SThomas Zimmermann data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); 687718c2286SThomas Zimmermann data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4); 688718c2286SThomas Zimmermann data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4); 689718c2286SThomas Zimmermann 690718c2286SThomas Zimmermann writel(data32.ul, dstxor); 691718c2286SThomas Zimmermann csum += data32.ul; 692718c2286SThomas Zimmermann 693718c2286SThomas Zimmermann dstxor += 4; 694718c2286SThomas Zimmermann srcxor += 8; 695718c2286SThomas Zimmermann 696718c2286SThomas Zimmermann } 697718c2286SThomas Zimmermann 698718c2286SThomas Zimmermann for (i = 0; i < per_pixel_copy; i++) { 699718c2286SThomas Zimmermann srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; 700718c2286SThomas Zimmermann data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); 701718c2286SThomas Zimmermann data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); 702718c2286SThomas Zimmermann writew(data16.us, dstxor); 703718c2286SThomas Zimmermann csum += (u32)data16.us; 704718c2286SThomas Zimmermann 705718c2286SThomas Zimmermann dstxor += 2; 706718c2286SThomas Zimmermann srcxor += 4; 707718c2286SThomas Zimmermann } 708718c2286SThomas Zimmermann dstxor += last_alpha_dst_delta; 709718c2286SThomas Zimmermann } 710718c2286SThomas Zimmermann 711718c2286SThomas Zimmermann /* write checksum + signature */ 712718c2286SThomas Zimmermann dst += AST_HWC_SIZE; 713718c2286SThomas Zimmermann writel(csum, dst); 714718c2286SThomas Zimmermann writel(width, dst + AST_HWC_SIGNATURE_SizeX); 715718c2286SThomas Zimmermann writel(height, dst + AST_HWC_SIGNATURE_SizeY); 716718c2286SThomas Zimmermann writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX); 717718c2286SThomas Zimmermann writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY); 718718c2286SThomas Zimmermann } 719718c2286SThomas Zimmermann 720718c2286SThomas Zimmermann static void ast_set_cursor_base(struct ast_private *ast, u64 address) 721718c2286SThomas Zimmermann { 722718c2286SThomas Zimmermann u8 addr0 = (address >> 3) & 0xff; 723718c2286SThomas Zimmermann u8 addr1 = (address >> 11) & 0xff; 724718c2286SThomas Zimmermann u8 addr2 = (address >> 19) & 0xff; 725718c2286SThomas Zimmermann 726718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, addr0); 727718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, addr1); 728718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, addr2); 729718c2286SThomas Zimmermann } 730718c2286SThomas Zimmermann 731718c2286SThomas Zimmermann static void ast_set_cursor_location(struct ast_private *ast, u16 x, u16 y, 732718c2286SThomas Zimmermann u8 x_offset, u8 y_offset) 733718c2286SThomas Zimmermann { 734718c2286SThomas Zimmermann u8 x0 = (x & 0x00ff); 735718c2286SThomas Zimmermann u8 x1 = (x & 0x0f00) >> 8; 736718c2286SThomas Zimmermann u8 y0 = (y & 0x00ff); 737718c2286SThomas Zimmermann u8 y1 = (y & 0x0700) >> 8; 738718c2286SThomas Zimmermann 739718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset); 740718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset); 741718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, x0); 742718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, x1); 743718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, y0); 744718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, y1); 745718c2286SThomas Zimmermann } 746718c2286SThomas Zimmermann 747718c2286SThomas Zimmermann static void ast_set_cursor_enabled(struct ast_private *ast, bool enabled) 748718c2286SThomas Zimmermann { 749718c2286SThomas Zimmermann static const u8 mask = (u8)~(AST_IO_VGACRCB_HWC_16BPP | 750718c2286SThomas Zimmermann AST_IO_VGACRCB_HWC_ENABLED); 751718c2286SThomas Zimmermann 752718c2286SThomas Zimmermann u8 vgacrcb = AST_IO_VGACRCB_HWC_16BPP; 753718c2286SThomas Zimmermann 754718c2286SThomas Zimmermann if (enabled) 755718c2286SThomas Zimmermann vgacrcb |= AST_IO_VGACRCB_HWC_ENABLED; 756718c2286SThomas Zimmermann 757718c2286SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, mask, vgacrcb); 758718c2286SThomas Zimmermann } 759718c2286SThomas Zimmermann 76002f3bb75SThomas Zimmermann static const uint32_t ast_cursor_plane_formats[] = { 76102f3bb75SThomas Zimmermann DRM_FORMAT_ARGB8888, 76202f3bb75SThomas Zimmermann }; 76302f3bb75SThomas Zimmermann 76402f3bb75SThomas Zimmermann static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane, 7657c11b99aSMaxime Ripard struct drm_atomic_state *state) 76602f3bb75SThomas Zimmermann { 7677c11b99aSMaxime Ripard struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 7687c11b99aSMaxime Ripard plane); 769ba5c1649SMaxime Ripard struct drm_framebuffer *fb = new_plane_state->fb; 770ae46a57dSThomas Zimmermann struct drm_crtc_state *crtc_state; 771ae46a57dSThomas Zimmermann int ret; 772ae46a57dSThomas Zimmermann 773ba5c1649SMaxime Ripard if (!new_plane_state->crtc) 774ae46a57dSThomas Zimmermann return 0; 775ae46a57dSThomas Zimmermann 776dec92020SMaxime Ripard crtc_state = drm_atomic_get_new_crtc_state(state, 777ba5c1649SMaxime Ripard new_plane_state->crtc); 778ae46a57dSThomas Zimmermann 779ba5c1649SMaxime Ripard ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, 780ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 781ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 782ae46a57dSThomas Zimmermann true, true); 783ae46a57dSThomas Zimmermann if (ret) 784ae46a57dSThomas Zimmermann return ret; 785ae46a57dSThomas Zimmermann 786ba5c1649SMaxime Ripard if (!new_plane_state->visible) 787ae46a57dSThomas Zimmermann return 0; 788ae46a57dSThomas Zimmermann 789ae46a57dSThomas Zimmermann if (fb->width > AST_MAX_HWC_WIDTH || fb->height > AST_MAX_HWC_HEIGHT) 790ae46a57dSThomas Zimmermann return -EINVAL; 791ae46a57dSThomas Zimmermann 79202f3bb75SThomas Zimmermann return 0; 79302f3bb75SThomas Zimmermann } 79402f3bb75SThomas Zimmermann 79502f3bb75SThomas Zimmermann static void 79602f3bb75SThomas Zimmermann ast_cursor_plane_helper_atomic_update(struct drm_plane *plane, 797977697e2SMaxime Ripard struct drm_atomic_state *state) 79802f3bb75SThomas Zimmermann { 799afee7e95SThomas Zimmermann struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane); 800977697e2SMaxime Ripard struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, 801977697e2SMaxime Ripard plane); 80237418bf1SMaxime Ripard struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, 80337418bf1SMaxime Ripard plane); 80441016fe1SMaxime Ripard struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(new_state); 80541016fe1SMaxime Ripard struct drm_framebuffer *fb = new_state->fb; 806365c0e70SThomas Zimmermann struct ast_private *ast = to_ast_private(plane->dev); 8074d36cf07SThomas Zimmermann struct dma_buf_map dst_map = 8084d36cf07SThomas Zimmermann ast_cursor_plane->hwc[ast_cursor_plane->next_hwc_index].map; 809385131f3SThomas Zimmermann u64 dst_off = 810385131f3SThomas Zimmermann ast_cursor_plane->hwc[ast_cursor_plane->next_hwc_index].off; 811add8b6a9SThomas Zimmermann struct dma_buf_map src_map = shadow_plane_state->data[0]; 81281039adcSThomas Zimmermann unsigned int offset_x, offset_y; 813718c2286SThomas Zimmermann u16 x, y; 814718c2286SThomas Zimmermann u8 x_offset, y_offset; 815718c2286SThomas Zimmermann u8 __iomem *dst; 816718c2286SThomas Zimmermann u8 __iomem *sig; 8174d36cf07SThomas Zimmermann const u8 *src; 818718c2286SThomas Zimmermann 8194d36cf07SThomas Zimmermann src = src_map.vaddr; /* TODO: Use mapping abstraction properly */ 8204d36cf07SThomas Zimmermann dst = dst_map.vaddr_iomem; /* TODO: Use mapping abstraction properly */ 8214d36cf07SThomas Zimmermann sig = dst + AST_HWC_SIZE; /* TODO: Use mapping abstraction properly */ 8224d36cf07SThomas Zimmermann 8234d36cf07SThomas Zimmermann /* 8244d36cf07SThomas Zimmermann * Do data transfer to HW cursor BO. If a new cursor image was installed, 8254d36cf07SThomas Zimmermann * point the scanout engine to dst_gbo's offset and page-flip the HWC buffers. 8264d36cf07SThomas Zimmermann */ 8274d36cf07SThomas Zimmermann 8284d36cf07SThomas Zimmermann ast_update_cursor_image(dst, src, fb->width, fb->height); 829718c2286SThomas Zimmermann 83041016fe1SMaxime Ripard if (new_state->fb != old_state->fb) { 831385131f3SThomas Zimmermann ast_set_cursor_base(ast, dst_off); 832718c2286SThomas Zimmermann 833afee7e95SThomas Zimmermann ++ast_cursor_plane->next_hwc_index; 834afee7e95SThomas Zimmermann ast_cursor_plane->next_hwc_index %= ARRAY_SIZE(ast_cursor_plane->hwc); 835718c2286SThomas Zimmermann } 836718c2286SThomas Zimmermann 8374d36cf07SThomas Zimmermann /* 8384d36cf07SThomas Zimmermann * Update location in HWC signature and registers. 8394d36cf07SThomas Zimmermann */ 840718c2286SThomas Zimmermann 84141016fe1SMaxime Ripard writel(new_state->crtc_x, sig + AST_HWC_SIGNATURE_X); 84241016fe1SMaxime Ripard writel(new_state->crtc_y, sig + AST_HWC_SIGNATURE_Y); 843718c2286SThomas Zimmermann 84481039adcSThomas Zimmermann offset_x = AST_MAX_HWC_WIDTH - fb->width; 845ee4a92d6SThomas Zimmermann offset_y = AST_MAX_HWC_HEIGHT - fb->height; 84602f3bb75SThomas Zimmermann 84741016fe1SMaxime Ripard if (new_state->crtc_x < 0) { 84841016fe1SMaxime Ripard x_offset = (-new_state->crtc_x) + offset_x; 849718c2286SThomas Zimmermann x = 0; 850718c2286SThomas Zimmermann } else { 851718c2286SThomas Zimmermann x_offset = offset_x; 85241016fe1SMaxime Ripard x = new_state->crtc_x; 853718c2286SThomas Zimmermann } 85441016fe1SMaxime Ripard if (new_state->crtc_y < 0) { 85541016fe1SMaxime Ripard y_offset = (-new_state->crtc_y) + offset_y; 856718c2286SThomas Zimmermann y = 0; 857718c2286SThomas Zimmermann } else { 858718c2286SThomas Zimmermann y_offset = offset_y; 85941016fe1SMaxime Ripard y = new_state->crtc_y; 86002f3bb75SThomas Zimmermann } 86102f3bb75SThomas Zimmermann 862718c2286SThomas Zimmermann ast_set_cursor_location(ast, x, y, x_offset, y_offset); 863718c2286SThomas Zimmermann 8644d36cf07SThomas Zimmermann /* Dummy write to enable HWC and make the HW pick-up the changes. */ 865718c2286SThomas Zimmermann ast_set_cursor_enabled(ast, true); 86602f3bb75SThomas Zimmermann } 86702f3bb75SThomas Zimmermann 86802f3bb75SThomas Zimmermann static void 86902f3bb75SThomas Zimmermann ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane, 870977697e2SMaxime Ripard struct drm_atomic_state *state) 87102f3bb75SThomas Zimmermann { 872fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(plane->dev); 87302f3bb75SThomas Zimmermann 874718c2286SThomas Zimmermann ast_set_cursor_enabled(ast, false); 87502f3bb75SThomas Zimmermann } 87602f3bb75SThomas Zimmermann 87702f3bb75SThomas Zimmermann static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = { 8784d36cf07SThomas Zimmermann DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 87902f3bb75SThomas Zimmermann .atomic_check = ast_cursor_plane_helper_atomic_check, 88002f3bb75SThomas Zimmermann .atomic_update = ast_cursor_plane_helper_atomic_update, 88102f3bb75SThomas Zimmermann .atomic_disable = ast_cursor_plane_helper_atomic_disable, 88202f3bb75SThomas Zimmermann }; 88302f3bb75SThomas Zimmermann 88422b6591fSThomas Zimmermann static void ast_cursor_plane_destroy(struct drm_plane *plane) 88522b6591fSThomas Zimmermann { 886afee7e95SThomas Zimmermann struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane); 88722b6591fSThomas Zimmermann size_t i; 88822b6591fSThomas Zimmermann struct drm_gem_vram_object *gbo; 88984810d6aSThomas Zimmermann struct dma_buf_map map; 89022b6591fSThomas Zimmermann 891afee7e95SThomas Zimmermann for (i = 0; i < ARRAY_SIZE(ast_cursor_plane->hwc); ++i) { 892afee7e95SThomas Zimmermann gbo = ast_cursor_plane->hwc[i].gbo; 89384810d6aSThomas Zimmermann map = ast_cursor_plane->hwc[i].map; 89484810d6aSThomas Zimmermann drm_gem_vram_vunmap(gbo, &map); 89522b6591fSThomas Zimmermann drm_gem_vram_unpin(gbo); 89622b6591fSThomas Zimmermann drm_gem_vram_put(gbo); 89722b6591fSThomas Zimmermann } 89822b6591fSThomas Zimmermann 89922b6591fSThomas Zimmermann drm_plane_cleanup(plane); 90022b6591fSThomas Zimmermann } 90122b6591fSThomas Zimmermann 90202f3bb75SThomas Zimmermann static const struct drm_plane_funcs ast_cursor_plane_funcs = { 90302f3bb75SThomas Zimmermann .update_plane = drm_atomic_helper_update_plane, 90402f3bb75SThomas Zimmermann .disable_plane = drm_atomic_helper_disable_plane, 90522b6591fSThomas Zimmermann .destroy = ast_cursor_plane_destroy, 9064d36cf07SThomas Zimmermann DRM_GEM_SHADOW_PLANE_FUNCS, 90702f3bb75SThomas Zimmermann }; 90802f3bb75SThomas Zimmermann 909616048afSThomas Zimmermann static int ast_cursor_plane_init(struct ast_private *ast) 910616048afSThomas Zimmermann { 911616048afSThomas Zimmermann struct drm_device *dev = &ast->base; 912a0ba992dSThomas Zimmermann struct ast_cursor_plane *ast_cursor_plane = &ast->cursor_plane; 913a0ba992dSThomas Zimmermann struct drm_plane *cursor_plane = &ast_cursor_plane->base; 91422b6591fSThomas Zimmermann size_t size, i; 91522b6591fSThomas Zimmermann struct drm_gem_vram_object *gbo; 91684810d6aSThomas Zimmermann struct dma_buf_map map; 917616048afSThomas Zimmermann int ret; 918385131f3SThomas Zimmermann s64 off; 919616048afSThomas Zimmermann 92022b6591fSThomas Zimmermann /* 92122b6591fSThomas Zimmermann * Allocate backing storage for cursors. The BOs are permanently 92222b6591fSThomas Zimmermann * pinned to the top end of the VRAM. 92322b6591fSThomas Zimmermann */ 92422b6591fSThomas Zimmermann 92522b6591fSThomas Zimmermann size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE); 92622b6591fSThomas Zimmermann 927afee7e95SThomas Zimmermann for (i = 0; i < ARRAY_SIZE(ast_cursor_plane->hwc); ++i) { 92822b6591fSThomas Zimmermann gbo = drm_gem_vram_create(dev, size, 0); 92922b6591fSThomas Zimmermann if (IS_ERR(gbo)) { 93022b6591fSThomas Zimmermann ret = PTR_ERR(gbo); 93122b6591fSThomas Zimmermann goto err_hwc; 93222b6591fSThomas Zimmermann } 93322b6591fSThomas Zimmermann ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM | 93422b6591fSThomas Zimmermann DRM_GEM_VRAM_PL_FLAG_TOPDOWN); 93522b6591fSThomas Zimmermann if (ret) 93622b6591fSThomas Zimmermann goto err_drm_gem_vram_put; 93784810d6aSThomas Zimmermann ret = drm_gem_vram_vmap(gbo, &map); 93884810d6aSThomas Zimmermann if (ret) 93984810d6aSThomas Zimmermann goto err_drm_gem_vram_unpin; 940385131f3SThomas Zimmermann off = drm_gem_vram_offset(gbo); 941385131f3SThomas Zimmermann if (off < 0) { 942385131f3SThomas Zimmermann ret = off; 943385131f3SThomas Zimmermann goto err_drm_gem_vram_vunmap; 944385131f3SThomas Zimmermann } 945afee7e95SThomas Zimmermann ast_cursor_plane->hwc[i].gbo = gbo; 94684810d6aSThomas Zimmermann ast_cursor_plane->hwc[i].map = map; 947385131f3SThomas Zimmermann ast_cursor_plane->hwc[i].off = off; 94822b6591fSThomas Zimmermann } 94922b6591fSThomas Zimmermann 95022b6591fSThomas Zimmermann /* 95122b6591fSThomas Zimmermann * Create the cursor plane. The plane's destroy callback will release 95222b6591fSThomas Zimmermann * the backing storages' BO memory. 95322b6591fSThomas Zimmermann */ 95422b6591fSThomas Zimmermann 955616048afSThomas Zimmermann ret = drm_universal_plane_init(dev, cursor_plane, 0x01, 956616048afSThomas Zimmermann &ast_cursor_plane_funcs, 957616048afSThomas Zimmermann ast_cursor_plane_formats, 958616048afSThomas Zimmermann ARRAY_SIZE(ast_cursor_plane_formats), 959616048afSThomas Zimmermann NULL, DRM_PLANE_TYPE_CURSOR, NULL); 960616048afSThomas Zimmermann if (ret) { 96122b6591fSThomas Zimmermann drm_err(dev, "drm_universal_plane failed(): %d\n", ret); 96222b6591fSThomas Zimmermann goto err_hwc; 963616048afSThomas Zimmermann } 964616048afSThomas Zimmermann drm_plane_helper_add(cursor_plane, &ast_cursor_plane_helper_funcs); 965616048afSThomas Zimmermann 966616048afSThomas Zimmermann return 0; 96722b6591fSThomas Zimmermann 96822b6591fSThomas Zimmermann err_hwc: 96922b6591fSThomas Zimmermann while (i) { 97022b6591fSThomas Zimmermann --i; 971afee7e95SThomas Zimmermann gbo = ast_cursor_plane->hwc[i].gbo; 97284810d6aSThomas Zimmermann map = ast_cursor_plane->hwc[i].map; 973385131f3SThomas Zimmermann err_drm_gem_vram_vunmap: 97484810d6aSThomas Zimmermann drm_gem_vram_vunmap(gbo, &map); 97584810d6aSThomas Zimmermann err_drm_gem_vram_unpin: 97622b6591fSThomas Zimmermann drm_gem_vram_unpin(gbo); 97722b6591fSThomas Zimmermann err_drm_gem_vram_put: 97822b6591fSThomas Zimmermann drm_gem_vram_put(gbo); 97922b6591fSThomas Zimmermann } 98022b6591fSThomas Zimmermann return ret; 981616048afSThomas Zimmermann } 982616048afSThomas Zimmermann 98302f3bb75SThomas Zimmermann /* 984a6ff807bSThomas Zimmermann * CRTC 985a6ff807bSThomas Zimmermann */ 986a6ff807bSThomas Zimmermann 987312fec14SDave Airlie static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) 988312fec14SDave Airlie { 989fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(crtc->dev); 990312fec14SDave Airlie 9912fbeec03SThomas Zimmermann /* TODO: Maybe control display signal generation with 9922fbeec03SThomas Zimmermann * Sync Enable (bit CR17.7). 9932fbeec03SThomas Zimmermann */ 994312fec14SDave Airlie switch (mode) { 995312fec14SDave Airlie case DRM_MODE_DPMS_ON: 996312fec14SDave Airlie case DRM_MODE_DPMS_STANDBY: 997312fec14SDave Airlie case DRM_MODE_DPMS_SUSPEND: 99883c6620bSDave Airlie if (ast->tx_chip_type == AST_TX_DP501) 99983c6620bSDave Airlie ast_set_dp501_video_output(crtc->dev, 1); 1000312fec14SDave Airlie break; 1001312fec14SDave Airlie case DRM_MODE_DPMS_OFF: 100283c6620bSDave Airlie if (ast->tx_chip_type == AST_TX_DP501) 100383c6620bSDave Airlie ast_set_dp501_video_output(crtc->dev, 0); 1004312fec14SDave Airlie break; 1005312fec14SDave Airlie } 1006312fec14SDave Airlie } 1007312fec14SDave Airlie 10086abbad2cSThomas Zimmermann static enum drm_mode_status 10096abbad2cSThomas Zimmermann ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) 10106abbad2cSThomas Zimmermann { 10116abbad2cSThomas Zimmermann struct ast_private *ast = to_ast_private(crtc->dev); 10126abbad2cSThomas Zimmermann enum drm_mode_status status; 10136abbad2cSThomas Zimmermann uint32_t jtemp; 10146abbad2cSThomas Zimmermann 10156abbad2cSThomas Zimmermann if (ast->support_wide_screen) { 10166abbad2cSThomas Zimmermann if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050)) 10176abbad2cSThomas Zimmermann return MODE_OK; 10186abbad2cSThomas Zimmermann if ((mode->hdisplay == 1280) && (mode->vdisplay == 800)) 10196abbad2cSThomas Zimmermann return MODE_OK; 10206abbad2cSThomas Zimmermann if ((mode->hdisplay == 1440) && (mode->vdisplay == 900)) 10216abbad2cSThomas Zimmermann return MODE_OK; 10226abbad2cSThomas Zimmermann if ((mode->hdisplay == 1360) && (mode->vdisplay == 768)) 10236abbad2cSThomas Zimmermann return MODE_OK; 10246abbad2cSThomas Zimmermann if ((mode->hdisplay == 1600) && (mode->vdisplay == 900)) 10256abbad2cSThomas Zimmermann return MODE_OK; 10266abbad2cSThomas Zimmermann 10276abbad2cSThomas Zimmermann if ((ast->chip == AST2100) || (ast->chip == AST2200) || 10286abbad2cSThomas Zimmermann (ast->chip == AST2300) || (ast->chip == AST2400) || 10296abbad2cSThomas Zimmermann (ast->chip == AST2500)) { 10306abbad2cSThomas Zimmermann if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080)) 10316abbad2cSThomas Zimmermann return MODE_OK; 10326abbad2cSThomas Zimmermann 10336abbad2cSThomas Zimmermann if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) { 10346abbad2cSThomas Zimmermann jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 10356abbad2cSThomas Zimmermann if (jtemp & 0x01) 10366abbad2cSThomas Zimmermann return MODE_NOMODE; 10376abbad2cSThomas Zimmermann else 10386abbad2cSThomas Zimmermann return MODE_OK; 10396abbad2cSThomas Zimmermann } 10406abbad2cSThomas Zimmermann } 10416abbad2cSThomas Zimmermann } 10426abbad2cSThomas Zimmermann 10436abbad2cSThomas Zimmermann status = MODE_NOMODE; 10446abbad2cSThomas Zimmermann 10456abbad2cSThomas Zimmermann switch (mode->hdisplay) { 10466abbad2cSThomas Zimmermann case 640: 10476abbad2cSThomas Zimmermann if (mode->vdisplay == 480) 10486abbad2cSThomas Zimmermann status = MODE_OK; 10496abbad2cSThomas Zimmermann break; 10506abbad2cSThomas Zimmermann case 800: 10516abbad2cSThomas Zimmermann if (mode->vdisplay == 600) 10526abbad2cSThomas Zimmermann status = MODE_OK; 10536abbad2cSThomas Zimmermann break; 10546abbad2cSThomas Zimmermann case 1024: 10556abbad2cSThomas Zimmermann if (mode->vdisplay == 768) 10566abbad2cSThomas Zimmermann status = MODE_OK; 10576abbad2cSThomas Zimmermann break; 10586abbad2cSThomas Zimmermann case 1280: 10596abbad2cSThomas Zimmermann if (mode->vdisplay == 1024) 10606abbad2cSThomas Zimmermann status = MODE_OK; 10616abbad2cSThomas Zimmermann break; 10626abbad2cSThomas Zimmermann case 1600: 10636abbad2cSThomas Zimmermann if (mode->vdisplay == 1200) 10646abbad2cSThomas Zimmermann status = MODE_OK; 10656abbad2cSThomas Zimmermann break; 10666abbad2cSThomas Zimmermann default: 10676abbad2cSThomas Zimmermann break; 10686abbad2cSThomas Zimmermann } 10696abbad2cSThomas Zimmermann 10706abbad2cSThomas Zimmermann return status; 10716abbad2cSThomas Zimmermann } 10726abbad2cSThomas Zimmermann 1073b48e1b6fSThomas Zimmermann static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc, 107429b77ad7SMaxime Ripard struct drm_atomic_state *state) 1075b48e1b6fSThomas Zimmermann { 107629b77ad7SMaxime Ripard struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 107729b77ad7SMaxime Ripard crtc); 10785638c82cSThomas Zimmermann struct drm_device *dev = crtc->dev; 1079e7d70cd4SThomas Zimmermann struct ast_crtc_state *ast_state; 10803339fdf5SThomas Zimmermann const struct drm_format_info *format; 1081b48e1b6fSThomas Zimmermann bool succ; 1082b48e1b6fSThomas Zimmermann 108329b77ad7SMaxime Ripard if (!crtc_state->enable) 1084d6ddbd5cSThomas Zimmermann return 0; /* no mode checks if CRTC is being disabled */ 1085d6ddbd5cSThomas Zimmermann 108629b77ad7SMaxime Ripard ast_state = to_ast_crtc_state(crtc_state); 1087b48e1b6fSThomas Zimmermann 10883339fdf5SThomas Zimmermann format = ast_state->format; 10895638c82cSThomas Zimmermann if (drm_WARN_ON_ONCE(dev, !format)) 10905638c82cSThomas Zimmermann return -EINVAL; /* BUG: We didn't set format in primary check(). */ 1091e7d70cd4SThomas Zimmermann 109229b77ad7SMaxime Ripard succ = ast_get_vbios_mode_info(format, &crtc_state->mode, 109329b77ad7SMaxime Ripard &crtc_state->adjusted_mode, 1094e7d70cd4SThomas Zimmermann &ast_state->vbios_mode_info); 1095b48e1b6fSThomas Zimmermann if (!succ) 1096b48e1b6fSThomas Zimmermann return -EINVAL; 1097b48e1b6fSThomas Zimmermann 1098b48e1b6fSThomas Zimmermann return 0; 1099b48e1b6fSThomas Zimmermann } 1100b48e1b6fSThomas Zimmermann 1101f3901b5fSThomas Zimmermann static void 1102f6ebe9f9SMaxime Ripard ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, 1103f6ebe9f9SMaxime Ripard struct drm_atomic_state *state) 11048e3784dfSThomas Zimmermann { 1105253f28b6SMaxime Ripard struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 1106253f28b6SMaxime Ripard crtc); 1107f6ebe9f9SMaxime Ripard struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 1108f6ebe9f9SMaxime Ripard crtc); 11098e3784dfSThomas Zimmermann struct ast_private *ast = to_ast_private(crtc->dev); 1110253f28b6SMaxime Ripard struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 11118e3784dfSThomas Zimmermann struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state); 11128e3784dfSThomas Zimmermann 11138e3784dfSThomas Zimmermann /* 11148e3784dfSThomas Zimmermann * The gamma LUT has to be reloaded after changing the primary 11158e3784dfSThomas Zimmermann * plane's color format. 11168e3784dfSThomas Zimmermann */ 11178e3784dfSThomas Zimmermann if (old_ast_crtc_state->format != ast_crtc_state->format) 11188e3784dfSThomas Zimmermann ast_crtc_load_lut(ast, crtc); 11198e3784dfSThomas Zimmermann } 11208e3784dfSThomas Zimmermann 11218e3784dfSThomas Zimmermann static void 1122f3901b5fSThomas Zimmermann ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, 1123351f950dSMaxime Ripard struct drm_atomic_state *state) 1124b48e1b6fSThomas Zimmermann { 112571d873ccSThomas Zimmermann struct drm_device *dev = crtc->dev; 1126fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 11275638c82cSThomas Zimmermann struct drm_crtc_state *crtc_state = crtc->state; 11285638c82cSThomas Zimmermann struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 11295638c82cSThomas Zimmermann struct ast_vbios_mode_info *vbios_mode_info = 11305638c82cSThomas Zimmermann &ast_crtc_state->vbios_mode_info; 11315638c82cSThomas Zimmermann struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 1132b48e1b6fSThomas Zimmermann 1133e7d70cd4SThomas Zimmermann ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info); 1134b48e1b6fSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06); 1135e7d70cd4SThomas Zimmermann ast_set_std_reg(ast, adjusted_mode, vbios_mode_info); 1136e7d70cd4SThomas Zimmermann ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info); 1137e7d70cd4SThomas Zimmermann ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info); 1138ae37025dSThomas Zimmermann ast_set_crtthd_reg(ast); 1139e7d70cd4SThomas Zimmermann ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info); 1140b48e1b6fSThomas Zimmermann 1141b48e1b6fSThomas Zimmermann ast_crtc_dpms(crtc, DRM_MODE_DPMS_ON); 1142b48e1b6fSThomas Zimmermann } 1143b48e1b6fSThomas Zimmermann 1144b48e1b6fSThomas Zimmermann static void 1145b48e1b6fSThomas Zimmermann ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, 1146351f950dSMaxime Ripard struct drm_atomic_state *state) 1147b48e1b6fSThomas Zimmermann { 1148351f950dSMaxime Ripard struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 1149351f950dSMaxime Ripard crtc); 115039edb287SThomas Zimmermann struct drm_device *dev = crtc->dev; 115139edb287SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 115239edb287SThomas Zimmermann 1153b48e1b6fSThomas Zimmermann ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 115439edb287SThomas Zimmermann 115539edb287SThomas Zimmermann /* 115639edb287SThomas Zimmermann * HW cursors require the underlying primary plane and CRTC to 115739edb287SThomas Zimmermann * display a valid mode and image. This is not the case during 115839edb287SThomas Zimmermann * full modeset operations. So we temporarily disable any active 115939edb287SThomas Zimmermann * plane, including the HW cursor. Each plane's atomic_update() 116039edb287SThomas Zimmermann * helper will re-enable it if necessary. 116139edb287SThomas Zimmermann * 116239edb287SThomas Zimmermann * We only do this during *full* modesets. It does not affect 116339edb287SThomas Zimmermann * simple pageflips on the planes. 116439edb287SThomas Zimmermann */ 116539edb287SThomas Zimmermann drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false); 116639edb287SThomas Zimmermann 116739edb287SThomas Zimmermann /* 116839edb287SThomas Zimmermann * Ensure that no scanout takes place before reprogramming mode 116939edb287SThomas Zimmermann * and format registers. 117039edb287SThomas Zimmermann */ 117139edb287SThomas Zimmermann ast_wait_for_vretrace(ast); 1172b48e1b6fSThomas Zimmermann } 1173312fec14SDave Airlie 1174312fec14SDave Airlie static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { 11756abbad2cSThomas Zimmermann .mode_valid = ast_crtc_helper_mode_valid, 1176b48e1b6fSThomas Zimmermann .atomic_check = ast_crtc_helper_atomic_check, 11778e3784dfSThomas Zimmermann .atomic_flush = ast_crtc_helper_atomic_flush, 1178b48e1b6fSThomas Zimmermann .atomic_enable = ast_crtc_helper_atomic_enable, 1179b48e1b6fSThomas Zimmermann .atomic_disable = ast_crtc_helper_atomic_disable, 1180312fec14SDave Airlie }; 1181312fec14SDave Airlie 1182f0adbc38SThomas Zimmermann static void ast_crtc_reset(struct drm_crtc *crtc) 1183f0adbc38SThomas Zimmermann { 1184f0adbc38SThomas Zimmermann struct ast_crtc_state *ast_state = 1185f0adbc38SThomas Zimmermann kzalloc(sizeof(*ast_state), GFP_KERNEL); 1186f0adbc38SThomas Zimmermann 1187f0adbc38SThomas Zimmermann if (crtc->state) 1188f0adbc38SThomas Zimmermann crtc->funcs->atomic_destroy_state(crtc, crtc->state); 1189f0adbc38SThomas Zimmermann 1190fea3fdf9SJiasheng Jiang if (ast_state) 1191f0adbc38SThomas Zimmermann __drm_atomic_helper_crtc_reset(crtc, &ast_state->base); 1192fea3fdf9SJiasheng Jiang else 1193fea3fdf9SJiasheng Jiang __drm_atomic_helper_crtc_reset(crtc, NULL); 1194f0adbc38SThomas Zimmermann } 1195f0adbc38SThomas Zimmermann 119683be6a3cSThomas Zimmermann static struct drm_crtc_state * 119783be6a3cSThomas Zimmermann ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 119883be6a3cSThomas Zimmermann { 1199e7d70cd4SThomas Zimmermann struct ast_crtc_state *new_ast_state, *ast_state; 12001a19b4cbSThomas Zimmermann struct drm_device *dev = crtc->dev; 120183be6a3cSThomas Zimmermann 12021a19b4cbSThomas Zimmermann if (drm_WARN_ON(dev, !crtc->state)) 120383be6a3cSThomas Zimmermann return NULL; 120483be6a3cSThomas Zimmermann 120583be6a3cSThomas Zimmermann new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL); 120683be6a3cSThomas Zimmermann if (!new_ast_state) 120783be6a3cSThomas Zimmermann return NULL; 120883be6a3cSThomas Zimmermann __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base); 120983be6a3cSThomas Zimmermann 1210e7d70cd4SThomas Zimmermann ast_state = to_ast_crtc_state(crtc->state); 1211e7d70cd4SThomas Zimmermann 12123339fdf5SThomas Zimmermann new_ast_state->format = ast_state->format; 1213e7d70cd4SThomas Zimmermann memcpy(&new_ast_state->vbios_mode_info, &ast_state->vbios_mode_info, 1214e7d70cd4SThomas Zimmermann sizeof(new_ast_state->vbios_mode_info)); 1215e7d70cd4SThomas Zimmermann 121683be6a3cSThomas Zimmermann return &new_ast_state->base; 121783be6a3cSThomas Zimmermann } 121883be6a3cSThomas Zimmermann 121983be6a3cSThomas Zimmermann static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc, 122083be6a3cSThomas Zimmermann struct drm_crtc_state *state) 122183be6a3cSThomas Zimmermann { 122283be6a3cSThomas Zimmermann struct ast_crtc_state *ast_state = to_ast_crtc_state(state); 122383be6a3cSThomas Zimmermann 122483be6a3cSThomas Zimmermann __drm_atomic_helper_crtc_destroy_state(&ast_state->base); 122583be6a3cSThomas Zimmermann kfree(ast_state); 122683be6a3cSThomas Zimmermann } 122783be6a3cSThomas Zimmermann 1228312fec14SDave Airlie static const struct drm_crtc_funcs ast_crtc_funcs = { 1229f0adbc38SThomas Zimmermann .reset = ast_crtc_reset, 12306a470dc2SThomas Zimmermann .destroy = drm_crtc_cleanup, 12314961eb60SThomas Zimmermann .set_config = drm_atomic_helper_set_config, 12324961eb60SThomas Zimmermann .page_flip = drm_atomic_helper_page_flip, 123383be6a3cSThomas Zimmermann .atomic_duplicate_state = ast_crtc_atomic_duplicate_state, 123483be6a3cSThomas Zimmermann .atomic_destroy_state = ast_crtc_atomic_destroy_state, 1235312fec14SDave Airlie }; 1236312fec14SDave Airlie 12377f5ccd44SRashika static int ast_crtc_init(struct drm_device *dev) 1238312fec14SDave Airlie { 1239fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 12406a470dc2SThomas Zimmermann struct drm_crtc *crtc = &ast->crtc; 1241a6ff807bSThomas Zimmermann int ret; 1242312fec14SDave Airlie 1243c35da0edSThomas Zimmermann ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane, 1244a0ba992dSThomas Zimmermann &ast->cursor_plane.base, &ast_crtc_funcs, 124502f3bb75SThomas Zimmermann NULL); 1246a6ff807bSThomas Zimmermann if (ret) 12476a470dc2SThomas Zimmermann return ret; 1248a6ff807bSThomas Zimmermann 1249c35da0edSThomas Zimmermann drm_mode_crtc_set_gamma_size(crtc, 256); 1250c35da0edSThomas Zimmermann drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs); 1251c35da0edSThomas Zimmermann 1252312fec14SDave Airlie return 0; 1253312fec14SDave Airlie } 1254312fec14SDave Airlie 12554961eb60SThomas Zimmermann /* 12564961eb60SThomas Zimmermann * Encoder 12574961eb60SThomas Zimmermann */ 12584961eb60SThomas Zimmermann 12597f5ccd44SRashika static int ast_encoder_init(struct drm_device *dev) 1260312fec14SDave Airlie { 1261fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 12624220fdf0SThomas Zimmermann struct drm_encoder *encoder = &ast->encoder; 12634220fdf0SThomas Zimmermann int ret; 1264312fec14SDave Airlie 12654220fdf0SThomas Zimmermann ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC); 12664220fdf0SThomas Zimmermann if (ret) 12674220fdf0SThomas Zimmermann return ret; 1268312fec14SDave Airlie 12694220fdf0SThomas Zimmermann encoder->possible_crtcs = 1; 1270312fec14SDave Airlie 1271312fec14SDave Airlie return 0; 1272312fec14SDave Airlie } 1273312fec14SDave Airlie 12744961eb60SThomas Zimmermann /* 12754961eb60SThomas Zimmermann * Connector 12764961eb60SThomas Zimmermann */ 12774961eb60SThomas Zimmermann 1278312fec14SDave Airlie static int ast_get_modes(struct drm_connector *connector) 1279312fec14SDave Airlie { 1280312fec14SDave Airlie struct ast_connector *ast_connector = to_ast_connector(connector); 1281fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(connector->dev); 128255dc449aSThomas Zimmermann struct edid *edid = NULL; 128383c6620bSDave Airlie bool flags = false; 128455dc449aSThomas Zimmermann int ret; 12856c9bd443SGregory Williams 128683c6620bSDave Airlie if (ast->tx_chip_type == AST_TX_DP501) { 128783c6620bSDave Airlie edid = kmalloc(128, GFP_KERNEL); 128883c6620bSDave Airlie if (!edid) 128983c6620bSDave Airlie return -ENOMEM; 1290312fec14SDave Airlie 129183c6620bSDave Airlie flags = ast_dp501_read_edid(connector->dev, (u8 *)edid); 1292*84d826c8SThomas Zimmermann if (!flags) { 129383c6620bSDave Airlie kfree(edid); 1294*84d826c8SThomas Zimmermann edid = NULL; 1295*84d826c8SThomas Zimmermann } 129683c6620bSDave Airlie } 129755dc449aSThomas Zimmermann if (!flags && ast_connector->i2c) 1298312fec14SDave Airlie edid = drm_get_edid(connector, &ast_connector->i2c->adapter); 1299312fec14SDave Airlie if (edid) { 1300c555f023SDaniel Vetter drm_connector_update_edid_property(&ast_connector->base, edid); 1301312fec14SDave Airlie ret = drm_add_edid_modes(connector, edid); 1302993dcb05SJani Nikula kfree(edid); 1303312fec14SDave Airlie return ret; 13046c9bd443SGregory Williams } 1305c555f023SDaniel Vetter drm_connector_update_edid_property(&ast_connector->base, NULL); 1306312fec14SDave Airlie return 0; 1307312fec14SDave Airlie } 1308312fec14SDave Airlie 1309312fec14SDave Airlie static const struct drm_connector_helper_funcs ast_connector_helper_funcs = { 1310312fec14SDave Airlie .get_modes = ast_get_modes, 1311312fec14SDave Airlie }; 1312312fec14SDave Airlie 1313312fec14SDave Airlie static const struct drm_connector_funcs ast_connector_funcs = { 13144961eb60SThomas Zimmermann .reset = drm_atomic_helper_connector_reset, 1315312fec14SDave Airlie .fill_modes = drm_helper_probe_single_connector_modes, 1316a2cce09cSThomas Zimmermann .destroy = drm_connector_cleanup, 13174961eb60SThomas Zimmermann .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 13184961eb60SThomas Zimmermann .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 1319312fec14SDave Airlie }; 1320312fec14SDave Airlie 13217f5ccd44SRashika static int ast_connector_init(struct drm_device *dev) 1322312fec14SDave Airlie { 13236a470dc2SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 13246a470dc2SThomas Zimmermann struct ast_connector *ast_connector = &ast->connector; 13256a470dc2SThomas Zimmermann struct drm_connector *connector = &ast_connector->base; 13266a470dc2SThomas Zimmermann struct drm_encoder *encoder = &ast->encoder; 13279285f09eSThomas Zimmermann int ret; 1328312fec14SDave Airlie 1329350fd554SAndrzej Pietrasiewicz ast_connector->i2c = ast_i2c_create(dev); 1330350fd554SAndrzej Pietrasiewicz if (!ast_connector->i2c) 13311a19b4cbSThomas Zimmermann drm_err(dev, "failed to add ddc bus for connector\n"); 1332350fd554SAndrzej Pietrasiewicz 133355dc449aSThomas Zimmermann if (ast_connector->i2c) 13349285f09eSThomas Zimmermann ret = drm_connector_init_with_ddc(dev, connector, &ast_connector_funcs, 1335350fd554SAndrzej Pietrasiewicz DRM_MODE_CONNECTOR_VGA, 1336350fd554SAndrzej Pietrasiewicz &ast_connector->i2c->adapter); 133755dc449aSThomas Zimmermann else 13389285f09eSThomas Zimmermann ret = drm_connector_init(dev, connector, &ast_connector_funcs, 133955dc449aSThomas Zimmermann DRM_MODE_CONNECTOR_VGA); 13409285f09eSThomas Zimmermann if (ret) 13419285f09eSThomas Zimmermann return ret; 1342312fec14SDave Airlie 1343312fec14SDave Airlie drm_connector_helper_add(connector, &ast_connector_helper_funcs); 1344312fec14SDave Airlie 1345312fec14SDave Airlie connector->interlace_allowed = 0; 1346312fec14SDave Airlie connector->doublescan_allowed = 0; 1347312fec14SDave Airlie 1348595cb5e0SKim Phillips connector->polled = DRM_CONNECTOR_POLL_CONNECT; 1349312fec14SDave Airlie 1350cde4c44dSDaniel Vetter drm_connector_attach_encoder(connector, encoder); 1351312fec14SDave Airlie 1352312fec14SDave Airlie return 0; 1353312fec14SDave Airlie } 1354312fec14SDave Airlie 1355e6949ff3SThomas Zimmermann /* 1356e6949ff3SThomas Zimmermann * Mode config 1357e6949ff3SThomas Zimmermann */ 1358e6949ff3SThomas Zimmermann 13592f0ddd89SThomas Zimmermann static const struct drm_mode_config_helper_funcs 13602f0ddd89SThomas Zimmermann ast_mode_config_helper_funcs = { 13612f0ddd89SThomas Zimmermann .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 13622f0ddd89SThomas Zimmermann }; 13632f0ddd89SThomas Zimmermann 1364e6949ff3SThomas Zimmermann static const struct drm_mode_config_funcs ast_mode_config_funcs = { 1365e6949ff3SThomas Zimmermann .fb_create = drm_gem_fb_create, 1366e6949ff3SThomas Zimmermann .mode_valid = drm_vram_helper_mode_valid, 1367e6949ff3SThomas Zimmermann .atomic_check = drm_atomic_helper_check, 1368e6949ff3SThomas Zimmermann .atomic_commit = drm_atomic_helper_commit, 1369e6949ff3SThomas Zimmermann }; 1370e6949ff3SThomas Zimmermann 1371e6949ff3SThomas Zimmermann int ast_mode_config_init(struct ast_private *ast) 1372312fec14SDave Airlie { 1373e0f5a738SThomas Zimmermann struct drm_device *dev = &ast->base; 137446fb883cSThomas Zimmermann struct pci_dev *pdev = to_pci_dev(dev->dev); 1375a6ff807bSThomas Zimmermann int ret; 1376a6ff807bSThomas Zimmermann 1377e6949ff3SThomas Zimmermann ret = drmm_mode_config_init(dev); 1378e6949ff3SThomas Zimmermann if (ret) 1379e6949ff3SThomas Zimmermann return ret; 1380e6949ff3SThomas Zimmermann 1381e6949ff3SThomas Zimmermann dev->mode_config.funcs = &ast_mode_config_funcs; 1382e6949ff3SThomas Zimmermann dev->mode_config.min_width = 0; 1383e6949ff3SThomas Zimmermann dev->mode_config.min_height = 0; 1384e6949ff3SThomas Zimmermann dev->mode_config.preferred_depth = 24; 1385e6949ff3SThomas Zimmermann dev->mode_config.prefer_shadow = 1; 138646fb883cSThomas Zimmermann dev->mode_config.fb_base = pci_resource_start(pdev, 0); 1387e6949ff3SThomas Zimmermann 1388e6949ff3SThomas Zimmermann if (ast->chip == AST2100 || 1389e6949ff3SThomas Zimmermann ast->chip == AST2200 || 1390e6949ff3SThomas Zimmermann ast->chip == AST2300 || 1391e6949ff3SThomas Zimmermann ast->chip == AST2400 || 1392e6949ff3SThomas Zimmermann ast->chip == AST2500) { 1393e6949ff3SThomas Zimmermann dev->mode_config.max_width = 1920; 1394e6949ff3SThomas Zimmermann dev->mode_config.max_height = 2048; 1395e6949ff3SThomas Zimmermann } else { 1396e6949ff3SThomas Zimmermann dev->mode_config.max_width = 1600; 1397e6949ff3SThomas Zimmermann dev->mode_config.max_height = 1200; 1398e6949ff3SThomas Zimmermann } 1399e6949ff3SThomas Zimmermann 14002f0ddd89SThomas Zimmermann dev->mode_config.helper_private = &ast_mode_config_helper_funcs; 14012f0ddd89SThomas Zimmermann 1402a6ff807bSThomas Zimmermann 1403616048afSThomas Zimmermann ret = ast_primary_plane_init(ast); 1404616048afSThomas Zimmermann if (ret) 140502f3bb75SThomas Zimmermann return ret; 1406616048afSThomas Zimmermann 1407616048afSThomas Zimmermann ret = ast_cursor_plane_init(ast); 1408616048afSThomas Zimmermann if (ret) 1409616048afSThomas Zimmermann return ret; 141002f3bb75SThomas Zimmermann 1411312fec14SDave Airlie ast_crtc_init(dev); 1412312fec14SDave Airlie ast_encoder_init(dev); 1413312fec14SDave Airlie ast_connector_init(dev); 1414a6ff807bSThomas Zimmermann 1415e6949ff3SThomas Zimmermann drm_mode_config_reset(dev); 1416e6949ff3SThomas Zimmermann 1417312fec14SDave Airlie return 0; 1418312fec14SDave Airlie } 1419