1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * Parts based on xf86-video-ast 4312fec14SDave Airlie * Copyright (c) 2005 ASPEED Technology Inc. 5312fec14SDave Airlie * 6312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 7312fec14SDave Airlie * copy of this software and associated documentation files (the 8312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 9312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 10312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 11312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 12312fec14SDave Airlie * the following conditions: 13312fec14SDave Airlie * 14312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 21312fec14SDave Airlie * 22312fec14SDave Airlie * The above copyright notice and this permission notice (including the 23312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 24312fec14SDave Airlie * of the Software. 25312fec14SDave Airlie * 26312fec14SDave Airlie */ 27312fec14SDave Airlie /* 28312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 29312fec14SDave Airlie */ 30fbbbd160SSam Ravnborg 31312fec14SDave Airlie #include <linux/export.h> 32fbbbd160SSam Ravnborg #include <linux/pci.h> 33fbbbd160SSam Ravnborg 34ae46a57dSThomas Zimmermann #include <drm/drm_atomic.h> 35a6ff807bSThomas Zimmermann #include <drm/drm_atomic_helper.h> 36a6ff807bSThomas Zimmermann #include <drm/drm_atomic_state_helper.h> 37760285e7SDavid Howells #include <drm/drm_crtc.h> 38760285e7SDavid Howells #include <drm/drm_crtc_helper.h> 39fbbbd160SSam Ravnborg #include <drm/drm_fourcc.h> 404d36cf07SThomas Zimmermann #include <drm/drm_gem_atomic_helper.h> 41e6949ff3SThomas Zimmermann #include <drm/drm_gem_framebuffer_helper.h> 42fbbbd160SSam Ravnborg #include <drm/drm_gem_vram_helper.h> 43*3ab26eddSThomas Zimmermann #include <drm/drm_managed.h> 443cb9ae4fSDaniel Vetter #include <drm/drm_plane_helper.h> 45fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h> 464220fdf0SThomas Zimmermann #include <drm/drm_simple_kms_helper.h> 47312fec14SDave Airlie 48fbbbd160SSam Ravnborg #include "ast_drv.h" 49312fec14SDave Airlie #include "ast_tables.h" 50312fec14SDave Airlie 51312fec14SDave Airlie static inline void ast_load_palette_index(struct ast_private *ast, 52312fec14SDave Airlie u8 index, u8 red, u8 green, 53312fec14SDave Airlie u8 blue) 54312fec14SDave Airlie { 55312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index); 56312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 57312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_DATA, red); 58312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 59312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_DATA, green); 60312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 61312fec14SDave Airlie ast_io_write8(ast, AST_IO_DAC_DATA, blue); 62312fec14SDave Airlie ast_io_read8(ast, AST_IO_SEQ_PORT); 63312fec14SDave Airlie } 64312fec14SDave Airlie 65ae37025dSThomas Zimmermann static void ast_crtc_load_lut(struct ast_private *ast, struct drm_crtc *crtc) 66312fec14SDave Airlie { 673bffd962SPeter Rosin u16 *r, *g, *b; 68312fec14SDave Airlie int i; 69312fec14SDave Airlie 70312fec14SDave Airlie if (!crtc->enabled) 71312fec14SDave Airlie return; 72312fec14SDave Airlie 733bffd962SPeter Rosin r = crtc->gamma_store; 743bffd962SPeter Rosin g = r + crtc->gamma_size; 753bffd962SPeter Rosin b = g + crtc->gamma_size; 763bffd962SPeter Rosin 77312fec14SDave Airlie for (i = 0; i < 256; i++) 783bffd962SPeter Rosin ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8); 79312fec14SDave Airlie } 80312fec14SDave Airlie 81ae37025dSThomas Zimmermann static bool ast_get_vbios_mode_info(const struct drm_format_info *format, 82259d14a7SThomas Zimmermann const struct drm_display_mode *mode, 83312fec14SDave Airlie struct drm_display_mode *adjusted_mode, 84312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 85312fec14SDave Airlie { 86259d14a7SThomas Zimmermann u32 refresh_rate_index = 0, refresh_rate; 8722acdbb1SBenjamin Herrenschmidt const struct ast_vbios_enhtable *best = NULL; 88312fec14SDave Airlie u32 hborder, vborder; 8994d12b13SY.C. Chen bool check_sync; 90312fec14SDave Airlie 91ae37025dSThomas Zimmermann switch (format->cpp[0] * 8) { 92312fec14SDave Airlie case 8: 93312fec14SDave Airlie vbios_mode->std_table = &vbios_stdtable[VGAModeIndex]; 94312fec14SDave Airlie break; 95312fec14SDave Airlie case 16: 96312fec14SDave Airlie vbios_mode->std_table = &vbios_stdtable[HiCModeIndex]; 97312fec14SDave Airlie break; 98312fec14SDave Airlie case 24: 99312fec14SDave Airlie case 32: 100312fec14SDave Airlie vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex]; 101312fec14SDave Airlie break; 102312fec14SDave Airlie default: 103312fec14SDave Airlie return false; 104312fec14SDave Airlie } 105312fec14SDave Airlie 106259d14a7SThomas Zimmermann switch (mode->crtc_hdisplay) { 107312fec14SDave Airlie case 640: 108312fec14SDave Airlie vbios_mode->enh_table = &res_640x480[refresh_rate_index]; 109312fec14SDave Airlie break; 110312fec14SDave Airlie case 800: 111312fec14SDave Airlie vbios_mode->enh_table = &res_800x600[refresh_rate_index]; 112312fec14SDave Airlie break; 113312fec14SDave Airlie case 1024: 114312fec14SDave Airlie vbios_mode->enh_table = &res_1024x768[refresh_rate_index]; 115312fec14SDave Airlie break; 116312fec14SDave Airlie case 1280: 117259d14a7SThomas Zimmermann if (mode->crtc_vdisplay == 800) 118312fec14SDave Airlie vbios_mode->enh_table = &res_1280x800[refresh_rate_index]; 119312fec14SDave Airlie else 120312fec14SDave Airlie vbios_mode->enh_table = &res_1280x1024[refresh_rate_index]; 121312fec14SDave Airlie break; 122f1f62f2cSDave Airlie case 1360: 123f1f62f2cSDave Airlie vbios_mode->enh_table = &res_1360x768[refresh_rate_index]; 124f1f62f2cSDave Airlie break; 125312fec14SDave Airlie case 1440: 126312fec14SDave Airlie vbios_mode->enh_table = &res_1440x900[refresh_rate_index]; 127312fec14SDave Airlie break; 128312fec14SDave Airlie case 1600: 129259d14a7SThomas Zimmermann if (mode->crtc_vdisplay == 900) 130f1f62f2cSDave Airlie vbios_mode->enh_table = &res_1600x900[refresh_rate_index]; 131f1f62f2cSDave Airlie else 132312fec14SDave Airlie vbios_mode->enh_table = &res_1600x1200[refresh_rate_index]; 133312fec14SDave Airlie break; 134312fec14SDave Airlie case 1680: 135312fec14SDave Airlie vbios_mode->enh_table = &res_1680x1050[refresh_rate_index]; 136312fec14SDave Airlie break; 137312fec14SDave Airlie case 1920: 138259d14a7SThomas Zimmermann if (mode->crtc_vdisplay == 1080) 139312fec14SDave Airlie vbios_mode->enh_table = &res_1920x1080[refresh_rate_index]; 140312fec14SDave Airlie else 141312fec14SDave Airlie vbios_mode->enh_table = &res_1920x1200[refresh_rate_index]; 142312fec14SDave Airlie break; 143312fec14SDave Airlie default: 144312fec14SDave Airlie return false; 145312fec14SDave Airlie } 146312fec14SDave Airlie 147312fec14SDave Airlie refresh_rate = drm_mode_vrefresh(mode); 14894d12b13SY.C. Chen check_sync = vbios_mode->enh_table->flags & WideScreenMode; 149259d14a7SThomas Zimmermann 150259d14a7SThomas Zimmermann while (1) { 15122acdbb1SBenjamin Herrenschmidt const struct ast_vbios_enhtable *loop = vbios_mode->enh_table; 15294d12b13SY.C. Chen 15394d12b13SY.C. Chen while (loop->refresh_rate != 0xff) { 15494d12b13SY.C. Chen if ((check_sync) && 15594d12b13SY.C. Chen (((mode->flags & DRM_MODE_FLAG_NVSYNC) && 15694d12b13SY.C. Chen (loop->flags & PVSync)) || 15794d12b13SY.C. Chen ((mode->flags & DRM_MODE_FLAG_PVSYNC) && 15894d12b13SY.C. Chen (loop->flags & NVSync)) || 15994d12b13SY.C. Chen ((mode->flags & DRM_MODE_FLAG_NHSYNC) && 16094d12b13SY.C. Chen (loop->flags & PHSync)) || 16194d12b13SY.C. Chen ((mode->flags & DRM_MODE_FLAG_PHSYNC) && 16294d12b13SY.C. Chen (loop->flags & NHSync)))) { 16394d12b13SY.C. Chen loop++; 16494d12b13SY.C. Chen continue; 16594d12b13SY.C. Chen } 16694d12b13SY.C. Chen if (loop->refresh_rate <= refresh_rate 16794d12b13SY.C. Chen && (!best || loop->refresh_rate > best->refresh_rate)) 16894d12b13SY.C. Chen best = loop; 16994d12b13SY.C. Chen loop++; 17094d12b13SY.C. Chen } 17194d12b13SY.C. Chen if (best || !check_sync) 172312fec14SDave Airlie break; 17394d12b13SY.C. Chen check_sync = 0; 174259d14a7SThomas Zimmermann } 175259d14a7SThomas Zimmermann 17694d12b13SY.C. Chen if (best) 17794d12b13SY.C. Chen vbios_mode->enh_table = best; 178312fec14SDave Airlie 179312fec14SDave Airlie hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0; 180312fec14SDave Airlie vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0; 181312fec14SDave Airlie 182312fec14SDave Airlie adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht; 183312fec14SDave Airlie adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder; 184312fec14SDave Airlie adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder; 185312fec14SDave Airlie adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder + 186312fec14SDave Airlie vbios_mode->enh_table->hfp; 187312fec14SDave Airlie adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder + 188312fec14SDave Airlie vbios_mode->enh_table->hfp + 189312fec14SDave Airlie vbios_mode->enh_table->hsync); 190312fec14SDave Airlie 191312fec14SDave Airlie adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt; 192312fec14SDave Airlie adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder; 193312fec14SDave Airlie adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder; 194312fec14SDave Airlie adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder + 195312fec14SDave Airlie vbios_mode->enh_table->vfp; 196312fec14SDave Airlie adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder + 197312fec14SDave Airlie vbios_mode->enh_table->vfp + 198312fec14SDave Airlie vbios_mode->enh_table->vsync); 199312fec14SDave Airlie 200259d14a7SThomas Zimmermann return true; 201259d14a7SThomas Zimmermann } 202259d14a7SThomas Zimmermann 203ae37025dSThomas Zimmermann static void ast_set_vbios_color_reg(struct ast_private *ast, 204ae37025dSThomas Zimmermann const struct drm_format_info *format, 205259d14a7SThomas Zimmermann const struct ast_vbios_mode_info *vbios_mode) 206259d14a7SThomas Zimmermann { 207259d14a7SThomas Zimmermann u32 color_index; 208259d14a7SThomas Zimmermann 209ae37025dSThomas Zimmermann switch (format->cpp[0]) { 210259d14a7SThomas Zimmermann case 1: 211259d14a7SThomas Zimmermann color_index = VGAModeIndex - 1; 212259d14a7SThomas Zimmermann break; 213259d14a7SThomas Zimmermann case 2: 214259d14a7SThomas Zimmermann color_index = HiCModeIndex; 215259d14a7SThomas Zimmermann break; 216259d14a7SThomas Zimmermann case 3: 217259d14a7SThomas Zimmermann case 4: 218259d14a7SThomas Zimmermann color_index = TrueCModeIndex; 219291ddeb6SColin Ian King break; 220259d14a7SThomas Zimmermann default: 221259d14a7SThomas Zimmermann return; 222259d14a7SThomas Zimmermann } 223259d14a7SThomas Zimmermann 224259d14a7SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0x0f) << 4)); 225259d14a7SThomas Zimmermann 226259d14a7SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00); 227259d14a7SThomas Zimmermann 228259d14a7SThomas Zimmermann if (vbios_mode->enh_table->flags & NewModeInfo) { 229259d14a7SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); 230ae37025dSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, format->cpp[0] * 8); 231259d14a7SThomas Zimmermann } 232259d14a7SThomas Zimmermann } 233259d14a7SThomas Zimmermann 234ae37025dSThomas Zimmermann static void ast_set_vbios_mode_reg(struct ast_private *ast, 235259d14a7SThomas Zimmermann const struct drm_display_mode *adjusted_mode, 236259d14a7SThomas Zimmermann const struct ast_vbios_mode_info *vbios_mode) 237259d14a7SThomas Zimmermann { 238259d14a7SThomas Zimmermann u32 refresh_rate_index, mode_id; 239259d14a7SThomas Zimmermann 240312fec14SDave Airlie refresh_rate_index = vbios_mode->enh_table->refresh_rate_index; 241312fec14SDave Airlie mode_id = vbios_mode->enh_table->mode_id; 242312fec14SDave Airlie 243312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff); 244312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff); 245312fec14SDave Airlie 246f1f62f2cSDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00); 247259d14a7SThomas Zimmermann 248f1f62f2cSDave Airlie if (vbios_mode->enh_table->flags & NewModeInfo) { 249312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); 250312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000); 251312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay); 252312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8); 253312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay); 254312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8); 255312fec14SDave Airlie } 256f1f62f2cSDave Airlie } 257312fec14SDave Airlie 258ae37025dSThomas Zimmermann static void ast_set_std_reg(struct ast_private *ast, 259ae37025dSThomas Zimmermann struct drm_display_mode *mode, 260312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 261312fec14SDave Airlie { 26222acdbb1SBenjamin Herrenschmidt const struct ast_vbios_stdtable *stdtable; 263312fec14SDave Airlie u32 i; 264312fec14SDave Airlie u8 jreg; 265312fec14SDave Airlie 266312fec14SDave Airlie stdtable = vbios_mode->std_table; 267312fec14SDave Airlie 268312fec14SDave Airlie jreg = stdtable->misc; 269312fec14SDave Airlie ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); 270312fec14SDave Airlie 2712fbeec03SThomas Zimmermann /* Set SEQ; except Screen Disable field */ 272312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03); 2732fbeec03SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x01, 0xdf, stdtable->seq[0]); 2742fbeec03SThomas Zimmermann for (i = 1; i < 4; i++) { 275312fec14SDave Airlie jreg = stdtable->seq[i]; 276312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1), jreg); 277312fec14SDave Airlie } 278312fec14SDave Airlie 279a21fdd7aSThomas Zimmermann /* Set CRTC; except base address and offset */ 280312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); 281a21fdd7aSThomas Zimmermann for (i = 0; i < 12; i++) 282a21fdd7aSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 283a21fdd7aSThomas Zimmermann for (i = 14; i < 19; i++) 284a21fdd7aSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 285a21fdd7aSThomas Zimmermann for (i = 20; i < 25; i++) 286312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 287312fec14SDave Airlie 288312fec14SDave Airlie /* set AR */ 289312fec14SDave Airlie jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 290312fec14SDave Airlie for (i = 0; i < 20; i++) { 291312fec14SDave Airlie jreg = stdtable->ar[i]; 292312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i); 293312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg); 294312fec14SDave Airlie } 295312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14); 296312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00); 297312fec14SDave Airlie 298312fec14SDave Airlie jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 299312fec14SDave Airlie ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20); 300312fec14SDave Airlie 301312fec14SDave Airlie /* Set GR */ 302312fec14SDave Airlie for (i = 0; i < 9; i++) 303312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]); 304312fec14SDave Airlie } 305312fec14SDave Airlie 306ae37025dSThomas Zimmermann static void ast_set_crtc_reg(struct ast_private *ast, 307ae37025dSThomas Zimmermann struct drm_display_mode *mode, 308312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 309312fec14SDave Airlie { 310312fec14SDave Airlie u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; 3119f93c8b3SY.C. Chen u16 temp, precache = 0; 3129f93c8b3SY.C. Chen 3139f93c8b3SY.C. Chen if ((ast->chip == AST2500) && 3149f93c8b3SY.C. Chen (vbios_mode->enh_table->flags & AST2500PreCatchCRT)) 3159f93c8b3SY.C. Chen precache = 40; 316312fec14SDave Airlie 317312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); 318312fec14SDave Airlie 319312fec14SDave Airlie temp = (mode->crtc_htotal >> 3) - 5; 320312fec14SDave Airlie if (temp & 0x100) 321312fec14SDave Airlie jregAC |= 0x01; /* HT D[8] */ 322312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp); 323312fec14SDave Airlie 324312fec14SDave Airlie temp = (mode->crtc_hdisplay >> 3) - 1; 325312fec14SDave Airlie if (temp & 0x100) 326312fec14SDave Airlie jregAC |= 0x04; /* HDE D[8] */ 327312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp); 328312fec14SDave Airlie 329312fec14SDave Airlie temp = (mode->crtc_hblank_start >> 3) - 1; 330312fec14SDave Airlie if (temp & 0x100) 331312fec14SDave Airlie jregAC |= 0x10; /* HBS D[8] */ 332312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp); 333312fec14SDave Airlie 334312fec14SDave Airlie temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; 335312fec14SDave Airlie if (temp & 0x20) 336312fec14SDave Airlie jreg05 |= 0x80; /* HBE D[5] */ 337312fec14SDave Airlie if (temp & 0x40) 338312fec14SDave Airlie jregAD |= 0x01; /* HBE D[5] */ 339312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f)); 340312fec14SDave Airlie 3419f93c8b3SY.C. Chen temp = ((mode->crtc_hsync_start-precache) >> 3) - 1; 342312fec14SDave Airlie if (temp & 0x100) 343312fec14SDave Airlie jregAC |= 0x40; /* HRS D[5] */ 344312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp); 345312fec14SDave Airlie 3469f93c8b3SY.C. Chen temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f; 347312fec14SDave Airlie if (temp & 0x20) 348312fec14SDave Airlie jregAD |= 0x04; /* HRE D[5] */ 349312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); 350312fec14SDave Airlie 351312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC); 352312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD); 353312fec14SDave Airlie 354312fec14SDave Airlie /* vert timings */ 355312fec14SDave Airlie temp = (mode->crtc_vtotal) - 2; 356312fec14SDave Airlie if (temp & 0x100) 357312fec14SDave Airlie jreg07 |= 0x01; 358312fec14SDave Airlie if (temp & 0x200) 359312fec14SDave Airlie jreg07 |= 0x20; 360312fec14SDave Airlie if (temp & 0x400) 361312fec14SDave Airlie jregAE |= 0x01; 362312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp); 363312fec14SDave Airlie 364312fec14SDave Airlie temp = (mode->crtc_vsync_start) - 1; 365312fec14SDave Airlie if (temp & 0x100) 366312fec14SDave Airlie jreg07 |= 0x04; 367312fec14SDave Airlie if (temp & 0x200) 368312fec14SDave Airlie jreg07 |= 0x80; 369312fec14SDave Airlie if (temp & 0x400) 370312fec14SDave Airlie jregAE |= 0x08; 371312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp); 372312fec14SDave Airlie 373312fec14SDave Airlie temp = (mode->crtc_vsync_end - 1) & 0x3f; 374312fec14SDave Airlie if (temp & 0x10) 375312fec14SDave Airlie jregAE |= 0x20; 376312fec14SDave Airlie if (temp & 0x20) 377312fec14SDave Airlie jregAE |= 0x40; 378312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf); 379312fec14SDave Airlie 380312fec14SDave Airlie temp = mode->crtc_vdisplay - 1; 381312fec14SDave Airlie if (temp & 0x100) 382312fec14SDave Airlie jreg07 |= 0x02; 383312fec14SDave Airlie if (temp & 0x200) 384312fec14SDave Airlie jreg07 |= 0x40; 385312fec14SDave Airlie if (temp & 0x400) 386312fec14SDave Airlie jregAE |= 0x02; 387312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp); 388312fec14SDave Airlie 389312fec14SDave Airlie temp = mode->crtc_vblank_start - 1; 390312fec14SDave Airlie if (temp & 0x100) 391312fec14SDave Airlie jreg07 |= 0x08; 392312fec14SDave Airlie if (temp & 0x200) 393312fec14SDave Airlie jreg09 |= 0x20; 394312fec14SDave Airlie if (temp & 0x400) 395312fec14SDave Airlie jregAE |= 0x04; 396312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp); 397312fec14SDave Airlie 398312fec14SDave Airlie temp = mode->crtc_vblank_end - 1; 399312fec14SDave Airlie if (temp & 0x100) 400312fec14SDave Airlie jregAE |= 0x10; 401312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp); 402312fec14SDave Airlie 403312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07); 404312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09); 405312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80)); 406312fec14SDave Airlie 4079f93c8b3SY.C. Chen if (precache) 4089f93c8b3SY.C. Chen ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80); 4099f93c8b3SY.C. Chen else 4109f93c8b3SY.C. Chen ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00); 4119f93c8b3SY.C. Chen 412312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80); 413312fec14SDave Airlie } 414312fec14SDave Airlie 415ae37025dSThomas Zimmermann static void ast_set_offset_reg(struct ast_private *ast, 416ae37025dSThomas Zimmermann struct drm_framebuffer *fb) 417312fec14SDave Airlie { 418312fec14SDave Airlie u16 offset; 419312fec14SDave Airlie 4207445283aSVille Syrjälä offset = fb->pitches[0] >> 3; 421312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff)); 422312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f); 423312fec14SDave Airlie } 424312fec14SDave Airlie 425ae37025dSThomas Zimmermann static void ast_set_dclk_reg(struct ast_private *ast, 426ae37025dSThomas Zimmermann struct drm_display_mode *mode, 427312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 428312fec14SDave Airlie { 42922acdbb1SBenjamin Herrenschmidt const struct ast_vbios_dclk_info *clk_info; 430312fec14SDave Airlie 4319f93c8b3SY.C. Chen if (ast->chip == AST2500) 4329f93c8b3SY.C. Chen clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index]; 4339f93c8b3SY.C. Chen else 434312fec14SDave Airlie clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; 435312fec14SDave Airlie 436312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1); 437312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2); 438312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f, 4399f93c8b3SY.C. Chen (clk_info->param3 & 0xc0) | 4409f93c8b3SY.C. Chen ((clk_info->param3 & 0x3) << 4)); 441312fec14SDave Airlie } 442312fec14SDave Airlie 443ae37025dSThomas Zimmermann static void ast_set_color_reg(struct ast_private *ast, 444ae37025dSThomas Zimmermann const struct drm_format_info *format) 445312fec14SDave Airlie { 446312fec14SDave Airlie u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; 447312fec14SDave Airlie 448ae37025dSThomas Zimmermann switch (format->cpp[0] * 8) { 449312fec14SDave Airlie case 8: 450312fec14SDave Airlie jregA0 = 0x70; 451312fec14SDave Airlie jregA3 = 0x01; 452312fec14SDave Airlie jregA8 = 0x00; 453312fec14SDave Airlie break; 454312fec14SDave Airlie case 15: 455312fec14SDave Airlie case 16: 456312fec14SDave Airlie jregA0 = 0x70; 457312fec14SDave Airlie jregA3 = 0x04; 458312fec14SDave Airlie jregA8 = 0x02; 459312fec14SDave Airlie break; 460312fec14SDave Airlie case 32: 461312fec14SDave Airlie jregA0 = 0x70; 462312fec14SDave Airlie jregA3 = 0x08; 463312fec14SDave Airlie jregA8 = 0x02; 464312fec14SDave Airlie break; 465312fec14SDave Airlie } 466312fec14SDave Airlie 467312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0); 468312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3); 469312fec14SDave Airlie ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8); 4700d45ad98SThomas Zimmermann } 4710d45ad98SThomas Zimmermann 472ae37025dSThomas Zimmermann static void ast_set_crtthd_reg(struct ast_private *ast) 4730d45ad98SThomas Zimmermann { 474312fec14SDave Airlie /* Set Threshold */ 475bcc77411SKuoHsiang Chou if (ast->chip == AST2600) { 476bcc77411SKuoHsiang Chou ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0xe0); 477bcc77411SKuoHsiang Chou ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0xa0); 478bcc77411SKuoHsiang Chou } else if (ast->chip == AST2300 || ast->chip == AST2400 || 4799f93c8b3SY.C. Chen ast->chip == AST2500) { 480312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78); 481312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60); 482312fec14SDave Airlie } else if (ast->chip == AST2100 || 483312fec14SDave Airlie ast->chip == AST1100 || 484312fec14SDave Airlie ast->chip == AST2200 || 485312fec14SDave Airlie ast->chip == AST2150) { 486312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f); 487312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f); 488312fec14SDave Airlie } else { 489312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f); 490312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f); 491312fec14SDave Airlie } 492312fec14SDave Airlie } 493312fec14SDave Airlie 494ae37025dSThomas Zimmermann static void ast_set_sync_reg(struct ast_private *ast, 495ae37025dSThomas Zimmermann struct drm_display_mode *mode, 496312fec14SDave Airlie struct ast_vbios_mode_info *vbios_mode) 497312fec14SDave Airlie { 498312fec14SDave Airlie u8 jreg; 499312fec14SDave Airlie 500312fec14SDave Airlie jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ); 50194d12b13SY.C. Chen jreg &= ~0xC0; 5026c9bd443SGregory Williams if (vbios_mode->enh_table->flags & NVSync) 5036c9bd443SGregory Williams jreg |= 0x80; 5046c9bd443SGregory Williams if (vbios_mode->enh_table->flags & NHSync) 5056c9bd443SGregory Williams jreg |= 0x40; 506312fec14SDave Airlie ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); 507312fec14SDave Airlie } 508312fec14SDave Airlie 509ae37025dSThomas Zimmermann static void ast_set_start_address_crt1(struct ast_private *ast, 5106c9bd443SGregory Williams unsigned int offset) 511312fec14SDave Airlie { 512312fec14SDave Airlie u32 addr; 513312fec14SDave Airlie 514312fec14SDave Airlie addr = offset >> 2; 515312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff)); 516312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff)); 517312fec14SDave Airlie ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff)); 518312fec14SDave Airlie 519312fec14SDave Airlie } 520312fec14SDave Airlie 52139edb287SThomas Zimmermann static void ast_wait_for_vretrace(struct ast_private *ast) 52239edb287SThomas Zimmermann { 52339edb287SThomas Zimmermann unsigned long timeout = jiffies + HZ; 52439edb287SThomas Zimmermann u8 vgair1; 52539edb287SThomas Zimmermann 52639edb287SThomas Zimmermann do { 52739edb287SThomas Zimmermann vgair1 = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 52839edb287SThomas Zimmermann } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout)); 52939edb287SThomas Zimmermann } 53039edb287SThomas Zimmermann 531a6ff807bSThomas Zimmermann /* 532a6ff807bSThomas Zimmermann * Primary plane 533a6ff807bSThomas Zimmermann */ 534a6ff807bSThomas Zimmermann 535a6ff807bSThomas Zimmermann static const uint32_t ast_primary_plane_formats[] = { 536a6ff807bSThomas Zimmermann DRM_FORMAT_XRGB8888, 537a6ff807bSThomas Zimmermann DRM_FORMAT_RGB565, 538a6ff807bSThomas Zimmermann DRM_FORMAT_C8, 539a6ff807bSThomas Zimmermann }; 540a6ff807bSThomas Zimmermann 541ae46a57dSThomas Zimmermann static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane, 5427c11b99aSMaxime Ripard struct drm_atomic_state *state) 543a6ff807bSThomas Zimmermann { 5447c11b99aSMaxime Ripard struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 5457c11b99aSMaxime Ripard plane); 546ae46a57dSThomas Zimmermann struct drm_crtc_state *crtc_state; 5473339fdf5SThomas Zimmermann struct ast_crtc_state *ast_crtc_state; 548ae46a57dSThomas Zimmermann int ret; 549ae46a57dSThomas Zimmermann 550ba5c1649SMaxime Ripard if (!new_plane_state->crtc) 551ae46a57dSThomas Zimmermann return 0; 552ae46a57dSThomas Zimmermann 553dec92020SMaxime Ripard crtc_state = drm_atomic_get_new_crtc_state(state, 554ba5c1649SMaxime Ripard new_plane_state->crtc); 555ae46a57dSThomas Zimmermann 556ba5c1649SMaxime Ripard ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, 557ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 558ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 559ae46a57dSThomas Zimmermann false, true); 560ae46a57dSThomas Zimmermann if (ret) 561ae46a57dSThomas Zimmermann return ret; 562ae46a57dSThomas Zimmermann 563ba5c1649SMaxime Ripard if (!new_plane_state->visible) 5643339fdf5SThomas Zimmermann return 0; 5653339fdf5SThomas Zimmermann 5663339fdf5SThomas Zimmermann ast_crtc_state = to_ast_crtc_state(crtc_state); 5673339fdf5SThomas Zimmermann 568ba5c1649SMaxime Ripard ast_crtc_state->format = new_plane_state->fb->format; 5693339fdf5SThomas Zimmermann 570a6ff807bSThomas Zimmermann return 0; 571a6ff807bSThomas Zimmermann } 572a6ff807bSThomas Zimmermann 5733a53230eSSamuel Zou static void 5743a53230eSSamuel Zou ast_primary_plane_helper_atomic_update(struct drm_plane *plane, 575977697e2SMaxime Ripard struct drm_atomic_state *state) 576a6ff807bSThomas Zimmermann { 577977697e2SMaxime Ripard struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, 578977697e2SMaxime Ripard plane); 5791a19b4cbSThomas Zimmermann struct drm_device *dev = plane->dev; 5801a19b4cbSThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 58137418bf1SMaxime Ripard struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, 58237418bf1SMaxime Ripard plane); 583a6ff807bSThomas Zimmermann struct drm_gem_vram_object *gbo; 584a6ff807bSThomas Zimmermann s64 gpu_addr; 58541016fe1SMaxime Ripard struct drm_framebuffer *fb = new_state->fb; 5865638c82cSThomas Zimmermann struct drm_framebuffer *old_fb = old_state->fb; 587a6ff807bSThomas Zimmermann 5885638c82cSThomas Zimmermann if (!old_fb || (fb->format != old_fb->format)) { 58941016fe1SMaxime Ripard struct drm_crtc_state *crtc_state = new_state->crtc->state; 5905638c82cSThomas Zimmermann struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 5915638c82cSThomas Zimmermann struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info; 5925638c82cSThomas Zimmermann 5935638c82cSThomas Zimmermann ast_set_color_reg(ast, fb->format); 5945638c82cSThomas Zimmermann ast_set_vbios_color_reg(ast, fb->format, vbios_mode_info); 5955638c82cSThomas Zimmermann } 5965638c82cSThomas Zimmermann 5975638c82cSThomas Zimmermann gbo = drm_gem_vram_of_gem(fb->obj[0]); 598a6ff807bSThomas Zimmermann gpu_addr = drm_gem_vram_offset(gbo); 5991a19b4cbSThomas Zimmermann if (drm_WARN_ON_ONCE(dev, gpu_addr < 0)) 600a6ff807bSThomas Zimmermann return; /* Bug: we didn't pin the BO to VRAM in prepare_fb. */ 601a6ff807bSThomas Zimmermann 6025638c82cSThomas Zimmermann ast_set_offset_reg(ast, fb); 603ae37025dSThomas Zimmermann ast_set_start_address_crt1(ast, (u32)gpu_addr); 6042fbeec03SThomas Zimmermann 6052fbeec03SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x00); 6062fbeec03SThomas Zimmermann } 6072fbeec03SThomas Zimmermann 6082fbeec03SThomas Zimmermann static void 6092fbeec03SThomas Zimmermann ast_primary_plane_helper_atomic_disable(struct drm_plane *plane, 610977697e2SMaxime Ripard struct drm_atomic_state *state) 6112fbeec03SThomas Zimmermann { 612fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(plane->dev); 6132fbeec03SThomas Zimmermann 6142fbeec03SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20); 615a6ff807bSThomas Zimmermann } 616a6ff807bSThomas Zimmermann 617a6ff807bSThomas Zimmermann static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = { 618f8bd3dbbSDaniel Vetter DRM_GEM_VRAM_PLANE_HELPER_FUNCS, 619a6ff807bSThomas Zimmermann .atomic_check = ast_primary_plane_helper_atomic_check, 620a6ff807bSThomas Zimmermann .atomic_update = ast_primary_plane_helper_atomic_update, 6212fbeec03SThomas Zimmermann .atomic_disable = ast_primary_plane_helper_atomic_disable, 622a6ff807bSThomas Zimmermann }; 623a6ff807bSThomas Zimmermann 624a6ff807bSThomas Zimmermann static const struct drm_plane_funcs ast_primary_plane_funcs = { 625a6ff807bSThomas Zimmermann .update_plane = drm_atomic_helper_update_plane, 626a6ff807bSThomas Zimmermann .disable_plane = drm_atomic_helper_disable_plane, 627a6ff807bSThomas Zimmermann .destroy = drm_plane_cleanup, 628a6ff807bSThomas Zimmermann .reset = drm_atomic_helper_plane_reset, 629a6ff807bSThomas Zimmermann .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 630a6ff807bSThomas Zimmermann .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 631a6ff807bSThomas Zimmermann }; 632a6ff807bSThomas Zimmermann 633616048afSThomas Zimmermann static int ast_primary_plane_init(struct ast_private *ast) 634616048afSThomas Zimmermann { 635616048afSThomas Zimmermann struct drm_device *dev = &ast->base; 636616048afSThomas Zimmermann struct drm_plane *primary_plane = &ast->primary_plane; 637616048afSThomas Zimmermann int ret; 638616048afSThomas Zimmermann 639616048afSThomas Zimmermann ret = drm_universal_plane_init(dev, primary_plane, 0x01, 640616048afSThomas Zimmermann &ast_primary_plane_funcs, 641616048afSThomas Zimmermann ast_primary_plane_formats, 642616048afSThomas Zimmermann ARRAY_SIZE(ast_primary_plane_formats), 643616048afSThomas Zimmermann NULL, DRM_PLANE_TYPE_PRIMARY, NULL); 644616048afSThomas Zimmermann if (ret) { 645616048afSThomas Zimmermann drm_err(dev, "drm_universal_plane_init() failed: %d\n", ret); 646616048afSThomas Zimmermann return ret; 647616048afSThomas Zimmermann } 648616048afSThomas Zimmermann drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs); 649616048afSThomas Zimmermann 650616048afSThomas Zimmermann return 0; 651616048afSThomas Zimmermann } 652616048afSThomas Zimmermann 653a6ff807bSThomas Zimmermann /* 65402f3bb75SThomas Zimmermann * Cursor plane 65502f3bb75SThomas Zimmermann */ 65602f3bb75SThomas Zimmermann 657718c2286SThomas Zimmermann static void ast_update_cursor_image(u8 __iomem *dst, const u8 *src, int width, int height) 658718c2286SThomas Zimmermann { 659718c2286SThomas Zimmermann union { 660718c2286SThomas Zimmermann u32 ul; 661718c2286SThomas Zimmermann u8 b[4]; 662718c2286SThomas Zimmermann } srcdata32[2], data32; 663718c2286SThomas Zimmermann union { 664718c2286SThomas Zimmermann u16 us; 665718c2286SThomas Zimmermann u8 b[2]; 666718c2286SThomas Zimmermann } data16; 667718c2286SThomas Zimmermann u32 csum = 0; 668718c2286SThomas Zimmermann s32 alpha_dst_delta, last_alpha_dst_delta; 669718c2286SThomas Zimmermann u8 __iomem *dstxor; 670718c2286SThomas Zimmermann const u8 *srcxor; 671718c2286SThomas Zimmermann int i, j; 672718c2286SThomas Zimmermann u32 per_pixel_copy, two_pixel_copy; 673718c2286SThomas Zimmermann 674718c2286SThomas Zimmermann alpha_dst_delta = AST_MAX_HWC_WIDTH << 1; 675718c2286SThomas Zimmermann last_alpha_dst_delta = alpha_dst_delta - (width << 1); 676718c2286SThomas Zimmermann 677718c2286SThomas Zimmermann srcxor = src; 678718c2286SThomas Zimmermann dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta; 679718c2286SThomas Zimmermann per_pixel_copy = width & 1; 680718c2286SThomas Zimmermann two_pixel_copy = width >> 1; 681718c2286SThomas Zimmermann 682718c2286SThomas Zimmermann for (j = 0; j < height; j++) { 683718c2286SThomas Zimmermann for (i = 0; i < two_pixel_copy; i++) { 684718c2286SThomas Zimmermann srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; 685718c2286SThomas Zimmermann srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0; 686718c2286SThomas Zimmermann data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); 687718c2286SThomas Zimmermann data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); 688718c2286SThomas Zimmermann data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4); 689718c2286SThomas Zimmermann data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4); 690718c2286SThomas Zimmermann 691718c2286SThomas Zimmermann writel(data32.ul, dstxor); 692718c2286SThomas Zimmermann csum += data32.ul; 693718c2286SThomas Zimmermann 694718c2286SThomas Zimmermann dstxor += 4; 695718c2286SThomas Zimmermann srcxor += 8; 696718c2286SThomas Zimmermann 697718c2286SThomas Zimmermann } 698718c2286SThomas Zimmermann 699718c2286SThomas Zimmermann for (i = 0; i < per_pixel_copy; i++) { 700718c2286SThomas Zimmermann srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; 701718c2286SThomas Zimmermann data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); 702718c2286SThomas Zimmermann data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); 703718c2286SThomas Zimmermann writew(data16.us, dstxor); 704718c2286SThomas Zimmermann csum += (u32)data16.us; 705718c2286SThomas Zimmermann 706718c2286SThomas Zimmermann dstxor += 2; 707718c2286SThomas Zimmermann srcxor += 4; 708718c2286SThomas Zimmermann } 709718c2286SThomas Zimmermann dstxor += last_alpha_dst_delta; 710718c2286SThomas Zimmermann } 711718c2286SThomas Zimmermann 712718c2286SThomas Zimmermann /* write checksum + signature */ 713718c2286SThomas Zimmermann dst += AST_HWC_SIZE; 714718c2286SThomas Zimmermann writel(csum, dst); 715718c2286SThomas Zimmermann writel(width, dst + AST_HWC_SIGNATURE_SizeX); 716718c2286SThomas Zimmermann writel(height, dst + AST_HWC_SIGNATURE_SizeY); 717718c2286SThomas Zimmermann writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX); 718718c2286SThomas Zimmermann writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY); 719718c2286SThomas Zimmermann } 720718c2286SThomas Zimmermann 721718c2286SThomas Zimmermann static void ast_set_cursor_base(struct ast_private *ast, u64 address) 722718c2286SThomas Zimmermann { 723718c2286SThomas Zimmermann u8 addr0 = (address >> 3) & 0xff; 724718c2286SThomas Zimmermann u8 addr1 = (address >> 11) & 0xff; 725718c2286SThomas Zimmermann u8 addr2 = (address >> 19) & 0xff; 726718c2286SThomas Zimmermann 727718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, addr0); 728718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, addr1); 729718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, addr2); 730718c2286SThomas Zimmermann } 731718c2286SThomas Zimmermann 732718c2286SThomas Zimmermann static void ast_set_cursor_location(struct ast_private *ast, u16 x, u16 y, 733718c2286SThomas Zimmermann u8 x_offset, u8 y_offset) 734718c2286SThomas Zimmermann { 735718c2286SThomas Zimmermann u8 x0 = (x & 0x00ff); 736718c2286SThomas Zimmermann u8 x1 = (x & 0x0f00) >> 8; 737718c2286SThomas Zimmermann u8 y0 = (y & 0x00ff); 738718c2286SThomas Zimmermann u8 y1 = (y & 0x0700) >> 8; 739718c2286SThomas Zimmermann 740718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset); 741718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset); 742718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, x0); 743718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, x1); 744718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, y0); 745718c2286SThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, y1); 746718c2286SThomas Zimmermann } 747718c2286SThomas Zimmermann 748718c2286SThomas Zimmermann static void ast_set_cursor_enabled(struct ast_private *ast, bool enabled) 749718c2286SThomas Zimmermann { 750718c2286SThomas Zimmermann static const u8 mask = (u8)~(AST_IO_VGACRCB_HWC_16BPP | 751718c2286SThomas Zimmermann AST_IO_VGACRCB_HWC_ENABLED); 752718c2286SThomas Zimmermann 753718c2286SThomas Zimmermann u8 vgacrcb = AST_IO_VGACRCB_HWC_16BPP; 754718c2286SThomas Zimmermann 755718c2286SThomas Zimmermann if (enabled) 756718c2286SThomas Zimmermann vgacrcb |= AST_IO_VGACRCB_HWC_ENABLED; 757718c2286SThomas Zimmermann 758718c2286SThomas Zimmermann ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, mask, vgacrcb); 759718c2286SThomas Zimmermann } 760718c2286SThomas Zimmermann 76102f3bb75SThomas Zimmermann static const uint32_t ast_cursor_plane_formats[] = { 76202f3bb75SThomas Zimmermann DRM_FORMAT_ARGB8888, 76302f3bb75SThomas Zimmermann }; 76402f3bb75SThomas Zimmermann 76502f3bb75SThomas Zimmermann static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane, 7667c11b99aSMaxime Ripard struct drm_atomic_state *state) 76702f3bb75SThomas Zimmermann { 7687c11b99aSMaxime Ripard struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 7697c11b99aSMaxime Ripard plane); 770ba5c1649SMaxime Ripard struct drm_framebuffer *fb = new_plane_state->fb; 771ae46a57dSThomas Zimmermann struct drm_crtc_state *crtc_state; 772ae46a57dSThomas Zimmermann int ret; 773ae46a57dSThomas Zimmermann 774ba5c1649SMaxime Ripard if (!new_plane_state->crtc) 775ae46a57dSThomas Zimmermann return 0; 776ae46a57dSThomas Zimmermann 777dec92020SMaxime Ripard crtc_state = drm_atomic_get_new_crtc_state(state, 778ba5c1649SMaxime Ripard new_plane_state->crtc); 779ae46a57dSThomas Zimmermann 780ba5c1649SMaxime Ripard ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, 781ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 782ae46a57dSThomas Zimmermann DRM_PLANE_HELPER_NO_SCALING, 783ae46a57dSThomas Zimmermann true, true); 784ae46a57dSThomas Zimmermann if (ret) 785ae46a57dSThomas Zimmermann return ret; 786ae46a57dSThomas Zimmermann 787ba5c1649SMaxime Ripard if (!new_plane_state->visible) 788ae46a57dSThomas Zimmermann return 0; 789ae46a57dSThomas Zimmermann 790ae46a57dSThomas Zimmermann if (fb->width > AST_MAX_HWC_WIDTH || fb->height > AST_MAX_HWC_HEIGHT) 791ae46a57dSThomas Zimmermann return -EINVAL; 792ae46a57dSThomas Zimmermann 79302f3bb75SThomas Zimmermann return 0; 79402f3bb75SThomas Zimmermann } 79502f3bb75SThomas Zimmermann 79602f3bb75SThomas Zimmermann static void 79702f3bb75SThomas Zimmermann ast_cursor_plane_helper_atomic_update(struct drm_plane *plane, 798977697e2SMaxime Ripard struct drm_atomic_state *state) 79902f3bb75SThomas Zimmermann { 800afee7e95SThomas Zimmermann struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane); 801977697e2SMaxime Ripard struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, 802977697e2SMaxime Ripard plane); 80337418bf1SMaxime Ripard struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, 80437418bf1SMaxime Ripard plane); 80541016fe1SMaxime Ripard struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(new_state); 80641016fe1SMaxime Ripard struct drm_framebuffer *fb = new_state->fb; 807365c0e70SThomas Zimmermann struct ast_private *ast = to_ast_private(plane->dev); 8084d36cf07SThomas Zimmermann struct dma_buf_map dst_map = 8094d36cf07SThomas Zimmermann ast_cursor_plane->hwc[ast_cursor_plane->next_hwc_index].map; 810385131f3SThomas Zimmermann u64 dst_off = 811385131f3SThomas Zimmermann ast_cursor_plane->hwc[ast_cursor_plane->next_hwc_index].off; 812add8b6a9SThomas Zimmermann struct dma_buf_map src_map = shadow_plane_state->data[0]; 81381039adcSThomas Zimmermann unsigned int offset_x, offset_y; 814718c2286SThomas Zimmermann u16 x, y; 815718c2286SThomas Zimmermann u8 x_offset, y_offset; 816718c2286SThomas Zimmermann u8 __iomem *dst; 817718c2286SThomas Zimmermann u8 __iomem *sig; 8184d36cf07SThomas Zimmermann const u8 *src; 819718c2286SThomas Zimmermann 8204d36cf07SThomas Zimmermann src = src_map.vaddr; /* TODO: Use mapping abstraction properly */ 8214d36cf07SThomas Zimmermann dst = dst_map.vaddr_iomem; /* TODO: Use mapping abstraction properly */ 8224d36cf07SThomas Zimmermann sig = dst + AST_HWC_SIZE; /* TODO: Use mapping abstraction properly */ 8234d36cf07SThomas Zimmermann 8244d36cf07SThomas Zimmermann /* 8254d36cf07SThomas Zimmermann * Do data transfer to HW cursor BO. If a new cursor image was installed, 8264d36cf07SThomas Zimmermann * point the scanout engine to dst_gbo's offset and page-flip the HWC buffers. 8274d36cf07SThomas Zimmermann */ 8284d36cf07SThomas Zimmermann 8294d36cf07SThomas Zimmermann ast_update_cursor_image(dst, src, fb->width, fb->height); 830718c2286SThomas Zimmermann 83141016fe1SMaxime Ripard if (new_state->fb != old_state->fb) { 832385131f3SThomas Zimmermann ast_set_cursor_base(ast, dst_off); 833718c2286SThomas Zimmermann 834afee7e95SThomas Zimmermann ++ast_cursor_plane->next_hwc_index; 835afee7e95SThomas Zimmermann ast_cursor_plane->next_hwc_index %= ARRAY_SIZE(ast_cursor_plane->hwc); 836718c2286SThomas Zimmermann } 837718c2286SThomas Zimmermann 8384d36cf07SThomas Zimmermann /* 8394d36cf07SThomas Zimmermann * Update location in HWC signature and registers. 8404d36cf07SThomas Zimmermann */ 841718c2286SThomas Zimmermann 84241016fe1SMaxime Ripard writel(new_state->crtc_x, sig + AST_HWC_SIGNATURE_X); 84341016fe1SMaxime Ripard writel(new_state->crtc_y, sig + AST_HWC_SIGNATURE_Y); 844718c2286SThomas Zimmermann 84581039adcSThomas Zimmermann offset_x = AST_MAX_HWC_WIDTH - fb->width; 846ee4a92d6SThomas Zimmermann offset_y = AST_MAX_HWC_HEIGHT - fb->height; 84702f3bb75SThomas Zimmermann 84841016fe1SMaxime Ripard if (new_state->crtc_x < 0) { 84941016fe1SMaxime Ripard x_offset = (-new_state->crtc_x) + offset_x; 850718c2286SThomas Zimmermann x = 0; 851718c2286SThomas Zimmermann } else { 852718c2286SThomas Zimmermann x_offset = offset_x; 85341016fe1SMaxime Ripard x = new_state->crtc_x; 854718c2286SThomas Zimmermann } 85541016fe1SMaxime Ripard if (new_state->crtc_y < 0) { 85641016fe1SMaxime Ripard y_offset = (-new_state->crtc_y) + offset_y; 857718c2286SThomas Zimmermann y = 0; 858718c2286SThomas Zimmermann } else { 859718c2286SThomas Zimmermann y_offset = offset_y; 86041016fe1SMaxime Ripard y = new_state->crtc_y; 86102f3bb75SThomas Zimmermann } 86202f3bb75SThomas Zimmermann 863718c2286SThomas Zimmermann ast_set_cursor_location(ast, x, y, x_offset, y_offset); 864718c2286SThomas Zimmermann 8654d36cf07SThomas Zimmermann /* Dummy write to enable HWC and make the HW pick-up the changes. */ 866718c2286SThomas Zimmermann ast_set_cursor_enabled(ast, true); 86702f3bb75SThomas Zimmermann } 86802f3bb75SThomas Zimmermann 86902f3bb75SThomas Zimmermann static void 87002f3bb75SThomas Zimmermann ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane, 871977697e2SMaxime Ripard struct drm_atomic_state *state) 87202f3bb75SThomas Zimmermann { 873fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(plane->dev); 87402f3bb75SThomas Zimmermann 875718c2286SThomas Zimmermann ast_set_cursor_enabled(ast, false); 87602f3bb75SThomas Zimmermann } 87702f3bb75SThomas Zimmermann 87802f3bb75SThomas Zimmermann static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = { 8794d36cf07SThomas Zimmermann DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 88002f3bb75SThomas Zimmermann .atomic_check = ast_cursor_plane_helper_atomic_check, 88102f3bb75SThomas Zimmermann .atomic_update = ast_cursor_plane_helper_atomic_update, 88202f3bb75SThomas Zimmermann .atomic_disable = ast_cursor_plane_helper_atomic_disable, 88302f3bb75SThomas Zimmermann }; 88402f3bb75SThomas Zimmermann 88522b6591fSThomas Zimmermann static void ast_cursor_plane_destroy(struct drm_plane *plane) 88622b6591fSThomas Zimmermann { 887afee7e95SThomas Zimmermann struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane); 88822b6591fSThomas Zimmermann size_t i; 88922b6591fSThomas Zimmermann struct drm_gem_vram_object *gbo; 89084810d6aSThomas Zimmermann struct dma_buf_map map; 89122b6591fSThomas Zimmermann 892afee7e95SThomas Zimmermann for (i = 0; i < ARRAY_SIZE(ast_cursor_plane->hwc); ++i) { 893afee7e95SThomas Zimmermann gbo = ast_cursor_plane->hwc[i].gbo; 89484810d6aSThomas Zimmermann map = ast_cursor_plane->hwc[i].map; 89584810d6aSThomas Zimmermann drm_gem_vram_vunmap(gbo, &map); 89622b6591fSThomas Zimmermann drm_gem_vram_unpin(gbo); 89722b6591fSThomas Zimmermann drm_gem_vram_put(gbo); 89822b6591fSThomas Zimmermann } 89922b6591fSThomas Zimmermann 90022b6591fSThomas Zimmermann drm_plane_cleanup(plane); 90122b6591fSThomas Zimmermann } 90222b6591fSThomas Zimmermann 90302f3bb75SThomas Zimmermann static const struct drm_plane_funcs ast_cursor_plane_funcs = { 90402f3bb75SThomas Zimmermann .update_plane = drm_atomic_helper_update_plane, 90502f3bb75SThomas Zimmermann .disable_plane = drm_atomic_helper_disable_plane, 90622b6591fSThomas Zimmermann .destroy = ast_cursor_plane_destroy, 9074d36cf07SThomas Zimmermann DRM_GEM_SHADOW_PLANE_FUNCS, 90802f3bb75SThomas Zimmermann }; 90902f3bb75SThomas Zimmermann 910616048afSThomas Zimmermann static int ast_cursor_plane_init(struct ast_private *ast) 911616048afSThomas Zimmermann { 912616048afSThomas Zimmermann struct drm_device *dev = &ast->base; 913a0ba992dSThomas Zimmermann struct ast_cursor_plane *ast_cursor_plane = &ast->cursor_plane; 914a0ba992dSThomas Zimmermann struct drm_plane *cursor_plane = &ast_cursor_plane->base; 91522b6591fSThomas Zimmermann size_t size, i; 91622b6591fSThomas Zimmermann struct drm_gem_vram_object *gbo; 91784810d6aSThomas Zimmermann struct dma_buf_map map; 918616048afSThomas Zimmermann int ret; 919385131f3SThomas Zimmermann s64 off; 920616048afSThomas Zimmermann 92122b6591fSThomas Zimmermann /* 92222b6591fSThomas Zimmermann * Allocate backing storage for cursors. The BOs are permanently 92322b6591fSThomas Zimmermann * pinned to the top end of the VRAM. 92422b6591fSThomas Zimmermann */ 92522b6591fSThomas Zimmermann 92622b6591fSThomas Zimmermann size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE); 92722b6591fSThomas Zimmermann 928afee7e95SThomas Zimmermann for (i = 0; i < ARRAY_SIZE(ast_cursor_plane->hwc); ++i) { 92922b6591fSThomas Zimmermann gbo = drm_gem_vram_create(dev, size, 0); 93022b6591fSThomas Zimmermann if (IS_ERR(gbo)) { 93122b6591fSThomas Zimmermann ret = PTR_ERR(gbo); 93222b6591fSThomas Zimmermann goto err_hwc; 93322b6591fSThomas Zimmermann } 93422b6591fSThomas Zimmermann ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM | 93522b6591fSThomas Zimmermann DRM_GEM_VRAM_PL_FLAG_TOPDOWN); 93622b6591fSThomas Zimmermann if (ret) 93722b6591fSThomas Zimmermann goto err_drm_gem_vram_put; 93884810d6aSThomas Zimmermann ret = drm_gem_vram_vmap(gbo, &map); 93984810d6aSThomas Zimmermann if (ret) 94084810d6aSThomas Zimmermann goto err_drm_gem_vram_unpin; 941385131f3SThomas Zimmermann off = drm_gem_vram_offset(gbo); 942385131f3SThomas Zimmermann if (off < 0) { 943385131f3SThomas Zimmermann ret = off; 944385131f3SThomas Zimmermann goto err_drm_gem_vram_vunmap; 945385131f3SThomas Zimmermann } 946afee7e95SThomas Zimmermann ast_cursor_plane->hwc[i].gbo = gbo; 94784810d6aSThomas Zimmermann ast_cursor_plane->hwc[i].map = map; 948385131f3SThomas Zimmermann ast_cursor_plane->hwc[i].off = off; 94922b6591fSThomas Zimmermann } 95022b6591fSThomas Zimmermann 95122b6591fSThomas Zimmermann /* 95222b6591fSThomas Zimmermann * Create the cursor plane. The plane's destroy callback will release 95322b6591fSThomas Zimmermann * the backing storages' BO memory. 95422b6591fSThomas Zimmermann */ 95522b6591fSThomas Zimmermann 956616048afSThomas Zimmermann ret = drm_universal_plane_init(dev, cursor_plane, 0x01, 957616048afSThomas Zimmermann &ast_cursor_plane_funcs, 958616048afSThomas Zimmermann ast_cursor_plane_formats, 959616048afSThomas Zimmermann ARRAY_SIZE(ast_cursor_plane_formats), 960616048afSThomas Zimmermann NULL, DRM_PLANE_TYPE_CURSOR, NULL); 961616048afSThomas Zimmermann if (ret) { 96222b6591fSThomas Zimmermann drm_err(dev, "drm_universal_plane failed(): %d\n", ret); 96322b6591fSThomas Zimmermann goto err_hwc; 964616048afSThomas Zimmermann } 965616048afSThomas Zimmermann drm_plane_helper_add(cursor_plane, &ast_cursor_plane_helper_funcs); 966616048afSThomas Zimmermann 967616048afSThomas Zimmermann return 0; 96822b6591fSThomas Zimmermann 96922b6591fSThomas Zimmermann err_hwc: 97022b6591fSThomas Zimmermann while (i) { 97122b6591fSThomas Zimmermann --i; 972afee7e95SThomas Zimmermann gbo = ast_cursor_plane->hwc[i].gbo; 97384810d6aSThomas Zimmermann map = ast_cursor_plane->hwc[i].map; 974385131f3SThomas Zimmermann err_drm_gem_vram_vunmap: 97584810d6aSThomas Zimmermann drm_gem_vram_vunmap(gbo, &map); 97684810d6aSThomas Zimmermann err_drm_gem_vram_unpin: 97722b6591fSThomas Zimmermann drm_gem_vram_unpin(gbo); 97822b6591fSThomas Zimmermann err_drm_gem_vram_put: 97922b6591fSThomas Zimmermann drm_gem_vram_put(gbo); 98022b6591fSThomas Zimmermann } 98122b6591fSThomas Zimmermann return ret; 982616048afSThomas Zimmermann } 983616048afSThomas Zimmermann 98402f3bb75SThomas Zimmermann /* 985a6ff807bSThomas Zimmermann * CRTC 986a6ff807bSThomas Zimmermann */ 987a6ff807bSThomas Zimmermann 988312fec14SDave Airlie static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) 989312fec14SDave Airlie { 990fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(crtc->dev); 991312fec14SDave Airlie 9922fbeec03SThomas Zimmermann /* TODO: Maybe control display signal generation with 9932fbeec03SThomas Zimmermann * Sync Enable (bit CR17.7). 9942fbeec03SThomas Zimmermann */ 995312fec14SDave Airlie switch (mode) { 996312fec14SDave Airlie case DRM_MODE_DPMS_ON: 997312fec14SDave Airlie case DRM_MODE_DPMS_STANDBY: 998312fec14SDave Airlie case DRM_MODE_DPMS_SUSPEND: 99983c6620bSDave Airlie if (ast->tx_chip_type == AST_TX_DP501) 100083c6620bSDave Airlie ast_set_dp501_video_output(crtc->dev, 1); 1001312fec14SDave Airlie break; 1002312fec14SDave Airlie case DRM_MODE_DPMS_OFF: 100383c6620bSDave Airlie if (ast->tx_chip_type == AST_TX_DP501) 100483c6620bSDave Airlie ast_set_dp501_video_output(crtc->dev, 0); 1005312fec14SDave Airlie break; 1006312fec14SDave Airlie } 1007312fec14SDave Airlie } 1008312fec14SDave Airlie 10096abbad2cSThomas Zimmermann static enum drm_mode_status 10106abbad2cSThomas Zimmermann ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) 10116abbad2cSThomas Zimmermann { 10126abbad2cSThomas Zimmermann struct ast_private *ast = to_ast_private(crtc->dev); 10136abbad2cSThomas Zimmermann enum drm_mode_status status; 10146abbad2cSThomas Zimmermann uint32_t jtemp; 10156abbad2cSThomas Zimmermann 10166abbad2cSThomas Zimmermann if (ast->support_wide_screen) { 10176abbad2cSThomas Zimmermann if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050)) 10186abbad2cSThomas Zimmermann return MODE_OK; 10196abbad2cSThomas Zimmermann if ((mode->hdisplay == 1280) && (mode->vdisplay == 800)) 10206abbad2cSThomas Zimmermann return MODE_OK; 10216abbad2cSThomas Zimmermann if ((mode->hdisplay == 1440) && (mode->vdisplay == 900)) 10226abbad2cSThomas Zimmermann return MODE_OK; 10236abbad2cSThomas Zimmermann if ((mode->hdisplay == 1360) && (mode->vdisplay == 768)) 10246abbad2cSThomas Zimmermann return MODE_OK; 10256abbad2cSThomas Zimmermann if ((mode->hdisplay == 1600) && (mode->vdisplay == 900)) 10266abbad2cSThomas Zimmermann return MODE_OK; 10276abbad2cSThomas Zimmermann 10286abbad2cSThomas Zimmermann if ((ast->chip == AST2100) || (ast->chip == AST2200) || 10296abbad2cSThomas Zimmermann (ast->chip == AST2300) || (ast->chip == AST2400) || 10306abbad2cSThomas Zimmermann (ast->chip == AST2500)) { 10316abbad2cSThomas Zimmermann if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080)) 10326abbad2cSThomas Zimmermann return MODE_OK; 10336abbad2cSThomas Zimmermann 10346abbad2cSThomas Zimmermann if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) { 10356abbad2cSThomas Zimmermann jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 10366abbad2cSThomas Zimmermann if (jtemp & 0x01) 10376abbad2cSThomas Zimmermann return MODE_NOMODE; 10386abbad2cSThomas Zimmermann else 10396abbad2cSThomas Zimmermann return MODE_OK; 10406abbad2cSThomas Zimmermann } 10416abbad2cSThomas Zimmermann } 10426abbad2cSThomas Zimmermann } 10436abbad2cSThomas Zimmermann 10446abbad2cSThomas Zimmermann status = MODE_NOMODE; 10456abbad2cSThomas Zimmermann 10466abbad2cSThomas Zimmermann switch (mode->hdisplay) { 10476abbad2cSThomas Zimmermann case 640: 10486abbad2cSThomas Zimmermann if (mode->vdisplay == 480) 10496abbad2cSThomas Zimmermann status = MODE_OK; 10506abbad2cSThomas Zimmermann break; 10516abbad2cSThomas Zimmermann case 800: 10526abbad2cSThomas Zimmermann if (mode->vdisplay == 600) 10536abbad2cSThomas Zimmermann status = MODE_OK; 10546abbad2cSThomas Zimmermann break; 10556abbad2cSThomas Zimmermann case 1024: 10566abbad2cSThomas Zimmermann if (mode->vdisplay == 768) 10576abbad2cSThomas Zimmermann status = MODE_OK; 10586abbad2cSThomas Zimmermann break; 10596abbad2cSThomas Zimmermann case 1280: 10606abbad2cSThomas Zimmermann if (mode->vdisplay == 1024) 10616abbad2cSThomas Zimmermann status = MODE_OK; 10626abbad2cSThomas Zimmermann break; 10636abbad2cSThomas Zimmermann case 1600: 10646abbad2cSThomas Zimmermann if (mode->vdisplay == 1200) 10656abbad2cSThomas Zimmermann status = MODE_OK; 10666abbad2cSThomas Zimmermann break; 10676abbad2cSThomas Zimmermann default: 10686abbad2cSThomas Zimmermann break; 10696abbad2cSThomas Zimmermann } 10706abbad2cSThomas Zimmermann 10716abbad2cSThomas Zimmermann return status; 10726abbad2cSThomas Zimmermann } 10736abbad2cSThomas Zimmermann 1074b48e1b6fSThomas Zimmermann static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc, 107529b77ad7SMaxime Ripard struct drm_atomic_state *state) 1076b48e1b6fSThomas Zimmermann { 107729b77ad7SMaxime Ripard struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 107829b77ad7SMaxime Ripard crtc); 10795638c82cSThomas Zimmermann struct drm_device *dev = crtc->dev; 1080e7d70cd4SThomas Zimmermann struct ast_crtc_state *ast_state; 10813339fdf5SThomas Zimmermann const struct drm_format_info *format; 1082b48e1b6fSThomas Zimmermann bool succ; 1083b48e1b6fSThomas Zimmermann 108429b77ad7SMaxime Ripard if (!crtc_state->enable) 1085d6ddbd5cSThomas Zimmermann return 0; /* no mode checks if CRTC is being disabled */ 1086d6ddbd5cSThomas Zimmermann 108729b77ad7SMaxime Ripard ast_state = to_ast_crtc_state(crtc_state); 1088b48e1b6fSThomas Zimmermann 10893339fdf5SThomas Zimmermann format = ast_state->format; 10905638c82cSThomas Zimmermann if (drm_WARN_ON_ONCE(dev, !format)) 10915638c82cSThomas Zimmermann return -EINVAL; /* BUG: We didn't set format in primary check(). */ 1092e7d70cd4SThomas Zimmermann 109329b77ad7SMaxime Ripard succ = ast_get_vbios_mode_info(format, &crtc_state->mode, 109429b77ad7SMaxime Ripard &crtc_state->adjusted_mode, 1095e7d70cd4SThomas Zimmermann &ast_state->vbios_mode_info); 1096b48e1b6fSThomas Zimmermann if (!succ) 1097b48e1b6fSThomas Zimmermann return -EINVAL; 1098b48e1b6fSThomas Zimmermann 1099b48e1b6fSThomas Zimmermann return 0; 1100b48e1b6fSThomas Zimmermann } 1101b48e1b6fSThomas Zimmermann 1102f3901b5fSThomas Zimmermann static void 1103f6ebe9f9SMaxime Ripard ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, 1104f6ebe9f9SMaxime Ripard struct drm_atomic_state *state) 11058e3784dfSThomas Zimmermann { 1106253f28b6SMaxime Ripard struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 1107253f28b6SMaxime Ripard crtc); 1108f6ebe9f9SMaxime Ripard struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 1109f6ebe9f9SMaxime Ripard crtc); 11108e3784dfSThomas Zimmermann struct ast_private *ast = to_ast_private(crtc->dev); 1111253f28b6SMaxime Ripard struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 11128e3784dfSThomas Zimmermann struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state); 11138e3784dfSThomas Zimmermann 11148e3784dfSThomas Zimmermann /* 11158e3784dfSThomas Zimmermann * The gamma LUT has to be reloaded after changing the primary 11168e3784dfSThomas Zimmermann * plane's color format. 11178e3784dfSThomas Zimmermann */ 11188e3784dfSThomas Zimmermann if (old_ast_crtc_state->format != ast_crtc_state->format) 11198e3784dfSThomas Zimmermann ast_crtc_load_lut(ast, crtc); 11208e3784dfSThomas Zimmermann } 11218e3784dfSThomas Zimmermann 11228e3784dfSThomas Zimmermann static void 1123f3901b5fSThomas Zimmermann ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, 1124351f950dSMaxime Ripard struct drm_atomic_state *state) 1125b48e1b6fSThomas Zimmermann { 112671d873ccSThomas Zimmermann struct drm_device *dev = crtc->dev; 1127fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 11285638c82cSThomas Zimmermann struct drm_crtc_state *crtc_state = crtc->state; 11295638c82cSThomas Zimmermann struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 11305638c82cSThomas Zimmermann struct ast_vbios_mode_info *vbios_mode_info = 11315638c82cSThomas Zimmermann &ast_crtc_state->vbios_mode_info; 11325638c82cSThomas Zimmermann struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 1133b48e1b6fSThomas Zimmermann 1134e7d70cd4SThomas Zimmermann ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info); 1135b48e1b6fSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06); 1136e7d70cd4SThomas Zimmermann ast_set_std_reg(ast, adjusted_mode, vbios_mode_info); 1137e7d70cd4SThomas Zimmermann ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info); 1138e7d70cd4SThomas Zimmermann ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info); 1139ae37025dSThomas Zimmermann ast_set_crtthd_reg(ast); 1140e7d70cd4SThomas Zimmermann ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info); 1141b48e1b6fSThomas Zimmermann 1142b48e1b6fSThomas Zimmermann ast_crtc_dpms(crtc, DRM_MODE_DPMS_ON); 1143b48e1b6fSThomas Zimmermann } 1144b48e1b6fSThomas Zimmermann 1145b48e1b6fSThomas Zimmermann static void 1146b48e1b6fSThomas Zimmermann ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, 1147351f950dSMaxime Ripard struct drm_atomic_state *state) 1148b48e1b6fSThomas Zimmermann { 1149351f950dSMaxime Ripard struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 1150351f950dSMaxime Ripard crtc); 115139edb287SThomas Zimmermann struct drm_device *dev = crtc->dev; 115239edb287SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 115339edb287SThomas Zimmermann 1154b48e1b6fSThomas Zimmermann ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 115539edb287SThomas Zimmermann 115639edb287SThomas Zimmermann /* 115739edb287SThomas Zimmermann * HW cursors require the underlying primary plane and CRTC to 115839edb287SThomas Zimmermann * display a valid mode and image. This is not the case during 115939edb287SThomas Zimmermann * full modeset operations. So we temporarily disable any active 116039edb287SThomas Zimmermann * plane, including the HW cursor. Each plane's atomic_update() 116139edb287SThomas Zimmermann * helper will re-enable it if necessary. 116239edb287SThomas Zimmermann * 116339edb287SThomas Zimmermann * We only do this during *full* modesets. It does not affect 116439edb287SThomas Zimmermann * simple pageflips on the planes. 116539edb287SThomas Zimmermann */ 116639edb287SThomas Zimmermann drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false); 116739edb287SThomas Zimmermann 116839edb287SThomas Zimmermann /* 116939edb287SThomas Zimmermann * Ensure that no scanout takes place before reprogramming mode 117039edb287SThomas Zimmermann * and format registers. 117139edb287SThomas Zimmermann */ 117239edb287SThomas Zimmermann ast_wait_for_vretrace(ast); 1173b48e1b6fSThomas Zimmermann } 1174312fec14SDave Airlie 1175312fec14SDave Airlie static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { 11766abbad2cSThomas Zimmermann .mode_valid = ast_crtc_helper_mode_valid, 1177b48e1b6fSThomas Zimmermann .atomic_check = ast_crtc_helper_atomic_check, 11788e3784dfSThomas Zimmermann .atomic_flush = ast_crtc_helper_atomic_flush, 1179b48e1b6fSThomas Zimmermann .atomic_enable = ast_crtc_helper_atomic_enable, 1180b48e1b6fSThomas Zimmermann .atomic_disable = ast_crtc_helper_atomic_disable, 1181312fec14SDave Airlie }; 1182312fec14SDave Airlie 1183f0adbc38SThomas Zimmermann static void ast_crtc_reset(struct drm_crtc *crtc) 1184f0adbc38SThomas Zimmermann { 1185f0adbc38SThomas Zimmermann struct ast_crtc_state *ast_state = 1186f0adbc38SThomas Zimmermann kzalloc(sizeof(*ast_state), GFP_KERNEL); 1187f0adbc38SThomas Zimmermann 1188f0adbc38SThomas Zimmermann if (crtc->state) 1189f0adbc38SThomas Zimmermann crtc->funcs->atomic_destroy_state(crtc, crtc->state); 1190f0adbc38SThomas Zimmermann 1191fea3fdf9SJiasheng Jiang if (ast_state) 1192f0adbc38SThomas Zimmermann __drm_atomic_helper_crtc_reset(crtc, &ast_state->base); 1193fea3fdf9SJiasheng Jiang else 1194fea3fdf9SJiasheng Jiang __drm_atomic_helper_crtc_reset(crtc, NULL); 1195f0adbc38SThomas Zimmermann } 1196f0adbc38SThomas Zimmermann 119783be6a3cSThomas Zimmermann static struct drm_crtc_state * 119883be6a3cSThomas Zimmermann ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 119983be6a3cSThomas Zimmermann { 1200e7d70cd4SThomas Zimmermann struct ast_crtc_state *new_ast_state, *ast_state; 12011a19b4cbSThomas Zimmermann struct drm_device *dev = crtc->dev; 120283be6a3cSThomas Zimmermann 12031a19b4cbSThomas Zimmermann if (drm_WARN_ON(dev, !crtc->state)) 120483be6a3cSThomas Zimmermann return NULL; 120583be6a3cSThomas Zimmermann 120683be6a3cSThomas Zimmermann new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL); 120783be6a3cSThomas Zimmermann if (!new_ast_state) 120883be6a3cSThomas Zimmermann return NULL; 120983be6a3cSThomas Zimmermann __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base); 121083be6a3cSThomas Zimmermann 1211e7d70cd4SThomas Zimmermann ast_state = to_ast_crtc_state(crtc->state); 1212e7d70cd4SThomas Zimmermann 12133339fdf5SThomas Zimmermann new_ast_state->format = ast_state->format; 1214e7d70cd4SThomas Zimmermann memcpy(&new_ast_state->vbios_mode_info, &ast_state->vbios_mode_info, 1215e7d70cd4SThomas Zimmermann sizeof(new_ast_state->vbios_mode_info)); 1216e7d70cd4SThomas Zimmermann 121783be6a3cSThomas Zimmermann return &new_ast_state->base; 121883be6a3cSThomas Zimmermann } 121983be6a3cSThomas Zimmermann 122083be6a3cSThomas Zimmermann static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc, 122183be6a3cSThomas Zimmermann struct drm_crtc_state *state) 122283be6a3cSThomas Zimmermann { 122383be6a3cSThomas Zimmermann struct ast_crtc_state *ast_state = to_ast_crtc_state(state); 122483be6a3cSThomas Zimmermann 122583be6a3cSThomas Zimmermann __drm_atomic_helper_crtc_destroy_state(&ast_state->base); 122683be6a3cSThomas Zimmermann kfree(ast_state); 122783be6a3cSThomas Zimmermann } 122883be6a3cSThomas Zimmermann 1229312fec14SDave Airlie static const struct drm_crtc_funcs ast_crtc_funcs = { 1230f0adbc38SThomas Zimmermann .reset = ast_crtc_reset, 12316a470dc2SThomas Zimmermann .destroy = drm_crtc_cleanup, 12324961eb60SThomas Zimmermann .set_config = drm_atomic_helper_set_config, 12334961eb60SThomas Zimmermann .page_flip = drm_atomic_helper_page_flip, 123483be6a3cSThomas Zimmermann .atomic_duplicate_state = ast_crtc_atomic_duplicate_state, 123583be6a3cSThomas Zimmermann .atomic_destroy_state = ast_crtc_atomic_destroy_state, 1236312fec14SDave Airlie }; 1237312fec14SDave Airlie 12387f5ccd44SRashika static int ast_crtc_init(struct drm_device *dev) 1239312fec14SDave Airlie { 1240fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 12416a470dc2SThomas Zimmermann struct drm_crtc *crtc = &ast->crtc; 1242a6ff807bSThomas Zimmermann int ret; 1243312fec14SDave Airlie 1244c35da0edSThomas Zimmermann ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane, 1245a0ba992dSThomas Zimmermann &ast->cursor_plane.base, &ast_crtc_funcs, 124602f3bb75SThomas Zimmermann NULL); 1247a6ff807bSThomas Zimmermann if (ret) 12486a470dc2SThomas Zimmermann return ret; 1249a6ff807bSThomas Zimmermann 1250c35da0edSThomas Zimmermann drm_mode_crtc_set_gamma_size(crtc, 256); 1251c35da0edSThomas Zimmermann drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs); 1252c35da0edSThomas Zimmermann 1253312fec14SDave Airlie return 0; 1254312fec14SDave Airlie } 1255312fec14SDave Airlie 12564961eb60SThomas Zimmermann /* 1257b20384d9SThomas Zimmermann * VGA Connector 12584961eb60SThomas Zimmermann */ 12594961eb60SThomas Zimmermann 1260b20384d9SThomas Zimmermann static int ast_vga_connector_helper_get_modes(struct drm_connector *connector) 1261312fec14SDave Airlie { 1262b20384d9SThomas Zimmermann struct ast_vga_connector *ast_vga_connector = to_ast_vga_connector(connector); 1263*3ab26eddSThomas Zimmermann struct edid *edid; 1264*3ab26eddSThomas Zimmermann int count; 12656c9bd443SGregory Williams 1266*3ab26eddSThomas Zimmermann if (!ast_vga_connector->i2c) 1267*3ab26eddSThomas Zimmermann goto err_drm_connector_update_edid_property; 1268312fec14SDave Airlie 1269b20384d9SThomas Zimmermann edid = drm_get_edid(connector, &ast_vga_connector->i2c->adapter); 1270*3ab26eddSThomas Zimmermann if (!edid) 1271*3ab26eddSThomas Zimmermann goto err_drm_connector_update_edid_property; 1272*3ab26eddSThomas Zimmermann 1273*3ab26eddSThomas Zimmermann count = drm_add_edid_modes(connector, edid); 1274993dcb05SJani Nikula kfree(edid); 1275*3ab26eddSThomas Zimmermann 1276*3ab26eddSThomas Zimmermann return count; 1277*3ab26eddSThomas Zimmermann 1278*3ab26eddSThomas Zimmermann err_drm_connector_update_edid_property: 1279b20384d9SThomas Zimmermann drm_connector_update_edid_property(connector, NULL); 1280312fec14SDave Airlie return 0; 1281312fec14SDave Airlie } 1282312fec14SDave Airlie 1283b20384d9SThomas Zimmermann static const struct drm_connector_helper_funcs ast_vga_connector_helper_funcs = { 1284b20384d9SThomas Zimmermann .get_modes = ast_vga_connector_helper_get_modes, 1285312fec14SDave Airlie }; 1286312fec14SDave Airlie 1287b20384d9SThomas Zimmermann static const struct drm_connector_funcs ast_vga_connector_funcs = { 12884961eb60SThomas Zimmermann .reset = drm_atomic_helper_connector_reset, 1289312fec14SDave Airlie .fill_modes = drm_helper_probe_single_connector_modes, 1290a2cce09cSThomas Zimmermann .destroy = drm_connector_cleanup, 12914961eb60SThomas Zimmermann .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 12924961eb60SThomas Zimmermann .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 1293312fec14SDave Airlie }; 1294312fec14SDave Airlie 1295a59b0264SThomas Zimmermann static int ast_vga_connector_init(struct drm_device *dev, 1296a59b0264SThomas Zimmermann struct ast_vga_connector *ast_vga_connector) 1297312fec14SDave Airlie { 1298b20384d9SThomas Zimmermann struct drm_connector *connector = &ast_vga_connector->base; 12999285f09eSThomas Zimmermann int ret; 1300312fec14SDave Airlie 1301b20384d9SThomas Zimmermann ast_vga_connector->i2c = ast_i2c_create(dev); 1302b20384d9SThomas Zimmermann if (!ast_vga_connector->i2c) 13031a19b4cbSThomas Zimmermann drm_err(dev, "failed to add ddc bus for connector\n"); 1304350fd554SAndrzej Pietrasiewicz 1305b20384d9SThomas Zimmermann if (ast_vga_connector->i2c) 1306b20384d9SThomas Zimmermann ret = drm_connector_init_with_ddc(dev, connector, &ast_vga_connector_funcs, 1307350fd554SAndrzej Pietrasiewicz DRM_MODE_CONNECTOR_VGA, 1308b20384d9SThomas Zimmermann &ast_vga_connector->i2c->adapter); 130955dc449aSThomas Zimmermann else 1310b20384d9SThomas Zimmermann ret = drm_connector_init(dev, connector, &ast_vga_connector_funcs, 131155dc449aSThomas Zimmermann DRM_MODE_CONNECTOR_VGA); 13129285f09eSThomas Zimmermann if (ret) 13139285f09eSThomas Zimmermann return ret; 1314312fec14SDave Airlie 1315b20384d9SThomas Zimmermann drm_connector_helper_add(connector, &ast_vga_connector_helper_funcs); 1316312fec14SDave Airlie 1317312fec14SDave Airlie connector->interlace_allowed = 0; 1318312fec14SDave Airlie connector->doublescan_allowed = 0; 1319312fec14SDave Airlie 1320595cb5e0SKim Phillips connector->polled = DRM_CONNECTOR_POLL_CONNECT; 1321312fec14SDave Airlie 1322a59b0264SThomas Zimmermann return 0; 1323a59b0264SThomas Zimmermann } 1324a59b0264SThomas Zimmermann 1325a59b0264SThomas Zimmermann static int ast_vga_output_init(struct ast_private *ast) 1326a59b0264SThomas Zimmermann { 1327a59b0264SThomas Zimmermann struct drm_device *dev = &ast->base; 1328a59b0264SThomas Zimmermann struct drm_crtc *crtc = &ast->crtc; 1329a59b0264SThomas Zimmermann struct drm_encoder *encoder = &ast->output.vga.encoder; 1330a59b0264SThomas Zimmermann struct ast_vga_connector *ast_vga_connector = &ast->output.vga.vga_connector; 1331a59b0264SThomas Zimmermann struct drm_connector *connector = &ast_vga_connector->base; 1332a59b0264SThomas Zimmermann int ret; 1333a59b0264SThomas Zimmermann 1334a59b0264SThomas Zimmermann ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC); 1335a59b0264SThomas Zimmermann if (ret) 1336a59b0264SThomas Zimmermann return ret; 1337f665147cSThomas Zimmermann encoder->possible_crtcs = drm_crtc_mask(crtc); 1338a59b0264SThomas Zimmermann 1339a59b0264SThomas Zimmermann ret = ast_vga_connector_init(dev, ast_vga_connector); 1340a59b0264SThomas Zimmermann if (ret) 1341a59b0264SThomas Zimmermann return ret; 1342a59b0264SThomas Zimmermann 1343a59b0264SThomas Zimmermann ret = drm_connector_attach_encoder(connector, encoder); 1344a59b0264SThomas Zimmermann if (ret) 1345a59b0264SThomas Zimmermann return ret; 1346312fec14SDave Airlie 1347312fec14SDave Airlie return 0; 1348312fec14SDave Airlie } 1349312fec14SDave Airlie 1350e6949ff3SThomas Zimmermann /* 1351*3ab26eddSThomas Zimmermann * DP501 Connector 1352*3ab26eddSThomas Zimmermann */ 1353*3ab26eddSThomas Zimmermann 1354*3ab26eddSThomas Zimmermann static int ast_dp501_connector_helper_get_modes(struct drm_connector *connector) 1355*3ab26eddSThomas Zimmermann { 1356*3ab26eddSThomas Zimmermann void *edid; 1357*3ab26eddSThomas Zimmermann bool succ; 1358*3ab26eddSThomas Zimmermann int count; 1359*3ab26eddSThomas Zimmermann 1360*3ab26eddSThomas Zimmermann edid = kmalloc(EDID_LENGTH, GFP_KERNEL); 1361*3ab26eddSThomas Zimmermann if (!edid) 1362*3ab26eddSThomas Zimmermann goto err_drm_connector_update_edid_property; 1363*3ab26eddSThomas Zimmermann 1364*3ab26eddSThomas Zimmermann succ = ast_dp501_read_edid(connector->dev, edid); 1365*3ab26eddSThomas Zimmermann if (!succ) 1366*3ab26eddSThomas Zimmermann goto err_kfree; 1367*3ab26eddSThomas Zimmermann 1368*3ab26eddSThomas Zimmermann drm_connector_update_edid_property(connector, edid); 1369*3ab26eddSThomas Zimmermann count = drm_add_edid_modes(connector, edid); 1370*3ab26eddSThomas Zimmermann kfree(edid); 1371*3ab26eddSThomas Zimmermann 1372*3ab26eddSThomas Zimmermann return count; 1373*3ab26eddSThomas Zimmermann 1374*3ab26eddSThomas Zimmermann err_kfree: 1375*3ab26eddSThomas Zimmermann kfree(edid); 1376*3ab26eddSThomas Zimmermann err_drm_connector_update_edid_property: 1377*3ab26eddSThomas Zimmermann drm_connector_update_edid_property(connector, NULL); 1378*3ab26eddSThomas Zimmermann return 0; 1379*3ab26eddSThomas Zimmermann } 1380*3ab26eddSThomas Zimmermann 1381*3ab26eddSThomas Zimmermann static const struct drm_connector_helper_funcs ast_dp501_connector_helper_funcs = { 1382*3ab26eddSThomas Zimmermann .get_modes = ast_dp501_connector_helper_get_modes, 1383*3ab26eddSThomas Zimmermann }; 1384*3ab26eddSThomas Zimmermann 1385*3ab26eddSThomas Zimmermann static const struct drm_connector_funcs ast_dp501_connector_funcs = { 1386*3ab26eddSThomas Zimmermann .reset = drm_atomic_helper_connector_reset, 1387*3ab26eddSThomas Zimmermann .fill_modes = drm_helper_probe_single_connector_modes, 1388*3ab26eddSThomas Zimmermann .destroy = drm_connector_cleanup, 1389*3ab26eddSThomas Zimmermann .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 1390*3ab26eddSThomas Zimmermann .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 1391*3ab26eddSThomas Zimmermann }; 1392*3ab26eddSThomas Zimmermann 1393*3ab26eddSThomas Zimmermann static int ast_dp501_connector_init(struct drm_device *dev, struct drm_connector *connector) 1394*3ab26eddSThomas Zimmermann { 1395*3ab26eddSThomas Zimmermann int ret; 1396*3ab26eddSThomas Zimmermann 1397*3ab26eddSThomas Zimmermann ret = drm_connector_init(dev, connector, &ast_dp501_connector_funcs, 1398*3ab26eddSThomas Zimmermann DRM_MODE_CONNECTOR_DisplayPort); 1399*3ab26eddSThomas Zimmermann if (ret) 1400*3ab26eddSThomas Zimmermann return ret; 1401*3ab26eddSThomas Zimmermann 1402*3ab26eddSThomas Zimmermann drm_connector_helper_add(connector, &ast_dp501_connector_helper_funcs); 1403*3ab26eddSThomas Zimmermann 1404*3ab26eddSThomas Zimmermann connector->interlace_allowed = 0; 1405*3ab26eddSThomas Zimmermann connector->doublescan_allowed = 0; 1406*3ab26eddSThomas Zimmermann 1407*3ab26eddSThomas Zimmermann connector->polled = DRM_CONNECTOR_POLL_CONNECT; 1408*3ab26eddSThomas Zimmermann 1409*3ab26eddSThomas Zimmermann return 0; 1410*3ab26eddSThomas Zimmermann } 1411*3ab26eddSThomas Zimmermann 1412*3ab26eddSThomas Zimmermann static int ast_dp501_output_init(struct ast_private *ast) 1413*3ab26eddSThomas Zimmermann { 1414*3ab26eddSThomas Zimmermann struct drm_device *dev = &ast->base; 1415*3ab26eddSThomas Zimmermann struct drm_crtc *crtc = &ast->crtc; 1416*3ab26eddSThomas Zimmermann struct drm_encoder *encoder = &ast->output.dp501.encoder; 1417*3ab26eddSThomas Zimmermann struct drm_connector *connector = &ast->output.dp501.connector; 1418*3ab26eddSThomas Zimmermann int ret; 1419*3ab26eddSThomas Zimmermann 1420*3ab26eddSThomas Zimmermann ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS); 1421*3ab26eddSThomas Zimmermann if (ret) 1422*3ab26eddSThomas Zimmermann return ret; 1423*3ab26eddSThomas Zimmermann encoder->possible_crtcs = drm_crtc_mask(crtc); 1424*3ab26eddSThomas Zimmermann 1425*3ab26eddSThomas Zimmermann ret = ast_dp501_connector_init(dev, connector); 1426*3ab26eddSThomas Zimmermann if (ret) 1427*3ab26eddSThomas Zimmermann return ret; 1428*3ab26eddSThomas Zimmermann 1429*3ab26eddSThomas Zimmermann ret = drm_connector_attach_encoder(connector, encoder); 1430*3ab26eddSThomas Zimmermann if (ret) 1431*3ab26eddSThomas Zimmermann return ret; 1432*3ab26eddSThomas Zimmermann 1433*3ab26eddSThomas Zimmermann return 0; 1434*3ab26eddSThomas Zimmermann } 1435*3ab26eddSThomas Zimmermann 1436*3ab26eddSThomas Zimmermann /* 1437e6949ff3SThomas Zimmermann * Mode config 1438e6949ff3SThomas Zimmermann */ 1439e6949ff3SThomas Zimmermann 1440b20384d9SThomas Zimmermann static const struct drm_mode_config_helper_funcs ast_mode_config_helper_funcs = { 14412f0ddd89SThomas Zimmermann .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 14422f0ddd89SThomas Zimmermann }; 14432f0ddd89SThomas Zimmermann 1444e6949ff3SThomas Zimmermann static const struct drm_mode_config_funcs ast_mode_config_funcs = { 1445e6949ff3SThomas Zimmermann .fb_create = drm_gem_fb_create, 1446e6949ff3SThomas Zimmermann .mode_valid = drm_vram_helper_mode_valid, 1447e6949ff3SThomas Zimmermann .atomic_check = drm_atomic_helper_check, 1448e6949ff3SThomas Zimmermann .atomic_commit = drm_atomic_helper_commit, 1449e6949ff3SThomas Zimmermann }; 1450e6949ff3SThomas Zimmermann 1451e6949ff3SThomas Zimmermann int ast_mode_config_init(struct ast_private *ast) 1452312fec14SDave Airlie { 1453e0f5a738SThomas Zimmermann struct drm_device *dev = &ast->base; 145446fb883cSThomas Zimmermann struct pci_dev *pdev = to_pci_dev(dev->dev); 1455a6ff807bSThomas Zimmermann int ret; 1456a6ff807bSThomas Zimmermann 1457e6949ff3SThomas Zimmermann ret = drmm_mode_config_init(dev); 1458e6949ff3SThomas Zimmermann if (ret) 1459e6949ff3SThomas Zimmermann return ret; 1460e6949ff3SThomas Zimmermann 1461e6949ff3SThomas Zimmermann dev->mode_config.funcs = &ast_mode_config_funcs; 1462e6949ff3SThomas Zimmermann dev->mode_config.min_width = 0; 1463e6949ff3SThomas Zimmermann dev->mode_config.min_height = 0; 1464e6949ff3SThomas Zimmermann dev->mode_config.preferred_depth = 24; 1465e6949ff3SThomas Zimmermann dev->mode_config.prefer_shadow = 1; 146646fb883cSThomas Zimmermann dev->mode_config.fb_base = pci_resource_start(pdev, 0); 1467e6949ff3SThomas Zimmermann 1468e6949ff3SThomas Zimmermann if (ast->chip == AST2100 || 1469e6949ff3SThomas Zimmermann ast->chip == AST2200 || 1470e6949ff3SThomas Zimmermann ast->chip == AST2300 || 1471e6949ff3SThomas Zimmermann ast->chip == AST2400 || 1472e6949ff3SThomas Zimmermann ast->chip == AST2500) { 1473e6949ff3SThomas Zimmermann dev->mode_config.max_width = 1920; 1474e6949ff3SThomas Zimmermann dev->mode_config.max_height = 2048; 1475e6949ff3SThomas Zimmermann } else { 1476e6949ff3SThomas Zimmermann dev->mode_config.max_width = 1600; 1477e6949ff3SThomas Zimmermann dev->mode_config.max_height = 1200; 1478e6949ff3SThomas Zimmermann } 1479e6949ff3SThomas Zimmermann 14802f0ddd89SThomas Zimmermann dev->mode_config.helper_private = &ast_mode_config_helper_funcs; 14812f0ddd89SThomas Zimmermann 1482a6ff807bSThomas Zimmermann 1483616048afSThomas Zimmermann ret = ast_primary_plane_init(ast); 1484616048afSThomas Zimmermann if (ret) 148502f3bb75SThomas Zimmermann return ret; 1486616048afSThomas Zimmermann 1487616048afSThomas Zimmermann ret = ast_cursor_plane_init(ast); 1488616048afSThomas Zimmermann if (ret) 1489616048afSThomas Zimmermann return ret; 149002f3bb75SThomas Zimmermann 1491312fec14SDave Airlie ast_crtc_init(dev); 1492a59b0264SThomas Zimmermann 1493a59b0264SThomas Zimmermann switch (ast->tx_chip_type) { 1494a59b0264SThomas Zimmermann case AST_TX_NONE: 1495a59b0264SThomas Zimmermann case AST_TX_SIL164: 1496a59b0264SThomas Zimmermann ret = ast_vga_output_init(ast); 1497a59b0264SThomas Zimmermann break; 1498*3ab26eddSThomas Zimmermann case AST_TX_DP501: 1499*3ab26eddSThomas Zimmermann ret = ast_dp501_output_init(ast); 1500*3ab26eddSThomas Zimmermann break; 1501a59b0264SThomas Zimmermann } 1502*3ab26eddSThomas Zimmermann 1503a59b0264SThomas Zimmermann if (ret) 1504a59b0264SThomas Zimmermann return ret; 1505a6ff807bSThomas Zimmermann 1506e6949ff3SThomas Zimmermann drm_mode_config_reset(dev); 1507e6949ff3SThomas Zimmermann 1508312fec14SDave Airlie return 0; 1509312fec14SDave Airlie } 1510