1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * 4312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 5312fec14SDave Airlie * copy of this software and associated documentation files (the 6312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 7312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 8312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 9312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 10312fec14SDave Airlie * the following conditions: 11312fec14SDave Airlie * 12312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 19312fec14SDave Airlie * 20312fec14SDave Airlie * The above copyright notice and this permission notice (including the 21312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 22312fec14SDave Airlie * of the Software. 23312fec14SDave Airlie * 24312fec14SDave Airlie */ 25312fec14SDave Airlie /* 26312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 27312fec14SDave Airlie */ 28fbbbd160SSam Ravnborg 29fbbbd160SSam Ravnborg #include <linux/pci.h> 30312fec14SDave Airlie 314961eb60SThomas Zimmermann #include <drm/drm_atomic_helper.h> 32760285e7SDavid Howells #include <drm/drm_crtc_helper.h> 33fbbbd160SSam Ravnborg #include <drm/drm_gem.h> 34fbbbd160SSam Ravnborg #include <drm/drm_gem_vram_helper.h> 35fbbbd160SSam Ravnborg 36fbbbd160SSam Ravnborg #include "ast_drv.h" 37312fec14SDave Airlie 38312fec14SDave Airlie void ast_set_index_reg_mask(struct ast_private *ast, 39312fec14SDave Airlie uint32_t base, uint8_t index, 40312fec14SDave Airlie uint8_t mask, uint8_t val) 41312fec14SDave Airlie { 42312fec14SDave Airlie u8 tmp; 43312fec14SDave Airlie ast_io_write8(ast, base, index); 44312fec14SDave Airlie tmp = (ast_io_read8(ast, base + 1) & mask) | val; 45312fec14SDave Airlie ast_set_index_reg(ast, base, index, tmp); 46312fec14SDave Airlie } 47312fec14SDave Airlie 48312fec14SDave Airlie uint8_t ast_get_index_reg(struct ast_private *ast, 49312fec14SDave Airlie uint32_t base, uint8_t index) 50312fec14SDave Airlie { 51312fec14SDave Airlie uint8_t ret; 52312fec14SDave Airlie ast_io_write8(ast, base, index); 53312fec14SDave Airlie ret = ast_io_read8(ast, base + 1); 54312fec14SDave Airlie return ret; 55312fec14SDave Airlie } 56312fec14SDave Airlie 57312fec14SDave Airlie uint8_t ast_get_index_reg_mask(struct ast_private *ast, 58312fec14SDave Airlie uint32_t base, uint8_t index, uint8_t mask) 59312fec14SDave Airlie { 60312fec14SDave Airlie uint8_t ret; 61312fec14SDave Airlie ast_io_write8(ast, base, index); 62312fec14SDave Airlie ret = ast_io_read8(ast, base + 1) & mask; 63312fec14SDave Airlie return ret; 64312fec14SDave Airlie } 65312fec14SDave Airlie 6671f677a9SRussell Currey static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev) 6771f677a9SRussell Currey { 6871f677a9SRussell Currey struct device_node *np = dev->pdev->dev.of_node; 69fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 7071f677a9SRussell Currey uint32_t data, jregd0, jregd1; 7171f677a9SRussell Currey 7271f677a9SRussell Currey /* Defaults */ 7371f677a9SRussell Currey ast->config_mode = ast_use_defaults; 7471f677a9SRussell Currey *scu_rev = 0xffffffff; 7571f677a9SRussell Currey 7671f677a9SRussell Currey /* Check if we have device-tree properties */ 7771f677a9SRussell Currey if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", 7871f677a9SRussell Currey scu_rev)) { 7971f677a9SRussell Currey /* We do, disable P2A access */ 8071f677a9SRussell Currey ast->config_mode = ast_use_dt; 811a19b4cbSThomas Zimmermann drm_info(dev, "Using device-tree for configuration\n"); 8271f677a9SRussell Currey return; 8371f677a9SRussell Currey } 8471f677a9SRussell Currey 8571f677a9SRussell Currey /* Not all families have a P2A bridge */ 8671f677a9SRussell Currey if (dev->pdev->device != PCI_CHIP_AST2000) 8771f677a9SRussell Currey return; 8871f677a9SRussell Currey 8971f677a9SRussell Currey /* 9071f677a9SRussell Currey * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 9171f677a9SRussell Currey * is disabled. We force using P2A if VGA only mode bit 9271f677a9SRussell Currey * is set D[7] 9371f677a9SRussell Currey */ 9471f677a9SRussell Currey jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 9571f677a9SRussell Currey jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 9671f677a9SRussell Currey if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) { 9771f677a9SRussell Currey /* Double check it's actually working */ 9871f677a9SRussell Currey data = ast_read32(ast, 0xf004); 9971f677a9SRussell Currey if (data != 0xFFFFFFFF) { 10071f677a9SRussell Currey /* P2A works, grab silicon revision */ 10171f677a9SRussell Currey ast->config_mode = ast_use_p2a; 10271f677a9SRussell Currey 1031a19b4cbSThomas Zimmermann drm_info(dev, "Using P2A bridge for configuration\n"); 10471f677a9SRussell Currey 10571f677a9SRussell Currey /* Read SCU7c (silicon revision register) */ 10671f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 10771f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 10871f677a9SRussell Currey *scu_rev = ast_read32(ast, 0x1207c); 10971f677a9SRussell Currey return; 11071f677a9SRussell Currey } 11171f677a9SRussell Currey } 11271f677a9SRussell Currey 11371f677a9SRussell Currey /* We have a P2A bridge but it's disabled */ 1141a19b4cbSThomas Zimmermann drm_info(dev, "P2A bridge disabled, using default configuration\n"); 11571f677a9SRussell Currey } 116312fec14SDave Airlie 117d1b98557SBenjamin Herrenschmidt static int ast_detect_chip(struct drm_device *dev, bool *need_post) 118312fec14SDave Airlie { 119fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 12071f677a9SRussell Currey uint32_t jreg, scu_rev; 12171f677a9SRussell Currey 12271f677a9SRussell Currey /* 12371f677a9SRussell Currey * If VGA isn't enabled, we need to enable now or subsequent 12471f677a9SRussell Currey * access to the scratch registers will fail. We also inform 12571f677a9SRussell Currey * our caller that it needs to POST the chip 12671f677a9SRussell Currey * (Assumption: VGA not enabled -> need to POST) 12771f677a9SRussell Currey */ 12871f677a9SRussell Currey if (!ast_is_vga_enabled(dev)) { 12971f677a9SRussell Currey ast_enable_vga(dev); 1301a19b4cbSThomas Zimmermann drm_info(dev, "VGA not enabled on entry, requesting chip POST\n"); 13171f677a9SRussell Currey *need_post = true; 13271f677a9SRussell Currey } else 13371f677a9SRussell Currey *need_post = false; 13471f677a9SRussell Currey 13571f677a9SRussell Currey 13671f677a9SRussell Currey /* Enable extended register access */ 1378f372e25SY.C. Chen ast_open_key(ast); 13805b43971SY.C. Chen ast_enable_mmio(dev); 139312fec14SDave Airlie 14071f677a9SRussell Currey /* Find out whether P2A works or whether to use device-tree */ 14171f677a9SRussell Currey ast_detect_config_mode(dev, &scu_rev); 14271f677a9SRussell Currey 14371f677a9SRussell Currey /* Identify chipset */ 1449f93c8b3SY.C. Chen if (dev->pdev->revision >= 0x40) { 1459f93c8b3SY.C. Chen ast->chip = AST2500; 1461a19b4cbSThomas Zimmermann drm_info(dev, "AST 2500 detected\n"); 1479f93c8b3SY.C. Chen } else if (dev->pdev->revision >= 0x30) { 1481453bf4cSDave Airlie ast->chip = AST2400; 1491a19b4cbSThomas Zimmermann drm_info(dev, "AST 2400 detected\n"); 1501453bf4cSDave Airlie } else if (dev->pdev->revision >= 0x20) { 151312fec14SDave Airlie ast->chip = AST2300; 1521a19b4cbSThomas Zimmermann drm_info(dev, "AST 2300 detected\n"); 153312fec14SDave Airlie } else if (dev->pdev->revision >= 0x10) { 15471f677a9SRussell Currey switch (scu_rev & 0x0300) { 155312fec14SDave Airlie case 0x0200: 156312fec14SDave Airlie ast->chip = AST1100; 1571a19b4cbSThomas Zimmermann drm_info(dev, "AST 1100 detected\n"); 158312fec14SDave Airlie break; 159312fec14SDave Airlie case 0x0100: 160312fec14SDave Airlie ast->chip = AST2200; 1611a19b4cbSThomas Zimmermann drm_info(dev, "AST 2200 detected\n"); 162312fec14SDave Airlie break; 163312fec14SDave Airlie case 0x0000: 164312fec14SDave Airlie ast->chip = AST2150; 1651a19b4cbSThomas Zimmermann drm_info(dev, "AST 2150 detected\n"); 166312fec14SDave Airlie break; 167312fec14SDave Airlie default: 168312fec14SDave Airlie ast->chip = AST2100; 1691a19b4cbSThomas Zimmermann drm_info(dev, "AST 2100 detected\n"); 170312fec14SDave Airlie break; 171312fec14SDave Airlie } 172312fec14SDave Airlie ast->vga2_clone = false; 173312fec14SDave Airlie } else { 17483502a5dSY.C. Chen ast->chip = AST2000; 1751a19b4cbSThomas Zimmermann drm_info(dev, "AST 2000 detected\n"); 176312fec14SDave Airlie } 177f1f62f2cSDave Airlie 178d1b98557SBenjamin Herrenschmidt /* Check if we support wide screen */ 179f1f62f2cSDave Airlie switch (ast->chip) { 180f1f62f2cSDave Airlie case AST2000: 181f1f62f2cSDave Airlie ast->support_wide_screen = false; 182f1f62f2cSDave Airlie break; 183f1f62f2cSDave Airlie default: 184f1f62f2cSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 185f1f62f2cSDave Airlie if (!(jreg & 0x80)) 186f1f62f2cSDave Airlie ast->support_wide_screen = true; 187f1f62f2cSDave Airlie else if (jreg & 0x01) 188f1f62f2cSDave Airlie ast->support_wide_screen = true; 189f1f62f2cSDave Airlie else { 190f1f62f2cSDave Airlie ast->support_wide_screen = false; 19171f677a9SRussell Currey if (ast->chip == AST2300 && 19271f677a9SRussell Currey (scu_rev & 0x300) == 0x0) /* ast1300 */ 193f1f62f2cSDave Airlie ast->support_wide_screen = true; 19471f677a9SRussell Currey if (ast->chip == AST2400 && 19571f677a9SRussell Currey (scu_rev & 0x300) == 0x100) /* ast1400 */ 1961453bf4cSDave Airlie ast->support_wide_screen = true; 1979f93c8b3SY.C. Chen if (ast->chip == AST2500 && 1989f93c8b3SY.C. Chen scu_rev == 0x100) /* ast2510 */ 1999f93c8b3SY.C. Chen ast->support_wide_screen = true; 200f1f62f2cSDave Airlie } 201f1f62f2cSDave Airlie break; 202f1f62f2cSDave Airlie } 203f1f62f2cSDave Airlie 204d1b98557SBenjamin Herrenschmidt /* Check 3rd Tx option (digital output afaik) */ 20583c6620bSDave Airlie ast->tx_chip_type = AST_TX_NONE; 206d1b98557SBenjamin Herrenschmidt 207d1b98557SBenjamin Herrenschmidt /* 208d1b98557SBenjamin Herrenschmidt * VGACRA3 Enhanced Color Mode Register, check if DVO is already 209d1b98557SBenjamin Herrenschmidt * enabled, in that case, assume we have a SIL164 TMDS transmitter 21042fb1427SBenjamin Herrenschmidt * 21142fb1427SBenjamin Herrenschmidt * Don't make that assumption if we the chip wasn't enabled and 21242fb1427SBenjamin Herrenschmidt * is at power-on reset, otherwise we'll incorrectly "detect" a 21342fb1427SBenjamin Herrenschmidt * SIL164 when there is none. 214d1b98557SBenjamin Herrenschmidt */ 21542fb1427SBenjamin Herrenschmidt if (!*need_post) { 21683c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); 21783c6620bSDave Airlie if (jreg & 0x80) 21883c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 21942fb1427SBenjamin Herrenschmidt } 220d1b98557SBenjamin Herrenschmidt 22183c6620bSDave Airlie if ((ast->chip == AST2300) || (ast->chip == AST2400)) { 222d1b98557SBenjamin Herrenschmidt /* 223d1b98557SBenjamin Herrenschmidt * On AST2300 and 2400, look the configuration set by the SoC in 224d1b98557SBenjamin Herrenschmidt * the SOC scratch register #1 bits 11:8 (interestingly marked 22542fb1427SBenjamin Herrenschmidt * as "reserved" in the spec) 226d1b98557SBenjamin Herrenschmidt */ 22783c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 22883c6620bSDave Airlie switch (jreg) { 22983c6620bSDave Airlie case 0x04: 23083c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 23183c6620bSDave Airlie break; 23283c6620bSDave Airlie case 0x08: 23383c6620bSDave Airlie ast->dp501_fw_addr = kzalloc(32*1024, GFP_KERNEL); 23483c6620bSDave Airlie if (ast->dp501_fw_addr) { 23583c6620bSDave Airlie /* backup firmware */ 23683c6620bSDave Airlie if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) { 23783c6620bSDave Airlie kfree(ast->dp501_fw_addr); 23883c6620bSDave Airlie ast->dp501_fw_addr = NULL; 23983c6620bSDave Airlie } 24083c6620bSDave Airlie } 241df561f66SGustavo A. R. Silva fallthrough; 24283c6620bSDave Airlie case 0x0c: 24383c6620bSDave Airlie ast->tx_chip_type = AST_TX_DP501; 24483c6620bSDave Airlie } 24583c6620bSDave Airlie } 24683c6620bSDave Airlie 247d1b98557SBenjamin Herrenschmidt /* Print stuff for diagnostic purposes */ 248d1b98557SBenjamin Herrenschmidt switch(ast->tx_chip_type) { 249d1b98557SBenjamin Herrenschmidt case AST_TX_SIL164: 2501a19b4cbSThomas Zimmermann drm_info(dev, "Using Sil164 TMDS transmitter\n"); 251d1b98557SBenjamin Herrenschmidt break; 252d1b98557SBenjamin Herrenschmidt case AST_TX_DP501: 2531a19b4cbSThomas Zimmermann drm_info(dev, "Using DP501 DisplayPort transmitter\n"); 254d1b98557SBenjamin Herrenschmidt break; 255d1b98557SBenjamin Herrenschmidt default: 2561a19b4cbSThomas Zimmermann drm_info(dev, "Analog VGA only\n"); 257d1b98557SBenjamin Herrenschmidt } 258312fec14SDave Airlie return 0; 259312fec14SDave Airlie } 260312fec14SDave Airlie 261312fec14SDave Airlie static int ast_get_dram_info(struct drm_device *dev) 262312fec14SDave Airlie { 26371f677a9SRussell Currey struct device_node *np = dev->pdev->dev.of_node; 264fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 26571f677a9SRussell Currey uint32_t mcr_cfg, mcr_scu_mpll, mcr_scu_strap; 26671f677a9SRussell Currey uint32_t denum, num, div, ref_pll, dsel; 267312fec14SDave Airlie 26871f677a9SRussell Currey switch (ast->config_mode) { 26971f677a9SRussell Currey case ast_use_dt: 27071f677a9SRussell Currey /* 27171f677a9SRussell Currey * If some properties are missing, use reasonable 27271f677a9SRussell Currey * defaults for AST2400 27371f677a9SRussell Currey */ 27471f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-configuration", 27571f677a9SRussell Currey &mcr_cfg)) 27671f677a9SRussell Currey mcr_cfg = 0x00000577; 27771f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-mpll", 27871f677a9SRussell Currey &mcr_scu_mpll)) 27971f677a9SRussell Currey mcr_scu_mpll = 0x000050C0; 28071f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-strap", 28171f677a9SRussell Currey &mcr_scu_strap)) 28271f677a9SRussell Currey mcr_scu_strap = 0; 28371f677a9SRussell Currey break; 28471f677a9SRussell Currey case ast_use_p2a: 28571f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 28671f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 28771f677a9SRussell Currey mcr_cfg = ast_read32(ast, 0x10004); 28871f677a9SRussell Currey mcr_scu_mpll = ast_read32(ast, 0x10120); 28971f677a9SRussell Currey mcr_scu_strap = ast_read32(ast, 0x10170); 29071f677a9SRussell Currey break; 29171f677a9SRussell Currey case ast_use_defaults: 29271f677a9SRussell Currey default: 2936c971c09SY.C. Chen ast->dram_bus_width = 16; 2946c971c09SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 2959f93c8b3SY.C. Chen if (ast->chip == AST2500) 2969f93c8b3SY.C. Chen ast->mclk = 800; 2979f93c8b3SY.C. Chen else 2986c971c09SY.C. Chen ast->mclk = 396; 29971f677a9SRussell Currey return 0; 3006c971c09SY.C. Chen } 301312fec14SDave Airlie 30271f677a9SRussell Currey if (mcr_cfg & 0x40) 303312fec14SDave Airlie ast->dram_bus_width = 16; 304312fec14SDave Airlie else 305312fec14SDave Airlie ast->dram_bus_width = 32; 306312fec14SDave Airlie 3079f93c8b3SY.C. Chen if (ast->chip == AST2500) { 3089f93c8b3SY.C. Chen switch (mcr_cfg & 0x03) { 3099f93c8b3SY.C. Chen case 0: 3109f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3119f93c8b3SY.C. Chen break; 3129f93c8b3SY.C. Chen default: 3139f93c8b3SY.C. Chen case 1: 3149f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_2Gx16; 3159f93c8b3SY.C. Chen break; 3169f93c8b3SY.C. Chen case 2: 3179f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_4Gx16; 3189f93c8b3SY.C. Chen break; 3199f93c8b3SY.C. Chen case 3: 3209f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_8Gx16; 3219f93c8b3SY.C. Chen break; 3229f93c8b3SY.C. Chen } 3239f93c8b3SY.C. Chen } else if (ast->chip == AST2300 || ast->chip == AST2400) { 32471f677a9SRussell Currey switch (mcr_cfg & 0x03) { 325312fec14SDave Airlie case 0: 326312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 327312fec14SDave Airlie break; 328312fec14SDave Airlie default: 329312fec14SDave Airlie case 1: 330312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 331312fec14SDave Airlie break; 332312fec14SDave Airlie case 2: 333312fec14SDave Airlie ast->dram_type = AST_DRAM_2Gx16; 334312fec14SDave Airlie break; 335312fec14SDave Airlie case 3: 336312fec14SDave Airlie ast->dram_type = AST_DRAM_4Gx16; 337312fec14SDave Airlie break; 338312fec14SDave Airlie } 339312fec14SDave Airlie } else { 34071f677a9SRussell Currey switch (mcr_cfg & 0x0c) { 341312fec14SDave Airlie case 0: 342312fec14SDave Airlie case 4: 343312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 344312fec14SDave Airlie break; 345312fec14SDave Airlie case 8: 34671f677a9SRussell Currey if (mcr_cfg & 0x40) 347312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 348312fec14SDave Airlie else 349312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx32; 350312fec14SDave Airlie break; 351312fec14SDave Airlie case 0xc: 352312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx32; 353312fec14SDave Airlie break; 354312fec14SDave Airlie } 355312fec14SDave Airlie } 356312fec14SDave Airlie 35771f677a9SRussell Currey if (mcr_scu_strap & 0x2000) 358312fec14SDave Airlie ref_pll = 14318; 359312fec14SDave Airlie else 360312fec14SDave Airlie ref_pll = 12000; 361312fec14SDave Airlie 36271f677a9SRussell Currey denum = mcr_scu_mpll & 0x1f; 36371f677a9SRussell Currey num = (mcr_scu_mpll & 0x3fe0) >> 5; 36471f677a9SRussell Currey dsel = (mcr_scu_mpll & 0xc000) >> 14; 36571f677a9SRussell Currey switch (dsel) { 366312fec14SDave Airlie case 3: 367312fec14SDave Airlie div = 0x4; 368312fec14SDave Airlie break; 369312fec14SDave Airlie case 2: 370312fec14SDave Airlie case 1: 371312fec14SDave Airlie div = 0x2; 372312fec14SDave Airlie break; 373312fec14SDave Airlie default: 374312fec14SDave Airlie div = 0x1; 375312fec14SDave Airlie break; 376312fec14SDave Airlie } 3776475a7ccSBenjamin Herrenschmidt ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000)); 378312fec14SDave Airlie return 0; 379312fec14SDave Airlie } 380312fec14SDave Airlie 381312fec14SDave Airlie int ast_driver_load(struct drm_device *dev, unsigned long flags) 382312fec14SDave Airlie { 383312fec14SDave Airlie struct ast_private *ast; 384d1b98557SBenjamin Herrenschmidt bool need_post; 385312fec14SDave Airlie int ret = 0; 386312fec14SDave Airlie 387312fec14SDave Airlie ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL); 388312fec14SDave Airlie if (!ast) 389312fec14SDave Airlie return -ENOMEM; 390312fec14SDave Airlie 391312fec14SDave Airlie dev->dev_private = ast; 392312fec14SDave Airlie ast->dev = dev; 393312fec14SDave Airlie 394312fec14SDave Airlie ast->regs = pci_iomap(dev->pdev, 1, 0); 395312fec14SDave Airlie if (!ast->regs) { 396312fec14SDave Airlie ret = -EIO; 397312fec14SDave Airlie goto out_free; 398312fec14SDave Airlie } 3990dd68309SBenjamin Herrenschmidt 4000dd68309SBenjamin Herrenschmidt /* 4010dd68309SBenjamin Herrenschmidt * If we don't have IO space at all, use MMIO now and 4020dd68309SBenjamin Herrenschmidt * assume the chip has MMIO enabled by default (rev 0x20 4030dd68309SBenjamin Herrenschmidt * and higher). 4040dd68309SBenjamin Herrenschmidt */ 4050dd68309SBenjamin Herrenschmidt if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) { 4061a19b4cbSThomas Zimmermann drm_info(dev, "platform has no IO space, trying MMIO\n"); 4070dd68309SBenjamin Herrenschmidt ast->ioregs = ast->regs + AST_IO_MM_OFFSET; 4080dd68309SBenjamin Herrenschmidt } 4090dd68309SBenjamin Herrenschmidt 4100dd68309SBenjamin Herrenschmidt /* "map" IO regs if the above hasn't done so already */ 4110dd68309SBenjamin Herrenschmidt if (!ast->ioregs) { 412312fec14SDave Airlie ast->ioregs = pci_iomap(dev->pdev, 2, 0); 413312fec14SDave Airlie if (!ast->ioregs) { 414312fec14SDave Airlie ret = -EIO; 415312fec14SDave Airlie goto out_free; 416312fec14SDave Airlie } 4170dd68309SBenjamin Herrenschmidt } 418312fec14SDave Airlie 419d1b98557SBenjamin Herrenschmidt ast_detect_chip(dev, &need_post); 420312fec14SDave Airlie 421298360afSRussell Currey ret = ast_get_dram_info(dev); 422298360afSRussell Currey if (ret) 423298360afSRussell Currey goto out_free; 4240149e780SThomas Zimmermann drm_info(dev, "dram MCLK=%u Mhz type=%d bus_width=%d\n", 4250149e780SThomas Zimmermann ast->mclk, ast->dram_type, ast->dram_bus_width); 426312fec14SDave Airlie 427244d0128SThomas Zimmermann if (need_post) 428244d0128SThomas Zimmermann ast_post_gpu(dev); 429244d0128SThomas Zimmermann 430312fec14SDave Airlie ret = ast_mm_init(ast); 431312fec14SDave Airlie if (ret) 432312fec14SDave Airlie goto out_free; 433312fec14SDave Airlie 434e6949ff3SThomas Zimmermann ret = ast_mode_config_init(ast); 4351728bf64SThomas Zimmermann if (ret) 4361728bf64SThomas Zimmermann goto out_free; 437312fec14SDave Airlie 438312fec14SDave Airlie return 0; 439312fec14SDave Airlie out_free: 440312fec14SDave Airlie kfree(ast); 441312fec14SDave Airlie dev->dev_private = NULL; 442312fec14SDave Airlie return ret; 443312fec14SDave Airlie } 444312fec14SDave Airlie 44511b3c20bSGabriel Krisman Bertazi void ast_driver_unload(struct drm_device *dev) 446312fec14SDave Airlie { 447fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 448312fec14SDave Airlie 44905b43971SY.C. Chen /* enable standard VGA decode */ 45005b43971SY.C. Chen ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04); 45105b43971SY.C. Chen 45212f8030eSEgbert Eich ast_release_firmware(dev); 45383c6620bSDave Airlie kfree(ast->dp501_fw_addr); 454312fec14SDave Airlie 455312fec14SDave Airlie kfree(ast); 456312fec14SDave Airlie } 457